1 /*****************************************************************************
3 * ESS Maestro/Maestro-2/Maestro-2E driver for Linux 2.[23].x
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * (c) Copyright 1999 Alan Cox <alan.cox@linux.org>
21 * Based heavily on SonicVibes.c:
22 * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch)
24 * Heavily modified by Zach Brown <zab@zabbo.net> based on lunch
25 * with ESS engineers. Many thanks to Howard Kim for providing
26 * contacts and hardware. Honorable mention goes to Eric
27 * Brombaugh for all sorts of things. Best regards to the
28 * proprietors of Hack Central for fine lodging.
31 * /dev/dsp0-3 standard /dev/dsp device, (mostly) OSS compatible
32 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
34 * Hardware Description
36 * A working Maestro setup contains the Maestro chip wired to a
37 * codec or 2. In the Maestro we have the APUs, the ASSP, and the
38 * Wavecache. The APUs can be though of as virtual audio routing
39 * channels. They can take data from a number of sources and perform
40 * basic encodings of the data. The wavecache is a storehouse for
41 * PCM data. Typically it deals with PCI and interracts with the
42 * APUs. The ASSP is a wacky DSP like device that ESS is loth
43 * to release docs on. Thankfully it isn't required on the Maestro
44 * until you start doing insane things like FM emulation and surround
45 * encoding. The codecs are almost always AC-97 compliant codecs,
46 * but it appears that early Maestros may have had PT101 (an ESS
47 * part?) wired to them. The only real difference in the Maestro
48 * families is external goop like docking capability, memory for
49 * the ASSP, and initialization differences.
53 * We only drive the APU/Wavecache as typical DACs and drive the
54 * mixers in the codecs. There are 64 APUs. We assign 6 to each
55 * /dev/dsp? device. 2 channels for output, and 4 channels for
58 * Each APU can do a number of things, but we only really use
59 * 3 basic functions. For playback we use them to convert PCM
60 * data fetched over PCI by the wavecahche into analog data that
61 * is handed to the codec. One APU for mono, and a pair for stereo.
62 * When in stereo, the combination of smarts in the APU and Wavecache
63 * decide which wavecache gets the left or right channel.
65 * For record we still use the old overly mono system. For each in
66 * coming channel the data comes in from the codec, through a 'input'
67 * APU, through another rate converter APU, and then into memory via
68 * the wavecache and PCI. If its stereo, we mash it back into LRLR in
69 * software. The pass between the 2 APUs is supposedly what requires us
70 * to have a 512 byte buffer sitting around in wavecache/memory.
72 * The wavecache makes our life even more fun. First off, it can
73 * only address the first 28 bits of PCI address space, making it
74 * useless on quite a few architectures. Secondly, its insane.
75 * It claims to fetch from 4 regions of PCI space, each 4 meg in length.
76 * But that doesn't really work. You can only use 1 region. So all our
77 * allocations have to be in 4meg of each other. Booo. Hiss.
78 * So we have a module parameter, dsps_order, that is the order of
79 * the number of dsps to provide. All their buffer space is allocated
80 * on open time. The sonicvibes OSS routines we inherited really want
81 * power of 2 buffers, so we have all those next to each other, then
82 * 512 byte regions for the recording wavecaches. This ends up
83 * wasting quite a bit of memory. The only fixes I can see would be
84 * getting a kernel allocator that could work in zones, or figuring out
85 * just how to coerce the WP into doing what we want.
87 * The indirection of the various registers means we have to spinlock
88 * nearly all register accesses. We have the main register indirection
89 * like the wave cache, maestro registers, etc. Then we have beasts
90 * like the APU interface that is indirect registers gotten at through
91 * the main maestro indirection. Ouch. We spinlock around the actual
92 * ports on a per card basis. This means spinlock activity at each IO
93 * operation, but the only IO operation clusters are in non critical
94 * paths and it makes the code far easier to follow. Interrupts are
95 * blocked while holding the locks because the int handler has to
96 * get at some of them :(. The mixer interface doesn't, however.
97 * We also have an OSS state lock that is thrown around in a few
100 * This driver has brute force APM suspend support. We catch suspend
101 * notifications and stop all work being done on the chip. Any people
102 * that try between this shutdown and the real suspend operation will
103 * be put to sleep. When we resume we restore our software state on
104 * the chip and wake up the people that were using it. The code thats
105 * being used now is quite dirty and assumes we're on a uni-processor
106 * machine. Much of it will need to be cleaned up for SMP ACPI or
109 * We also pay attention to PCI power management now. The driver
110 * will power down units of the chip that it knows aren't needed.
111 * The WaveProcessor and company are only powered on when people
112 * have /dev/dsp*s open. On removal the driver will
113 * power down the maestro entirely. There could still be
114 * trouble with BIOSen that magically change power states
115 * themselves, but we'll see.
118 * v0.15 - May 21 2001 - Marcus Meissner <mm@caldera.de>
119 * Ported to Linux 2.4 PCI API. Some clean ups, global devs list
120 * removed (now using pci device driver data).
121 * PM needs to be polished still. Bumped version.
122 * (still kind of v0.14) May 13 2001 - Ben Pfaff <pfaffben@msu.edu>
123 * Add support for 978 docking and basic hardware volume control
124 * (still kind of v0.14) Nov 23 - Alan Cox <alan@redhat.com>
125 * Add clocking= for people with seriously warped hardware
126 * (still v0.14) Nov 10 2000 - Bartlomiej Zolnierkiewicz <bkz@linux-ide.org>
127 * add __init to maestro_ac97_init() and maestro_install()
128 * (still based on v0.14) Mar 29 2000 - Zach Brown <zab@redhat.com>
129 * move to 2.3 power management interface, which
130 * required hacking some suspend/resume/check paths
131 * make static compilation work
132 * v0.14 - Jan 28 2000 - Zach Brown <zab@redhat.com>
133 * add PCI power management through ACPI regs.
134 * we now shut down on machine reboot/halt
135 * leave scary PCI config items alone (isa stuff, mostly)
136 * enable 1921s, it seems only mine was broke.
137 * fix swapped left/right pcm dac. har har.
138 * up bob freq, increase buffers, fix pointers at underflow
139 * silly compilation problems
140 * v0.13 - Nov 18 1999 - Zach Brown <zab@redhat.com>
141 * fix nec Versas? man would that be cool.
142 * v0.12 - Nov 12 1999 - Zach Brown <zab@redhat.com>
143 * brown bag volume max fix..
144 * v0.11 - Nov 11 1999 - Zach Brown <zab@redhat.com>
145 * use proper stereo apu decoding, mmap/write should work.
146 * make volume sliders more useful, tweak rate calculation.
147 * fix lame 8bit format reporting bug. duh. apm apu saving buglet also
148 * fix maestro 1 clock freq "bug", remove pt101 support
149 * v0.10 - Oct 28 1999 - Zach Brown <zab@redhat.com>
150 * aha, so, sometimes the WP writes a status word to offset 0
151 * from one of the PCMBARs. rearrange allocation accordingly..
152 * cheers again to Eric for being a good hacker in investigating this.
153 * Jeroen Hoogervorst submits 7500 fix out of nowhere. yay. :)
154 * v0.09 - Oct 23 1999 - Zach Brown <zab@redhat.com>
156 * re-order something such that some 2Es now work. Magic!
157 * new codec reset routine. made some codecs come to life.
158 * fix clear_advance, sync some control with ESS.
159 * now write to all base regs to be paranoid.
160 * v0.08 - Oct 20 1999 - Zach Brown <zab@redhat.com>
161 * Fix initial buflen bug. I am so smart. also smp compiling..
162 * I owe Eric yet another beer: fixed recmask, igain,
163 * muting, and adc sync consistency. Go Team.
164 * v0.07 - Oct 4 1999 - Zach Brown <zab@redhat.com>
165 * tweak adc/dac, formating, and stuff to allow full duplex
166 * allocate dsps memory at open() so we can fit in the wavecache window
167 * fix wavecache braindamage. again. no more scribbling?
168 * fix ess 1921 codec bug on some laptops.
169 * fix dumb pci scanning bug
170 * started 2.3 cleanup, redid spinlocks, little cleanups
171 * v0.06 - Sep 20 1999 - Zach Brown <zab@redhat.com>
172 * fix wavecache thinkos. limit to 1 /dev/dsp.
173 * eric is wearing his thinking toque this week.
174 * spotted apu mode bugs and gain ramping problem
175 * don't touch weird mixer regs, make recmask optional
176 * fixed igain inversion, defaults for mixers, clean up rec_start
177 * make mono recording work.
178 * report subsystem stuff, please send reports.
179 * littles: parallel out, amp now
180 * v0.05 - Sep 17 1999 - Zach Brown <zab@redhat.com>
181 * merged and fixed up Eric's initial recording code
182 * munged format handling to catch misuse, needs rewrite.
183 * revert ring bus init, fixup shared int, add pci busmaster setting
184 * fix mixer oss interface, fix mic mute and recmask
185 * mask off unsupported mixers, reset with all 1s, modularize defaults
186 * make sure bob is running while we need it
187 * got rid of device limit, initial minimal apm hooks
188 * pull out dead code/includes, only allow multimedia/audio maestros
189 * v0.04 - Sep 01 1999 - Zach Brown <zab@redhat.com>
190 * copied memory leak fix from sonicvibes driver
191 * different ac97 reset, play with 2.0 ac97, simplify ring bus setup
192 * bob freq code, region sanity, jitter sync fix; all from Eric
197 * do smart things with ac97 2.0 bits.
201 * it also would be fun to have a mode that would not use pci dma at all
202 * but would copy into the wavecache on board memory and use that
203 * on architectures that don't like the maestro's pci dma ickiness.
206 /*****************************************************************************/
208 #include <linux/module.h>
209 #include <linux/sched.h>
210 #include <linux/smp_lock.h>
211 #include <linux/string.h>
212 #include <linux/ctype.h>
213 #include <linux/ioport.h>
214 #include <linux/delay.h>
215 #include <linux/sound.h>
216 #include <linux/slab.h>
217 #include <linux/soundcard.h>
218 #include <linux/pci.h>
219 #include <linux/spinlock.h>
220 #include <linux/init.h>
221 #include <linux/interrupt.h>
222 #include <linux/poll.h>
223 #include <linux/reboot.h>
224 #include <linux/bitops.h>
225 #include <linux/wait.h>
227 #include <asm/current.h>
230 #include <asm/page.h>
231 #include <asm/uaccess.h>
233 #include <linux/pm.h>
234 static int maestro_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *d);
238 static struct pci_driver maestro_pci_driver;
240 /* --------------------------------------------------------------------- */
246 #define M_printk(args...) {if (debug) printk(args);}
251 /* we try to setup 2^(dsps_order) /dev/dsp devices */
252 static int dsps_order;
253 /* whether or not we mess around with power management */
254 static int use_pm=2; /* set to 1 for force */
255 /* clocking for broken hardware - a few laptops seem to use a 50Khz clock
256 ie insmod with clocking=50000 or so */
258 static int clocking=48000;
260 MODULE_AUTHOR("Zach Brown <zab@zabbo.net>, Alan Cox <alan@redhat.com>");
261 MODULE_DESCRIPTION("ESS Maestro Driver");
262 MODULE_LICENSE("GPL");
265 MODULE_PARM(debug,"i");
267 MODULE_PARM(dsps_order,"i");
268 MODULE_PARM(use_pm,"i");
269 MODULE_PARM(clocking, "i");
271 /* --------------------------------------------------------------------- */
272 #define DRIVER_VERSION "0.15"
274 #ifndef PCI_VENDOR_ESS
275 #define PCI_VENDOR_ESS 0x125D
276 #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 /* Maestro 2 */
277 #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 /* Maestro 2E */
279 #define PCI_VENDOR_ESS_OLD 0x1285 /* Platform Tech,
280 the people the maestro
282 #define PCI_DEVICE_ID_ESS_ESS0100 0x0100 /* maestro 1 */
283 #endif /* PCI_VENDOR_ESS */
285 #define ESS_CHAN_HARD 0x100
288 #define NEC_VERSA_SUBID1 0x80581033
289 #define NEC_VERSA_SUBID2 0x803c1033
292 /* changed so that I could actually find all the
293 references and fix them up. it's a little more readable now. */
294 #define ESS_FMT_STEREO 0x01
295 #define ESS_FMT_16BIT 0x02
296 #define ESS_FMT_MASK 0x03
297 #define ESS_DAC_SHIFT 0
298 #define ESS_ADC_SHIFT 4
300 #define ESS_STATE_MAGIC 0x125D1968
301 #define ESS_CARD_MAGIC 0x19283746
303 #define DAC_RUNNING 1
304 #define ADC_RUNNING 2
306 #define MAX_DSP_ORDER 2
307 #define MAX_DSPS (1<<MAX_DSP_ORDER)
308 #define NR_DSPS (1<<dsps_order)
312 #define NR_APU_REGS 16
322 /* bits in the acpi masks */
323 #define ACPI_12MHZ ( 1 << 15)
324 #define ACPI_24MHZ ( 1 << 14)
325 #define ACPI_978 ( 1 << 13)
326 #define ACPI_SPDIF ( 1 << 12)
327 #define ACPI_GLUE ( 1 << 11)
328 #define ACPI__10 ( 1 << 10) /* reserved */
329 #define ACPI_PCIINT ( 1 << 9)
330 #define ACPI_HV ( 1 << 8) /* hardware volume */
331 #define ACPI_GPIO ( 1 << 7)
332 #define ACPI_ASSP ( 1 << 6)
333 #define ACPI_SB ( 1 << 5) /* sb emul */
334 #define ACPI_FM ( 1 << 4) /* fm emul */
335 #define ACPI_RB ( 1 << 3) /* ringbus / aclink */
336 #define ACPI_MIDI ( 1 << 2)
337 #define ACPI_GP ( 1 << 1) /* game port */
338 #define ACPI_WP ( 1 << 0) /* wave processor */
340 #define ACPI_ALL (0xffff)
341 #define ACPI_SLEEP (~(ACPI_SPDIF|ACPI_ASSP|ACPI_SB|ACPI_FM| \
342 ACPI_MIDI|ACPI_GP|ACPI_WP))
343 #define ACPI_NONE (ACPI__10)
345 /* these masks indicate which units we care about at
347 u16 acpi_state_mask[] = {
348 [ACPI_D0] = ACPI_ALL,
349 [ACPI_D1] = ACPI_SLEEP,
350 [ACPI_D2] = ACPI_SLEEP,
351 [ACPI_D3] = ACPI_NONE
354 static char version[] __devinitdata =
355 KERN_INFO "maestro: version " DRIVER_VERSION " time " __TIME__ " " __DATE__ "\n";
359 static const unsigned sample_size[] = { 1, 2, 2, 4 };
360 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
368 static const char *card_names[]={
369 [TYPE_MAESTRO] = "ESS Maestro",
370 [TYPE_MAESTRO2] = "ESS Maestro 2",
371 [TYPE_MAESTRO2E] = "ESS Maestro 2E"
374 static int clock_freq[]={
375 [TYPE_MAESTRO] = (49152000L / 1024L),
376 [TYPE_MAESTRO2] = (50000000L / 1024L),
377 [TYPE_MAESTRO2E] = (50000000L / 1024L)
380 static int maestro_notifier(struct notifier_block *nb, unsigned long event, void *buf);
382 static struct notifier_block maestro_nb = {maestro_notifier, NULL, 0};
384 /* --------------------------------------------------------------------- */
388 /* FIXME: we probably want submixers in here, but only one record pair */
389 u8 apu[6]; /* l/r output, l/r intput converters, l/r input apus */
390 u8 apu_mode[6]; /* Running mode for this APU */
391 u8 apu_pan[6]; /* Panning setup for this APU */
392 u32 apu_base[6]; /* base address for this apu */
393 struct ess_card *card; /* Card info */
395 unsigned int rateadc, ratedac;
396 unsigned char fmt, enable;
400 /* this locks around the oss state in the driver */
402 /* only let 1 be opening at a time */
403 struct semaphore open_sem;
404 wait_queue_head_t open_wait;
407 /* soundcore stuff */
415 /* XXX zab - swptr only in here so that it can be referenced by
416 clear_advance, as far as I can tell :( */
417 unsigned hwptr, swptr;
418 unsigned total_bytes;
420 unsigned error; /* over/underrun */
421 wait_queue_head_t wait;
422 /* redundant, but makes calculations easier */
425 unsigned fragsamples;
428 unsigned ready:1; /* our oss buffers are ready to go */
429 unsigned endcleared:1;
430 unsigned ossfragshift;
432 unsigned subdivision;
433 u16 base; /* Offset for ptr */
436 /* pointer to each dsp?s piece of the apu->src buffer page */
444 /* We keep maestro cards in a linked list */
445 struct ess_card *next;
451 /* as most of this is static,
452 perhaps it should be a pointer to a global struct */
455 int supported_mixers;
458 /* the caller must guarantee arg sanity before calling these */
459 /* int (*read_mixer)(struct ess_card *card, int index);*/
460 void (*write_mixer)(struct ess_card *card,int mixer, unsigned int left,unsigned int right);
461 int (*recmask_io)(struct ess_card *card,int rw,int mask);
462 unsigned int mixer_state[SOUND_MIXER_NRDEVICES];
468 wait_queue_head_t suspend_queue;
470 struct ess_state channels[MAX_DSPS];
471 u16 maestro_map[NR_IDRS]; /* Register map */
472 /* we have to store this junk so that we can come back from a
474 u16 apu_map[NR_APUS][NR_APU_REGS]; /* contents of apu regs */
476 /* this locks around the physical registers on the card */
479 /* memory for this card.. wavecache limited :(*/
483 /* hardware resources */
484 struct pci_dev *pcidev;
494 static void set_mixer(struct ess_card *card,unsigned int mixer, unsigned int val );
523 /* --------------------------------------------------------------------- */
525 static void check_suspend(struct ess_card *card);
527 /* --------------------------------------------------------------------- */
531 * ESS Maestro AC97 codec programming interface.
534 static void maestro_ac97_set(struct ess_card *card, u8 cmd, u16 val)
536 int io = card->iobase;
539 * Wait for the codec bus to be free
546 if(!(inb(io+ESS_AC97_INDEX)&1))
552 outw(val, io+ESS_AC97_DATA);
554 outb(cmd, io+ESS_AC97_INDEX);
558 static u16 maestro_ac97_get(struct ess_card *card, u8 cmd)
560 int io = card->iobase;
567 * Wait for the codec bus to be free
572 if(!(inb(io+ESS_AC97_INDEX)&1))
576 outb(cmd|0x80, io+ESS_AC97_INDEX);
579 while(inb(io+ESS_AC97_INDEX)&1)
584 printk(KERN_ERR "maestro: ac97 codec timeout reading 0x%x.\n",cmd);
588 data=inw(io+ESS_AC97_DATA);
593 /* OSS interface to the ac97s.. */
595 #define AC97_STEREO_MASK (SOUND_MASK_VOLUME|\
596 SOUND_MASK_PCM|SOUND_MASK_LINE|SOUND_MASK_CD|\
597 SOUND_MASK_VIDEO|SOUND_MASK_LINE1|SOUND_MASK_IGAIN)
599 #define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \
600 SOUND_MASK_BASS|SOUND_MASK_TREBLE|SOUND_MASK_MIC|\
603 #define AC97_RECORD_MASK (SOUND_MASK_MIC|\
604 SOUND_MASK_CD| SOUND_MASK_VIDEO| SOUND_MASK_LINE1| SOUND_MASK_LINE|\
607 #define supported_mixer(CARD,FOO) ( CARD->mix.supported_mixers & (1<<FOO) )
609 /* this table has default mixer values for all OSS mixers.
610 be sure to fill it in if you add oss mixers
611 to anyone's supported mixer defines */
613 unsigned int mixer_defaults[SOUND_MIXER_NRDEVICES] = {
614 [SOUND_MIXER_VOLUME] = 0x3232,
615 [SOUND_MIXER_BASS] = 0x3232,
616 [SOUND_MIXER_TREBLE] = 0x3232,
617 [SOUND_MIXER_SPEAKER] = 0x3232,
618 [SOUND_MIXER_MIC] = 0x8000, /* annoying */
619 [SOUND_MIXER_LINE] = 0x3232,
620 [SOUND_MIXER_CD] = 0x3232,
621 [SOUND_MIXER_VIDEO] = 0x3232,
622 [SOUND_MIXER_LINE1] = 0x3232,
623 [SOUND_MIXER_PCM] = 0x3232,
624 [SOUND_MIXER_IGAIN] = 0x3232
627 static struct ac97_mixer_hw {
628 unsigned char offset;
630 } ac97_hw[SOUND_MIXER_NRDEVICES]= {
631 [SOUND_MIXER_VOLUME] = {0x02,63},
632 [SOUND_MIXER_BASS] = {0x08,15},
633 [SOUND_MIXER_TREBLE] = {0x08,15},
634 [SOUND_MIXER_SPEAKER] = {0x0a,15},
635 [SOUND_MIXER_MIC] = {0x0e,31},
636 [SOUND_MIXER_LINE] = {0x10,31},
637 [SOUND_MIXER_CD] = {0x12,31},
638 [SOUND_MIXER_VIDEO] = {0x14,31},
639 [SOUND_MIXER_LINE1] = {0x16,31},
640 [SOUND_MIXER_PCM] = {0x18,31},
641 [SOUND_MIXER_IGAIN] = {0x1c,15}
644 #if 0 /* *shrug* removed simply because we never used it.
645 feel free to implement again if needed */
647 /* reads the given OSS mixer from the ac97
648 the caller must have insured that the ac97 knows
649 about that given mixer, and should be holding a
650 spinlock for the card */
651 static int ac97_read_mixer(struct ess_card *card, int mixer)
655 struct ac97_mixer_hw *mh = &ac97_hw[mixer];
657 val = maestro_ac97_get(card, mh->offset);
659 if(AC97_STEREO_MASK & (1<<mixer)) {
660 /* nice stereo mixers .. */
663 left = (val >> 8) & 0x7f;
666 if (mixer == SOUND_MIXER_IGAIN) {
667 right = (right * 100) / mh->scale;
668 left = (left * 100) / mh->scale;
670 right = 100 - ((right * 100) / mh->scale);
671 left = 100 - ((left * 100) / mh->scale);
674 ret = left | (right << 8);
675 } else if (mixer == SOUND_MIXER_SPEAKER) {
676 ret = 100 - ((((val & 0x1e)>>1) * 100) / mh->scale);
677 } else if (mixer == SOUND_MIXER_MIC) {
678 ret = 100 - (((val & 0x1f) * 100) / mh->scale);
679 /* the low bit is optional in the tone sliders and masking
680 it lets is avoid the 0xf 'bypass'.. */
681 } else if (mixer == SOUND_MIXER_BASS) {
682 ret = 100 - ((((val >> 8) & 0xe) * 100) / mh->scale);
683 } else if (mixer == SOUND_MIXER_TREBLE) {
684 ret = 100 - (((val & 0xe) * 100) / mh->scale);
687 M_printk("read mixer %d (0x%x) %x -> %x\n",mixer,mh->offset,val,ret);
693 /* write the OSS encoded volume to the given OSS encoded mixer,
694 again caller's job to make sure all is well in arg land,
695 call with spinlock held */
697 /* linear scale -> log */
698 static unsigned char lin2log[101] =
700 0, 0 , 15 , 23 , 30 , 34 , 38 , 42 , 45 , 47 ,
701 50 , 52 , 53 , 55 , 57 , 58 , 60 , 61 , 62 ,
702 63 , 65 , 66 , 67 , 68 , 69 , 69 , 70 , 71 ,
703 72 , 73 , 73 , 74 , 75 , 75 , 76 , 77 , 77 ,
704 78 , 78 , 79 , 80 , 80 , 81 , 81 , 82 , 82 ,
705 83 , 83 , 84 , 84 , 84 , 85 , 85 , 86 , 86 ,
706 87 , 87 , 87 , 88 , 88 , 88 , 89 , 89 , 89 ,
707 90 , 90 , 90 , 91 , 91 , 91 , 92 , 92 , 92 ,
708 93 , 93 , 93 , 94 , 94 , 94 , 94 , 95 , 95 ,
709 95 , 95 , 96 , 96 , 96 , 96 , 97 , 97 , 97 ,
710 97 , 98 , 98 , 98 , 98 , 99 , 99 , 99 , 99 , 99
713 static void ac97_write_mixer(struct ess_card *card,int mixer, unsigned int left, unsigned int right)
716 struct ac97_mixer_hw *mh = &ac97_hw[mixer];
718 M_printk("wrote mixer %d (0x%x) %d,%d",mixer,mh->offset,left,right);
720 if(AC97_STEREO_MASK & (1<<mixer)) {
721 /* stereo mixers, mute them if we can */
723 if (mixer == SOUND_MIXER_IGAIN) {
724 /* igain's slider is reversed.. */
725 right = (right * mh->scale) / 100;
726 left = (left * mh->scale) / 100;
727 if ((left == 0) && (right == 0))
729 } else if (mixer == SOUND_MIXER_PCM || mixer == SOUND_MIXER_CD) {
730 /* log conversion seems bad for them */
731 if ((left == 0) && (right == 0))
733 right = ((100 - right) * mh->scale) / 100;
734 left = ((100 - left) * mh->scale) / 100;
736 /* log conversion for the stereo controls */
737 if((left == 0) && (right == 0))
739 right = ((100 - lin2log[right]) * mh->scale) / 100;
740 left = ((100 - lin2log[left]) * mh->scale) / 100;
743 val |= (left << 8) | right;
745 } else if (mixer == SOUND_MIXER_SPEAKER) {
746 val = (((100 - left) * mh->scale) / 100) << 1;
747 } else if (mixer == SOUND_MIXER_MIC) {
748 val = maestro_ac97_get(card, mh->offset) & ~0x801f;
749 val |= (((100 - left) * mh->scale) / 100);
750 /* the low bit is optional in the tone sliders and masking
751 it lets is avoid the 0xf 'bypass'.. */
752 } else if (mixer == SOUND_MIXER_BASS) {
753 val = maestro_ac97_get(card , mh->offset) & ~0x0f00;
754 val |= ((((100 - left) * mh->scale) / 100) << 8) & 0x0e00;
755 } else if (mixer == SOUND_MIXER_TREBLE) {
756 val = maestro_ac97_get(card , mh->offset) & ~0x000f;
757 val |= (((100 - left) * mh->scale) / 100) & 0x000e;
760 maestro_ac97_set(card , mh->offset, val);
762 M_printk(" -> %x\n",val);
765 /* the following tables allow us to go from
766 OSS <-> ac97 quickly. */
768 enum ac97_recsettings {
774 AC97_REC_STEREO, /* combination of all enabled outputs.. */
775 AC97_REC_MONO, /*.. or the mono equivalent */
779 static unsigned int ac97_oss_mask[] = {
780 [AC97_REC_MIC] = SOUND_MASK_MIC,
781 [AC97_REC_CD] = SOUND_MASK_CD,
782 [AC97_REC_VIDEO] = SOUND_MASK_VIDEO,
783 [AC97_REC_AUX] = SOUND_MASK_LINE1,
784 [AC97_REC_LINE] = SOUND_MASK_LINE,
785 [AC97_REC_PHONE] = SOUND_MASK_PHONEIN
788 /* indexed by bit position */
789 static unsigned int ac97_oss_rm[] = {
790 [SOUND_MIXER_MIC] = AC97_REC_MIC,
791 [SOUND_MIXER_CD] = AC97_REC_CD,
792 [SOUND_MIXER_VIDEO] = AC97_REC_VIDEO,
793 [SOUND_MIXER_LINE1] = AC97_REC_AUX,
794 [SOUND_MIXER_LINE] = AC97_REC_LINE,
795 [SOUND_MIXER_PHONEIN] = AC97_REC_PHONE
798 /* read or write the recmask
799 the ac97 can really have left and right recording
800 inputs independently set, but OSS doesn't seem to
801 want us to express that to the user.
802 the caller guarantees that we have a supported bit set,
803 and they must be holding the card's spinlock */
805 ac97_recmask_io(struct ess_card *card, int read, int mask)
807 unsigned int val = ac97_oss_mask[ maestro_ac97_get(card, 0x1a) & 0x7 ];
809 if (read) return val;
811 /* oss can have many inputs, maestro can't. try
812 to pick the 'new' one */
814 if (mask != val) mask &= ~val;
817 val = ac97_oss_rm[val];
818 val |= val << 8; /* set both channels */
820 M_printk("maestro: setting ac97 recmask to 0x%x\n",val);
822 maestro_ac97_set(card,0x1a,val);
828 * The Maestro can be wired to a standard AC97 compliant codec
829 * (see www.intel.com for the pdf's on this), or to a PT101 codec
830 * which appears to be the ES1918 (data sheet on the esstech.com.tw site)
832 * The PT101 setup is untested.
835 static u16 __init maestro_ac97_init(struct ess_card *card)
837 u16 vend1, vend2, caps;
839 card->mix.supported_mixers = AC97_SUPPORTED_MASK;
840 card->mix.stereo_mixers = AC97_STEREO_MASK;
841 card->mix.record_sources = AC97_RECORD_MASK;
842 /* card->mix.read_mixer = ac97_read_mixer;*/
843 card->mix.write_mixer = ac97_write_mixer;
844 card->mix.recmask_io = ac97_recmask_io;
846 vend1 = maestro_ac97_get(card, 0x7c);
847 vend2 = maestro_ac97_get(card, 0x7e);
849 caps = maestro_ac97_get(card, 0x00);
851 printk(KERN_INFO "maestro: AC97 Codec detected: v: 0x%2x%2x caps: 0x%x pwr: 0x%x\n",
852 vend1,vend2,caps,maestro_ac97_get(card,0x26) & 0xf);
854 if (! (caps & 0x4) ) {
855 /* no bass/treble nobs */
856 card->mix.supported_mixers &= ~(SOUND_MASK_BASS|SOUND_MASK_TREBLE);
859 /* XXX endianness, dork head. */
860 /* vendor specifc bits.. */
861 switch ((long)(vend1 << 16) | vend2) {
862 case 0x545200ff: /* TriTech */
863 /* no idea what this does */
864 maestro_ac97_set(card,0x2a,0x0001);
865 maestro_ac97_set(card,0x2c,0x0000);
866 maestro_ac97_set(card,0x2c,0xffff);
868 #if 0 /* i thought the problems I was seeing were with
869 the 1921, but apparently they were with the pci board
870 it was on, so this code is commented out.
871 lets see if this holds true. */
872 case 0x83847609: /* ESS 1921 */
873 /* writing to 0xe (mic) or 0x1a (recmask) seems
874 to hang this codec */
875 card->mix.supported_mixers &= ~(SOUND_MASK_MIC);
876 card->mix.record_sources = 0;
877 card->mix.recmask_io = NULL;
878 #if 0 /* don't ask. I have yet to see what these actually do. */
879 maestro_ac97_set(card,0x76,0xABBA); /* o/~ Take a chance on me o/~ */
881 maestro_ac97_set(card,0x78,0x3002);
883 maestro_ac97_set(card,0x78,0x3802);
891 maestro_ac97_set(card, 0x1E, 0x0404);
892 /* null misc stuff */
893 maestro_ac97_set(card, 0x20, 0x0000);
898 #if 0 /* there has been 1 person on the planet with a pt101 that we
899 know of. If they care, they can put this back in :) */
900 static u16 maestro_pt101_init(struct ess_card *card,int iobase)
902 printk(KERN_INFO "maestro: PT101 Codec detected, initializing but _not_ installing mixer device.\n");
904 maestro_ac97_set(iobase, 0x2A, 0x0001);
905 maestro_ac97_set(iobase, 0x2C, 0x0000);
906 maestro_ac97_set(iobase, 0x2C, 0xFFFF);
907 maestro_ac97_set(iobase, 0x10, 0x9F1F);
908 maestro_ac97_set(iobase, 0x12, 0x0808);
909 maestro_ac97_set(iobase, 0x14, 0x9F1F);
910 maestro_ac97_set(iobase, 0x16, 0x9F1F);
911 maestro_ac97_set(iobase, 0x18, 0x0404);
912 maestro_ac97_set(iobase, 0x1A, 0x0000);
913 maestro_ac97_set(iobase, 0x1C, 0x0000);
914 maestro_ac97_set(iobase, 0x02, 0x0404);
915 maestro_ac97_set(iobase, 0x04, 0x0808);
916 maestro_ac97_set(iobase, 0x0C, 0x801F);
917 maestro_ac97_set(iobase, 0x0E, 0x801F);
922 /* this is very magic, and very slow.. */
924 maestro_ac97_reset(int ioaddr, struct pci_dev *pcidev)
930 outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
931 outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
932 outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
934 /* reset the first codec */
935 outw(0x0000, ioaddr+0x36);
936 save_68 = inw(ioaddr+0x68);
937 pci_read_config_word(pcidev, 0x58, &w); /* something magical with gpio and bus arb. */
938 pci_read_config_dword(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &vend);
941 outw(0xfffe, ioaddr + 0x64); /* tickly gpio 0.. */
942 outw(0x0001, ioaddr + 0x68);
943 outw(0x0000, ioaddr + 0x60);
945 outw(0x0001, ioaddr + 0x60);
948 outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */
949 outw( (inw(ioaddr + 0x38) & 0xfffc)|0x1, ioaddr + 0x38);
950 outw( (inw(ioaddr + 0x3a) & 0xfffc)|0x1, ioaddr + 0x3a);
951 outw( (inw(ioaddr + 0x3c) & 0xfffc)|0x1, ioaddr + 0x3c);
953 /* now the second codec */
954 outw(0x0000, ioaddr+0x36);
955 outw(0xfff7, ioaddr + 0x64);
956 save_68 = inw(ioaddr+0x68);
957 outw(0x0009, ioaddr + 0x68);
958 outw(0x0001, ioaddr + 0x60);
960 outw(0x0009, ioaddr + 0x60);
961 mdelay(500); /* .. ouch.. */
962 outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
963 outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
964 outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
966 #if 0 /* the loop here needs to be much better if we want it.. */
967 M_printk("trying software reset\n");
968 /* try and do a software reset */
969 outb(0x80|0x7c, ioaddr + 0x30);
971 if ((inw(ioaddr+ 0x30) & 1) == 0) {
972 if(inb(ioaddr + 0x32) !=0) break;
974 outb(0x80|0x7d, ioaddr + 0x30);
975 if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break;
976 outb(0x80|0x7f, ioaddr + 0x30);
977 if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break;
981 outb( inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
982 mdelay(500); /* oh my.. */
983 outb( inb(ioaddr + 0x37) & ~0x08, ioaddr + 0x37);
985 outw( 0x80, ioaddr+0x30);
986 for(w = 0 ; w < 10000; w++) {
987 if((inw(ioaddr + 0x30) & 1) ==0) break;
992 if ( vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {
993 /* turn on external amp? */
994 outw(0xf9ff, ioaddr + 0x64);
995 outw(inw(ioaddr+0x68) | 0x600, ioaddr + 0x68);
996 outw(0x0209, ioaddr + 0x60);
999 /* Turn on the 978 docking chip.
1000 First frob the "master output enable" bit,
1001 then set most of the playback volume control registers to max. */
1002 outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);
1003 outb(0xff, ioaddr+0xc3);
1004 outb(0xff, ioaddr+0xc4);
1005 outb(0xff, ioaddr+0xc6);
1006 outb(0xff, ioaddr+0xc8);
1007 outb(0x3f, ioaddr+0xcf);
1008 outb(0x3f, ioaddr+0xd0);
1011 * Indirect register access. Not all registers are readable so we
1012 * need to keep register state ourselves
1015 #define WRITEABLE_MAP 0xEFFFFF
1016 #define READABLE_MAP 0x64003F
1019 * The Maestro engineers were a little indirection happy. These indirected
1020 * registers themselves include indirect registers at another layer
1023 static void __maestro_write(struct ess_card *card, u16 reg, u16 data)
1025 long ioaddr = card->iobase;
1027 outw(reg, ioaddr+0x02);
1028 outw(data, ioaddr+0x00);
1029 if( reg >= NR_IDRS) printk("maestro: IDR %d out of bounds!\n",reg);
1030 else card->maestro_map[reg]=data;
1034 static void maestro_write(struct ess_state *s, u16 reg, u16 data)
1036 unsigned long flags;
1038 check_suspend(s->card);
1039 spin_lock_irqsave(&s->card->lock,flags);
1041 __maestro_write(s->card,reg,data);
1043 spin_unlock_irqrestore(&s->card->lock,flags);
1046 static u16 __maestro_read(struct ess_card *card, u16 reg)
1048 long ioaddr = card->iobase;
1050 outw(reg, ioaddr+0x02);
1051 return card->maestro_map[reg]=inw(ioaddr+0x00);
1054 static u16 maestro_read(struct ess_state *s, u16 reg)
1056 if(READABLE_MAP & (1<<reg))
1058 unsigned long flags;
1059 check_suspend(s->card);
1060 spin_lock_irqsave(&s->card->lock,flags);
1062 __maestro_read(s->card,reg);
1064 spin_unlock_irqrestore(&s->card->lock,flags);
1066 return s->card->maestro_map[reg];
1070 * These routines handle accessing the second level indirections to the
1075 * The register names are the ones ESS uses (see 104T31.ZIP)
1078 #define IDR0_DATA_PORT 0x00
1079 #define IDR1_CRAM_POINTER 0x01
1080 #define IDR2_CRAM_DATA 0x02
1081 #define IDR3_WAVE_DATA 0x03
1082 #define IDR4_WAVE_PTR_LOW 0x04
1083 #define IDR5_WAVE_PTR_HI 0x05
1084 #define IDR6_TIMER_CTRL 0x06
1085 #define IDR7_WAVE_ROMRAM 0x07
1087 static void apu_index_set(struct ess_card *card, u16 index)
1090 __maestro_write(card, IDR1_CRAM_POINTER, index);
1092 if(__maestro_read(card, IDR1_CRAM_POINTER)==index)
1094 printk(KERN_WARNING "maestro: APU register select failed.\n");
1097 static void apu_data_set(struct ess_card *card, u16 data)
1102 if(__maestro_read(card, IDR0_DATA_PORT)==data)
1104 __maestro_write(card, IDR0_DATA_PORT, data);
1109 * This is the public interface for APU manipulation. It handles the
1110 * interlock to avoid two APU writes in parallel etc. Don't diddle
1111 * directly with the stuff above.
1114 static void apu_set_register(struct ess_state *s, u16 channel, u8 reg, u16 data)
1116 unsigned long flags;
1118 check_suspend(s->card);
1120 if(channel&ESS_CHAN_HARD)
1121 channel&=~ESS_CHAN_HARD;
1125 printk("BAD CHANNEL %d.\n",channel);
1127 channel = s->apu[channel];
1128 /* store based on real hardware apu/reg */
1129 s->card->apu_map[channel][reg]=data;
1133 /* hooray for double indirection!! */
1134 spin_lock_irqsave(&s->card->lock,flags);
1136 apu_index_set(s->card, reg);
1137 apu_data_set(s->card, data);
1139 spin_unlock_irqrestore(&s->card->lock,flags);
1142 static u16 apu_get_register(struct ess_state *s, u16 channel, u8 reg)
1144 unsigned long flags;
1147 check_suspend(s->card);
1149 if(channel&ESS_CHAN_HARD)
1150 channel&=~ESS_CHAN_HARD;
1152 channel = s->apu[channel];
1156 spin_lock_irqsave(&s->card->lock,flags);
1158 apu_index_set(s->card, reg);
1159 v=__maestro_read(s->card, IDR0_DATA_PORT);
1161 spin_unlock_irqrestore(&s->card->lock,flags);
1167 * The wavecache buffers between the APUs and
1171 static void wave_set_register(struct ess_state *s, u16 reg, u16 value)
1173 long ioaddr = s->card->iobase;
1174 unsigned long flags;
1175 check_suspend(s->card);
1177 spin_lock_irqsave(&s->card->lock,flags);
1179 outw(reg, ioaddr+0x10);
1180 outw(value, ioaddr+0x12);
1182 spin_unlock_irqrestore(&s->card->lock,flags);
1185 static u16 wave_get_register(struct ess_state *s, u16 reg)
1187 long ioaddr = s->card->iobase;
1188 unsigned long flags;
1190 check_suspend(s->card);
1192 spin_lock_irqsave(&s->card->lock,flags);
1193 outw(reg, ioaddr+0x10);
1194 value=inw(ioaddr+0x12);
1195 spin_unlock_irqrestore(&s->card->lock,flags);
1200 static void sound_reset(int ioaddr)
1202 outw(0x2000, 0x18+ioaddr);
1204 outw(0x0000, 0x18+ioaddr);
1208 /* sets the play formats of these apus, should be passed the already shifted format */
1209 static void set_apu_fmt(struct ess_state *s, int apu, int mode)
1213 if(!(mode&ESS_FMT_16BIT)) apu_fmt+=0x20;
1214 if((mode&ESS_FMT_STEREO)) apu_fmt+=0x10;
1215 s->apu_mode[apu] = apu_fmt;
1216 s->apu_mode[apu+1] = apu_fmt;
1219 /* this only fixes the output apu mode to be later set by start_dac and
1220 company. output apu modes are set in ess_rec_setup */
1221 static void set_fmt(struct ess_state *s, unsigned char mask, unsigned char data)
1223 s->fmt = (s->fmt & mask) | data;
1224 set_apu_fmt(s, 0, (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK);
1227 /* this is off by a little bit.. */
1228 static u32 compute_rate(struct ess_state *s, u32 freq)
1230 u32 clock = clock_freq[s->card->card_type];
1232 freq = (freq * clocking)/48000;
1237 return ((freq / clock) <<16 )+
1238 (((freq % clock) << 16) / clock);
1241 static void set_dac_rate(struct ess_state *s, unsigned int rate)
1244 int fmt = (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK;
1253 if(! (fmt & ESS_FMT_16BIT) && !(fmt & ESS_FMT_STEREO))
1256 /* M_printk("computing dac rate %d with mode %d\n",rate,s->fmt);*/
1258 freq = compute_rate(s, rate);
1260 /* Load the frequency, turn on 6dB */
1261 apu_set_register(s, 0, 2,(apu_get_register(s, 0, 2)&0x00FF)|
1262 ( ((freq&0xFF)<<8)|0x10 ));
1263 apu_set_register(s, 0, 3, freq>>8);
1264 apu_set_register(s, 1, 2,(apu_get_register(s, 1, 2)&0x00FF)|
1265 ( ((freq&0xFF)<<8)|0x10 ));
1266 apu_set_register(s, 1, 3, freq>>8);
1269 static void set_adc_rate(struct ess_state *s, unsigned rate)
1273 /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1281 freq = compute_rate(s, rate);
1283 /* Load the frequency, turn on 6dB */
1284 apu_set_register(s, 2, 2,(apu_get_register(s, 2, 2)&0x00FF)|
1285 ( ((freq&0xFF)<<8)|0x10 ));
1286 apu_set_register(s, 2, 3, freq>>8);
1287 apu_set_register(s, 3, 2,(apu_get_register(s, 3, 2)&0x00FF)|
1288 ( ((freq&0xFF)<<8)|0x10 ));
1289 apu_set_register(s, 3, 3, freq>>8);
1291 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */
1294 apu_set_register(s, 4, 2,(apu_get_register(s, 4, 2)&0x00FF)|
1295 ( ((freq&0xFF)<<8)|0x10 ));
1296 apu_set_register(s, 4, 3, freq>>8);
1297 apu_set_register(s, 5, 2,(apu_get_register(s, 5, 2)&0x00FF)|
1298 ( ((freq&0xFF)<<8)|0x10 ));
1299 apu_set_register(s, 5, 3, freq>>8);
1302 /* Stop our host of recording apus */
1303 static inline void stop_adc(struct ess_state *s)
1305 /* XXX lets hope we don't have to lock around this */
1306 if (! (s->enable & ADC_RUNNING)) return;
1308 s->enable &= ~ADC_RUNNING;
1309 apu_set_register(s, 2, 0, apu_get_register(s, 2, 0)&0xFF0F);
1310 apu_set_register(s, 3, 0, apu_get_register(s, 3, 0)&0xFF0F);
1311 apu_set_register(s, 4, 0, apu_get_register(s, 2, 0)&0xFF0F);
1312 apu_set_register(s, 5, 0, apu_get_register(s, 3, 0)&0xFF0F);
1315 /* stop output apus */
1316 static void stop_dac(struct ess_state *s)
1318 /* XXX have to lock around this? */
1319 if (! (s->enable & DAC_RUNNING)) return;
1321 s->enable &= ~DAC_RUNNING;
1322 apu_set_register(s, 0, 0, apu_get_register(s, 0, 0)&0xFF0F);
1323 apu_set_register(s, 1, 0, apu_get_register(s, 1, 0)&0xFF0F);
1326 static void start_dac(struct ess_state *s)
1329 if ( (s->dma_dac.mapped || s->dma_dac.count > 0) &&
1331 (! (s->enable & DAC_RUNNING)) ) {
1333 s->enable |= DAC_RUNNING;
1335 apu_set_register(s, 0, 0,
1336 (apu_get_register(s, 0, 0)&0xFF0F)|s->apu_mode[0]);
1338 if((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_STEREO)
1339 apu_set_register(s, 1, 0,
1340 (apu_get_register(s, 1, 0)&0xFF0F)|s->apu_mode[1]);
1344 static void start_adc(struct ess_state *s)
1347 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
1348 && s->dma_adc.ready && (! (s->enable & ADC_RUNNING)) ) {
1350 s->enable |= ADC_RUNNING;
1351 apu_set_register(s, 2, 0,
1352 (apu_get_register(s, 2, 0)&0xFF0F)|s->apu_mode[2]);
1353 apu_set_register(s, 4, 0,
1354 (apu_get_register(s, 4, 0)&0xFF0F)|s->apu_mode[4]);
1356 if( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
1357 apu_set_register(s, 3, 0,
1358 (apu_get_register(s, 3, 0)&0xFF0F)|s->apu_mode[3]);
1359 apu_set_register(s, 5, 0,
1360 (apu_get_register(s, 5, 0)&0xFF0F)|s->apu_mode[5]);
1368 * Native play back driver
1371 /* the mode passed should be already shifted and masked */
1373 ess_play_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size)
1380 M_printk("mode=%d rate=%d buf=%p len=%d.\n",
1381 mode, rate, buffer, size);
1383 /* all maestro sizes are in 16bit words */
1386 if(mode&ESS_FMT_STEREO) {
1388 /* only 16/stereo gets size divided */
1389 if(mode&ESS_FMT_16BIT)
1393 for(channel=0; channel <= high_apu; channel++)
1395 pa = virt_to_bus(buffer);
1397 /* set the wavecache control reg */
1398 tmpval = (pa - 0x10) & 0xFFF8;
1399 if(!(mode & ESS_FMT_16BIT)) tmpval |= 4;
1400 if(mode & ESS_FMT_STEREO) tmpval |= 2;
1401 ess->apu_base[channel]=tmpval;
1402 wave_set_register(ess, ess->apu[channel]<<3, tmpval);
1404 pa -= virt_to_bus(ess->card->dmapages);
1407 /* base offset of dma calcs when reading the pointer
1409 if(!channel) ess->dma_dac.base = pa&0xFFFF;
1411 pa|=0x00400000; /* System RAM */
1413 /* XXX the 16bit here might not be needed.. */
1414 if((mode & ESS_FMT_STEREO) && (mode & ESS_FMT_16BIT)) {
1416 pa|=0x00800000; /* Stereo */
1420 /* XXX think about endianess when writing these registers */
1421 M_printk("maestro: ess_play_setup: APU[%d] pa = 0x%x\n", ess->apu[channel], pa);
1422 /* start of sample */
1423 apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8);
1424 apu_set_register(ess, channel, 5, pa&0xFFFF);
1426 apu_set_register(ess, channel, 6, (pa+size)&0xFFFF);
1427 /* setting loop len == sample len */
1428 apu_set_register(ess, channel, 7, size);
1430 /* clear effects/env.. */
1431 apu_set_register(ess, channel, 8, 0x0000);
1432 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1433 apu_set_register(ess, channel, 9, 0xD000);
1435 /* clear routing stuff */
1436 apu_set_register(ess, channel, 11, 0x0000);
1437 /* dma on, no envelopes, filter to all 1s) */
1438 apu_set_register(ess, channel, 0, 0x400F);
1440 if(mode&ESS_FMT_16BIT)
1441 ess->apu_mode[channel]=0x10;
1443 ess->apu_mode[channel]=0x30;
1445 if(mode&ESS_FMT_STEREO) {
1446 /* set panning: left or right */
1447 apu_set_register(ess, channel, 10, 0x8F00 | (channel ? 0 : 0x10));
1448 ess->apu_mode[channel] += 0x10;
1450 apu_set_register(ess, channel, 10, 0x8F08);
1453 /* clear WP interrupts */
1454 outw(1, ess->card->iobase+0x04);
1455 /* enable WP ints */
1456 outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18);
1459 set_dac_rate(ess,rate);
1464 * Native record driver
1467 /* again, passed mode is alrady shifted/masked */
1469 ess_rec_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size)
1474 M_printk("maestro: ess_rec_setup: mode=%d rate=%d buf=0x%p len=%d.\n",
1475 mode, rate, buffer, size);
1477 /* all maestro sizes are in 16bit words */
1480 /* we're given the full size of the buffer, but
1481 in stereo each channel will only use its half */
1482 if(mode&ESS_FMT_STEREO) {
1487 /* APU assignments: 2 = mono/left SRC
1489 4 = mono/left Input Mixer
1490 5 = right Input Mixer */
1491 for(channel=2;channel<6;channel+=apu_step)
1498 /* data seems to flow from the codec, through an apu into
1499 the 'mixbuf' bit of page, then through the SRC apu
1500 and out to the real 'buffer'. ok. sure. */
1502 if(channel & 0x04) {
1503 /* ok, we're an input mixer going from adc
1504 through the mixbuf to the other apus */
1506 if(!(channel & 0x01)) {
1507 pa = virt_to_bus(ess->mixbuf);
1509 pa = virt_to_bus(ess->mixbuf + (PAGE_SIZE >> 4));
1512 /* we source from a 'magic' apu */
1513 bsize = PAGE_SIZE >> 5; /* half of this channels alloc, in words */
1514 route = 0x14 + (channel - 4); /* parallel in crap, see maestro reg 0xC [8-11] */
1515 ess->apu_mode[channel] = 0x90; /* Input Mixer */
1518 /* we're a rate converter taking
1519 input from the input apus and outputing it to
1521 if(!(channel & 0x01)) {
1522 pa = virt_to_bus(buffer);
1524 /* right channel records its split half.
1525 *2 accommodates for rampant shifting earlier */
1526 pa = virt_to_bus(buffer + size*2);
1529 ess->apu_mode[channel] = 0xB0; /* Sample Rate Converter */
1532 /* get input from inputing apu */
1533 route = channel + 2;
1536 M_printk("maestro: ess_rec_setup: getting pa 0x%x from %d\n",pa,channel);
1538 /* set the wavecache control reg */
1539 tmpval = (pa - 0x10) & 0xFFF8;
1540 ess->apu_base[channel]=tmpval;
1541 wave_set_register(ess, ess->apu[channel]<<3, tmpval);
1543 pa -= virt_to_bus(ess->card->dmapages);
1546 /* base offset of dma calcs when reading the pointer
1548 if(channel==2) ess->dma_adc.base = pa&0xFFFF;
1550 pa|=0x00400000; /* bit 22 -> System RAM */
1552 M_printk("maestro: ess_rec_setup: APU[%d] pa = 0x%x size = 0x%x route = 0x%x\n",
1553 ess->apu[channel], pa, bsize, route);
1555 /* Begin loading the APU */
1556 for(i=0;i<15;i++) /* clear all PBRs */
1557 apu_set_register(ess, channel, i, 0x0000);
1559 apu_set_register(ess, channel, 0, 0x400F);
1561 /* need to enable subgroups.. and we should probably
1562 have different groups for different /dev/dsps.. */
1563 apu_set_register(ess, channel, 2, 0x8);
1565 /* Load the buffer into the wave engine */
1566 apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8);
1567 /* XXX reg is little endian.. */
1568 apu_set_register(ess, channel, 5, pa&0xFFFF);
1569 apu_set_register(ess, channel, 6, (pa+bsize)&0xFFFF);
1570 apu_set_register(ess, channel, 7, bsize);
1572 /* clear effects/env.. */
1573 apu_set_register(ess, channel, 8, 0x00F0);
1575 /* amplitude now? sure. why not. */
1576 apu_set_register(ess, channel, 9, 0x0000);
1578 /* set filter tune, radius, polar pan */
1579 apu_set_register(ess, channel, 10, 0x8F08);
1582 apu_set_register(ess, channel, 11, route);
1585 /* clear WP interrupts */
1586 outw(1, ess->card->iobase+0x04);
1587 /* enable WP ints */
1588 outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18);
1591 set_adc_rate(ess,rate);
1594 /* --------------------------------------------------------------------- */
1596 static void set_dmaa(struct ess_state *s, unsigned int addr, unsigned int count)
1598 M_printk("set_dmaa??\n");
1601 static void set_dmac(struct ess_state *s, unsigned int addr, unsigned int count)
1603 M_printk("set_dmac??\n");
1606 /* Playback pointer */
1607 static inline unsigned get_dmaa(struct ess_state *s)
1611 offset = apu_get_register(s,0,5);
1613 /* M_printk("dmaa: offset: %d, base: %d\n",offset,s->dma_dac.base); */
1615 offset-=s->dma_dac.base;
1617 return (offset&0xFFFE)<<1; /* hardware is in words */
1620 /* Record pointer */
1621 static inline unsigned get_dmac(struct ess_state *s)
1625 offset = apu_get_register(s,2,5);
1627 /* M_printk("dmac: offset: %d, base: %d\n",offset,s->dma_adc.base); */
1629 /* The offset is an address not a position relative to base */
1630 offset-=s->dma_adc.base;
1632 return (offset&0xFFFE)<<1; /* hardware is in words */
1636 * Meet Bob, the timer...
1639 static irqreturn_t ess_interrupt(int irq, void *dev_id, struct pt_regs *regs);
1641 static void stop_bob(struct ess_state *s)
1643 /* Mask IDR 11,17 */
1644 maestro_write(s, 0x11, maestro_read(s, 0x11)&~1);
1645 maestro_write(s, 0x17, maestro_read(s, 0x17)&~1);
1648 /* eventually we could be clever and limit bob ints
1649 to the frequency at which our smallest duration
1650 chunks may expire */
1651 #define ESS_SYSCLK 50000000
1652 static void start_bob(struct ess_state *s)
1657 /* XXX make freq selector much smarter, see calc_bob_rate */
1660 /* compute ideal interrupt frequency for buffer size & play rate */
1661 /* first, find best prescaler value to match freq */
1662 for(prescale=5;prescale<12;prescale++)
1663 if(freq > (ESS_SYSCLK>>(prescale+9)))
1666 /* next, back off prescaler whilst getting divider into optimum range */
1668 while((prescale > 5) && (divide<32))
1675 /* now fine-tune the divider for best match */
1676 for(;divide<31;divide++)
1677 if(freq >= ((ESS_SYSCLK>>(prescale+9))/(divide+1)))
1680 /* divide = 0 is illegal, but don't let prescale = 4! */
1688 maestro_write(s, 6, 0x9000 | (prescale<<5) | divide); /* set reg */
1690 /* Now set IDR 11/17 */
1691 maestro_write(s, 0x11, maestro_read(s, 0x11)|1);
1692 maestro_write(s, 0x17, maestro_read(s, 0x17)|1);
1694 /* --------------------------------------------------------------------- */
1696 /* this quickly calculates the frequency needed for bob
1697 and sets it if its different than what bob is
1698 currently running at. its called often so
1699 needs to be fairly quick. */
1702 static void calc_bob_rate(struct ess_state *s) {
1703 #if 0 /* this thing tries to set the frequency of bob such that
1704 there are 2 interrupts / buffer walked by the dac/adc. That
1705 is probably very wrong for people who actually care about
1706 mid buffer positioning. it should be calculated as bytes/interrupt
1707 and that needs to be decided :) so for now just use the static 150
1710 unsigned int dac_rate=2,adc_rate=1,newrate;
1711 static int israte=-1;
1713 if (s->dma_dac.fragsize == 0) dac_rate = BOB_MIN;
1715 dac_rate = (2 * s->ratedac * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) /
1716 (s->dma_dac.fragsize) ;
1719 if (s->dma_adc.fragsize == 0) adc_rate = BOB_MIN;
1721 adc_rate = (2 * s->rateadc * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) /
1722 (s->dma_adc.fragsize) ;
1725 if(dac_rate > adc_rate) newrate = adc_rate;
1726 else newrate=dac_rate;
1728 if(newrate > BOB_MAX) newrate = BOB_MAX;
1730 if(newrate < BOB_MIN)
1734 if( israte != newrate) {
1735 printk("dac: %d adc: %d rate: %d\n",dac_rate,adc_rate,israte);
1743 prog_dmabuf(struct ess_state *s, unsigned rec)
1745 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
1746 unsigned rate = rec ? s->rateadc : s->ratedac;
1747 unsigned bytepersec;
1750 unsigned long flags;
1752 spin_lock_irqsave(&s->lock, flags);
1756 fmt >>= ESS_ADC_SHIFT;
1759 fmt >>= ESS_DAC_SHIFT;
1761 spin_unlock_irqrestore(&s->lock, flags);
1762 fmt &= ESS_FMT_MASK;
1764 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
1766 /* this algorithm is a little nuts.. where did /1000 come from? */
1767 bytepersec = rate << sample_shift[fmt];
1768 bufs = PAGE_SIZE << db->buforder;
1769 if (db->ossfragshift) {
1770 if ((1000 << db->ossfragshift) < bytepersec)
1771 db->fragshift = ld2(bytepersec/1000);
1773 db->fragshift = db->ossfragshift;
1775 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
1776 if (db->fragshift < 3)
1779 db->numfrag = bufs >> db->fragshift;
1780 while (db->numfrag < 4 && db->fragshift > 3) {
1782 db->numfrag = bufs >> db->fragshift;
1784 db->fragsize = 1 << db->fragshift;
1785 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1786 db->numfrag = db->ossmaxfrags;
1787 db->fragsamples = db->fragsize >> sample_shift[fmt];
1788 db->dmasize = db->numfrag << db->fragshift;
1790 M_printk("maestro: setup oss: numfrag: %d fragsize: %d dmasize: %d\n",db->numfrag,db->fragsize,db->dmasize);
1792 memset(db->rawbuf, (fmt & ESS_FMT_16BIT) ? 0 : 0x80, db->dmasize);
1794 spin_lock_irqsave(&s->lock, flags);
1796 ess_rec_setup(s, fmt, s->rateadc, db->rawbuf, db->dmasize);
1798 ess_play_setup(s, fmt, s->ratedac, db->rawbuf, db->dmasize);
1800 spin_unlock_irqrestore(&s->lock, flags);
1806 static __inline__ void
1807 clear_advance(struct ess_state *s)
1809 unsigned char c = ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_16BIT) ? 0 : 0x80;
1811 unsigned char *buf = s->dma_dac.rawbuf;
1812 unsigned bsize = s->dma_dac.dmasize;
1813 unsigned bptr = s->dma_dac.swptr;
1814 unsigned len = s->dma_dac.fragsize;
1816 if (bptr + len > bsize) {
1817 unsigned x = bsize - bptr;
1818 memset(buf + bptr, c, x);
1819 /* account for wrapping? */
1823 memset(buf + bptr, c, len);
1826 /* call with spinlock held! */
1828 ess_update_ptr(struct ess_state *s)
1833 /* update ADC pointer */
1834 if (s->dma_adc.ready) {
1835 /* oh boy should this all be re-written. everything in the current code paths think
1836 that the various counters/pointers are expressed in bytes to the user but we have
1837 two apus doing stereo stuff so we fix it up here.. it propagates to all the various
1838 counters from here. */
1839 if ( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
1840 hwptr = (get_dmac(s)*2) % s->dma_adc.dmasize;
1842 hwptr = get_dmac(s) % s->dma_adc.dmasize;
1844 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1845 s->dma_adc.hwptr = hwptr;
1846 s->dma_adc.total_bytes += diff;
1847 s->dma_adc.count += diff;
1848 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1849 wake_up(&s->dma_adc.wait);
1850 if (!s->dma_adc.mapped) {
1851 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1853 wrindir(s, SV_CIENABLE, s->enable); */
1855 /* brute force everyone back in sync, sigh */
1856 s->dma_adc.count = 0;
1857 s->dma_adc.swptr = 0;
1858 s->dma_adc.hwptr = 0;
1863 /* update DAC pointer */
1864 if (s->dma_dac.ready) {
1865 hwptr = get_dmaa(s) % s->dma_dac.dmasize;
1866 /* the apu only reports the length it has seen, not the
1867 length of the memory that has been used (the WP
1869 if ( ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK) == (ESS_FMT_STEREO|ESS_FMT_16BIT))
1872 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1873 /* M_printk("updating dac: hwptr: %d diff: %d\n",hwptr,diff);*/
1874 s->dma_dac.hwptr = hwptr;
1875 s->dma_dac.total_bytes += diff;
1876 if (s->dma_dac.mapped) {
1877 s->dma_dac.count += diff;
1878 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) {
1879 wake_up(&s->dma_dac.wait);
1882 s->dma_dac.count -= diff;
1883 /* M_printk("maestro: ess_update_ptr: diff: %d, count: %d\n", diff, s->dma_dac.count); */
1884 if (s->dma_dac.count <= 0) {
1885 M_printk("underflow! diff: %d count: %d hw: %d sw: %d\n", diff, s->dma_dac.count,
1886 hwptr, s->dma_dac.swptr);
1888 wrindir(s, SV_CIENABLE, s->enable); */
1889 /* XXX how on earth can calling this with the lock held work.. */
1891 /* brute force everyone back in sync, sigh */
1892 s->dma_dac.count = 0;
1893 s->dma_dac.swptr = hwptr;
1895 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
1897 s->dma_dac.endcleared = 1;
1899 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize) {
1900 wake_up(&s->dma_dac.wait);
1901 /* printk("waking up DAC count: %d sw: %d hw: %d\n",s->dma_dac.count, s->dma_dac.swptr,
1909 ess_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1911 struct ess_state *s;
1912 struct ess_card *c = (struct ess_card *)dev_id;
1916 if ( ! (event = inb(c->iobase+0x1A)) )
1919 outw(inw(c->iobase+4)&1, c->iobase+4);
1921 /* M_printk("maestro int: %x\n",event);*/
1925 enum {UP_EVT, DOWN_EVT, MUTE_EVT} vol_evt;
1928 /* Figure out which volume control button was pushed,
1929 based on differences from the default register
1931 x = inb(c->iobase+0x1c);
1932 if (x&1) vol_evt = MUTE_EVT;
1933 else if (((x>>1)&7) > 4) vol_evt = UP_EVT;
1934 else vol_evt = DOWN_EVT;
1936 /* Reset the volume control registers. */
1937 outb(0x88, c->iobase+0x1c);
1938 outb(0x88, c->iobase+0x1d);
1939 outb(0x88, c->iobase+0x1e);
1940 outb(0x88, c->iobase+0x1f);
1942 /* Deal with the button press in a hammer-handed
1943 manner by adjusting the master mixer volume. */
1944 volume = c->mix.mixer_state[0] & 0xff;
1945 if (vol_evt == UP_EVT) {
1950 else if (vol_evt == DOWN_EVT) {
1955 /* vol_evt == MUTE_EVT */
1957 volume = c->dock_mute_vol;
1959 c->dock_mute_vol = volume;
1963 set_mixer (c, 0, (volume << 8) | volume);
1966 /* Ack all the interrupts. */
1967 outb(0xFF, c->iobase+0x1A);
1970 * Update the pointers for all APU's we are running.
1972 for(i=0;i<NR_DSPS;i++)
1975 if(s->dev_audio == -1)
1977 spin_lock(&s->lock);
1979 spin_unlock(&s->lock);
1985 /* --------------------------------------------------------------------- */
1987 static const char invalid_magic[] = KERN_CRIT "maestro: invalid magic value in %s\n";
1989 #define VALIDATE_MAGIC(FOO,MAG) \
1991 if (!(FOO) || (FOO)->magic != MAG) { \
1992 printk(invalid_magic,__FUNCTION__); \
1997 #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,ESS_STATE_MAGIC)
1998 #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,ESS_CARD_MAGIC)
2000 static void set_mixer(struct ess_card *card,unsigned int mixer, unsigned int val )
2002 unsigned int left,right;
2003 /* cleanse input a little */
2004 right = ((val >> 8) & 0xff) ;
2005 left = (val & 0xff) ;
2007 if(right > 100) right = 100;
2008 if(left > 100) left = 100;
2010 card->mix.mixer_state[mixer]=(right << 8) | left;
2011 card->mix.write_mixer(card,mixer,left,right);
2015 mixer_push_state(struct ess_card *card)
2018 for(i = 0 ; i < SOUND_MIXER_NRDEVICES ; i++) {
2019 if( ! supported_mixer(card,i)) continue;
2021 set_mixer(card,i,card->mix.mixer_state[i]);
2025 static int mixer_ioctl(struct ess_card *card, unsigned int cmd, unsigned long arg)
2028 unsigned long flags;
2029 void __user *argp = (void __user *)arg;
2030 int __user *p = argp;
2032 VALIDATE_CARD(card);
2033 if (cmd == SOUND_MIXER_INFO) {
2035 memset(&info, 0, sizeof(info));
2036 strlcpy(info.id, card_names[card->card_type], sizeof(info.id));
2037 strlcpy(info.name, card_names[card->card_type], sizeof(info.name));
2038 info.modify_counter = card->mix.modcnt;
2039 if (copy_to_user(argp, &info, sizeof(info)))
2043 if (cmd == SOUND_OLD_MIXER_INFO) {
2044 _old_mixer_info info;
2045 memset(&info, 0, sizeof(info));
2046 strlcpy(info.id, card_names[card->card_type], sizeof(info.id));
2047 strlcpy(info.name, card_names[card->card_type], sizeof(info.name));
2048 if (copy_to_user(argp, &info, sizeof(info)))
2052 if (cmd == OSS_GETVERSION)
2053 return put_user(SOUND_VERSION, p);
2055 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
2058 if (_IOC_DIR(cmd) == _IOC_READ) {
2059 switch (_IOC_NR(cmd)) {
2060 case SOUND_MIXER_RECSRC: /* give them the current record source */
2062 if(!card->mix.recmask_io) {
2065 spin_lock_irqsave(&card->lock, flags);
2066 val = card->mix.recmask_io(card,1,0);
2067 spin_unlock_irqrestore(&card->lock, flags);
2071 case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
2072 val = card->mix.supported_mixers;
2075 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
2076 val = card->mix.record_sources;
2079 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
2080 val = card->mix.stereo_mixers;
2083 case SOUND_MIXER_CAPS:
2084 val = SOUND_CAP_EXCL_INPUT;
2087 default: /* read a specific mixer */
2090 if ( ! supported_mixer(card,i))
2093 /* do we ever want to touch the hardware? */
2094 /* spin_lock_irqsave(&card->lock, flags);
2095 val = card->mix.read_mixer(card,i);
2096 spin_unlock_irqrestore(&card->lock, flags);*/
2098 val = card->mix.mixer_state[i];
2099 /* M_printk("returned 0x%x for mixer %d\n",val,i);*/
2103 return put_user(val, p);
2106 if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ))
2111 if (get_user(val, p))
2114 switch (_IOC_NR(cmd)) {
2115 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
2117 if (!card->mix.recmask_io) return -EINVAL;
2119 if(! (val &= card->mix.record_sources)) return -EINVAL;
2121 spin_lock_irqsave(&card->lock, flags);
2122 card->mix.recmask_io(card,0,val);
2123 spin_unlock_irqrestore(&card->lock, flags);
2129 if ( ! supported_mixer(card,i))
2132 spin_lock_irqsave(&card->lock, flags);
2133 set_mixer(card,i,val);
2134 spin_unlock_irqrestore(&card->lock, flags);
2140 /* --------------------------------------------------------------------- */
2141 static int ess_open_mixdev(struct inode *inode, struct file *file)
2143 unsigned int minor = iminor(inode);
2144 struct ess_card *card = NULL;
2145 struct pci_dev *pdev = NULL;
2146 struct pci_driver *drvr;
2148 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev)) != NULL) {
2149 drvr = pci_dev_driver (pdev);
2150 if (drvr == &maestro_pci_driver) {
2151 card = (struct ess_card*)pci_get_drvdata (pdev);
2154 if (card->dev_mixer == minor)
2160 file->private_data = card;
2164 static int ess_release_mixdev(struct inode *inode, struct file *file)
2166 struct ess_card *card = (struct ess_card *)file->private_data;
2168 VALIDATE_CARD(card);
2173 static int ess_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2175 struct ess_card *card = (struct ess_card *)file->private_data;
2177 VALIDATE_CARD(card);
2179 return mixer_ioctl(card, cmd, arg);
2182 static /*const*/ struct file_operations ess_mixer_fops = {
2183 .owner = THIS_MODULE,
2184 .llseek = no_llseek,
2185 .ioctl = ess_ioctl_mixdev,
2186 .open = ess_open_mixdev,
2187 .release = ess_release_mixdev,
2190 /* --------------------------------------------------------------------- */
2192 static int drain_dac(struct ess_state *s, int nonblock)
2194 DECLARE_WAITQUEUE(wait,current);
2195 unsigned long flags;
2199 if (s->dma_dac.mapped || !s->dma_dac.ready)
2201 current->state = TASK_INTERRUPTIBLE;
2202 add_wait_queue(&s->dma_dac.wait, &wait);
2204 /* XXX uhm.. questionable locking*/
2205 spin_lock_irqsave(&s->lock, flags);
2206 count = s->dma_dac.count;
2207 spin_unlock_irqrestore(&s->lock, flags);
2210 if (signal_pending(current))
2213 remove_wait_queue(&s->dma_dac.wait, &wait);
2214 current->state = TASK_RUNNING;
2217 tmo = (count * HZ) / s->ratedac;
2218 tmo >>= sample_shift[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK];
2219 /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken.
2220 or something. who cares. - zach */
2221 if (!schedule_timeout(tmo ? tmo : 1) && tmo)
2222 M_printk(KERN_DEBUG "maestro: dma timed out?? %ld\n",jiffies);
2224 remove_wait_queue(&s->dma_dac.wait, &wait);
2225 current->state = TASK_RUNNING;
2226 if (signal_pending(current))
2227 return -ERESTARTSYS;
2231 /* --------------------------------------------------------------------- */
2232 /* Zach sez: "god this is gross.." */
2234 comb_stereo(unsigned char *real_buffer,unsigned char *tmp_buffer, int offset,
2235 int count, int bufsize)
2237 /* No such thing as stereo recording, so we
2238 use dual input mixers. which means we have to
2239 combine mono to stereo buffer. yuck.
2241 but we don't have to be able to work a byte at a time..*/
2243 unsigned char *so,*left,*right;
2247 left = real_buffer + offset;
2248 right = real_buffer + bufsize/2 + offset;
2250 /* M_printk("comb_stereo writing %d to %p from %p and %p, offset: %d size: %d\n",count/2, tmp_buffer,left,right,offset,bufsize);*/
2252 for(i=count/4; i ; i--) {
2253 (*(so+2)) = *(right++);
2254 (*(so+3)) = *(right++);
2256 (*(so+1)) = *(left++);
2263 /* in this loop, dma_adc.count signifies the amount of data thats waiting
2264 to be copied to the user's buffer. it is filled by the interrupt
2265 handler and drained by this loop. */
2267 ess_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2269 struct ess_state *s = (struct ess_state *)file->private_data;
2271 unsigned long flags;
2274 unsigned char *combbuf = NULL;
2277 if (ppos != &file->f_pos)
2279 if (s->dma_adc.mapped)
2281 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2283 if (!access_ok(VERIFY_WRITE, buffer, count))
2285 if(!(combbuf = kmalloc(count,GFP_KERNEL)))
2292 spin_lock_irqsave(&s->lock, flags);
2293 /* remember, all these things are expressed in bytes to be
2294 sent to the user.. hence the evil / 2 down below */
2295 swptr = s->dma_adc.swptr;
2296 cnt = s->dma_adc.dmasize-swptr;
2297 if (s->dma_adc.count < cnt)
2298 cnt = s->dma_adc.count;
2299 spin_unlock_irqrestore(&s->lock, flags);
2304 if ( cnt > 0 ) cnt &= ~3;
2308 if (file->f_flags & O_NONBLOCK)
2310 ret = ret ? ret : -EAGAIN;
2311 goto rec_return_free;
2313 if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
2314 if(! s->card->in_suspend) printk(KERN_DEBUG "maestro: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2315 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
2316 s->dma_adc.hwptr, s->dma_adc.swptr);
2318 spin_lock_irqsave(&s->lock, flags);
2319 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
2320 /* program enhanced mode registers */
2322 /* wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
2323 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1); */
2324 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
2325 spin_unlock_irqrestore(&s->lock, flags);
2327 if (signal_pending(current))
2329 ret = ret ? ret : -ERESTARTSYS;
2330 goto rec_return_free;
2335 if(s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
2336 /* swptr/2 so that we know the real offset in each apu's buffer */
2337 comb_stereo(s->dma_adc.rawbuf,combbuf,swptr/2,cnt,s->dma_adc.dmasize);
2338 if (copy_to_user(buffer, combbuf, cnt)) {
2339 ret = ret ? ret : -EFAULT;
2340 goto rec_return_free;
2343 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
2344 ret = ret ? ret : -EFAULT;
2345 goto rec_return_free;
2349 swptr = (swptr + cnt) % s->dma_adc.dmasize;
2350 spin_lock_irqsave(&s->lock, flags);
2351 s->dma_adc.swptr = swptr;
2352 s->dma_adc.count -= cnt;
2353 spin_unlock_irqrestore(&s->lock, flags);
2361 if(combbuf) kfree(combbuf);
2366 ess_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2368 struct ess_state *s = (struct ess_state *)file->private_data;
2370 unsigned long flags;
2375 if (ppos != &file->f_pos)
2377 if (s->dma_dac.mapped)
2379 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2381 if (!access_ok(VERIFY_READ, buffer, count))
2388 spin_lock_irqsave(&s->lock, flags);
2390 if (s->dma_dac.count < 0) {
2391 s->dma_dac.count = 0;
2392 s->dma_dac.swptr = s->dma_dac.hwptr;
2394 swptr = s->dma_dac.swptr;
2396 cnt = s->dma_dac.dmasize-swptr;
2398 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
2399 cnt = s->dma_dac.dmasize - s->dma_dac.count;
2401 spin_unlock_irqrestore(&s->lock, flags);
2408 if (file->f_flags & O_NONBLOCK) {
2409 if(!ret) ret = -EAGAIN;
2412 if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
2413 if(! s->card->in_suspend) printk(KERN_DEBUG "maestro: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2414 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
2415 s->dma_dac.hwptr, s->dma_dac.swptr);
2417 spin_lock_irqsave(&s->lock, flags);
2418 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
2419 /* program enhanced mode registers */
2420 /* wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
2421 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1); */
2423 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
2424 spin_unlock_irqrestore(&s->lock, flags);
2426 if (signal_pending(current)) {
2427 if (!ret) ret = -ERESTARTSYS;
2432 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
2433 if (!ret) ret = -EFAULT;
2436 /* printk("wrote %d bytes at sw: %d cnt: %d while hw: %d\n",cnt, swptr, s->dma_dac.count, s->dma_dac.hwptr);*/
2438 swptr = (swptr + cnt) % s->dma_dac.dmasize;
2440 spin_lock_irqsave(&s->lock, flags);
2441 s->dma_dac.swptr = swptr;
2442 s->dma_dac.count += cnt;
2443 s->dma_dac.endcleared = 0;
2444 spin_unlock_irqrestore(&s->lock, flags);
2454 /* No kernel lock - we have our own spinlock */
2455 static unsigned int ess_poll(struct file *file, struct poll_table_struct *wait)
2457 struct ess_state *s = (struct ess_state *)file->private_data;
2458 unsigned long flags;
2459 unsigned int mask = 0;
2463 /* In 0.14 prog_dmabuf always returns success anyway ... */
2464 if (file->f_mode & FMODE_WRITE) {
2465 if (!s->dma_dac.ready && prog_dmabuf(s, 0))
2468 if (file->f_mode & FMODE_READ) {
2469 if (!s->dma_adc.ready && prog_dmabuf(s, 1))
2473 if (file->f_mode & FMODE_WRITE)
2474 poll_wait(file, &s->dma_dac.wait, wait);
2475 if (file->f_mode & FMODE_READ)
2476 poll_wait(file, &s->dma_adc.wait, wait);
2477 spin_lock_irqsave(&s->lock, flags);
2479 if (file->f_mode & FMODE_READ) {
2480 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
2481 mask |= POLLIN | POLLRDNORM;
2483 if (file->f_mode & FMODE_WRITE) {
2484 if (s->dma_dac.mapped) {
2485 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
2486 mask |= POLLOUT | POLLWRNORM;
2488 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
2489 mask |= POLLOUT | POLLWRNORM;
2492 spin_unlock_irqrestore(&s->lock, flags);
2496 static int ess_mmap(struct file *file, struct vm_area_struct *vma)
2498 struct ess_state *s = (struct ess_state *)file->private_data;
2505 if (vma->vm_flags & VM_WRITE) {
2506 if ((ret = prog_dmabuf(s, 1)) != 0)
2511 /* if we can have the wp/wc do the combining
2512 we can turn this back on. */
2513 if (vma->vm_flags & VM_READ) {
2514 if ((ret = prog_dmabuf(s, 0)) != 0)
2521 if (vma->vm_pgoff != 0)
2523 size = vma->vm_end - vma->vm_start;
2524 if (size > (PAGE_SIZE << db->buforder))
2527 if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
2536 static int ess_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2538 struct ess_state *s = (struct ess_state *)file->private_data;
2539 unsigned long flags;
2540 audio_buf_info abinfo;
2542 int val, mapped, ret;
2543 unsigned char fmtm, fmtd;
2544 void __user *argp = (void __user *)arg;
2545 int __user *p = argp;
2547 /* printk("maestro: ess_ioctl: cmd %d\n", cmd);*/
2550 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
2551 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
2553 case OSS_GETVERSION:
2554 return put_user(SOUND_VERSION, p);
2556 case SNDCTL_DSP_SYNC:
2557 if (file->f_mode & FMODE_WRITE)
2558 return drain_dac(s, file->f_flags & O_NONBLOCK);
2561 case SNDCTL_DSP_SETDUPLEX:
2565 case SNDCTL_DSP_GETCAPS:
2566 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
2568 case SNDCTL_DSP_RESET:
2569 if (file->f_mode & FMODE_WRITE) {
2571 synchronize_irq(s->card->pcidev->irq);
2572 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
2574 if (file->f_mode & FMODE_READ) {
2576 synchronize_irq(s->card->pcidev->irq);
2577 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
2581 case SNDCTL_DSP_SPEED:
2582 if (get_user(val, p))
2585 if (file->f_mode & FMODE_READ) {
2587 s->dma_adc.ready = 0;
2588 set_adc_rate(s, val);
2590 if (file->f_mode & FMODE_WRITE) {
2592 s->dma_dac.ready = 0;
2593 set_dac_rate(s, val);
2596 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
2598 case SNDCTL_DSP_STEREO:
2599 if (get_user(val, p))
2603 if (file->f_mode & FMODE_READ) {
2605 s->dma_adc.ready = 0;
2607 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
2609 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
2611 if (file->f_mode & FMODE_WRITE) {
2613 s->dma_dac.ready = 0;
2615 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
2617 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
2619 set_fmt(s, fmtm, fmtd);
2622 case SNDCTL_DSP_CHANNELS:
2623 if (get_user(val, p))
2628 if (file->f_mode & FMODE_READ) {
2630 s->dma_adc.ready = 0;
2632 fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
2634 fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
2636 if (file->f_mode & FMODE_WRITE) {
2638 s->dma_dac.ready = 0;
2640 fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
2642 fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
2644 set_fmt(s, fmtm, fmtd);
2646 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
2647 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p);
2649 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2650 return put_user(AFMT_U8|AFMT_S16_LE, p);
2652 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2653 if (get_user(val, p))
2655 if (val != AFMT_QUERY) {
2658 if (file->f_mode & FMODE_READ) {
2660 s->dma_adc.ready = 0;
2661 /* fixed at 16bit for now */
2662 fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2664 if (val == AFMT_S16_LE)
2665 fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2667 fmtm &= ~(ESS_FMT_16BIT << ESS_ADC_SHIFT);
2670 if (file->f_mode & FMODE_WRITE) {
2672 s->dma_dac.ready = 0;
2673 if (val == AFMT_S16_LE)
2674 fmtd |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
2676 fmtm &= ~(ESS_FMT_16BIT << ESS_DAC_SHIFT);
2678 set_fmt(s, fmtm, fmtd);
2680 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
2681 (ESS_FMT_16BIT << ESS_ADC_SHIFT)
2682 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ?
2687 case SNDCTL_DSP_POST:
2690 case SNDCTL_DSP_GETTRIGGER:
2692 if ((file->f_mode & FMODE_READ) && (s->enable & ADC_RUNNING))
2693 val |= PCM_ENABLE_INPUT;
2694 if ((file->f_mode & FMODE_WRITE) && (s->enable & DAC_RUNNING))
2695 val |= PCM_ENABLE_OUTPUT;
2696 return put_user(val, p);
2698 case SNDCTL_DSP_SETTRIGGER:
2699 if (get_user(val, p))
2701 if (file->f_mode & FMODE_READ) {
2702 if (val & PCM_ENABLE_INPUT) {
2703 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2709 if (file->f_mode & FMODE_WRITE) {
2710 if (val & PCM_ENABLE_OUTPUT) {
2711 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2719 case SNDCTL_DSP_GETOSPACE:
2720 if (!(file->f_mode & FMODE_WRITE))
2722 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2724 spin_lock_irqsave(&s->lock, flags);
2726 abinfo.fragsize = s->dma_dac.fragsize;
2727 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
2728 abinfo.fragstotal = s->dma_dac.numfrag;
2729 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
2730 spin_unlock_irqrestore(&s->lock, flags);
2731 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2733 case SNDCTL_DSP_GETISPACE:
2734 if (!(file->f_mode & FMODE_READ))
2736 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2738 spin_lock_irqsave(&s->lock, flags);
2740 abinfo.fragsize = s->dma_adc.fragsize;
2741 abinfo.bytes = s->dma_adc.count;
2742 abinfo.fragstotal = s->dma_adc.numfrag;
2743 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
2744 spin_unlock_irqrestore(&s->lock, flags);
2745 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2747 case SNDCTL_DSP_NONBLOCK:
2748 file->f_flags |= O_NONBLOCK;
2751 case SNDCTL_DSP_GETODELAY:
2752 if (!(file->f_mode & FMODE_WRITE))
2754 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2756 spin_lock_irqsave(&s->lock, flags);
2758 val = s->dma_dac.count;
2759 spin_unlock_irqrestore(&s->lock, flags);
2760 return put_user(val, p);
2762 case SNDCTL_DSP_GETIPTR:
2763 if (!(file->f_mode & FMODE_READ))
2765 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2767 spin_lock_irqsave(&s->lock, flags);
2769 cinfo.bytes = s->dma_adc.total_bytes;
2770 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
2771 cinfo.ptr = s->dma_adc.hwptr;
2772 if (s->dma_adc.mapped)
2773 s->dma_adc.count &= s->dma_adc.fragsize-1;
2774 spin_unlock_irqrestore(&s->lock, flags);
2775 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
2779 case SNDCTL_DSP_GETOPTR:
2780 if (!(file->f_mode & FMODE_WRITE))
2782 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2784 spin_lock_irqsave(&s->lock, flags);
2786 cinfo.bytes = s->dma_dac.total_bytes;
2787 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
2788 cinfo.ptr = s->dma_dac.hwptr;
2789 if (s->dma_dac.mapped)
2790 s->dma_dac.count &= s->dma_dac.fragsize-1;
2791 spin_unlock_irqrestore(&s->lock, flags);
2792 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
2796 case SNDCTL_DSP_GETBLKSIZE:
2797 if (file->f_mode & FMODE_WRITE) {
2798 if ((val = prog_dmabuf(s, 0)))
2800 return put_user(s->dma_dac.fragsize, p);
2802 if ((val = prog_dmabuf(s, 1)))
2804 return put_user(s->dma_adc.fragsize, p);
2806 case SNDCTL_DSP_SETFRAGMENT:
2807 if (get_user(val, p))
2809 M_printk("maestro: SETFRAGMENT: %0x\n",val);
2810 if (file->f_mode & FMODE_READ) {
2811 s->dma_adc.ossfragshift = val & 0xffff;
2812 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
2813 if (s->dma_adc.ossfragshift < 4)
2814 s->dma_adc.ossfragshift = 4;
2815 if (s->dma_adc.ossfragshift > 15)
2816 s->dma_adc.ossfragshift = 15;
2817 if (s->dma_adc.ossmaxfrags < 4)
2818 s->dma_adc.ossmaxfrags = 4;
2820 if (file->f_mode & FMODE_WRITE) {
2821 s->dma_dac.ossfragshift = val & 0xffff;
2822 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
2823 if (s->dma_dac.ossfragshift < 4)
2824 s->dma_dac.ossfragshift = 4;
2825 if (s->dma_dac.ossfragshift > 15)
2826 s->dma_dac.ossfragshift = 15;
2827 if (s->dma_dac.ossmaxfrags < 4)
2828 s->dma_dac.ossmaxfrags = 4;
2832 case SNDCTL_DSP_SUBDIVIDE:
2833 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
2834 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
2836 if (get_user(val, p))
2838 if (val != 1 && val != 2 && val != 4)
2840 if (file->f_mode & FMODE_READ)
2841 s->dma_adc.subdivision = val;
2842 if (file->f_mode & FMODE_WRITE)
2843 s->dma_dac.subdivision = val;
2846 case SOUND_PCM_READ_RATE:
2847 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
2849 case SOUND_PCM_READ_CHANNELS:
2850 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
2851 : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, p);
2853 case SOUND_PCM_READ_BITS:
2854 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_16BIT << ESS_ADC_SHIFT)
2855 : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ? 16 : 8, p);
2857 case SOUND_PCM_WRITE_FILTER:
2858 case SNDCTL_DSP_SETSYNCRO:
2859 case SOUND_PCM_READ_FILTER:
2867 set_base_registers(struct ess_state *s,void *vaddr)
2869 unsigned long packed_phys = virt_to_bus(vaddr)>>12;
2870 wave_set_register(s, 0x01FC , packed_phys);
2871 wave_set_register(s, 0x01FD , packed_phys);
2872 wave_set_register(s, 0x01FE , packed_phys);
2873 wave_set_register(s, 0x01FF , packed_phys);
2877 * this guy makes sure we're in the right power
2878 * state for what we want to be doing
2880 static void maestro_power(struct ess_card *card, int tostate)
2882 u16 active_mask = acpi_state_mask[tostate];
2887 pci_read_config_byte(card->pcidev, card->power_regs+0x4, &state);
2890 /* make sure we're in the right state */
2891 if(state != tostate) {
2892 M_printk(KERN_WARNING "maestro: dev %02x:%02x.%x switching from D%d to D%d\n",
2893 card->pcidev->bus->number,
2894 PCI_SLOT(card->pcidev->devfn),
2895 PCI_FUNC(card->pcidev->devfn),
2897 pci_write_config_byte(card->pcidev, card->power_regs+0x4, tostate);
2900 /* and make sure the units we care about are on
2901 XXX we might want to do this before state flipping? */
2902 pci_write_config_word(card->pcidev, 0x54, ~ active_mask);
2903 pci_write_config_word(card->pcidev, 0x56, ~ active_mask);
2906 /* we allocate a large power of two for all our memory.
2907 this is cut up into (not to scale :):
2908 |silly fifo word | 512byte mixbuf per adc | dac/adc * channels |
2911 allocate_buffers(struct ess_state *s)
2915 struct page *page, *pend;
2917 /* alloc as big a chunk as we can */
2918 for (order = (dsps_order + (16-PAGE_SHIFT) + 1); order >= (dsps_order + 2 + 1); order--)
2919 if((rawbuf = (void *)__get_free_pages(GFP_KERNEL|GFP_DMA, order)))
2925 M_printk("maestro: allocated %ld (%d) bytes at %p\n",PAGE_SIZE<<order,order, rawbuf);
2927 if ((virt_to_bus(rawbuf) + (PAGE_SIZE << order) - 1) & ~((1<<28)-1)) {
2928 printk(KERN_ERR "maestro: DMA buffer beyond 256MB! busaddr 0x%lx size %ld\n",
2929 virt_to_bus(rawbuf), PAGE_SIZE << order);
2934 s->card->dmapages = rawbuf;
2935 s->card->dmaorder = order;
2937 for(i=0;i<NR_DSPS;i++) {
2938 struct ess_state *ess = &s->card->channels[i];
2940 if(ess->dev_audio == -1)
2943 ess->dma_dac.ready = s->dma_dac.mapped = 0;
2944 ess->dma_adc.ready = s->dma_adc.mapped = 0;
2945 ess->dma_adc.buforder = ess->dma_dac.buforder = order - 1 - dsps_order - 1;
2947 /* offset dac and adc buffers starting half way through and then at each [da][ad]c's
2948 order's intervals.. */
2949 ess->dma_dac.rawbuf = rawbuf + (PAGE_SIZE<<(order-1)) + (i * ( PAGE_SIZE << (ess->dma_dac.buforder + 1 )));
2950 ess->dma_adc.rawbuf = ess->dma_dac.rawbuf + ( PAGE_SIZE << ess->dma_dac.buforder);
2951 /* offset mixbuf by a mixbuf so that the lame status fifo can
2952 happily scribble away.. */
2953 ess->mixbuf = rawbuf + (512 * (i+1));
2955 M_printk("maestro: setup apu %d: dac: %p adc: %p mix: %p\n",i,ess->dma_dac.rawbuf,
2956 ess->dma_adc.rawbuf, ess->mixbuf);
2960 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
2961 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
2962 for (page = virt_to_page(rawbuf); page <= pend; page++)
2963 SetPageReserved(page);
2968 free_buffers(struct ess_state *s)
2970 struct page *page, *pend;
2972 s->dma_dac.rawbuf = s->dma_adc.rawbuf = NULL;
2973 s->dma_dac.mapped = s->dma_adc.mapped = 0;
2974 s->dma_dac.ready = s->dma_adc.ready = 0;
2976 M_printk("maestro: freeing %p\n",s->card->dmapages);
2977 /* undo marking the pages as reserved */
2979 pend = virt_to_page(s->card->dmapages + (PAGE_SIZE << s->card->dmaorder) - 1);
2980 for (page = virt_to_page(s->card->dmapages); page <= pend; page++)
2981 ClearPageReserved(page);
2983 free_pages((unsigned long)s->card->dmapages,s->card->dmaorder);
2984 s->card->dmapages = NULL;
2988 ess_open(struct inode *inode, struct file *file)
2990 unsigned int minor = iminor(inode);
2991 struct ess_state *s = NULL;
2992 unsigned char fmtm = ~0, fmts = 0;
2993 struct pci_dev *pdev = NULL;
2995 * Scan the cards and find the channel. We only
2996 * do this at open time so it is ok
2999 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev)) != NULL) {
3001 struct pci_driver *drvr;
3003 drvr = pci_dev_driver (pdev);
3004 if (drvr == &maestro_pci_driver) {
3006 struct ess_state *sp;
3008 c = (struct ess_card*)pci_get_drvdata (pdev);
3011 for(i=0;i<NR_DSPS;i++)
3014 if(sp->dev_audio < 0)
3016 if((sp->dev_audio ^ minor) & ~0xf)
3026 file->private_data = s;
3027 /* wait for device to become free */
3029 while (s->open_mode & file->f_mode) {
3030 if (file->f_flags & O_NONBLOCK) {
3032 return -EWOULDBLOCK;
3035 interruptible_sleep_on(&s->open_wait);
3036 if (signal_pending(current))
3037 return -ERESTARTSYS;
3041 /* under semaphore.. */
3042 if ((s->card->dmapages==NULL) && allocate_buffers(s)) {
3047 /* we're covered by the open_sem */
3048 if( ! s->card->dsps_open ) {
3049 maestro_power(s->card,ACPI_D0);
3052 s->card->dsps_open++;
3053 M_printk("maestro: open, %d bobs now\n",s->card->dsps_open);
3055 /* ok, lets write WC base regs now that we've
3056 powered up the chip */
3057 M_printk("maestro: writing 0x%lx (bus 0x%lx) to the wp\n",virt_to_bus(s->card->dmapages),
3058 ((virt_to_bus(s->card->dmapages))&0xFFE00000)>>12);
3059 set_base_registers(s,s->card->dmapages);
3061 if (file->f_mode & FMODE_READ) {
3063 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_ADC_SHIFT);
3064 if ((minor & 0xf) == SND_DEV_DSP16)
3065 fmts |= ESS_FMT_16BIT << ESS_ADC_SHIFT; */
3067 fmtm &= ~((ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT);
3068 fmts = (ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT;
3070 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
3071 set_adc_rate(s, 8000);
3073 if (file->f_mode & FMODE_WRITE) {
3074 fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_DAC_SHIFT);
3075 if ((minor & 0xf) == SND_DEV_DSP16)
3076 fmts |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
3078 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
3079 set_dac_rate(s, 8000);
3081 set_fmt(s, fmtm, fmts);
3082 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
3089 ess_release(struct inode *inode, struct file *file)
3091 struct ess_state *s = (struct ess_state *)file->private_data;
3095 if (file->f_mode & FMODE_WRITE)
3096 drain_dac(s, file->f_flags & O_NONBLOCK);
3098 if (file->f_mode & FMODE_WRITE) {
3101 if (file->f_mode & FMODE_READ) {
3105 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
3106 /* we're covered by the open_sem */
3107 M_printk("maestro: %d dsps now alive\n",s->card->dsps_open-1);
3108 if( --s->card->dsps_open <= 0) {
3109 s->card->dsps_open = 0;
3112 maestro_power(s->card,ACPI_D2);
3115 wake_up(&s->open_wait);
3120 static struct file_operations ess_audio_fops = {
3121 .owner = THIS_MODULE,
3122 .llseek = no_llseek,
3129 .release = ess_release,
3133 maestro_config(struct ess_card *card)
3135 struct pci_dev *pcidev = card->pcidev;
3136 struct ess_state *ess = &card->channels[0];
3137 int apu,iobase = card->iobase;
3141 /* We used to muck around with pci config space that
3142 * we had no business messing with. We don't know enough
3143 * about the machine to know which DMA mode is appropriate,
3144 * etc. We were guessing wrong on some machines and making
3145 * them unhappy. We now trust in the BIOS to do things right,
3146 * which almost certainly means a new host of problems will
3147 * arise with broken BIOS implementations. screw 'em.
3148 * We're already intolerant of machines that don't assign
3152 /* do config work at full power */
3153 maestro_power(card,ACPI_D0);
3155 pci_read_config_word(pcidev, 0x50, &w);
3157 w&=~(1<<5); /* Don't swap left/right (undoc)*/
3159 pci_write_config_word(pcidev, 0x50, w);
3161 pci_read_config_word(pcidev, 0x52, &w);
3162 w&=~(1<<15); /* Turn off internal clock multiplier */
3163 /* XXX how do we know which to use? */
3164 w&=~(1<<14); /* External clock */
3166 w|= (1<<7); /* Hardware volume control on */
3167 w|= (1<<6); /* Debounce off: easier to push the HWV buttons. */
3168 w&=~(1<<5); /* GPIO 4:5 */
3169 w|= (1<<4); /* Disconnect from the CHI. Enabling this made a dell 7500 work. */
3170 w&=~(1<<2); /* MIDI fix off (undoc) */
3171 w&=~(1<<1); /* reserved, always write 0 */
3172 pci_write_config_word(pcidev, 0x52, w);
3178 pci_read_config_word(pcidev, 0x40, &w);
3179 w|=(1<<15); /* legacy decode off */
3180 w&=~(1<<14); /* Disable SIRQ */
3181 w&=~(0x1f); /* disable mpu irq/io, game port, fm, SB */
3183 pci_write_config_word(pcidev, 0x40, w);
3185 /* Set up 978 docking control chip. */
3186 pci_read_config_word(pcidev, 0x58, &w);
3187 w|=1<<2; /* Enable 978. */
3188 w|=1<<3; /* Turn on 978 hardware volume control. */
3189 w&=~(1<<11); /* Turn on 978 mixer volume control. */
3190 pci_write_config_word(pcidev, 0x58, w);
3192 sound_reset(iobase);
3198 /* setup usual 0x34 stuff.. 0x36 may be chip specific */
3199 outw(0xC090, iobase+0x34); /* direct sound, stereo */
3201 outw(0x3000, iobase+0x36); /* direct sound, stereo */
3209 maestro_ac97_reset(iobase,pcidev);
3217 n|=12<<12; /* Direct Sound, Stereo */
3218 outl(n, iobase+0x34);
3221 n&=~0x0F00; /* Modem off */
3222 outl(n, iobase+0x34);
3226 n|=9<<4; /* DAC, Stereo */
3227 outl(n, iobase+0x34);
3230 n&=~0x000F; /* ASSP off */
3231 outl(n, iobase+0x34);
3234 n|=(1<<29); /* Enable ring bus */
3235 outl(n, iobase+0x34);
3238 n|=(1<<28); /* Enable serial bus */
3239 outl(n, iobase+0x34);
3242 n&=~0x00F00000; /* MIC off */
3243 outl(n, iobase+0x34);
3246 n&=~0x000F0000; /* I2S off */
3247 outl(n, iobase+0x34);
3251 w&=~(1<<7); /* ClkRun off */
3252 outw(w, iobase+0x18);
3255 w&=~(1<<6); /* Hardware volume control interrupt off... for now. */
3256 outw(w, iobase+0x18);
3259 w&=~(1<<4); /* ASSP irq off */
3260 outw(w, iobase+0x18);
3263 w&=~(1<<3); /* ISDN irq off */
3264 outw(w, iobase+0x18);
3267 w|=(1<<2); /* Direct Sound IRQ on */
3268 outw(w, iobase+0x18);
3271 w&=~(1<<1); /* MPU401 IRQ off */
3272 outw(w, iobase+0x18);
3275 w|=(1<<0); /* SB IRQ on */
3276 outw(w, iobase+0x18);
3278 /* Set hardware volume control registers to midpoints.
3279 We can tell which button was pushed based on how they change. */
3280 outb(0x88, iobase+0x1c);
3281 outb(0x88, iobase+0x1d);
3282 outb(0x88, iobase+0x1e);
3283 outb(0x88, iobase+0x1f);
3285 /* it appears some maestros (dell 7500) only work if these are set,
3286 regardless of whether we use the assp or not. */
3288 outb(0, iobase+0xA4);
3289 outb(3, iobase+0xA2);
3290 outb(0, iobase+0xA6);
3292 for(apu=0;apu<16;apu++)
3294 /* Write 0 into the buffer area 0x1E0->1EF */
3295 outw(0x01E0+apu, 0x10+iobase);
3296 outw(0x0000, 0x12+iobase);
3299 * The 1.10 test program seem to write 0 into the buffer area
3302 outw(0x01D0+apu, 0x10+iobase);
3303 outw(0x0000, 0x12+iobase);
3307 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3308 (wave_get_register(ess, IDR7_WAVE_ROMRAM)&0xFF00));
3309 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3310 wave_get_register(ess, IDR7_WAVE_ROMRAM)|0x100);
3311 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3312 wave_get_register(ess, IDR7_WAVE_ROMRAM)&~0x200);
3313 wave_set_register(ess, IDR7_WAVE_ROMRAM,
3314 wave_get_register(ess, IDR7_WAVE_ROMRAM)|~0x400);
3316 maestro_write(ess, IDR7_WAVE_ROMRAM,
3317 (maestro_read(ess, IDR7_WAVE_ROMRAM)&0xFF00));
3318 maestro_write(ess, IDR7_WAVE_ROMRAM,
3319 maestro_read(ess, IDR7_WAVE_ROMRAM)|0x100);
3320 maestro_write(ess, IDR7_WAVE_ROMRAM,
3321 maestro_read(ess, IDR7_WAVE_ROMRAM)&~0x200);
3322 maestro_write(ess, IDR7_WAVE_ROMRAM,
3323 maestro_read(ess, IDR7_WAVE_ROMRAM)|0x400);
3326 maestro_write(ess, IDR2_CRAM_DATA, 0x0000);
3327 maestro_write(ess, 0x08, 0xB004);
3328 /* Now back to the DirectSound stuff */
3329 maestro_write(ess, 0x09, 0x001B);
3330 maestro_write(ess, 0x0A, 0x8000);
3331 maestro_write(ess, 0x0B, 0x3F37);
3332 maestro_write(ess, 0x0C, 0x0098);
3334 /* parallel out ?? */
3335 maestro_write(ess, 0x0C,
3336 (maestro_read(ess, 0x0C)&~0xF000)|0x8000);
3337 /* parallel in, has something to do with recording :) */
3338 maestro_write(ess, 0x0C,
3339 (maestro_read(ess, 0x0C)&~0x0F00)|0x0500);
3341 maestro_write(ess, 0x0D, 0x7632);
3343 /* Wave cache control on - test off, sg off,
3344 enable, enable extra chans 1Mb */
3346 outw(inw(0x14+iobase)|(1<<8),0x14+iobase);
3347 outw(inw(0x14+iobase)&0xFE03,0x14+iobase);
3348 outw((inw(0x14+iobase)&0xFFFC), 0x14+iobase);
3349 outw(inw(0x14+iobase)|(1<<7),0x14+iobase);
3351 outw(0xA1A0, 0x14+iobase); /* 0300 ? */
3353 /* Now clear the APU control ram */
3354 for(apu=0;apu<NR_APUS;apu++)
3356 for(w=0;w<NR_APU_REGS;w++)
3357 apu_set_register(ess, apu|ESS_CHAN_HARD, w, 0);
3365 /* this guy tries to find the pci power management
3366 * register bank. this should really be in core
3367 * code somewhere. 1 on success. */
3369 parse_power(struct ess_card *card, struct pci_dev *pcidev)
3374 int max = 64; /* an a 8bit guy pointing to 32bit guys
3375 can only express so much. */
3377 card->power_regs = 0;
3379 /* check to see if we have a capabilities list in
3380 the config register */
3381 pci_read_config_word(pcidev, PCI_STATUS, &w);
3382 if(!(w & PCI_STATUS_CAP_LIST)) return 0;
3384 /* walk the list, starting at the head. */
3385 pci_read_config_byte(pcidev,PCI_CAPABILITY_LIST,&next);
3387 while(next && max--) {
3388 pci_read_config_dword(pcidev, next & ~3, &n);
3389 if((n & 0xff) == PCI_CAP_ID_PM) {
3390 card->power_regs = next;
3393 next = ((n>>8) & 0xff);
3396 return card->power_regs ? 1 : 0;
3400 maestro_probe(struct pci_dev *pcidev,const struct pci_device_id *pdid)
3402 int card_type = pdid->driver_data;
3406 struct ess_card *card;
3407 struct ess_state *ess;
3408 struct pm_dev *pmdev;
3411 /* when built into the kernel, we only print version if device is found */
3413 static int printed_version;
3414 if (!printed_version++)
3418 /* don't pick up weird modem maestros */
3419 if(((pcidev->class >> 8) & 0xffff) != PCI_CLASS_MULTIMEDIA_AUDIO)
3423 if ((ret=pci_enable_device(pcidev)))
3426 iobase = pci_resource_start(pcidev,0);
3427 if (!iobase || !(pci_resource_flags(pcidev, 0 ) & IORESOURCE_IO))
3430 if(pcidev->irq == 0)
3433 /* stake our claim on the iospace */
3434 if( request_region(iobase, 256, card_names[card_type]) == NULL )
3436 printk(KERN_WARNING "maestro: can't allocate 256 bytes I/O at 0x%4.4x\n", iobase);
3440 /* just to be sure */
3441 pci_set_master(pcidev);
3443 card = kmalloc(sizeof(struct ess_card), GFP_KERNEL);
3446 printk(KERN_WARNING "maestro: out of memory\n");
3447 release_region(iobase, 256);
3451 memset(card, 0, sizeof(*card));
3452 card->pcidev = pcidev;
3454 pmdev = pm_register(PM_PCI_DEV, PM_PCI_ID(pcidev),
3455 maestro_pm_callback);
3459 card->iobase = iobase;
3460 card->card_type = card_type;
3461 card->irq = pcidev->irq;
3462 card->magic = ESS_CARD_MAGIC;
3463 spin_lock_init(&card->lock);
3464 init_waitqueue_head(&card->suspend_queue);
3466 card->dock_mute_vol = 50;
3468 /* init our groups of 6 apus */
3469 for(i=0;i<NR_DSPS;i++)
3471 struct ess_state *s=&card->channels[i];
3476 init_waitqueue_head(&s->dma_adc.wait);
3477 init_waitqueue_head(&s->dma_dac.wait);
3478 init_waitqueue_head(&s->open_wait);
3479 spin_lock_init(&s->lock);
3480 init_MUTEX(&s->open_sem);
3481 s->magic = ESS_STATE_MAGIC;
3484 s->apu[1] = (6*i)+1;
3485 s->apu[2] = (6*i)+2;
3486 s->apu[3] = (6*i)+3;
3487 s->apu[4] = (6*i)+4;
3488 s->apu[5] = (6*i)+5;
3490 if(s->dma_adc.ready || s->dma_dac.ready || s->dma_adc.rawbuf)
3491 printk("maestro: BOTCH!\n");
3492 /* register devices */
3493 if ((s->dev_audio = register_sound_dsp(&ess_audio_fops, -1)) < 0)
3499 /* clear the rest if we ran out of slots to register */
3502 struct ess_state *s=&card->channels[i];
3506 ess = &card->channels[0];
3509 * Ok card ready. Begin setup proper
3512 printk(KERN_INFO "maestro: Configuring %s found at IO 0x%04X IRQ %d\n",
3513 card_names[card_type],iobase,card->irq);
3514 pci_read_config_dword(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &n);
3515 printk(KERN_INFO "maestro: subvendor id: 0x%08x\n",n);
3517 /* turn off power management unless:
3518 * - the user explicitly asks for it
3520 * - we're not a 2e, lesser chipps seem to have problems.
3521 * - we're not on our _very_ small whitelist. some implemenetations
3522 * really don't like the pm code, others require it.
3523 * feel free to expand this as required.
3525 #define SUBSYSTEM_VENDOR(x) (x&0xffff)
3526 if( (use_pm != 1) &&
3527 ((card_type != TYPE_MAESTRO2E) || (SUBSYSTEM_VENDOR(n) != 0x1028)))
3531 printk(KERN_INFO "maestro: not attempting power management.\n");
3533 if(!parse_power(card,pcidev))
3534 printk(KERN_INFO "maestro: no PCI power management interface found.\n");
3536 pci_read_config_dword(pcidev, card->power_regs, &n);
3537 printk(KERN_INFO "maestro: PCI power management capability: 0x%x\n",n>>16);
3541 maestro_config(card);
3543 if(maestro_ac97_get(card, 0x00)==0x0080) {
3544 printk(KERN_ERR "maestro: my goodness! you seem to have a pt101 codec, which is quite rare.\n"
3545 "\tyou should tell someone about this.\n");
3547 maestro_ac97_init(card);
3550 if ((card->dev_mixer = register_sound_mixer(&ess_mixer_fops, -1)) < 0) {
3551 printk("maestro: couldn't register mixer!\n");
3553 memcpy(card->mix.mixer_state,mixer_defaults,sizeof(card->mix.mixer_state));
3554 mixer_push_state(card);
3557 if((ret=request_irq(card->irq, ess_interrupt, SA_SHIRQ, card_names[card_type], card)))
3559 printk(KERN_ERR "maestro: unable to allocate irq %d,\n", card->irq);
3560 unregister_sound_mixer(card->dev_mixer);
3561 for(i=0;i<NR_DSPS;i++)
3563 struct ess_state *s = &card->channels[i];
3564 if(s->dev_audio != -1)
3565 unregister_sound_dsp(s->dev_audio);
3567 release_region(card->iobase, 256);
3568 unregister_reboot_notifier(&maestro_nb);
3573 /* Turn on hardware volume control interrupt.
3574 This has to come after we grab the IRQ above,
3575 or a crash will result on installation if a button has been pressed,
3576 because in that case we'll get an immediate interrupt. */
3577 n = inw(iobase+0x18);
3579 outw(n, iobase+0x18);
3581 pci_set_drvdata(pcidev,card);
3582 /* now go to sleep 'till something interesting happens */
3583 maestro_power(card,ACPI_D2);
3585 printk(KERN_INFO "maestro: %d channels configured.\n", num);
3589 static void maestro_remove(struct pci_dev *pcidev) {
3590 struct ess_card *card = pci_get_drvdata(pcidev);
3594 /* XXX maybe should force stop bob, but should be all
3595 stopped by _release by now */
3597 /* Turn off hardware volume control interrupt.
3598 This has to come before we leave the IRQ below,
3599 or a crash results if a button is pressed ! */
3600 n = inw(card->iobase+0x18);
3602 outw(n, card->iobase+0x18);
3604 free_irq(card->irq, card);
3605 unregister_sound_mixer(card->dev_mixer);
3606 for(i=0;i<NR_DSPS;i++)
3608 struct ess_state *ess = &card->channels[i];
3609 if(ess->dev_audio != -1)
3610 unregister_sound_dsp(ess->dev_audio);
3612 /* Goodbye, Mr. Bond. */
3613 maestro_power(card,ACPI_D3);
3614 release_region(card->iobase, 256);
3616 pci_set_drvdata(pcidev,NULL);
3619 static struct pci_device_id maestro_pci_tbl[] = {
3620 {PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1968, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2},
3621 {PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1978, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2E},
3622 {PCI_VENDOR_ESS_OLD, PCI_DEVICE_ID_ESS_ESS0100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO},
3625 MODULE_DEVICE_TABLE(pci, maestro_pci_tbl);
3627 static struct pci_driver maestro_pci_driver = {
3629 .id_table = maestro_pci_tbl,
3630 .probe = maestro_probe,
3631 .remove = maestro_remove,
3634 int __init init_maestro(void)
3638 rc = pci_module_init(&maestro_pci_driver);
3642 if (register_reboot_notifier(&maestro_nb))
3643 printk(KERN_WARNING "maestro: reboot notifier registration failed; may not reboot properly.\n");
3647 if (dsps_order < 0) {
3649 printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order);
3651 else if (dsps_order > MAX_DSP_ORDER) {
3652 dsps_order = MAX_DSP_ORDER;
3653 printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order);
3658 static int maestro_notifier(struct notifier_block *nb, unsigned long event, void *buf)
3660 /* this notifier is called when the kernel is really shut down. */
3661 M_printk("maestro: shutting down\n");
3662 /* this will remove all card instances too */
3663 pci_unregister_driver(&maestro_pci_driver);
3664 /* XXX dunno about power management */
3668 /* --------------------------------------------------------------------- */
3671 void cleanup_maestro(void) {
3672 M_printk("maestro: unloading\n");
3673 pci_unregister_driver(&maestro_pci_driver);
3674 pm_unregister_all(maestro_pm_callback);
3675 unregister_reboot_notifier(&maestro_nb);
3678 /* --------------------------------------------------------------------- */
3681 check_suspend(struct ess_card *card)
3683 DECLARE_WAITQUEUE(wait, current);
3685 if(!card->in_suspend) return;
3688 add_wait_queue(&(card->suspend_queue), &wait);
3689 current->state = TASK_UNINTERRUPTIBLE;
3691 remove_wait_queue(&(card->suspend_queue), &wait);
3692 current->state = TASK_RUNNING;
3696 maestro_suspend(struct ess_card *card)
3698 unsigned long flags;
3701 spin_lock_irqsave(&card->lock,flags); /* over-kill */
3703 M_printk("maestro: apm in dev %p\n",card);
3705 /* we have to read from the apu regs, need
3707 maestro_power(card,ACPI_D0);
3709 for(i=0;i<NR_DSPS;i++) {
3710 struct ess_state *s = &card->channels[i];
3712 if(s->dev_audio == -1)
3715 M_printk("maestro: stopping apus for device %d\n",i);
3719 card->apu_map[s->apu[j]][5]=apu_get_register(s,j,5);
3723 /* get rid of interrupts? */
3724 if( card->dsps_open > 0)
3725 stop_bob(&card->channels[0]);
3729 spin_unlock_irqrestore(&card->lock,flags);
3731 /* we trust in the bios to power down the chip on suspend.
3732 * XXX I'm also not sure that in_suspend will protect
3733 * against all reg accesses from here on out.
3738 maestro_resume(struct ess_card *card)
3740 unsigned long flags;
3743 spin_lock_irqsave(&card->lock,flags); /* over-kill */
3745 card->in_suspend = 0;
3747 M_printk("maestro: resuming card at %p\n",card);
3749 /* restore all our config */
3750 maestro_config(card);
3751 /* need to restore the base pointers.. */
3753 set_base_registers(&card->channels[0],card->dmapages);
3755 mixer_push_state(card);
3757 /* set each channels' apu control registers before
3760 for(i=0;i<NR_DSPS;i++) {
3761 struct ess_state *s = &card->channels[i];
3764 if(s->dev_audio == -1)
3767 for(chan = 0 ; chan < 6 ; chan++) {
3768 wave_set_register(s,s->apu[chan]<<3,s->apu_base[chan]);
3769 for(reg = 1 ; reg < NR_APU_REGS ; reg++)
3770 apu_set_register(s,chan,reg,s->card->apu_map[s->apu[chan]][reg]);
3772 for(chan = 0 ; chan < 6 ; chan++)
3773 apu_set_register(s,chan,0,s->card->apu_map[s->apu[chan]][0] & 0xFF0F);
3776 /* now we flip on the music */
3778 if( card->dsps_open <= 0) {
3779 /* this card's idle */
3780 maestro_power(card,ACPI_D2);
3782 /* ok, we're actually playing things on
3784 maestro_power(card,ACPI_D0);
3785 start_bob(&card->channels[0]);
3786 for(i=0;i<NR_DSPS;i++) {
3787 struct ess_state *s = &card->channels[i];
3789 /* these use the apu_mode, and can handle
3796 spin_unlock_irqrestore(&card->lock,flags);
3798 /* all right, we think things are ready,
3799 wake up people who were using the device
3800 when we suspended */
3801 wake_up(&(card->suspend_queue));
3807 maestro_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
3809 struct ess_card *card = (struct ess_card*) dev->data;
3811 if ( ! card ) goto out;
3813 M_printk("maestro: pm event 0x%x received for card %p\n", rqst, card);
3817 maestro_suspend(card);
3820 maestro_resume(card);
3823 * we'd also like to find out about
3824 * power level changes because some biosen
3825 * do mean things to the maestro when they
3826 * change their power state.
3833 module_init(init_maestro);
3834 module_exit(cleanup_maestro);