ftp://ftp.kernel.org/pub/linux/kernel/v2.6/linux-2.6.6.tar.bz2
[linux-2.6.git] / sound / oss / msnd_pinnacle.c
1 /*********************************************************************
2  *
3  * Turtle Beach MultiSound Sound Card Driver for Linux
4  * Linux 2.0/2.2 Version
5  *
6  * msnd_pinnacle.c / msnd_classic.c
7  *
8  * -- If MSND_CLASSIC is defined:
9  *
10  *     -> driver for Turtle Beach Classic/Monterey/Tahiti
11  *
12  * -- Else
13  *
14  *     -> driver for Turtle Beach Pinnacle/Fiji
15  *
16  * Copyright (C) 1998 Andrew Veliath
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License as published by
20  * the Free Software Foundation; either version 2 of the License, or
21  * (at your option) any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; if not, write to the Free Software
30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31  *
32  * $Id: msnd_pinnacle.c,v 1.8 2000/12/30 00:33:21 sycamore Exp $
33  *
34  * 12-3-2000  Modified IO port validation  Steve Sycamore
35  *
36  *
37  * $$$: msnd_pinnacle.c,v 1.75 1999/03/21 16:50:09 andrewtv $$$ $
38  *
39  ********************************************************************/
40
41 #include <linux/kernel.h>
42 #include <linux/config.h>
43 #include <linux/module.h>
44 #include <linux/slab.h>
45 #include <linux/types.h>
46 #include <linux/delay.h>
47 #include <linux/init.h>
48 #include <linux/interrupt.h>
49 #include <linux/smp_lock.h>
50 #include <asm/irq.h>
51 #include <asm/io.h>
52 #include "sound_config.h"
53 #include "sound_firmware.h"
54 #ifdef MSND_CLASSIC
55 # ifndef __alpha__
56 #  define SLOWIO
57 # endif
58 #endif
59 #include "msnd.h"
60 #ifdef MSND_CLASSIC
61 #  ifdef CONFIG_MSNDCLAS_HAVE_BOOT
62 #    define HAVE_DSPCODEH
63 #  endif
64 #  include "msnd_classic.h"
65 #  define LOGNAME                       "msnd_classic"
66 #else
67 #  ifdef CONFIG_MSNDPIN_HAVE_BOOT
68 #    define HAVE_DSPCODEH
69 #  endif
70 #  include "msnd_pinnacle.h"
71 #  define LOGNAME                       "msnd_pinnacle"
72 #endif
73
74 #ifndef CONFIG_MSND_WRITE_NDELAY
75 #  define CONFIG_MSND_WRITE_NDELAY      1
76 #endif
77
78 #define get_play_delay_jiffies(size)    ((size) * HZ *                  \
79                                          dev.play_sample_size / 8 /     \
80                                          dev.play_sample_rate /         \
81                                          dev.play_channels)
82
83 #define get_rec_delay_jiffies(size)     ((size) * HZ *                  \
84                                          dev.rec_sample_size / 8 /      \
85                                          dev.rec_sample_rate /          \
86                                          dev.rec_channels)
87
88 static multisound_dev_t                 dev;
89
90 #ifndef HAVE_DSPCODEH
91 static char                             *dspini, *permini;
92 static int                              sizeof_dspini, sizeof_permini;
93 #endif
94
95 static int                              dsp_full_reset(void);
96 static void                             dsp_write_flush(void);
97
98 static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd)
99 {
100         if (msnd_send_dsp_cmd(dev, cmd) == 0)
101                 return 0;
102         dsp_full_reset();
103         return msnd_send_dsp_cmd(dev, cmd);
104 }
105
106 static void reset_play_queue(void)
107 {
108         int n;
109         LPDAQD lpDAQ;
110
111         dev.last_playbank = -1;
112         isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead);
113         isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail);
114
115         for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
116                 isa_writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart);
117                 isa_writew(0, lpDAQ + DAQDS_wSize);
118                 isa_writew(1, lpDAQ + DAQDS_wFormat);
119                 isa_writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize);
120                 isa_writew(dev.play_channels, lpDAQ + DAQDS_wChannels);
121                 isa_writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate);
122                 isa_writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
123                 isa_writew(n, lpDAQ + DAQDS_wFlags);
124         }
125 }
126
127 static void reset_record_queue(void)
128 {
129         int n;
130         LPDAQD lpDAQ;
131         unsigned long flags;
132
133         dev.last_recbank = 2;
134         isa_writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead);
135         isa_writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail);
136
137         /* Critical section: bank 1 access */
138         spin_lock_irqsave(&dev.lock, flags);
139         outb(HPBLKSEL_1, dev.io + HP_BLKS);
140         isa_memset_io(dev.base, 0, DAR_BUFF_SIZE * 3);
141         outb(HPBLKSEL_0, dev.io + HP_BLKS);
142         spin_unlock_irqrestore(&dev.lock, flags);
143
144         for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
145                 isa_writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart);
146                 isa_writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize);
147                 isa_writew(1, lpDAQ + DAQDS_wFormat);
148                 isa_writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize);
149                 isa_writew(dev.rec_channels, lpDAQ + DAQDS_wChannels);
150                 isa_writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate);
151                 isa_writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
152                 isa_writew(n, lpDAQ + DAQDS_wFlags);
153         }
154 }
155
156 static void reset_queues(void)
157 {
158         if (dev.mode & FMODE_WRITE) {
159                 msnd_fifo_make_empty(&dev.DAPF);
160                 reset_play_queue();
161         }
162         if (dev.mode & FMODE_READ) {
163                 msnd_fifo_make_empty(&dev.DARF);
164                 reset_record_queue();
165         }
166 }
167
168 static int dsp_set_format(struct file *file, int val)
169 {
170         int data, i;
171         LPDAQD lpDAQ, lpDARQ;
172
173         lpDAQ = dev.base + DAPQ_DATA_BUFF;
174         lpDARQ = dev.base + DARQ_DATA_BUFF;
175
176         switch (val) {
177         case AFMT_U8:
178         case AFMT_S16_LE:
179                 data = val;
180                 break;
181         default:
182                 data = DEFSAMPLESIZE;
183                 break;
184         }
185
186         for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
187                 if (file->f_mode & FMODE_WRITE)
188                         isa_writew(data, lpDAQ + DAQDS_wSampleSize);
189                 if (file->f_mode & FMODE_READ)
190                         isa_writew(data, lpDARQ + DAQDS_wSampleSize);
191         }
192         if (file->f_mode & FMODE_WRITE)
193                 dev.play_sample_size = data;
194         if (file->f_mode & FMODE_READ)
195                 dev.rec_sample_size = data;
196
197         return data;
198 }
199
200 static int dsp_get_frag_size(void)
201 {
202         int size;
203         size = dev.fifosize / 4;
204         if (size > 32 * 1024)
205                 size = 32 * 1024;
206         return size;
207 }
208
209 static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
210 {
211         int val, i, data, tmp;
212         LPDAQD lpDAQ, lpDARQ;
213         audio_buf_info abinfo;
214         unsigned long flags;
215
216         lpDAQ = dev.base + DAPQ_DATA_BUFF;
217         lpDARQ = dev.base + DARQ_DATA_BUFF;
218
219         switch (cmd) {
220         case SNDCTL_DSP_SUBDIVIDE:
221         case SNDCTL_DSP_SETFRAGMENT:
222         case SNDCTL_DSP_SETDUPLEX:
223         case SNDCTL_DSP_POST:
224                 return 0;
225
226         case SNDCTL_DSP_GETIPTR:
227         case SNDCTL_DSP_GETOPTR:
228         case SNDCTL_DSP_MAPINBUF:
229         case SNDCTL_DSP_MAPOUTBUF:
230                 return -EINVAL;
231
232         case SNDCTL_DSP_GETOSPACE:
233                 if (!(file->f_mode & FMODE_WRITE))
234                         return -EINVAL;
235                 spin_lock_irqsave(&dev.lock, flags);
236                 abinfo.fragsize = dsp_get_frag_size();
237                 abinfo.bytes = dev.DAPF.n - dev.DAPF.len;
238                 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize;
239                 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
240                 spin_unlock_irqrestore(&dev.lock, flags);
241                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
242
243         case SNDCTL_DSP_GETISPACE:
244                 if (!(file->f_mode & FMODE_READ))
245                         return -EINVAL;
246                 spin_lock_irqsave(&dev.lock, flags);
247                 abinfo.fragsize = dsp_get_frag_size();
248                 abinfo.bytes = dev.DARF.n - dev.DARF.len;
249                 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize;
250                 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
251                 spin_unlock_irqrestore(&dev.lock, flags);
252                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
253
254         case SNDCTL_DSP_RESET:
255                 dev.nresets = 0;
256                 reset_queues();
257                 return 0;
258
259         case SNDCTL_DSP_SYNC:
260                 dsp_write_flush();
261                 return 0;
262
263         case SNDCTL_DSP_GETBLKSIZE:
264                 tmp = dsp_get_frag_size();
265                 if (put_user(tmp, (int *)arg))
266                         return -EFAULT;
267                 return 0;
268
269         case SNDCTL_DSP_GETFMTS:
270                 val = AFMT_S16_LE | AFMT_U8;
271                 if (put_user(val, (int *)arg))
272                         return -EFAULT;
273                 return 0;
274
275         case SNDCTL_DSP_SETFMT:
276                 if (get_user(val, (int *)arg))
277                         return -EFAULT;
278
279                 if (file->f_mode & FMODE_WRITE)
280                         data = val == AFMT_QUERY
281                                 ? dev.play_sample_size
282                                 : dsp_set_format(file, val);
283                 else
284                         data = val == AFMT_QUERY
285                                 ? dev.rec_sample_size
286                                 : dsp_set_format(file, val);
287
288                 if (put_user(data, (int *)arg))
289                         return -EFAULT;
290                 return 0;
291
292         case SNDCTL_DSP_NONBLOCK:
293                 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) &&
294                     file->f_mode & FMODE_WRITE)
295                         dev.play_ndelay = 1;
296                 if (file->f_mode & FMODE_READ)
297                         dev.rec_ndelay = 1;
298                 return 0;
299
300         case SNDCTL_DSP_GETCAPS:
301                 val = DSP_CAP_DUPLEX | DSP_CAP_BATCH;
302                 if (put_user(val, (int *)arg))
303                         return -EFAULT;
304                 return 0;
305
306         case SNDCTL_DSP_SPEED:
307                 if (get_user(val, (int *)arg))
308                         return -EFAULT;
309
310                 if (val < 8000)
311                         val = 8000;
312
313                 if (val > 48000)
314                         val = 48000;
315
316                 data = val;
317
318                 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
319                         if (file->f_mode & FMODE_WRITE)
320                                 isa_writew(data, lpDAQ + DAQDS_wSampleRate);
321                         if (file->f_mode & FMODE_READ)
322                                 isa_writew(data, lpDARQ + DAQDS_wSampleRate);
323                 }
324                 if (file->f_mode & FMODE_WRITE)
325                         dev.play_sample_rate = data;
326                 if (file->f_mode & FMODE_READ)
327                         dev.rec_sample_rate = data;
328
329                 if (put_user(data, (int *)arg))
330                         return -EFAULT;
331                 return 0;
332
333         case SNDCTL_DSP_CHANNELS:
334         case SNDCTL_DSP_STEREO:
335                 if (get_user(val, (int *)arg))
336                         return -EFAULT;
337
338                 if (cmd == SNDCTL_DSP_CHANNELS) {
339                         switch (val) {
340                         case 1:
341                         case 2:
342                                 data = val;
343                                 break;
344                         default:
345                                 val = data = 2;
346                                 break;
347                         }
348                 } else {
349                         switch (val) {
350                         case 0:
351                                 data = 1;
352                                 break;
353                         default:
354                                 val = 1;
355                         case 1:
356                                 data = 2;
357                                 break;
358                         }
359                 }
360
361                 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
362                         if (file->f_mode & FMODE_WRITE)
363                                 isa_writew(data, lpDAQ + DAQDS_wChannels);
364                         if (file->f_mode & FMODE_READ)
365                                 isa_writew(data, lpDARQ + DAQDS_wChannels);
366                 }
367                 if (file->f_mode & FMODE_WRITE)
368                         dev.play_channels = data;
369                 if (file->f_mode & FMODE_READ)
370                         dev.rec_channels = data;
371
372                 if (put_user(val, (int *)arg))
373                         return -EFAULT;
374                 return 0;
375         }
376
377         return -EINVAL;
378 }
379
380 static int mixer_get(int d)
381 {
382         if (d > 31)
383                 return -EINVAL;
384
385         switch (d) {
386         case SOUND_MIXER_VOLUME:
387         case SOUND_MIXER_PCM:
388         case SOUND_MIXER_LINE:
389         case SOUND_MIXER_IMIX:
390         case SOUND_MIXER_LINE1:
391 #ifndef MSND_CLASSIC
392         case SOUND_MIXER_MIC:
393         case SOUND_MIXER_SYNTH:
394 #endif
395                 return (dev.left_levels[d] >> 8) * 100 / 0xff | 
396                         (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8);
397         default:
398                 return 0;
399         }
400 }
401
402 #define update_volm(a,b)                                                \
403         isa_writew((dev.left_levels[a] >> 1) *                          \
404                isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff,      \
405                dev.SMA + SMA_##b##Left);                                \
406         isa_writew((dev.right_levels[a] >> 1)  *                        \
407                isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff,     \
408                dev.SMA + SMA_##b##Right);
409
410 #define update_potm(d,s,ar)                                             \
411         isa_writeb((dev.left_levels[d] >> 8) *                          \
412                isa_readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff,      \
413                dev.SMA + SMA_##s##Left);                                \
414         isa_writeb((dev.right_levels[d] >> 8) *                         \
415                isa_readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff,     \
416                dev.SMA + SMA_##s##Right);                               \
417         if (msnd_send_word(&dev, 0, 0, ar) == 0)                        \
418                 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
419
420 #define update_pot(d,s,ar)                              \
421         isa_writeb(dev.left_levels[d] >> 8,             \
422                dev.SMA + SMA_##s##Left);                \
423         isa_writeb(dev.right_levels[d] >> 8,            \
424                dev.SMA + SMA_##s##Right);               \
425         if (msnd_send_word(&dev, 0, 0, ar) == 0)        \
426                 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
427
428 static int mixer_set(int d, int value)
429 {
430         int left = value & 0x000000ff;
431         int right = (value & 0x0000ff00) >> 8;
432         int bLeft, bRight;
433         int wLeft, wRight;
434         int updatemaster = 0;
435
436         if (d > 31)
437                 return -EINVAL;
438
439         bLeft = left * 0xff / 100;
440         wLeft = left * 0xffff / 100;
441
442         bRight = right * 0xff / 100;
443         wRight = right * 0xffff / 100;
444
445         dev.left_levels[d] = wLeft;
446         dev.right_levels[d] = wRight;
447
448         switch (d) {
449                 /* master volume unscaled controls */
450         case SOUND_MIXER_LINE:                  /* line pot control */
451                 /* scaled by IMIX in digital mix */
452                 isa_writeb(bLeft, dev.SMA + SMA_bInPotPosLeft);
453                 isa_writeb(bRight, dev.SMA + SMA_bInPotPosRight);
454                 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0)
455                         chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
456                 break;
457 #ifndef MSND_CLASSIC
458         case SOUND_MIXER_MIC:                   /* mic pot control */
459                 /* scaled by IMIX in digital mix */
460                 isa_writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft);
461                 isa_writeb(bRight, dev.SMA + SMA_bMicPotPosRight);
462                 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0)
463                         chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
464                 break;
465 #endif
466         case SOUND_MIXER_VOLUME:                /* master volume */
467                 isa_writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft);
468                 isa_writew(wRight, dev.SMA + SMA_wCurrMastVolRight);
469                 /* fall through */
470
471         case SOUND_MIXER_LINE1:                 /* aux pot control */
472                 /* scaled by master volume */
473                 /* fall through */
474
475                 /* digital controls */
476         case SOUND_MIXER_SYNTH:                 /* synth vol (dsp mix) */
477         case SOUND_MIXER_PCM:                   /* pcm vol (dsp mix) */
478         case SOUND_MIXER_IMIX:                  /* input monitor (dsp mix) */
479                 /* scaled by master volume */
480                 updatemaster = 1;
481                 break;
482
483         default:
484                 return 0;
485         }
486
487         if (updatemaster) {
488                 /* update master volume scaled controls */
489                 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
490                 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
491 #ifndef MSND_CLASSIC
492                 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
493 #endif
494                 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
495         }
496
497         return mixer_get(d);
498 }
499
500 static void mixer_setup(void)
501 {
502         update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS);
503         update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
504         update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
505         update_volm(SOUND_MIXER_IMIX, wCurrInVol);
506 #ifndef MSND_CLASSIC
507         update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS);
508         update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
509 #endif
510 }
511
512 static unsigned long set_recsrc(unsigned long recsrc)
513 {
514         if (dev.recsrc == recsrc)
515                 return dev.recsrc;
516 #ifdef HAVE_NORECSRC
517         else if (recsrc == 0)
518                 dev.recsrc = 0;
519 #endif
520         else
521                 dev.recsrc ^= recsrc;
522
523 #ifndef MSND_CLASSIC
524         if (dev.recsrc & SOUND_MASK_IMIX) {
525                 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
526                         chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
527         }
528         else if (dev.recsrc & SOUND_MASK_SYNTH) {
529                 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0)
530                         chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
531         }
532         else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) {
533                 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0)
534                         chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
535         }
536         else {
537 #ifdef HAVE_NORECSRC
538                 /* Select no input (?) */
539                 dev.recsrc = 0;
540 #else
541                 dev.recsrc = SOUND_MASK_IMIX;
542                 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
543                         chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
544 #endif
545         }
546 #endif /* MSND_CLASSIC */
547
548         return dev.recsrc;
549 }
550
551 static unsigned long force_recsrc(unsigned long recsrc)
552 {
553         dev.recsrc = 0;
554         return set_recsrc(recsrc);
555 }
556
557 #define set_mixer_info()                                                        \
558                 memset(&info, 0, sizeof(info));                                 \
559                 strlcpy(info.id, "MSNDMIXER", sizeof(info.id));                 \
560                 strlcpy(info.name, "MultiSound Mixer", sizeof(info.name));
561
562 static int mixer_ioctl(unsigned int cmd, unsigned long arg)
563 {
564         if (cmd == SOUND_MIXER_INFO) {
565                 mixer_info info;
566                 set_mixer_info();
567                 info.modify_counter = dev.mixer_mod_count;
568                 if (copy_to_user((void *)arg, &info, sizeof(info)))
569                         return -EFAULT;
570                 return 0;
571         } else if (cmd == SOUND_OLD_MIXER_INFO) {
572                 _old_mixer_info info;
573                 set_mixer_info();
574                 if (copy_to_user((void *)arg, &info, sizeof(info)))
575                         return -EFAULT;
576                 return 0;
577         } else if (cmd == SOUND_MIXER_PRIVATE1) {
578                 dev.nresets = 0;
579                 dsp_full_reset();
580                 return 0;
581         } else if (((cmd >> 8) & 0xff) == 'M') {
582                 int val = 0;
583
584                 if (_SIOC_DIR(cmd) & _SIOC_WRITE) {
585                         switch (cmd & 0xff) {
586                         case SOUND_MIXER_RECSRC:
587                                 if (get_user(val, (int *)arg))
588                                         return -EFAULT;
589                                 val = set_recsrc(val);
590                                 break;
591
592                         default:
593                                 if (get_user(val, (int *)arg))
594                                         return -EFAULT;
595                                 val = mixer_set(cmd & 0xff, val);
596                                 break;
597                         }
598                         ++dev.mixer_mod_count;
599                         return put_user(val, (int *)arg);
600                 } else {
601                         switch (cmd & 0xff) {
602                         case SOUND_MIXER_RECSRC:
603                                 val = dev.recsrc;
604                                 break;
605
606                         case SOUND_MIXER_DEVMASK:
607                         case SOUND_MIXER_STEREODEVS:
608                                 val =   SOUND_MASK_PCM |
609                                         SOUND_MASK_LINE |
610                                         SOUND_MASK_IMIX |
611                                         SOUND_MASK_LINE1 |
612 #ifndef MSND_CLASSIC
613                                         SOUND_MASK_MIC |
614                                         SOUND_MASK_SYNTH |
615 #endif
616                                         SOUND_MASK_VOLUME;
617                                 break;
618                                   
619                         case SOUND_MIXER_RECMASK:
620 #ifdef MSND_CLASSIC
621                                 val =   0;
622 #else
623                                 val =   SOUND_MASK_IMIX |
624                                         SOUND_MASK_SYNTH;
625                                 if (test_bit(F_HAVEDIGITAL, &dev.flags))
626                                         val |= SOUND_MASK_DIGITAL1;
627 #endif
628                                 break;
629                                   
630                         case SOUND_MIXER_CAPS:
631                                 val =   SOUND_CAP_EXCL_INPUT;
632                                 break;
633
634                         default:
635                                 if ((val = mixer_get(cmd & 0xff)) < 0)
636                                         return -EINVAL;
637                                 break;
638                         }
639                 }
640
641                 return put_user(val, (int *)arg); 
642         }
643
644         return -EINVAL;
645 }
646
647 static int dev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
648 {
649         int minor = iminor(inode);
650
651         if (cmd == OSS_GETVERSION) {
652                 int sound_version = SOUND_VERSION;
653                 return put_user(sound_version, (int *)arg);
654         }
655
656         if (minor == dev.dsp_minor)
657                 return dsp_ioctl(file, cmd, arg);
658         else if (minor == dev.mixer_minor)
659                 return mixer_ioctl(cmd, arg);
660
661         return -EINVAL;
662 }
663
664 static void dsp_write_flush(void)
665 {
666         if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags))
667                 return;
668         set_bit(F_WRITEFLUSH, &dev.flags);
669         interruptible_sleep_on_timeout(
670                 &dev.writeflush,
671                 get_play_delay_jiffies(dev.DAPF.len));
672         clear_bit(F_WRITEFLUSH, &dev.flags);
673         if (!signal_pending(current)) {
674                 current->state = TASK_INTERRUPTIBLE;
675                 schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE));
676         }
677         clear_bit(F_WRITING, &dev.flags);
678 }
679
680 static void dsp_halt(struct file *file)
681 {
682         if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
683                 clear_bit(F_READING, &dev.flags);
684                 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP);
685                 msnd_disable_irq(&dev);
686                 if (file) {
687                         printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file);
688                         dev.mode &= ~FMODE_READ;
689                 }
690                 clear_bit(F_AUDIO_READ_INUSE, &dev.flags);
691         }
692         if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
693                 if (test_bit(F_WRITING, &dev.flags)) {
694                         dsp_write_flush();
695                         chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP);
696                 }
697                 msnd_disable_irq(&dev);
698                 if (file) {
699                         printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file);
700                         dev.mode &= ~FMODE_WRITE;
701                 }
702                 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
703         }
704 }
705
706 static int dsp_release(struct file *file)
707 {
708         dsp_halt(file);
709         return 0;
710 }
711
712 static int dsp_open(struct file *file)
713 {
714         if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
715                 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
716                 clear_bit(F_WRITING, &dev.flags);
717                 msnd_fifo_make_empty(&dev.DAPF);
718                 reset_play_queue();
719                 if (file) {
720                         printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file);
721                         dev.mode |= FMODE_WRITE;
722                 }
723                 msnd_enable_irq(&dev);
724         }
725         if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
726                 set_bit(F_AUDIO_READ_INUSE, &dev.flags);
727                 clear_bit(F_READING, &dev.flags);
728                 msnd_fifo_make_empty(&dev.DARF);
729                 reset_record_queue();
730                 if (file) {
731                         printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file);
732                         dev.mode |= FMODE_READ;
733                 }
734                 msnd_enable_irq(&dev);
735         }
736         return 0;
737 }
738
739 static void set_default_play_audio_parameters(void)
740 {
741         dev.play_sample_size = DEFSAMPLESIZE;
742         dev.play_sample_rate = DEFSAMPLERATE;
743         dev.play_channels = DEFCHANNELS;
744 }
745
746 static void set_default_rec_audio_parameters(void)
747 {
748         dev.rec_sample_size = DEFSAMPLESIZE;
749         dev.rec_sample_rate = DEFSAMPLERATE;
750         dev.rec_channels = DEFCHANNELS;
751 }
752
753 static void set_default_audio_parameters(void)
754 {
755         set_default_play_audio_parameters();
756         set_default_rec_audio_parameters();
757 }
758
759 static int dev_open(struct inode *inode, struct file *file)
760 {
761         int minor = iminor(inode);
762         int err = 0;
763
764         if (minor == dev.dsp_minor) {
765                 if ((file->f_mode & FMODE_WRITE &&
766                      test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) ||
767                     (file->f_mode & FMODE_READ &&
768                      test_bit(F_AUDIO_READ_INUSE, &dev.flags)))
769                         return -EBUSY;
770
771                 if ((err = dsp_open(file)) >= 0) {
772                         dev.nresets = 0;
773                         if (file->f_mode & FMODE_WRITE) {
774                                 set_default_play_audio_parameters();
775                                 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags))
776                                         dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
777                                 else
778                                         dev.play_ndelay = 0;
779                         }
780                         if (file->f_mode & FMODE_READ) {
781                                 set_default_rec_audio_parameters();
782                                 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
783                         }
784                 }
785         }
786         else if (minor == dev.mixer_minor) {
787                 /* nothing */
788         } else
789                 err = -EINVAL;
790
791         return err;
792 }
793
794 static int dev_release(struct inode *inode, struct file *file)
795 {
796         int minor = iminor(inode);
797         int err = 0;
798
799         lock_kernel();
800         if (minor == dev.dsp_minor)
801                 err = dsp_release(file);
802         else if (minor == dev.mixer_minor) {
803                 /* nothing */
804         } else
805                 err = -EINVAL;
806         unlock_kernel();
807         return err;
808 }
809
810 static __inline__ int pack_DARQ_to_DARF(register int bank)
811 {
812         register int size, n, timeout = 3;
813         register WORD wTmp;
814         LPDAQD DAQD;
815
816         /* Increment the tail and check for queue wrap */
817         wTmp = isa_readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size);
818         if (wTmp > isa_readw(dev.DARQ + JQS_wSize))
819                 wTmp = 0;
820         while (wTmp == isa_readw(dev.DARQ + JQS_wHead) && timeout--)
821                 udelay(1);
822         isa_writew(wTmp, dev.DARQ + JQS_wTail);
823
824         /* Get our digital audio queue struct */
825         DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF;
826
827         /* Get length of data */
828         size = isa_readw(DAQD + DAQDS_wSize);
829
830         /* Read data from the head (unprotected bank 1 access okay
831            since this is only called inside an interrupt) */
832         outb(HPBLKSEL_1, dev.io + HP_BLKS);
833         if ((n = msnd_fifo_write(
834                 &dev.DARF,
835                 (char *)(dev.base + bank * DAR_BUFF_SIZE),
836                 size, 0)) <= 0) {
837                 outb(HPBLKSEL_0, dev.io + HP_BLKS);
838                 return n;
839         }
840         outb(HPBLKSEL_0, dev.io + HP_BLKS);
841
842         return 1;
843 }
844
845 static __inline__ int pack_DAPF_to_DAPQ(register int start)
846 {
847         register WORD DAPQ_tail;
848         register int protect = start, nbanks = 0;
849         LPDAQD DAQD;
850
851         DAPQ_tail = isa_readw(dev.DAPQ + JQS_wTail);
852         while (DAPQ_tail != isa_readw(dev.DAPQ + JQS_wHead) || start) {
853                 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size);
854                 register int n;
855                 unsigned long flags;
856
857                 /* Write the data to the new tail */
858                 if (protect) {
859                         /* Critical section: protect fifo in non-interrupt */
860                         spin_lock_irqsave(&dev.lock, flags);
861                         if ((n = msnd_fifo_read(
862                                 &dev.DAPF,
863                                 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
864                                 DAP_BUFF_SIZE, 0)) < 0) {
865                                 spin_unlock_irqrestore(&dev.lock, flags);
866                                 return n;
867                         }
868                         spin_unlock_irqrestore(&dev.lock, flags);
869                 } else {
870                         if ((n = msnd_fifo_read(
871                                 &dev.DAPF,
872                                 (char *)(dev.base + bank_num * DAP_BUFF_SIZE),
873                                 DAP_BUFF_SIZE, 0)) < 0) {
874                                 return n;
875                         }
876                 }
877                 if (!n)
878                         break;
879
880                 if (start)
881                         start = 0;
882
883                 /* Get our digital audio queue struct */
884                 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF;
885
886                 /* Write size of this bank */
887                 isa_writew(n, DAQD + DAQDS_wSize);
888                 ++nbanks;
889
890                 /* Then advance the tail */
891                 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size);
892                 isa_writew(DAPQ_tail, dev.DAPQ + JQS_wTail);
893                 /* Tell the DSP to play the bank */
894                 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START);
895         }
896         return nbanks;
897 }
898
899 static int dsp_read(char *buf, size_t len)
900 {
901         int count = len;
902
903         while (count > 0) {
904                 int n;
905                 unsigned long flags;
906
907                 /* Critical section: protect fifo in non-interrupt */
908                 spin_lock_irqsave(&dev.lock, flags);
909                 if ((n = msnd_fifo_read(&dev.DARF, buf, count, 1)) < 0) {
910                         printk(KERN_WARNING LOGNAME ": FIFO read error\n");
911                         spin_unlock_irqrestore(&dev.lock, flags);
912                         return n;
913                 }
914                 spin_unlock_irqrestore(&dev.lock, flags);
915                 buf += n;
916                 count -= n;
917
918                 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) {
919                         dev.last_recbank = -1;
920                         if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0)
921                                 set_bit(F_READING, &dev.flags);
922                 }
923
924                 if (dev.rec_ndelay)
925                         return count == len ? -EAGAIN : len - count;
926
927                 if (count > 0) {
928                         set_bit(F_READBLOCK, &dev.flags);
929                         if (!interruptible_sleep_on_timeout(
930                                 &dev.readblock,
931                                 get_rec_delay_jiffies(DAR_BUFF_SIZE)))
932                                 clear_bit(F_READING, &dev.flags);
933                         clear_bit(F_READBLOCK, &dev.flags);
934                         if (signal_pending(current))
935                                 return -EINTR;
936                 }
937         }
938
939         return len - count;
940 }
941
942 static int dsp_write(const char *buf, size_t len)
943 {
944         int count = len;
945
946         while (count > 0) {
947                 int n;
948                 unsigned long flags;
949
950                 /* Critical section: protect fifo in non-interrupt */
951                 spin_lock_irqsave(&dev.lock, flags);
952                 if ((n = msnd_fifo_write(&dev.DAPF, buf, count, 1)) < 0) {
953                         printk(KERN_WARNING LOGNAME ": FIFO write error\n");
954                         spin_unlock_irqrestore(&dev.lock, flags);
955                         return n;
956                 }
957                 spin_unlock_irqrestore(&dev.lock, flags);
958                 buf += n;
959                 count -= n;
960
961                 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) {
962                         dev.last_playbank = -1;
963                         if (pack_DAPF_to_DAPQ(1) > 0)
964                                 set_bit(F_WRITING, &dev.flags);
965                 }
966
967                 if (dev.play_ndelay)
968                         return count == len ? -EAGAIN : len - count;
969
970                 if (count > 0) {
971                         set_bit(F_WRITEBLOCK, &dev.flags);
972                         interruptible_sleep_on_timeout(
973                                 &dev.writeblock,
974                                 get_play_delay_jiffies(DAP_BUFF_SIZE));
975                         clear_bit(F_WRITEBLOCK, &dev.flags);
976                         if (signal_pending(current))
977                                 return -EINTR;
978                 }
979         }
980
981         return len - count;
982 }
983
984 static ssize_t dev_read(struct file *file, char *buf, size_t count, loff_t *off)
985 {
986         int minor = iminor(file->f_dentry->d_inode);
987         if (minor == dev.dsp_minor)
988                 return dsp_read(buf, count);
989         else
990                 return -EINVAL;
991 }
992
993 static ssize_t dev_write(struct file *file, const char *buf, size_t count, loff_t *off)
994 {
995         int minor = iminor(file->f_dentry->d_inode);
996         if (minor == dev.dsp_minor)
997                 return dsp_write(buf, count);
998         else
999                 return -EINVAL;
1000 }
1001
1002 static __inline__ void eval_dsp_msg(register WORD wMessage)
1003 {
1004         switch (HIBYTE(wMessage)) {
1005         case HIMT_PLAY_DONE:
1006                 if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags))
1007                         break;
1008                 dev.last_playbank = LOBYTE(wMessage);
1009
1010                 if (pack_DAPF_to_DAPQ(0) <= 0) {
1011                         if (!test_bit(F_WRITEBLOCK, &dev.flags)) {
1012                                 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags))
1013                                         wake_up_interruptible(&dev.writeflush);
1014                         }
1015                         clear_bit(F_WRITING, &dev.flags);
1016                 }
1017
1018                 if (test_bit(F_WRITEBLOCK, &dev.flags))
1019                         wake_up_interruptible(&dev.writeblock);
1020                 break;
1021
1022         case HIMT_RECORD_DONE:
1023                 if (dev.last_recbank == LOBYTE(wMessage))
1024                         break;
1025                 dev.last_recbank = LOBYTE(wMessage);
1026
1027                 pack_DARQ_to_DARF(dev.last_recbank);
1028
1029                 if (test_bit(F_READBLOCK, &dev.flags))
1030                         wake_up_interruptible(&dev.readblock);
1031                 break;
1032
1033         case HIMT_DSP:
1034                 switch (LOBYTE(wMessage)) {
1035 #ifndef MSND_CLASSIC
1036                 case HIDSP_PLAY_UNDER:
1037 #endif
1038                 case HIDSP_INT_PLAY_UNDER:
1039 /*                      printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */
1040                         clear_bit(F_WRITING, &dev.flags);
1041                         break;
1042
1043                 case HIDSP_INT_RECORD_OVER:
1044 /*                      printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */
1045                         clear_bit(F_READING, &dev.flags);
1046                         break;
1047
1048                 default:
1049 /*                      printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n",
1050                         LOBYTE(wMessage), LOBYTE(wMessage)); */
1051                         break;
1052                 }
1053                 break;
1054
1055         case HIMT_MIDI_IN_UCHAR:
1056                 if (dev.midi_in_interrupt)
1057                         (*dev.midi_in_interrupt)(&dev);
1058                 break;
1059
1060         default:
1061 /*              printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */
1062                 break;
1063         }
1064 }
1065
1066 static irqreturn_t intr(int irq, void *dev_id, struct pt_regs *regs)
1067 {
1068         /* Send ack to DSP */
1069         inb(dev.io + HP_RXL);
1070
1071         /* Evaluate queued DSP messages */
1072         while (isa_readw(dev.DSPQ + JQS_wTail) != isa_readw(dev.DSPQ + JQS_wHead)) {
1073                 register WORD wTmp;
1074
1075                 eval_dsp_msg(isa_readw(dev.pwDSPQData + 2*isa_readw(dev.DSPQ + JQS_wHead)));
1076
1077                 if ((wTmp = isa_readw(dev.DSPQ + JQS_wHead) + 1) > isa_readw(dev.DSPQ + JQS_wSize))
1078                         isa_writew(0, dev.DSPQ + JQS_wHead);
1079                 else
1080                         isa_writew(wTmp, dev.DSPQ + JQS_wHead);
1081         }
1082         return IRQ_HANDLED;
1083 }
1084
1085 static struct file_operations dev_fileops = {
1086         .owner          = THIS_MODULE,
1087         .read           = dev_read,
1088         .write          = dev_write,
1089         .ioctl          = dev_ioctl,
1090         .open           = dev_open,
1091         .release        = dev_release,
1092 };
1093
1094 static int reset_dsp(void)
1095 {
1096         int timeout = 100;
1097
1098         outb(HPDSPRESET_ON, dev.io + HP_DSPR);
1099         mdelay(1);
1100 #ifndef MSND_CLASSIC
1101         dev.info = inb(dev.io + HP_INFO);
1102 #endif
1103         outb(HPDSPRESET_OFF, dev.io + HP_DSPR);
1104         mdelay(1);
1105         while (timeout-- > 0) {
1106                 if (inb(dev.io + HP_CVR) == HP_CVR_DEF)
1107                         return 0;
1108                 mdelay(1);
1109         }
1110         printk(KERN_ERR LOGNAME ": Cannot reset DSP\n");
1111
1112         return -EIO;
1113 }
1114
1115 static int __init probe_multisound(void)
1116 {
1117 #ifndef MSND_CLASSIC
1118         char *xv, *rev = NULL;
1119         char *pin = "Pinnacle", *fiji = "Fiji";
1120         char *pinfiji = "Pinnacle/Fiji";
1121 #endif
1122
1123         if (check_region(dev.io, dev.numio)) {
1124                 printk(KERN_ERR LOGNAME ": I/O port conflict\n");
1125                 return -ENODEV;
1126         }
1127         request_region(dev.io, dev.numio, "probing");
1128
1129         if (reset_dsp() < 0) {
1130                 release_region(dev.io, dev.numio);
1131                 return -ENODEV;
1132         }
1133
1134 #ifdef MSND_CLASSIC
1135         dev.name = "Classic/Tahiti/Monterey";
1136         printk(KERN_INFO LOGNAME ": %s, "
1137 #else
1138         switch (dev.info >> 4) {
1139         case 0xf: xv = "<= 1.15"; break;
1140         case 0x1: xv = "1.18/1.2"; break;
1141         case 0x2: xv = "1.3"; break;
1142         case 0x3: xv = "1.4"; break;
1143         default: xv = "unknown"; break;
1144         }
1145
1146         switch (dev.info & 0x7) {
1147         case 0x0: rev = "I"; dev.name = pin; break;
1148         case 0x1: rev = "F"; dev.name = pin; break;
1149         case 0x2: rev = "G"; dev.name = pin; break;
1150         case 0x3: rev = "H"; dev.name = pin; break;
1151         case 0x4: rev = "E"; dev.name = fiji; break;
1152         case 0x5: rev = "C"; dev.name = fiji; break;
1153         case 0x6: rev = "D"; dev.name = fiji; break;
1154         case 0x7:
1155                 rev = "A-B (Fiji) or A-E (Pinnacle)";
1156                 dev.name = pinfiji;
1157                 break;
1158         }
1159         printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, "
1160 #endif /* MSND_CLASSIC */
1161                "I/O 0x%x-0x%x, IRQ %d, memory mapped to 0x%lX-0x%lX\n",
1162                dev.name,
1163 #ifndef MSND_CLASSIC
1164                rev, xv,
1165 #endif
1166                dev.io, dev.io + dev.numio - 1,
1167                dev.irq,
1168                dev.base, dev.base + 0x7fff);
1169
1170         release_region(dev.io, dev.numio);
1171         return 0;
1172 }
1173
1174 static int init_sma(void)
1175 {
1176         static int initted;
1177         WORD mastVolLeft, mastVolRight;
1178         unsigned long flags;
1179
1180 #ifdef MSND_CLASSIC
1181         outb(dev.memid, dev.io + HP_MEMM);
1182 #endif
1183         outb(HPBLKSEL_0, dev.io + HP_BLKS);
1184         if (initted) {
1185                 mastVolLeft = isa_readw(dev.SMA + SMA_wCurrMastVolLeft);
1186                 mastVolRight = isa_readw(dev.SMA + SMA_wCurrMastVolRight);
1187         } else
1188                 mastVolLeft = mastVolRight = 0;
1189         isa_memset_io(dev.base, 0, 0x8000);
1190
1191         /* Critical section: bank 1 access */
1192         spin_lock_irqsave(&dev.lock, flags);
1193         outb(HPBLKSEL_1, dev.io + HP_BLKS);
1194         isa_memset_io(dev.base, 0, 0x8000);
1195         outb(HPBLKSEL_0, dev.io + HP_BLKS);
1196         spin_unlock_irqrestore(&dev.lock, flags);
1197
1198         dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF);
1199         dev.pwMODQData = (dev.base + MODQ_DATA_BUFF);
1200         dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF);
1201
1202         /* Motorola 56k shared memory base */
1203         dev.SMA = dev.base + SMA_STRUCT_START;
1204
1205         /* Digital audio play queue */
1206         dev.DAPQ = dev.base + DAPQ_OFFSET;
1207         msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE);
1208
1209         /* Digital audio record queue */
1210         dev.DARQ = dev.base + DARQ_OFFSET;
1211         msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE);
1212
1213         /* MIDI out queue */
1214         dev.MODQ = dev.base + MODQ_OFFSET;
1215         msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE);
1216
1217         /* MIDI in queue */
1218         dev.MIDQ = dev.base + MIDQ_OFFSET;
1219         msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE);
1220
1221         /* DSP -> host message queue */
1222         dev.DSPQ = dev.base + DSPQ_OFFSET;
1223         msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE);
1224
1225         /* Setup some DSP values */
1226 #ifndef MSND_CLASSIC
1227         isa_writew(1, dev.SMA + SMA_wCurrPlayFormat);
1228         isa_writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize);
1229         isa_writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels);
1230         isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate);
1231 #endif
1232         isa_writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD);
1233         isa_writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft);
1234         isa_writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight);
1235 #ifndef MSND_CLASSIC
1236         isa_writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
1237         isa_writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
1238 #endif
1239         isa_writew(0x303, dev.SMA + SMA_wCurrInputTagBits);
1240
1241         initted = 1;
1242
1243         return 0;
1244 }
1245
1246 static int __init calibrate_adc(WORD srate)
1247 {
1248         isa_writew(srate, dev.SMA + SMA_wCalFreqAtoD);
1249         if (dev.calibrate_signal == 0)
1250                 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1251                        | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1252         else
1253                 isa_writew(isa_readw(dev.SMA + SMA_wCurrHostStatusFlags)
1254                        & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1255         if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 &&
1256             chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) {
1257                 current->state = TASK_INTERRUPTIBLE;
1258                 schedule_timeout(HZ / 3);
1259                 return 0;
1260         }
1261         printk(KERN_WARNING LOGNAME ": ADC calibration failed\n");
1262
1263         return -EIO;
1264 }
1265
1266 static int upload_dsp_code(void)
1267 {
1268         outb(HPBLKSEL_0, dev.io + HP_BLKS);
1269 #ifndef HAVE_DSPCODEH
1270         INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE);
1271         if (!INITCODE) {
1272                 printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE);
1273                 return -EBUSY;
1274         }
1275
1276         PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE);
1277         if (!PERMCODE) {
1278                 printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE);
1279                 vfree(INITCODE);
1280                 return -EBUSY;
1281         }
1282 #endif
1283         isa_memcpy_toio(dev.base, PERMCODE, PERMCODESIZE);
1284         if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) {
1285                 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n");
1286                 return -ENODEV;
1287         }
1288 #ifdef HAVE_DSPCODEH
1289         printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n");
1290 #else
1291         printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n");
1292 #endif
1293
1294 #ifndef HAVE_DSPCODEH
1295         vfree(INITCODE);
1296         vfree(PERMCODE);
1297 #endif
1298
1299         return 0;
1300 }
1301
1302 #ifdef MSND_CLASSIC
1303 static void reset_proteus(void)
1304 {
1305         outb(HPPRORESET_ON, dev.io + HP_PROR);
1306         mdelay(TIME_PRO_RESET);
1307         outb(HPPRORESET_OFF, dev.io + HP_PROR);
1308         mdelay(TIME_PRO_RESET_DONE);
1309 }
1310 #endif
1311
1312 static int initialize(void)
1313 {
1314         int err, timeout;
1315
1316 #ifdef MSND_CLASSIC
1317         outb(HPWAITSTATE_0, dev.io + HP_WAIT);
1318         outb(HPBITMODE_16, dev.io + HP_BITM);
1319
1320         reset_proteus();
1321 #endif
1322         if ((err = init_sma()) < 0) {
1323                 printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n");
1324                 return err;
1325         }
1326
1327         if ((err = reset_dsp()) < 0)
1328                 return err;
1329
1330         if ((err = upload_dsp_code()) < 0) {
1331                 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n");
1332                 return err;
1333         }
1334
1335         timeout = 200;
1336         while (isa_readw(dev.base)) {
1337                 mdelay(1);
1338                 if (!timeout--) {
1339                         printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n");
1340                         return -EIO;
1341                 }
1342         }
1343
1344         mixer_setup();
1345
1346         return 0;
1347 }
1348
1349 static int dsp_full_reset(void)
1350 {
1351         int rv;
1352
1353         if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10)
1354                 return 0;
1355
1356         set_bit(F_RESETTING, &dev.flags);
1357         printk(KERN_INFO LOGNAME ": DSP reset\n");
1358         dsp_halt(NULL);                 /* Unconditionally halt */
1359         if ((rv = initialize()))
1360                 printk(KERN_WARNING LOGNAME ": DSP reset failed\n");
1361         force_recsrc(dev.recsrc);
1362         dsp_open(NULL);
1363         clear_bit(F_RESETTING, &dev.flags);
1364
1365         return rv;
1366 }
1367
1368 static int __init attach_multisound(void)
1369 {
1370         int err;
1371
1372         if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) {
1373                 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq);
1374                 return err;
1375         }
1376         request_region(dev.io, dev.numio, dev.name);
1377
1378         if ((err = dsp_full_reset()) < 0) {
1379                 release_region(dev.io, dev.numio);
1380                 free_irq(dev.irq, &dev);
1381                 return err;
1382         }
1383
1384         if ((err = msnd_register(&dev)) < 0) {
1385                 printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n");
1386                 release_region(dev.io, dev.numio);
1387                 free_irq(dev.irq, &dev);
1388                 return err;
1389         }
1390
1391         if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) {
1392                 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n");
1393                 msnd_unregister(&dev);
1394                 release_region(dev.io, dev.numio);
1395                 free_irq(dev.irq, &dev);
1396                 return dev.dsp_minor;
1397         }
1398
1399         if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) {
1400                 printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n");
1401                 unregister_sound_mixer(dev.mixer_minor);
1402                 msnd_unregister(&dev);
1403                 release_region(dev.io, dev.numio);
1404                 free_irq(dev.irq, &dev);
1405                 return dev.mixer_minor;
1406         }
1407
1408         dev.ext_midi_dev = dev.hdr_midi_dev = -1;
1409
1410         disable_irq(dev.irq);
1411         calibrate_adc(dev.play_sample_rate);
1412 #ifndef MSND_CLASSIC
1413         force_recsrc(SOUND_MASK_IMIX);
1414 #endif
1415
1416         return 0;
1417 }
1418
1419 static void __exit unload_multisound(void)
1420 {
1421         release_region(dev.io, dev.numio);
1422         free_irq(dev.irq, &dev);
1423         unregister_sound_mixer(dev.mixer_minor);
1424         unregister_sound_dsp(dev.dsp_minor);
1425         msnd_unregister(&dev);
1426 }
1427
1428 #ifndef MSND_CLASSIC
1429
1430 /* Pinnacle/Fiji Logical Device Configuration */
1431
1432 static int __init msnd_write_cfg(int cfg, int reg, int value)
1433 {
1434         outb(reg, cfg);
1435         outb(value, cfg + 1);
1436         if (value != inb(cfg + 1)) {
1437                 printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n");
1438                 return -EIO;
1439         }
1440         return 0;
1441 }
1442
1443 static int __init msnd_write_cfg_io0(int cfg, int num, WORD io)
1444 {
1445         if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1446                 return -EIO;
1447         if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io)))
1448                 return -EIO;
1449         if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io)))
1450                 return -EIO;
1451         return 0;
1452 }
1453
1454 static int __init msnd_write_cfg_io1(int cfg, int num, WORD io)
1455 {
1456         if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1457                 return -EIO;
1458         if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io)))
1459                 return -EIO;
1460         if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io)))
1461                 return -EIO;
1462         return 0;
1463 }
1464
1465 static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq)
1466 {
1467         if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1468                 return -EIO;
1469         if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq)))
1470                 return -EIO;
1471         if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE))
1472                 return -EIO;
1473         return 0;
1474 }
1475
1476 static int __init msnd_write_cfg_mem(int cfg, int num, int mem)
1477 {
1478         WORD wmem;
1479
1480         mem >>= 8;
1481         mem &= 0xfff;
1482         wmem = (WORD)mem;
1483         if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1484                 return -EIO;
1485         if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem)))
1486                 return -EIO;
1487         if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem)))
1488                 return -EIO;
1489         if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT)))
1490                 return -EIO;
1491         return 0;
1492 }
1493
1494 static int __init msnd_activate_logical(int cfg, int num)
1495 {
1496         if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1497                 return -EIO;
1498         if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE))
1499                 return -EIO;
1500         return 0;
1501 }
1502
1503 static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem)
1504 {
1505         if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1506                 return -EIO;
1507         if (msnd_write_cfg_io0(cfg, num, io0))
1508                 return -EIO;
1509         if (msnd_write_cfg_io1(cfg, num, io1))
1510                 return -EIO;
1511         if (msnd_write_cfg_irq(cfg, num, irq))
1512                 return -EIO;
1513         if (msnd_write_cfg_mem(cfg, num, mem))
1514                 return -EIO;
1515         if (msnd_activate_logical(cfg, num))
1516                 return -EIO;
1517         return 0;
1518 }
1519
1520 typedef struct msnd_pinnacle_cfg_device {
1521         WORD io0, io1, irq;
1522         int mem;
1523 } msnd_pinnacle_cfg_t[4];
1524
1525 static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device)
1526 {
1527         int i;
1528
1529         /* Reset devices if told to */
1530         if (reset) {
1531                 printk(KERN_INFO LOGNAME ": Resetting all devices\n");
1532                 for (i = 0; i < 4; ++i)
1533                         if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0))
1534                                 return -EIO;
1535         }
1536
1537         /* Configure specified devices */
1538         for (i = 0; i < 4; ++i) {
1539
1540                 switch (i) {
1541                 case 0:         /* DSP */
1542                         if (!(device[i].io0 && device[i].irq && device[i].mem))
1543                                 continue;
1544                         break;
1545                 case 1:         /* MPU */
1546                         if (!(device[i].io0 && device[i].irq))
1547                                 continue;
1548                         printk(KERN_INFO LOGNAME
1549                                ": Configuring MPU to I/O 0x%x IRQ %d\n",
1550                                device[i].io0, device[i].irq);
1551                         break;
1552                 case 2:         /* IDE */
1553                         if (!(device[i].io0 && device[i].io1 && device[i].irq))
1554                                 continue;
1555                         printk(KERN_INFO LOGNAME
1556                                ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n",
1557                                device[i].io0, device[i].io1, device[i].irq);
1558                         break;
1559                 case 3:         /* Joystick */
1560                         if (!(device[i].io0))
1561                                 continue;
1562                         printk(KERN_INFO LOGNAME
1563                                ": Configuring joystick to I/O 0x%x\n",
1564                                device[i].io0);
1565                         break;
1566                 }
1567
1568                 /* Configure the device */
1569                 if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem))
1570                         return -EIO;
1571         }
1572
1573         return 0;
1574 }
1575 #endif
1576
1577 #ifdef MODULE
1578 MODULE_AUTHOR                           ("Andrew Veliath <andrewtv@usa.net>");
1579 MODULE_DESCRIPTION                      ("Turtle Beach " LONGNAME " Linux Driver");
1580 MODULE_LICENSE("GPL");
1581
1582 MODULE_PARM                             (io, "i");
1583 MODULE_PARM                             (irq, "i");
1584 MODULE_PARM                             (mem, "i");
1585 MODULE_PARM                             (write_ndelay, "i");
1586 MODULE_PARM                             (fifosize, "i");
1587 MODULE_PARM                             (calibrate_signal, "i");
1588 #ifndef MSND_CLASSIC
1589 MODULE_PARM                             (digital, "i");
1590 MODULE_PARM                             (cfg, "i");
1591 MODULE_PARM                             (reset, "i");
1592 MODULE_PARM                             (mpu_io, "i");
1593 MODULE_PARM                             (mpu_irq, "i");
1594 MODULE_PARM                             (ide_io0, "i");
1595 MODULE_PARM                             (ide_io1, "i");
1596 MODULE_PARM                             (ide_irq, "i");
1597 MODULE_PARM                             (joystick_io, "i");
1598 #endif
1599
1600 static int io __initdata =              -1;
1601 static int irq __initdata =             -1;
1602 static int mem __initdata =             -1;
1603 static int write_ndelay __initdata =    -1;
1604
1605 #ifndef MSND_CLASSIC
1606 /* Pinnacle/Fiji non-PnP Config Port */
1607 static int cfg __initdata =             -1;
1608
1609 /* Extra Peripheral Configuration */
1610 static int reset __initdata = 0;
1611 static int mpu_io __initdata = 0;
1612 static int mpu_irq __initdata = 0;
1613 static int ide_io0 __initdata = 0;
1614 static int ide_io1 __initdata = 0;
1615 static int ide_irq __initdata = 0;
1616 static int joystick_io __initdata = 0;
1617
1618 /* If we have the digital daugherboard... */
1619 static int digital __initdata = 0;
1620 #endif
1621
1622 static int fifosize __initdata =        DEFFIFOSIZE;
1623 static int calibrate_signal __initdata = 0;
1624
1625 #else /* not a module */
1626
1627 static int write_ndelay __initdata =    -1;
1628
1629 #ifdef MSND_CLASSIC
1630 static int io __initdata =              CONFIG_MSNDCLAS_IO;
1631 static int irq __initdata =             CONFIG_MSNDCLAS_IRQ;
1632 static int mem __initdata =             CONFIG_MSNDCLAS_MEM;
1633 #else /* Pinnacle/Fiji */
1634
1635 static int io __initdata =              CONFIG_MSNDPIN_IO;
1636 static int irq __initdata =             CONFIG_MSNDPIN_IRQ;
1637 static int mem __initdata =             CONFIG_MSNDPIN_MEM;
1638
1639 /* Pinnacle/Fiji non-PnP Config Port */
1640 #ifdef CONFIG_MSNDPIN_NONPNP
1641 #  ifndef CONFIG_MSNDPIN_CFG
1642 #    define CONFIG_MSNDPIN_CFG          0x250
1643 #  endif
1644 #else
1645 #  ifdef CONFIG_MSNDPIN_CFG
1646 #    undef CONFIG_MSNDPIN_CFG
1647 #  endif
1648 #  define CONFIG_MSNDPIN_CFG            -1
1649 #endif
1650 static int cfg __initdata =             CONFIG_MSNDPIN_CFG;
1651 /* If not a module, we don't need to bother with reset=1 */
1652 static int reset;
1653
1654 /* Extra Peripheral Configuration (Default: Disable) */
1655 #ifndef CONFIG_MSNDPIN_MPU_IO
1656 #  define CONFIG_MSNDPIN_MPU_IO         0
1657 #endif
1658 static int mpu_io __initdata =          CONFIG_MSNDPIN_MPU_IO;
1659
1660 #ifndef CONFIG_MSNDPIN_MPU_IRQ
1661 #  define CONFIG_MSNDPIN_MPU_IRQ        0
1662 #endif
1663 static int mpu_irq __initdata =         CONFIG_MSNDPIN_MPU_IRQ;
1664
1665 #ifndef CONFIG_MSNDPIN_IDE_IO0
1666 #  define CONFIG_MSNDPIN_IDE_IO0        0
1667 #endif
1668 static int ide_io0 __initdata =         CONFIG_MSNDPIN_IDE_IO0;
1669
1670 #ifndef CONFIG_MSNDPIN_IDE_IO1
1671 #  define CONFIG_MSNDPIN_IDE_IO1        0
1672 #endif
1673 static int ide_io1 __initdata =         CONFIG_MSNDPIN_IDE_IO1;
1674
1675 #ifndef CONFIG_MSNDPIN_IDE_IRQ
1676 #  define CONFIG_MSNDPIN_IDE_IRQ        0
1677 #endif
1678 static int ide_irq __initdata =         CONFIG_MSNDPIN_IDE_IRQ;
1679
1680 #ifndef CONFIG_MSNDPIN_JOYSTICK_IO
1681 #  define CONFIG_MSNDPIN_JOYSTICK_IO    0
1682 #endif
1683 static int joystick_io __initdata =     CONFIG_MSNDPIN_JOYSTICK_IO;
1684
1685 /* Have SPDIF (Digital) Daughterboard */
1686 #ifndef CONFIG_MSNDPIN_DIGITAL
1687 #  define CONFIG_MSNDPIN_DIGITAL        0
1688 #endif
1689 static int digital __initdata =         CONFIG_MSNDPIN_DIGITAL;
1690
1691 #endif /* MSND_CLASSIC */
1692
1693 #ifndef CONFIG_MSND_FIFOSIZE
1694 #  define CONFIG_MSND_FIFOSIZE          DEFFIFOSIZE
1695 #endif
1696 static int fifosize __initdata =        CONFIG_MSND_FIFOSIZE;
1697
1698 #ifndef CONFIG_MSND_CALSIGNAL
1699 #  define CONFIG_MSND_CALSIGNAL         0
1700 #endif
1701 static int
1702 calibrate_signal __initdata =           CONFIG_MSND_CALSIGNAL;
1703 #endif /* MODULE */
1704
1705
1706 static int __init msnd_init(void)
1707 {
1708         int err;
1709 #ifndef MSND_CLASSIC
1710         static msnd_pinnacle_cfg_t pinnacle_devs;
1711 #endif /* MSND_CLASSIC */
1712
1713         printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version "
1714                VERSION ", Copyright (C) 1998 Andrew Veliath\n");
1715
1716         if (io == -1 || irq == -1 || mem == -1)
1717                 printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n");
1718
1719 #ifdef MSND_CLASSIC
1720         if (io == -1 ||
1721             !(io == 0x290 ||
1722               io == 0x260 ||
1723               io == 0x250 ||
1724               io == 0x240 ||
1725               io == 0x230 ||
1726               io == 0x220 ||
1727               io == 0x210 ||
1728               io == 0x3e0)) {
1729                 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n");
1730                 return -EINVAL;
1731         }
1732 #else
1733         if (io == -1 ||
1734                 io < 0x100 ||
1735                 io > 0x3e0 ||
1736                 (io % 0x10) != 0) {
1737                         printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n");
1738                         return -EINVAL;
1739         }
1740 #endif /* MSND_CLASSIC */
1741
1742         if (irq == -1 ||
1743             !(irq == 5 ||
1744               irq == 7 ||
1745               irq == 9 ||
1746               irq == 10 ||
1747               irq == 11 ||
1748               irq == 12)) {
1749                 printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n");
1750                 return -EINVAL;
1751         }
1752
1753         if (mem == -1 ||
1754             !(mem == 0xb0000 ||
1755               mem == 0xc8000 ||
1756               mem == 0xd0000 ||
1757               mem == 0xd8000 ||
1758               mem == 0xe0000 ||
1759               mem == 0xe8000)) {
1760                 printk(KERN_ERR LOGNAME ": \"mem\" - must be set to "
1761                        "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n");
1762                 return -EINVAL;
1763         }
1764
1765 #ifdef MSND_CLASSIC
1766         switch (irq) {
1767         case 5: dev.irqid = HPIRQ_5; break;
1768         case 7: dev.irqid = HPIRQ_7; break;
1769         case 9: dev.irqid = HPIRQ_9; break;
1770         case 10: dev.irqid = HPIRQ_10; break;
1771         case 11: dev.irqid = HPIRQ_11; break;
1772         case 12: dev.irqid = HPIRQ_12; break;
1773         }
1774
1775         switch (mem) {
1776         case 0xb0000: dev.memid = HPMEM_B000; break;
1777         case 0xc8000: dev.memid = HPMEM_C800; break;
1778         case 0xd0000: dev.memid = HPMEM_D000; break;
1779         case 0xd8000: dev.memid = HPMEM_D800; break;
1780         case 0xe0000: dev.memid = HPMEM_E000; break;
1781         case 0xe8000: dev.memid = HPMEM_E800; break;
1782         }
1783 #else
1784         if (cfg == -1) {
1785                 printk(KERN_INFO LOGNAME ": Assuming PnP mode\n");
1786         } else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) {
1787                 printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n");
1788                 return -EINVAL;
1789         } else {
1790                 printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg);
1791
1792                 /* DSP */
1793                 pinnacle_devs[0].io0 = io;
1794                 pinnacle_devs[0].irq = irq;
1795                 pinnacle_devs[0].mem = mem;
1796
1797                 /* The following are Pinnacle specific */
1798
1799                 /* MPU */
1800                 pinnacle_devs[1].io0 = mpu_io;
1801                 pinnacle_devs[1].irq = mpu_irq;
1802
1803                 /* IDE */
1804                 pinnacle_devs[2].io0 = ide_io0;
1805                 pinnacle_devs[2].io1 = ide_io1;
1806                 pinnacle_devs[2].irq = ide_irq;
1807
1808                 /* Joystick */
1809                 pinnacle_devs[3].io0 = joystick_io;
1810
1811                 if (check_region(cfg, 2)) {
1812                         printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg);
1813                         return -EIO;
1814                 }
1815
1816                 request_region(cfg, 2, "Pinnacle/Fiji Config");
1817                 if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) {
1818                         printk(KERN_ERR LOGNAME ": Device configuration error\n");
1819                         release_region(cfg, 2);
1820                         return -EIO;
1821                 }
1822                 release_region(cfg, 2);
1823         }
1824 #endif /* MSND_CLASSIC */
1825
1826         if (fifosize < 16)
1827                 fifosize = 16;
1828
1829         if (fifosize > 1024)
1830                 fifosize = 1024;
1831
1832         set_default_audio_parameters();
1833 #ifdef MSND_CLASSIC
1834         dev.type = msndClassic;
1835 #else
1836         dev.type = msndPinnacle;
1837 #endif
1838         dev.io = io;
1839         dev.numio = DSP_NUMIO;
1840         dev.irq = irq;
1841         dev.base = mem;
1842         dev.fifosize = fifosize * 1024;
1843         dev.calibrate_signal = calibrate_signal ? 1 : 0;
1844         dev.recsrc = 0;
1845         dev.dspq_data_buff = DSPQ_DATA_BUFF;
1846         dev.dspq_buff_size = DSPQ_BUFF_SIZE;
1847         if (write_ndelay == -1)
1848                 write_ndelay = CONFIG_MSND_WRITE_NDELAY;
1849         if (write_ndelay)
1850                 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1851         else
1852                 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1853 #ifndef MSND_CLASSIC
1854         if (digital)
1855                 set_bit(F_HAVEDIGITAL, &dev.flags);
1856 #endif
1857         init_waitqueue_head(&dev.writeblock);
1858         init_waitqueue_head(&dev.readblock);
1859         init_waitqueue_head(&dev.writeflush);
1860         msnd_fifo_init(&dev.DAPF);
1861         msnd_fifo_init(&dev.DARF);
1862         spin_lock_init(&dev.lock);
1863         printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize);
1864         if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) {
1865                 printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n");
1866                 return err;
1867         }
1868
1869         if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) {
1870                 printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n");
1871                 msnd_fifo_free(&dev.DAPF);
1872                 return err;
1873         }
1874
1875         if ((err = probe_multisound()) < 0) {
1876                 printk(KERN_ERR LOGNAME ": Probe failed\n");
1877                 msnd_fifo_free(&dev.DAPF);
1878                 msnd_fifo_free(&dev.DARF);
1879                 return err;
1880         }
1881
1882         if ((err = attach_multisound()) < 0) {
1883                 printk(KERN_ERR LOGNAME ": Attach failed\n");
1884                 msnd_fifo_free(&dev.DAPF);
1885                 msnd_fifo_free(&dev.DARF);
1886                 return err;
1887         }
1888
1889         return 0;
1890 }
1891
1892 static void __exit msdn_cleanup(void)
1893 {
1894         unload_multisound();
1895         msnd_fifo_free(&dev.DAPF);
1896         msnd_fifo_free(&dev.DARF);
1897 }
1898
1899 module_init(msnd_init);
1900 module_exit(msdn_cleanup);