sound/oss/sonicvibes.c

   1 /*****************************************************************************/
   2
   3 /*
   4  *      sonicvibes.c  --  S3 Sonic Vibes audio driver.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Special thanks to David C. Niemi
  23  *
  24  *
  25  * Module command line parameters:
  26  *   none so far
  27  *
  28  *
  29  *  Supported devices:
  30  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  31  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  32  *  /dev/midi   simple MIDI UART interface, no ioctl
  33  *
  34  *  The card has both an FM and a Wavetable synth, but I have to figure
  35  *  out first how to drive them...
  36  *
  37  *  Revision history
  38  *    06.05.1998   0.1   Initial release
  39  *    10.05.1998   0.2   Fixed many bugs, esp. ADC rate calculation
  40  *                       First stab at a simple midi interface (no bells&whistles)
  41  *    13.05.1998   0.3   Fix stupid cut&paste error: set_adc_rate was called instead of
  42  *                       set_dac_rate in the FMODE_WRITE case in sv_open
  43  *                       Fix hwptr out of bounds (now mpg123 works)
  44  *    14.05.1998   0.4   Don't allow excessive interrupt rates
  45  *    08.06.1998   0.5   First release using Alan Cox' soundcore instead of miscdevice
  46  *    03.08.1998   0.6   Do not include modversions.h
  47  *                       Now mixer behaviour can basically be selected between
  48  *                       "OSS documented" and "OSS actual" behaviour
  49  *    31.08.1998   0.7   Fix realplayer problems - dac.count issues
  50  *    10.12.1998   0.8   Fix drain_dac trying to wait on not yet initialized DMA
  51  *    16.12.1998   0.9   Fix a few f_file & FMODE_ bugs
  52  *    06.01.1999   0.10  remove the silly SA_INTERRUPT flag.
  53  *                       hopefully killed the egcs section type conflict
  54  *    12.03.1999   0.11  cinfo.blocks should be reset after GETxPTR ioctl.
  55  *                       reported by Johan Maes <joma@telindus.be>
  56  *    22.03.1999   0.12  return EAGAIN instead of EBUSY when O_NONBLOCK
  57  *                       read/write cannot be executed
  58  *    05.04.1999   0.13  added code to sv_read and sv_write which should detect
  59  *                       lockups of the sound chip and revive it. This is basically
  60  *                       an ugly hack, but at least applications using this driver
  61  *                       won't hang forever. I don't know why these lockups happen,
  62  *                       it might well be the motherboard chipset (an early 486 PCI
  63  *                       board with ALI chipset), since every busmastering 100MB
  64  *                       ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
  65  *                       exhibit similar behaviour (they work for a couple of packets
  66  *                       and then lock up and can be revived by ifconfig down/up).
  67  *    07.04.1999   0.14  implemented the following ioctl's: SOUND_PCM_READ_RATE,
  68  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  69  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  70  *                       Note: dmaio hack might still be wrong on archs other than i386
  71  *    15.06.1999   0.15  Fix bad allocation bug.
  72  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  73  *    28.06.1999   0.16  Add pci_set_master
  74  *    03.08.1999   0.17  adapt to Linus' new __setup/__initcall
  75  *                       added kernel command line options "sonicvibes=reverb" and "sonicvibesdmaio=dmaioaddr"
  76  *    12.08.1999   0.18  module_init/__setup fixes
  77  *    24.08.1999   0.19  get rid of the dmaio kludge, replace with allocate_resource
  78  *    31.08.1999   0.20  add spin_lock_init
  79  *                       use new resource allocation to allocate DDMA IO space
  80  *                       replaced current->state = x with set_current_state(x)
  81  *    03.09.1999   0.21  change read semantics for MIDI to match
  82  *                       OSS more closely; remove possible wakeup race
  83  *    28.10.1999   0.22  More waitqueue races fixed
  84  *    01.12.1999   0.23  New argument to allocate_resource
  85  *    07.12.1999   0.24  More allocate_resource semantics change
  86  *    08.01.2000   0.25  Prevent some ioctl's from returning bad count values on underrun/overrun;
  87  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  88  *                       use Martin Mares' pci_assign_resource
  89  *    07.02.2000   0.26  Use pci_alloc_consistent and pci_register_driver
  90  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  91  *    12.12.2000   0.28  More dma buffer initializations, patch from
  92  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
  93  *    31.01.2001   0.29  Register/Unregister gameport
  94  *                       Fix SETTRIGGER non OSS API conformity
  95  *    18.05.2001   0.30  PCI probing and error values cleaned up by Marcus
  96  *                       Meissner <mm@caldera.de>
  97  *    03.01.2003   0.31  open_mode fixes from Georg Acher <acher@in.tum.de>
  98  *
  99  */
 100
 101 /*****************************************************************************/
 102
 103 #include <linux/module.h>
 104 #include <linux/string.h>
 105 #include <linux/ioport.h>
 106 #include <linux/interrupt.h>
 107 #include <linux/wait.h>
 108 #include <linux/mm.h>
 109 #include <linux/delay.h>
 110 #include <linux/sound.h>
 111 #include <linux/slab.h>
 112 #include <linux/soundcard.h>
 113 #include <linux/pci.h>
 114 #include <linux/init.h>
 115 #include <linux/poll.h>
 116 #include <linux/spinlock.h>
 117 #include <linux/smp_lock.h>
 118 #include <linux/gameport.h>
 119
 120 #include <asm/io.h>
 121 #include <asm/uaccess.h>
 122
 123 #include "dm.h"
 124
 125
 126 /* --------------------------------------------------------------------- */
 127
 128 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 129
 130 /* --------------------------------------------------------------------- */
 131
 132 #ifndef PCI_VENDOR_ID_S3
 133 #define PCI_VENDOR_ID_S3             0x5333
 134 #endif
 135 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
 136 #define PCI_DEVICE_ID_S3_SONICVIBES  0xca00
 137 #endif
 138
 139 #define SV_MAGIC  ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
 140
 141 #define SV_EXTENT_SB      0x10
 142 #define SV_EXTENT_ENH     0x10
 143 #define SV_EXTENT_SYNTH   0x4
 144 #define SV_EXTENT_MIDI    0x4
 145 #define SV_EXTENT_GAME    0x8
 146 #define SV_EXTENT_DMA     0x10
 147
 148 /*
 149  * we are not a bridge and thus use a resource for DDMA that is used for bridges but
 150  * left empty for normal devices
 151  */
 152 #define RESOURCE_SB       0
 153 #define RESOURCE_ENH      1
 154 #define RESOURCE_SYNTH    2
 155 #define RESOURCE_MIDI     3
 156 #define RESOURCE_GAME     4
 157 #define RESOURCE_DDMA     7
 158
 159 #define SV_MIDI_DATA      0
 160 #define SV_MIDI_COMMAND   1
 161 #define SV_MIDI_STATUS    1
 162
 163 #define SV_DMA_ADDR0      0
 164 #define SV_DMA_ADDR1      1
 165 #define SV_DMA_ADDR2      2
 166 #define SV_DMA_ADDR3      3
 167 #define SV_DMA_COUNT0     4
 168 #define SV_DMA_COUNT1     5
 169 #define SV_DMA_COUNT2     6
 170 #define SV_DMA_MODE       0xb
 171 #define SV_DMA_RESET      0xd
 172 #define SV_DMA_MASK       0xf
 173
 174 /*
 175  * DONT reset the DMA controllers unless you understand
 176  * the reset semantics. Assuming reset semantics as in
 177  * the 8237 does not work.
 178  */
 179
 180 #define DMA_MODE_AUTOINIT 0x10
 181 #define DMA_MODE_READ     0x44    /* I/O to memory, no autoinit, increment, single mode */
 182 #define DMA_MODE_WRITE    0x48    /* memory to I/O, no autoinit, increment, single mode */
 183
 184 #define SV_CODEC_CONTROL  0
 185 #define SV_CODEC_INTMASK  1
 186 #define SV_CODEC_STATUS   2
 187 #define SV_CODEC_IADDR    4
 188 #define SV_CODEC_IDATA    5
 189
 190 #define SV_CCTRL_RESET      0x80
 191 #define SV_CCTRL_INTADRIVE  0x20
 192 #define SV_CCTRL_WAVETABLE  0x08
 193 #define SV_CCTRL_REVERB     0x04
 194 #define SV_CCTRL_ENHANCED   0x01
 195
 196 #define SV_CINTMASK_DMAA    0x01
 197 #define SV_CINTMASK_DMAC    0x04
 198 #define SV_CINTMASK_SPECIAL 0x08
 199 #define SV_CINTMASK_UPDOWN  0x40
 200 #define SV_CINTMASK_MIDI    0x80
 201
 202 #define SV_CSTAT_DMAA       0x01
 203 #define SV_CSTAT_DMAC       0x04
 204 #define SV_CSTAT_SPECIAL    0x08
 205 #define SV_CSTAT_UPDOWN     0x40
 206 #define SV_CSTAT_MIDI       0x80
 207
 208 #define SV_CIADDR_TRD       0x80
 209 #define SV_CIADDR_MCE       0x40
 210
 211 /* codec indirect registers */
 212 #define SV_CIMIX_ADCINL     0x00
 213 #define SV_CIMIX_ADCINR     0x01
 214 #define SV_CIMIX_AUX1INL    0x02
 215 #define SV_CIMIX_AUX1INR    0x03
 216 #define SV_CIMIX_CDINL      0x04
 217 #define SV_CIMIX_CDINR      0x05
 218 #define SV_CIMIX_LINEINL    0x06
 219 #define SV_CIMIX_LINEINR    0x07
 220 #define SV_CIMIX_MICIN      0x08
 221 #define SV_CIMIX_SYNTHINL   0x0A
 222 #define SV_CIMIX_SYNTHINR   0x0B
 223 #define SV_CIMIX_AUX2INL    0x0C
 224 #define SV_CIMIX_AUX2INR    0x0D
 225 #define SV_CIMIX_ANALOGINL  0x0E
 226 #define SV_CIMIX_ANALOGINR  0x0F
 227 #define SV_CIMIX_PCMINL     0x10
 228 #define SV_CIMIX_PCMINR     0x11
 229
 230 #define SV_CIGAMECONTROL    0x09
 231 #define SV_CIDATAFMT        0x12
 232 #define SV_CIENABLE         0x13
 233 #define SV_CIUPDOWN         0x14
 234 #define SV_CIREVISION       0x15
 235 #define SV_CIADCOUTPUT      0x16
 236 #define SV_CIDMAABASECOUNT1 0x18
 237 #define SV_CIDMAABASECOUNT0 0x19
 238 #define SV_CIDMACBASECOUNT1 0x1c
 239 #define SV_CIDMACBASECOUNT0 0x1d
 240 #define SV_CIPCMSR0         0x1e
 241 #define SV_CIPCMSR1         0x1f
 242 #define SV_CISYNTHSR0       0x20
 243 #define SV_CISYNTHSR1       0x21
 244 #define SV_CIADCCLKSOURCE   0x22
 245 #define SV_CIADCALTSR       0x23
 246 #define SV_CIADCPLLM        0x24
 247 #define SV_CIADCPLLN        0x25
 248 #define SV_CISYNTHPLLM      0x26
 249 #define SV_CISYNTHPLLN      0x27
 250 #define SV_CIUARTCONTROL    0x2a
 251 #define SV_CIDRIVECONTROL   0x2b
 252 #define SV_CISRSSPACE       0x2c
 253 #define SV_CISRSCENTER      0x2d
 254 #define SV_CIWAVETABLESRC   0x2e
 255 #define SV_CIANALOGPWRDOWN  0x30
 256 #define SV_CIDIGITALPWRDOWN 0x31
 257
 258
 259 #define SV_CIMIX_ADCSRC_CD     0x20
 260 #define SV_CIMIX_ADCSRC_DAC    0x40
 261 #define SV_CIMIX_ADCSRC_AUX2   0x60
 262 #define SV_CIMIX_ADCSRC_LINE   0x80
 263 #define SV_CIMIX_ADCSRC_AUX1   0xa0
 264 #define SV_CIMIX_ADCSRC_MIC    0xc0
 265 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
 266 #define SV_CIMIX_ADCSRC_MASK   0xe0
 267
 268 #define SV_CFMT_STEREO     0x01
 269 #define SV_CFMT_16BIT      0x02
 270 #define SV_CFMT_MASK       0x03
 271 #define SV_CFMT_ASHIFT     0
 272 #define SV_CFMT_CSHIFT     4
 273
 274 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 275 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 276
 277 #define SV_CENABLE_PPE     0x4
 278 #define SV_CENABLE_RE      0x2
 279 #define SV_CENABLE_PE      0x1
 280
 281
 282 /* MIDI buffer sizes */
 283
 284 #define MIDIINBUF  256
 285 #define MIDIOUTBUF 256
 286
 287 #define FMODE_MIDI_SHIFT 2
 288 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 289 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 290
 291 #define FMODE_DMFM 0x10
 292
 293 /* --------------------------------------------------------------------- */
 294
 295 struct sv_state {
 296         /* magic */
 297         unsigned int magic;
 298
 299         /* list of sonicvibes devices */
 300         struct list_head devs;
 301
 302         /* the corresponding pci_dev structure */
 303         struct pci_dev *dev;
 304
 305         /* soundcore stuff */
 306         int dev_audio;
 307         int dev_mixer;
 308         int dev_midi;
 309         int dev_dmfm;
 310
 311         /* hardware resources */
 312         unsigned long iosb, ioenh, iosynth, iomidi;  /* long for SPARC */
 313         unsigned int iodmaa, iodmac, irq;
 314
 315         /* mixer stuff */
 316         struct {
 317                 unsigned int modcnt;
 318 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
 319                 unsigned short vol[13];
 320 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
 321         } mix;
 322
 323         /* wave stuff */
 324         unsigned int rateadc, ratedac;
 325         unsigned char fmt, enable;
 326
 327         spinlock_t lock;
 328         struct semaphore open_sem;
 329         mode_t open_mode;
 330         wait_queue_head_t open_wait;
 331
 332         struct dmabuf {
 333                 void *rawbuf;
 334                 dma_addr_t dmaaddr;
 335                 unsigned buforder;
 336                 unsigned numfrag;
 337                 unsigned fragshift;
 338                 unsigned hwptr, swptr;
 339                 unsigned total_bytes;
 340                 int count;
 341                 unsigned error; /* over/underrun */
 342                 wait_queue_head_t wait;
 343                 /* redundant, but makes calculations easier */
 344                 unsigned fragsize;
 345                 unsigned dmasize;
 346                 unsigned fragsamples;
 347                 /* OSS stuff */
 348                 unsigned mapped:1;
 349                 unsigned ready:1;
 350                 unsigned endcleared:1;
 351                 unsigned enabled:1;
 352                 unsigned ossfragshift;
 353                 int ossmaxfrags;
 354                 unsigned subdivision;
 355         } dma_dac, dma_adc;
 356
 357         /* midi stuff */
 358         struct {
 359                 unsigned ird, iwr, icnt;
 360                 unsigned ord, owr, ocnt;
 361                 wait_queue_head_t iwait;
 362                 wait_queue_head_t owait;
 363                 struct timer_list timer;
 364                 unsigned char ibuf[MIDIINBUF];
 365                 unsigned char obuf[MIDIOUTBUF];
 366         } midi;
 367
 368         struct gameport gameport;
 369 };
 370
 371 /* --------------------------------------------------------------------- */
 372
 373 static LIST_HEAD(devs);
 374 static unsigned long wavetable_mem;
 375
 376 /* --------------------------------------------------------------------- */
 377
 378 static inline unsigned ld2(unsigned int x)
 379 {
 380         unsigned r = 0;
 381
 382         if (x >= 0x10000) {
 383                 x >>= 16;
 384                 r += 16;
 385         }
 386         if (x >= 0x100) {
 387                 x >>= 8;
 388                 r += 8;
 389         }
 390         if (x >= 0x10) {
 391                 x >>= 4;
 392                 r += 4;
 393         }
 394         if (x >= 4) {
 395                 x >>= 2;
 396                 r += 2;
 397         }
 398         if (x >= 2)
 399                 r++;
 400         return r;
 401 }
 402
 403 /*
 404  * hweightN: returns the hamming weight (i.e. the number
 405  * of bits set) of a N-bit word
 406  */
 407
 408 #ifdef hweight32
 409 #undef hweight32
 410 #endif
 411
 412 static inline unsigned int hweight32(unsigned int w)
 413 {
 414         unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
 415         res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
 416         res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
 417         res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
 418         return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
 419 }
 420
 421 /* --------------------------------------------------------------------- */
 422
 423 /*
 424  * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
 425  */
 426
 427 #undef DMABYTEIO
 428
 429 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
 430 {
 431 #ifdef DMABYTEIO
 432         unsigned io = s->iodmaa, u;
 433
 434         count--;
 435         for (u = 4; u > 0; u--, addr >>= 8, io++)
 436                 outb(addr & 0xff, io);
 437         for (u = 3; u > 0; u--, count >>= 8, io++)
 438                 outb(count & 0xff, io);
 439 #else /* DMABYTEIO */
 440         count--;
 441         outl(addr, s->iodmaa + SV_DMA_ADDR0);
 442         outl(count, s->iodmaa + SV_DMA_COUNT0);
 443 #endif /* DMABYTEIO */
 444         outb(0x18, s->iodmaa + SV_DMA_MODE);
 445 }
 446
 447 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
 448 {
 449 #ifdef DMABYTEIO
 450         unsigned io = s->iodmac, u;
 451
 452         count >>= 1;
 453         count--;
 454         for (u = 4; u > 0; u--, addr >>= 8, io++)
 455                 outb(addr & 0xff, io);
 456         for (u = 3; u > 0; u--, count >>= 8, io++)
 457                 outb(count & 0xff, io);
 458 #else /* DMABYTEIO */
 459         count >>= 1;
 460         count--;
 461         outl(addr, s->iodmac + SV_DMA_ADDR0);
 462         outl(count, s->iodmac + SV_DMA_COUNT0);
 463 #endif /* DMABYTEIO */
 464         outb(0x14, s->iodmac + SV_DMA_MODE);
 465 }
 466
 467 static inline unsigned get_dmaa(struct sv_state *s)
 468 {
 469 #ifdef DMABYTEIO
 470         unsigned io = s->iodmaa+6, v = 0, u;
 471
 472         for (u = 3; u > 0; u--, io--) {
 473                 v <<= 8;
 474                 v |= inb(io);
 475         }
 476         return v + 1;
 477 #else /* DMABYTEIO */
 478         return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
 479 #endif /* DMABYTEIO */
 480 }
 481
 482 static inline unsigned get_dmac(struct sv_state *s)
 483 {
 484 #ifdef DMABYTEIO
 485         unsigned io = s->iodmac+6, v = 0, u;
 486
 487         for (u = 3; u > 0; u--, io--) {
 488                 v <<= 8;
 489                 v |= inb(io);
 490         }
 491         return (v + 1) << 1;
 492 #else /* DMABYTEIO */
 493         return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
 494 #endif /* DMABYTEIO */
 495 }
 496
 497 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
 498 {
 499         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
 500         udelay(10);
 501         outb(data, s->ioenh + SV_CODEC_IDATA);
 502         udelay(10);
 503 }
 504
 505 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
 506 {
 507         unsigned char v;
 508
 509         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
 510         udelay(10);
 511         v = inb(s->ioenh + SV_CODEC_IDATA);
 512         udelay(10);
 513         return v;
 514 }
 515
 516 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
 517 {
 518         unsigned long flags;
 519
 520         spin_lock_irqsave(&s->lock, flags);
 521         outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
 522         if (mask) {
 523                 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
 524                 udelay(10);
 525         }
 526         s->fmt = (s->fmt & mask) | data;
 527         outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
 528         udelay(10);
 529         outb(0, s->ioenh + SV_CODEC_IADDR);
 530         spin_unlock_irqrestore(&s->lock, flags);
 531         udelay(10);
 532 }
 533
 534 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
 535 {
 536         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
 537         udelay(10);
 538         outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
 539         udelay(10);
 540 }
 541
 542 #define REFFREQUENCY  24576000
 543 #define ADCMULT 512
 544 #define FULLRATE 48000
 545
 546 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
 547 {
 548         unsigned long flags;
 549         unsigned char r, m=0, n=0;
 550         unsigned xm, xn, xr, xd, metric = ~0U;
 551         /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
 552
 553         if (rate < 625000/ADCMULT)
 554                 rate = 625000/ADCMULT;
 555         if (rate > 150000000/ADCMULT)
 556                 rate = 150000000/ADCMULT;
 557         /* slight violation of specs, needed for continuous sampling rates */
 558         for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
 559         for (xn = 3; xn < 35; xn++)
 560                 for (xm = 3; xm < 130; xm++) {
 561                         xr = REFFREQUENCY/ADCMULT * xm / xn;
 562                         xd = abs((signed)(xr - rate));
 563                         if (xd < metric) {
 564                                 metric = xd;
 565                                 m = xm - 2;
 566                                 n = xn - 2;
 567                         }
 568                 }
 569         reg &= 0x3f;
 570         spin_lock_irqsave(&s->lock, flags);
 571         outb(reg, s->ioenh + SV_CODEC_IADDR);
 572         udelay(10);
 573         outb(m, s->ioenh + SV_CODEC_IDATA);
 574         udelay(10);
 575         outb(reg+1, s->ioenh + SV_CODEC_IADDR);
 576         udelay(10);
 577         outb(r | n, s->ioenh + SV_CODEC_IDATA);
 578         spin_unlock_irqrestore(&s->lock, flags);
 579         udelay(10);
 580         return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
 581 }
 582
 583 #if 0
 584
 585 static unsigned getpll(struct sv_state *s, unsigned char reg)
 586 {
 587         unsigned long flags;
 588         unsigned char m, n;
 589
 590         reg &= 0x3f;
 591         spin_lock_irqsave(&s->lock, flags);
 592         outb(reg, s->ioenh + SV_CODEC_IADDR);
 593         udelay(10);
 594         m = inb(s->ioenh + SV_CODEC_IDATA);
 595         udelay(10);
 596         outb(reg+1, s->ioenh + SV_CODEC_IADDR);
 597         udelay(10);
 598         n = inb(s->ioenh + SV_CODEC_IDATA);
 599         spin_unlock_irqrestore(&s->lock, flags);
 600         udelay(10);
 601         return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
 602 }
 603
 604 #endif
 605
 606 static void set_dac_rate(struct sv_state *s, unsigned rate)
 607 {
 608         unsigned div;
 609         unsigned long flags;
 610
 611         if (rate > 48000)
 612                 rate = 48000;
 613         if (rate < 4000)
 614                 rate = 4000;
 615         div = (rate * 65536 + FULLRATE/2) / FULLRATE;
 616         if (div > 65535)
 617                 div = 65535;
 618         spin_lock_irqsave(&s->lock, flags);
 619         wrindir(s, SV_CIPCMSR1, div >> 8);
 620         wrindir(s, SV_CIPCMSR0, div);
 621         spin_unlock_irqrestore(&s->lock, flags);
 622         s->ratedac = (div * FULLRATE + 32768) / 65536;
 623 }
 624
 625 static void set_adc_rate(struct sv_state *s, unsigned rate)
 626 {
 627         unsigned long flags;
 628         unsigned rate1, rate2, div;
 629
 630         if (rate > 48000)
 631                 rate = 48000;
 632         if (rate < 4000)
 633                 rate = 4000;
 634         rate1 = setpll(s, SV_CIADCPLLM, rate);
 635         div = (48000 + rate/2) / rate;
 636         if (div > 8)
 637                 div = 8;
 638         rate2 = (48000 + div/2) / div;
 639         spin_lock_irqsave(&s->lock, flags);
 640         wrindir(s, SV_CIADCALTSR, (div-1) << 4);
 641         if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
 642                 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
 643                 s->rateadc = rate2;
 644         } else {
 645                 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
 646                 s->rateadc = rate1;
 647         }
 648         spin_unlock_irqrestore(&s->lock, flags);
 649 }
 650
 651 /* --------------------------------------------------------------------- */
 652
 653 static inline void stop_adc(struct sv_state *s)
 654 {
 655         unsigned long flags;
 656
 657         spin_lock_irqsave(&s->lock, flags);
 658         s->enable &= ~SV_CENABLE_RE;
 659         wrindir(s, SV_CIENABLE, s->enable);
 660         spin_unlock_irqrestore(&s->lock, flags);
 661 }
 662
 663 static inline void stop_dac(struct sv_state *s)
 664 {
 665         unsigned long flags;
 666
 667         spin_lock_irqsave(&s->lock, flags);
 668         s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
 669         wrindir(s, SV_CIENABLE, s->enable);
 670         spin_unlock_irqrestore(&s->lock, flags);
 671 }
 672
 673 static void start_dac(struct sv_state *s)
 674 {
 675         unsigned long flags;
 676
 677         spin_lock_irqsave(&s->lock, flags);
 678         if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
 679                 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
 680                 wrindir(s, SV_CIENABLE, s->enable);
 681         }
 682         spin_unlock_irqrestore(&s->lock, flags);
 683 }
 684
 685 static void start_adc(struct sv_state *s)
 686 {
 687         unsigned long flags;
 688
 689         spin_lock_irqsave(&s->lock, flags);
 690         if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 691             && s->dma_adc.ready) {
 692                 s->enable |= SV_CENABLE_RE;
 693                 wrindir(s, SV_CIENABLE, s->enable);
 694         }
 695         spin_unlock_irqrestore(&s->lock, flags);
 696 }
 697
 698 /* --------------------------------------------------------------------- */
 699
 700 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 701 #define DMABUF_MINORDER 1
 702
 703 static void dealloc_dmabuf(struct sv_state *s, struct dmabuf *db)
 704 {
 705         struct page *page, *pend;
 706
 707         if (db->rawbuf) {
 708                 /* undo marking the pages as reserved */
 709                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 710                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 711                         ClearPageReserved(page);
 712                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 713         }
 714         db->rawbuf = NULL;
 715         db->mapped = db->ready = 0;
 716 }
 717
 718
 719 /* DMAA is used for playback, DMAC is used for recording */
 720
 721 static int prog_dmabuf(struct sv_state *s, unsigned rec)
 722 {
 723         struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
 724         unsigned rate = rec ? s->rateadc : s->ratedac;
 725         int order;
 726         unsigned bytepersec;
 727         unsigned bufs;
 728         struct page *page, *pend;
 729         unsigned char fmt;
 730         unsigned long flags;
 731
 732         spin_lock_irqsave(&s->lock, flags);
 733         fmt = s->fmt;
 734         if (rec) {
 735                 s->enable &= ~SV_CENABLE_RE;
 736                 fmt >>= SV_CFMT_CSHIFT;
 737         } else {
 738                 s->enable &= ~SV_CENABLE_PE;
 739                 fmt >>= SV_CFMT_ASHIFT;
 740         }
 741         wrindir(s, SV_CIENABLE, s->enable);
 742         spin_unlock_irqrestore(&s->lock, flags);
 743         fmt &= SV_CFMT_MASK;
 744         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 745         if (!db->rawbuf) {
 746                 db->ready = db->mapped = 0;
 747                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 748                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 749                                 break;
 750                 if (!db->rawbuf)
 751                         return -ENOMEM;
 752                 db->buforder = order;
 753                 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
 754                         printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx  size %ld\n",
 755                                virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
 756                 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
 757                         printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx  size %ld\n",
 758                                virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
 759                 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 760                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 761                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 762                         SetPageReserved(page);
 763         }
 764         bytepersec = rate << sample_shift[fmt];
 765         bufs = PAGE_SIZE << db->buforder;
 766         if (db->ossfragshift) {
 767                 if ((1000 << db->ossfragshift) < bytepersec)
 768                         db->fragshift = ld2(bytepersec/1000);
 769                 else
 770                         db->fragshift = db->ossfragshift;
 771         } else {
 772                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
 773                 if (db->fragshift < 3)
 774                         db->fragshift = 3;
 775         }
 776         db->numfrag = bufs >> db->fragshift;
 777         while (db->numfrag < 4 && db->fragshift > 3) {
 778                 db->fragshift--;
 779                 db->numfrag = bufs >> db->fragshift;
 780         }
 781         db->fragsize = 1 << db->fragshift;
 782         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 783                 db->numfrag = db->ossmaxfrags;
 784         db->fragsamples = db->fragsize >> sample_shift[fmt];
 785         db->dmasize = db->numfrag << db->fragshift;
 786         memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
 787         spin_lock_irqsave(&s->lock, flags);
 788         if (rec) {
 789                 set_dmac(s, db->dmaaddr, db->numfrag << db->fragshift);
 790                 /* program enhanced mode registers */
 791                 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
 792                 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
 793         } else {
 794                 set_dmaa(s, db->dmaaddr, db->numfrag << db->fragshift);
 795                 /* program enhanced mode registers */
 796                 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
 797                 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
 798         }
 799         spin_unlock_irqrestore(&s->lock, flags);
 800         db->enabled = 1;
 801         db->ready = 1;
 802         return 0;
 803 }
 804
 805 static inline void clear_advance(struct sv_state *s)
 806 {
 807         unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
 808         unsigned char *buf = s->dma_dac.rawbuf;
 809         unsigned bsize = s->dma_dac.dmasize;
 810         unsigned bptr = s->dma_dac.swptr;
 811         unsigned len = s->dma_dac.fragsize;
 812
 813         if (bptr + len > bsize) {
 814                 unsigned x = bsize - bptr;
 815                 memset(buf + bptr, c, x);
 816                 bptr = 0;
 817                 len -= x;
 818         }
 819         memset(buf + bptr, c, len);
 820 }
 821
 822 /* call with spinlock held! */
 823 static void sv_update_ptr(struct sv_state *s)
 824 {
 825         unsigned hwptr;
 826         int diff;
 827
 828         /* update ADC pointer */
 829         if (s->dma_adc.ready) {
 830                 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
 831                 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
 832                 s->dma_adc.hwptr = hwptr;
 833                 s->dma_adc.total_bytes += diff;
 834                 s->dma_adc.count += diff;
 835                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
 836                         wake_up(&s->dma_adc.wait);
 837                 if (!s->dma_adc.mapped) {
 838                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
 839                                 s->enable &= ~SV_CENABLE_RE;
 840                                 wrindir(s, SV_CIENABLE, s->enable);
 841                                 s->dma_adc.error++;
 842                         }
 843                 }
 844         }
 845         /* update DAC pointer */
 846         if (s->dma_dac.ready) {
 847                 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
 848                 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
 849                 s->dma_dac.hwptr = hwptr;
 850                 s->dma_dac.total_bytes += diff;
 851                 if (s->dma_dac.mapped) {
 852                         s->dma_dac.count += diff;
 853                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
 854                                 wake_up(&s->dma_dac.wait);
 855                 } else {
 856                         s->dma_dac.count -= diff;
 857                         if (s->dma_dac.count <= 0) {
 858                                 s->enable &= ~SV_CENABLE_PE;
 859                                 wrindir(s, SV_CIENABLE, s->enable);
 860                                 s->dma_dac.error++;
 861                         } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
 862                                 clear_advance(s);
 863                                 s->dma_dac.endcleared = 1;
 864                         }
 865                         if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
 866                                 wake_up(&s->dma_dac.wait);
 867                 }
 868         }
 869 }
 870
 871 /* hold spinlock for the following! */
 872 static void sv_handle_midi(struct sv_state *s)
 873 {
 874         unsigned char ch;
 875         int wake;
 876
 877         wake = 0;
 878         while (!(inb(s->iomidi+1) & 0x80)) {
 879                 ch = inb(s->iomidi);
 880                 if (s->midi.icnt < MIDIINBUF) {
 881                         s->midi.ibuf[s->midi.iwr] = ch;
 882                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
 883                         s->midi.icnt++;
 884                 }
 885                 wake = 1;
 886         }
 887         if (wake)
 888                 wake_up(&s->midi.iwait);
 889         wake = 0;
 890         while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
 891                 outb(s->midi.obuf[s->midi.ord], s->iomidi);
 892                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
 893                 s->midi.ocnt--;
 894                 if (s->midi.ocnt < MIDIOUTBUF-16)
 895                         wake = 1;
 896         }
 897         if (wake)
 898                 wake_up(&s->midi.owait);
 899 }
 900
 901 static irqreturn_t sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 902 {
 903         struct sv_state *s = (struct sv_state *)dev_id;
 904         unsigned int intsrc;
 905
 906         /* fastpath out, to ease interrupt sharing */
 907         intsrc = inb(s->ioenh + SV_CODEC_STATUS);
 908         if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
 909                 return IRQ_NONE;
 910         spin_lock(&s->lock);
 911         sv_update_ptr(s);
 912         sv_handle_midi(s);
 913         spin_unlock(&s->lock);
 914         return IRQ_HANDLED;
 915 }
 916
 917 static void sv_midi_timer(unsigned long data)
 918 {
 919         struct sv_state *s = (struct sv_state *)data;
 920         unsigned long flags;
 921
 922         spin_lock_irqsave(&s->lock, flags);
 923         sv_handle_midi(s);
 924         spin_unlock_irqrestore(&s->lock, flags);
 925         s->midi.timer.expires = jiffies+1;
 926         add_timer(&s->midi.timer);
 927 }
 928
 929 /* --------------------------------------------------------------------- */
 930
 931 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
 932
 933 #define VALIDATE_STATE(s)                         \
 934 ({                                                \
 935         if (!(s) || (s)->magic != SV_MAGIC) { \
 936                 printk(invalid_magic);            \
 937                 return -ENXIO;                    \
 938         }                                         \
 939 })
 940
 941 /* --------------------------------------------------------------------- */
 942
 943 #define MT_4          1
 944 #define MT_5MUTE      2
 945 #define MT_4MUTEMONO  3
 946 #define MT_6MUTE      4
 947
 948 static const struct {
 949         unsigned left:5;
 950         unsigned right:5;
 951         unsigned type:3;
 952         unsigned rec:3;
 953 } mixtable[SOUND_MIXER_NRDEVICES] = {
 954         [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL,    SV_CIMIX_ADCINR,    MT_4,         0 },
 955         [SOUND_MIXER_LINE1]  = { SV_CIMIX_AUX1INL,   SV_CIMIX_AUX1INR,   MT_5MUTE,     5 },
 956         [SOUND_MIXER_CD]     = { SV_CIMIX_CDINL,     SV_CIMIX_CDINR,     MT_5MUTE,     1 },
 957         [SOUND_MIXER_LINE]   = { SV_CIMIX_LINEINL,   SV_CIMIX_LINEINR,   MT_5MUTE,     4 },
 958         [SOUND_MIXER_MIC]    = { SV_CIMIX_MICIN,     SV_CIMIX_ADCINL,    MT_4MUTEMONO, 6 },
 959         [SOUND_MIXER_SYNTH]  = { SV_CIMIX_SYNTHINL,  SV_CIMIX_SYNTHINR,  MT_5MUTE,     2 },
 960         [SOUND_MIXER_LINE2]  = { SV_CIMIX_AUX2INL,   SV_CIMIX_AUX2INR,   MT_5MUTE,     3 },
 961         [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE,     7 },
 962         [SOUND_MIXER_PCM]    = { SV_CIMIX_PCMINL,    SV_CIMIX_PCMINR,    MT_6MUTE,     0 }
 963 };
 964
 965 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 966
 967 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
 968 {
 969         unsigned long flags;
 970         unsigned char l, r, rl, rr;
 971
 972         spin_lock_irqsave(&s->lock, flags);
 973         l = rdindir(s, mixtable[i].left);
 974         r = rdindir(s, mixtable[i].right);
 975         spin_unlock_irqrestore(&s->lock, flags);
 976         switch (mixtable[i].type) {
 977         case MT_4:
 978                 r &= 0xf;
 979                 l &= 0xf;
 980                 rl = 10 + 6 * (l & 15);
 981                 rr = 10 + 6 * (r & 15);
 982                 break;
 983
 984         case MT_4MUTEMONO:
 985                 rl = 55 - 3 * (l & 15);
 986                 if (r & 0x10)
 987                         rl += 45;
 988                 rr = rl;
 989                 r = l;
 990                 break;
 991
 992         case MT_5MUTE:
 993         default:
 994                 rl = 100 - 3 * (l & 31);
 995                 rr = 100 - 3 * (r & 31);
 996                 break;
 997
 998         case MT_6MUTE:
 999                 rl = 100 - 3 * (l & 63) / 2;
1000                 rr = 100 - 3 * (r & 63) / 2;
1001                 break;
1002         }
1003         if (l & 0x80)
1004                 rl = 0;
1005         if (r & 0x80)
1006                 rr = 0;
1007         return put_user((rr << 8) | rl, arg);
1008 }
1009
1010 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1011
1012 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1013 {
1014         [SOUND_MIXER_RECLEV] = 1,
1015         [SOUND_MIXER_LINE1]  = 2,
1016         [SOUND_MIXER_CD]     = 3,
1017         [SOUND_MIXER_LINE]   = 4,
1018         [SOUND_MIXER_MIC]    = 5,
1019         [SOUND_MIXER_SYNTH]  = 6,
1020         [SOUND_MIXER_LINE2]  = 7,
1021         [SOUND_MIXER_VOLUME] = 8,
1022         [SOUND_MIXER_PCM]    = 9
1023 };
1024
1025 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1026
1027 static unsigned mixer_recmask(struct sv_state *s)
1028 {
1029         unsigned long flags;
1030         int i, j;
1031
1032         spin_lock_irqsave(&s->lock, flags);
1033         j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
1034         spin_unlock_irqrestore(&s->lock, flags);
1035         j &= 7;
1036         for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
1037         return 1 << i;
1038 }
1039
1040 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
1041 {
1042         unsigned long flags;
1043         int i, val;
1044         unsigned char l, r, rl, rr;
1045
1046         VALIDATE_STATE(s);
1047         if (cmd == SOUND_MIXER_INFO) {
1048                 mixer_info info;
1049                 memset(&info, 0, sizeof(info));
1050                 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1051                 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1052                 info.modify_counter = s->mix.modcnt;
1053                 if (copy_to_user((void *)arg, &info, sizeof(info)))
1054                         return -EFAULT;
1055                 return 0;
1056         }
1057         if (cmd == SOUND_OLD_MIXER_INFO) {
1058                 _old_mixer_info info;
1059                 memset(&info, 0, sizeof(info));
1060                 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1061                 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1062                 if (copy_to_user((void *)arg, &info, sizeof(info)))
1063                         return -EFAULT;
1064                 return 0;
1065         }
1066         if (cmd == OSS_GETVERSION)
1067                 return put_user(SOUND_VERSION, (int *)arg);
1068         if (cmd == SOUND_MIXER_PRIVATE1) {  /* SRS settings */
1069                 if (get_user(val, (int *)arg))
1070                         return -EFAULT;
1071                 spin_lock_irqsave(&s->lock, flags);
1072                 if (val & 1) {
1073                         if (val & 2) {
1074                                 l = 4 - ((val >> 2) & 7);
1075                                 if (l & ~3)
1076                                         l = 4;
1077                                 r = 4 - ((val >> 5) & 7);
1078                                 if (r & ~3)
1079                                         r = 4;
1080                                 wrindir(s, SV_CISRSSPACE, l);
1081                                 wrindir(s, SV_CISRSCENTER, r);
1082                         } else
1083                                 wrindir(s, SV_CISRSSPACE, 0x80);
1084                 }
1085                 l = rdindir(s, SV_CISRSSPACE);
1086                 r = rdindir(s, SV_CISRSCENTER);
1087                 spin_unlock_irqrestore(&s->lock, flags);
1088                 if (l & 0x80)
1089                         return put_user(0, (int *)arg);
1090                 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, (int *)arg);
1091         }
1092         if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
1093                 return -EINVAL;
1094         if (_SIOC_DIR(cmd) == _SIOC_READ) {
1095                 switch (_IOC_NR(cmd)) {
1096                 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1097                         return put_user(mixer_recmask(s), (int *)arg);
1098
1099                 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1100                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1101                                 if (mixtable[i].type)
1102                                         val |= 1 << i;
1103                         return put_user(val, (int *)arg);
1104
1105                 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1106                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1107                                 if (mixtable[i].rec)
1108                                         val |= 1 << i;
1109                         return put_user(val, (int *)arg);
1110
1111                 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1112                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1113                                 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1114                                         val |= 1 << i;
1115                         return put_user(val, (int *)arg);
1116
1117                 case SOUND_MIXER_CAPS:
1118                         return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
1119
1120                 default:
1121                         i = _IOC_NR(cmd);
1122                         if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1123                                 return -EINVAL;
1124 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1125                         return return_mixval(s, i, (int *)arg);
1126 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1127                         if (!volidx[i])
1128                                 return -EINVAL;
1129                         return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1130 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1131                 }
1132         }
1133         if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
1134                 return -EINVAL;
1135         s->mix.modcnt++;
1136         switch (_IOC_NR(cmd)) {
1137         case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1138                 if (get_user(val, (int *)arg))
1139                         return -EFAULT;
1140                 i = hweight32(val);
1141                 if (i == 0)
1142                         return 0; /*val = mixer_recmask(s);*/
1143                 else if (i > 1)
1144                         val &= ~mixer_recmask(s);
1145                 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1146                         if (!(val & (1 << i)))
1147                                 continue;
1148                         if (mixtable[i].rec)
1149                                 break;
1150                 }
1151                 if (!mixtable[i].rec)
1152                         return 0;
1153                 spin_lock_irqsave(&s->lock, flags);
1154                 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1155                 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1156                 spin_unlock_irqrestore(&s->lock, flags);
1157                 return 0;
1158
1159         default:
1160                 i = _IOC_NR(cmd);
1161                 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1162                         return -EINVAL;
1163                 if (get_user(val, (int *)arg))
1164                         return -EFAULT;
1165                 l = val & 0xff;
1166                 r = (val >> 8) & 0xff;
1167                 if (mixtable[i].type == MT_4MUTEMONO)
1168                         l = (r + l) / 2;
1169                 if (l > 100)
1170                         l = 100;
1171                 if (r > 100)
1172                         r = 100;
1173                 spin_lock_irqsave(&s->lock, flags);
1174                 switch (mixtable[i].type) {
1175                 case MT_4:
1176                         if (l >= 10)
1177                                 l -= 10;
1178                         if (r >= 10)
1179                                 r -= 10;
1180                         frobindir(s, mixtable[i].left, 0xf0, l / 6);
1181                         frobindir(s, mixtable[i].right, 0xf0, l / 6);
1182                         break;
1183
1184                 case MT_4MUTEMONO:
1185                         rr = 0;
1186                         if (l < 10)
1187                                 rl = 0x80;
1188                         else {
1189                                 if (l >= 55) {
1190                                         rr = 0x10;
1191                                         l -= 45;
1192                                 }
1193                                 rl = (55 - l) / 3;
1194                         }
1195                         wrindir(s, mixtable[i].left, rl);
1196                         frobindir(s, mixtable[i].right, ~0x10, rr);
1197                         break;
1198
1199                 case MT_5MUTE:
1200                         if (l < 7)
1201                                 rl = 0x80;
1202                         else
1203                                 rl = (100 - l) / 3;
1204                         if (r < 7)
1205                                 rr = 0x80;
1206                         else
1207                                 rr = (100 - r) / 3;
1208                         wrindir(s, mixtable[i].left, rl);
1209                         wrindir(s, mixtable[i].right, rr);
1210                         break;
1211
1212                 case MT_6MUTE:
1213                         if (l < 6)
1214                                 rl = 0x80;
1215                         else
1216                                 rl = (100 - l) * 2 / 3;
1217                         if (r < 6)
1218                                 rr = 0x80;
1219                         else
1220                                 rr = (100 - r) * 2 / 3;
1221                         wrindir(s, mixtable[i].left, rl);
1222                         wrindir(s, mixtable[i].right, rr);
1223                         break;
1224                 }
1225                 spin_unlock_irqrestore(&s->lock, flags);
1226 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1227                 return return_mixval(s, i, (int *)arg);
1228 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1229                 if (!volidx[i])
1230                         return -EINVAL;
1231                 s->mix.vol[volidx[i]-1] = val;
1232                 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1233 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1234         }
1235 }
1236
1237 /* --------------------------------------------------------------------- */
1238
1239 static int sv_open_mixdev(struct inode *inode, struct file *file)
1240 {
1241         int minor = iminor(inode);
1242         struct list_head *list;
1243         struct sv_state *s;
1244
1245         for (list = devs.next; ; list = list->next) {
1246                 if (list == &devs)
1247                         return -ENODEV;
1248                 s = list_entry(list, struct sv_state, devs);
1249                 if (s->dev_mixer == minor)
1250                         break;
1251         }
1252         VALIDATE_STATE(s);
1253         file->private_data = s;
1254         return 0;
1255 }
1256
1257 static int sv_release_mixdev(struct inode *inode, struct file *file)
1258 {
1259         struct sv_state *s = (struct sv_state *)file->private_data;
1260
1261         VALIDATE_STATE(s);
1262         return 0;
1263 }
1264
1265 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1266 {
1267         return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1268 }
1269
1270 static /*const*/ struct file_operations sv_mixer_fops = {
1271         .owner          = THIS_MODULE,
1272         .llseek         = no_llseek,
1273         .ioctl          = sv_ioctl_mixdev,
1274         .open           = sv_open_mixdev,
1275         .release        = sv_release_mixdev,
1276 };
1277
1278 /* --------------------------------------------------------------------- */
1279
1280 static int drain_dac(struct sv_state *s, int nonblock)
1281 {
1282         DECLARE_WAITQUEUE(wait, current);
1283         unsigned long flags;
1284         int count, tmo;
1285
1286         if (s->dma_dac.mapped || !s->dma_dac.ready)
1287                 return 0;
1288         add_wait_queue(&s->dma_dac.wait, &wait);
1289         for (;;) {
1290                 __set_current_state(TASK_INTERRUPTIBLE);
1291                 spin_lock_irqsave(&s->lock, flags);
1292                 count = s->dma_dac.count;
1293                 spin_unlock_irqrestore(&s->lock, flags);
1294                 if (count <= 0)
1295                         break;
1296                 if (signal_pending(current))
1297                         break;
1298                 if (nonblock) {
1299                         remove_wait_queue(&s->dma_dac.wait, &wait);
1300                         set_current_state(TASK_RUNNING);
1301                         return -EBUSY;
1302                 }
1303                 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1304                 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1305                 if (!schedule_timeout(tmo + 1))
1306                         printk(KERN_DEBUG "sv: dma timed out??\n");
1307         }
1308         remove_wait_queue(&s->dma_dac.wait, &wait);
1309         set_current_state(TASK_RUNNING);
1310         if (signal_pending(current))
1311                 return -ERESTARTSYS;
1312         return 0;
1313 }
1314
1315 /* --------------------------------------------------------------------- */
1316
1317 static ssize_t sv_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1318 {
1319         struct sv_state *s = (struct sv_state *)file->private_data;
1320         DECLARE_WAITQUEUE(wait, current);
1321         ssize_t ret;
1322         unsigned long flags;
1323         unsigned swptr;
1324         int cnt;
1325
1326         VALIDATE_STATE(s);
1327         if (ppos != &file->f_pos)
1328                 return -ESPIPE;
1329         if (s->dma_adc.mapped)
1330                 return -ENXIO;
1331         if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1332                 return ret;
1333         if (!access_ok(VERIFY_WRITE, buffer, count))
1334                 return -EFAULT;
1335         ret = 0;
1336 #if 0
1337         spin_lock_irqsave(&s->lock, flags);
1338         sv_update_ptr(s);
1339         spin_unlock_irqrestore(&s->lock, flags);
1340 #endif
1341         add_wait_queue(&s->dma_adc.wait, &wait);
1342         while (count > 0) {
1343                 spin_lock_irqsave(&s->lock, flags);
1344                 swptr = s->dma_adc.swptr;
1345                 cnt = s->dma_adc.dmasize-swptr;
1346                 if (s->dma_adc.count < cnt)
1347                         cnt = s->dma_adc.count;
1348                 if (cnt <= 0)
1349                         __set_current_state(TASK_INTERRUPTIBLE);
1350                 spin_unlock_irqrestore(&s->lock, flags);
1351                 if (cnt > count)
1352                         cnt = count;
1353                 if (cnt <= 0) {
1354                         if (s->dma_adc.enabled)
1355                                 start_adc(s);
1356                         if (file->f_flags & O_NONBLOCK) {
1357                                 if (!ret)
1358                                         ret = -EAGAIN;
1359                                 break;
1360                         }
1361                         if (!schedule_timeout(HZ)) {
1362                                 printk(KERN_DEBUG "sv: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1363                                        s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1364                                        s->dma_adc.hwptr, s->dma_adc.swptr);
1365                                 stop_adc(s);
1366                                 spin_lock_irqsave(&s->lock, flags);
1367                                 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1368                                 /* program enhanced mode registers */
1369                                 wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
1370                                 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1);
1371                                 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1372                                 spin_unlock_irqrestore(&s->lock, flags);
1373                         }
1374                         if (signal_pending(current)) {
1375                                 if (!ret)
1376                                         ret = -ERESTARTSYS;
1377                                 break;
1378                         }
1379                         continue;
1380                 }
1381                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1382                         if (!ret)
1383                                 ret = -EFAULT;
1384                         break;
1385                 }
1386                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1387                 spin_lock_irqsave(&s->lock, flags);
1388                 s->dma_adc.swptr = swptr;
1389                 s->dma_adc.count -= cnt;
1390                 spin_unlock_irqrestore(&s->lock, flags);
1391                 count -= cnt;
1392                 buffer += cnt;
1393                 ret += cnt;
1394                 if (s->dma_adc.enabled)
1395                         start_adc(s);
1396         }
1397         remove_wait_queue(&s->dma_adc.wait, &wait);
1398         set_current_state(TASK_RUNNING);
1399         return ret;
1400 }
1401
1402 static ssize_t sv_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1403 {
1404         struct sv_state *s = (struct sv_state *)file->private_data;
1405         DECLARE_WAITQUEUE(wait, current);
1406         ssize_t ret;
1407         unsigned long flags;
1408         unsigned swptr;
1409         int cnt;
1410
1411         VALIDATE_STATE(s);
1412         if (ppos != &file->f_pos)
1413                 return -ESPIPE;
1414         if (s->dma_dac.mapped)
1415                 return -ENXIO;
1416         if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1417                 return ret;
1418         if (!access_ok(VERIFY_READ, buffer, count))
1419                 return -EFAULT;
1420         ret = 0;
1421 #if 0
1422         spin_lock_irqsave(&s->lock, flags);
1423         sv_update_ptr(s);
1424         spin_unlock_irqrestore(&s->lock, flags);
1425 #endif
1426         add_wait_queue(&s->dma_dac.wait, &wait);
1427         while (count > 0) {
1428                 spin_lock_irqsave(&s->lock, flags);
1429                 if (s->dma_dac.count < 0) {
1430                         s->dma_dac.count = 0;
1431                         s->dma_dac.swptr = s->dma_dac.hwptr;
1432                 }
1433                 swptr = s->dma_dac.swptr;
1434                 cnt = s->dma_dac.dmasize-swptr;
1435                 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1436                         cnt = s->dma_dac.dmasize - s->dma_dac.count;
1437                 if (cnt <= 0)
1438                         __set_current_state(TASK_INTERRUPTIBLE);
1439                 spin_unlock_irqrestore(&s->lock, flags);
1440                 if (cnt > count)
1441                         cnt = count;
1442                 if (cnt <= 0) {
1443                         if (s->dma_dac.enabled)
1444                                 start_dac(s);
1445                         if (file->f_flags & O_NONBLOCK) {
1446                                 if (!ret)
1447                                         ret = -EAGAIN;
1448                                 break;
1449                         }
1450                         if (!schedule_timeout(HZ)) {
1451                                 printk(KERN_DEBUG "sv: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1452                                        s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1453                                        s->dma_dac.hwptr, s->dma_dac.swptr);
1454                                 stop_dac(s);
1455                                 spin_lock_irqsave(&s->lock, flags);
1456                                 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1457                                 /* program enhanced mode registers */
1458                                 wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
1459                                 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1);
1460                                 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1461                                 spin_unlock_irqrestore(&s->lock, flags);
1462                         }
1463                         if (signal_pending(current)) {
1464                                 if (!ret)
1465                                         ret = -ERESTARTSYS;
1466                                 break;
1467                         }
1468                         continue;
1469                 }
1470                 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1471                         if (!ret)
1472                                 ret = -EFAULT;
1473                         break;
1474                 }
1475                 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1476                 spin_lock_irqsave(&s->lock, flags);
1477                 s->dma_dac.swptr = swptr;
1478                 s->dma_dac.count += cnt;
1479                 s->dma_dac.endcleared = 0;
1480                 spin_unlock_irqrestore(&s->lock, flags);
1481                 count -= cnt;
1482                 buffer += cnt;
1483                 ret += cnt;
1484                 if (s->dma_dac.enabled)
1485                         start_dac(s);
1486         }
1487         remove_wait_queue(&s->dma_dac.wait, &wait);
1488         set_current_state(TASK_RUNNING);
1489         return ret;
1490 }
1491
1492 /* No kernel lock - we have our own spinlock */
1493 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1494 {
1495         struct sv_state *s = (struct sv_state *)file->private_data;
1496         unsigned long flags;
1497         unsigned int mask = 0;
1498
1499         VALIDATE_STATE(s);
1500         if (file->f_mode & FMODE_WRITE) {
1501                 if (!s->dma_dac.ready && prog_dmabuf(s, 1))
1502                         return 0;
1503                 poll_wait(file, &s->dma_dac.wait, wait);
1504         }
1505         if (file->f_mode & FMODE_READ) {
1506                 if (!s->dma_adc.ready && prog_dmabuf(s, 0))
1507                         return 0;
1508                 poll_wait(file, &s->dma_adc.wait, wait);
1509         }
1510         spin_lock_irqsave(&s->lock, flags);
1511         sv_update_ptr(s);
1512         if (file->f_mode & FMODE_READ) {
1513                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1514                         mask |= POLLIN | POLLRDNORM;
1515         }
1516         if (file->f_mode & FMODE_WRITE) {
1517                 if (s->dma_dac.mapped) {
1518                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1519                                 mask |= POLLOUT | POLLWRNORM;
1520                 } else {
1521                         if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1522                                 mask |= POLLOUT | POLLWRNORM;
1523                 }
1524         }
1525         spin_unlock_irqrestore(&s->lock, flags);
1526         return mask;
1527 }
1528
1529 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1530 {
1531         struct sv_state *s = (struct sv_state *)file->private_data;
1532         struct dmabuf *db;
1533         int ret = -EINVAL;
1534         unsigned long size;
1535
1536         VALIDATE_STATE(s);
1537         lock_kernel();
1538         if (vma->vm_flags & VM_WRITE) {
1539                 if ((ret = prog_dmabuf(s, 1)) != 0)
1540                         goto out;
1541                 db = &s->dma_dac;
1542         } else if (vma->vm_flags & VM_READ) {
1543                 if ((ret = prog_dmabuf(s, 0)) != 0)
1544                         goto out;
1545                 db = &s->dma_adc;
1546         } else
1547                 goto out;
1548         ret = -EINVAL;
1549         if (vma->vm_pgoff != 0)
1550                 goto out;
1551         size = vma->vm_end - vma->vm_start;
1552         if (size > (PAGE_SIZE << db->buforder))
1553                 goto out;
1554         ret = -EAGAIN;
1555         if (remap_page_range(vma, vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1556                 goto out;
1557         db->mapped = 1;
1558         ret = 0;
1559 out:
1560         unlock_kernel();
1561         return ret;
1562 }
1563
1564 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1565 {
1566         struct sv_state *s = (struct sv_state *)file->private_data;
1567         unsigned long flags;
1568         audio_buf_info abinfo;
1569         count_info cinfo;
1570         int count;
1571         int val, mapped, ret;
1572         unsigned char fmtm, fmtd;
1573
1574         VALIDATE_STATE(s);
1575         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1576                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1577         switch (cmd) {
1578         case OSS_GETVERSION:
1579                 return put_user(SOUND_VERSION, (int *)arg);
1580
1581         case SNDCTL_DSP_SYNC:
1582                 if (file->f_mode & FMODE_WRITE)
1583                         return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1584                 return 0;
1585
1586         case SNDCTL_DSP_SETDUPLEX:
1587                 return 0;
1588
1589         case SNDCTL_DSP_GETCAPS:
1590                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1591
1592         case SNDCTL_DSP_RESET:
1593                 if (file->f_mode & FMODE_WRITE) {
1594                         stop_dac(s);
1595                         synchronize_irq(s->irq);
1596                         s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1597                 }
1598                 if (file->f_mode & FMODE_READ) {
1599                         stop_adc(s);
1600                         synchronize_irq(s->irq);
1601                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1602                 }
1603                 return 0;
1604
1605         case SNDCTL_DSP_SPEED:
1606                 if (get_user(val, (int *)arg))
1607                         return -EFAULT;
1608                 if (val >= 0) {
1609                         if (file->f_mode & FMODE_READ) {
1610                                 stop_adc(s);
1611                                 s->dma_adc.ready = 0;
1612                                 set_adc_rate(s, val);
1613                         }
1614                         if (file->f_mode & FMODE_WRITE) {
1615                                 stop_dac(s);
1616                                 s->dma_dac.ready = 0;
1617                                 set_dac_rate(s, val);
1618                         }
1619                 }
1620                 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1621
1622         case SNDCTL_DSP_STEREO:
1623                 if (get_user(val, (int *)arg))
1624                         return -EFAULT;
1625                 fmtd = 0;
1626                 fmtm = ~0;
1627                 if (file->f_mode & FMODE_READ) {
1628                         stop_adc(s);
1629                         s->dma_adc.ready = 0;
1630                         if (val)
1631                                 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1632                         else
1633                                 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1634                 }
1635                 if (file->f_mode & FMODE_WRITE) {
1636                         stop_dac(s);
1637                         s->dma_dac.ready = 0;
1638                         if (val)
1639                                 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1640                         else
1641                                 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1642                 }
1643                 set_fmt(s, fmtm, fmtd);
1644                 return 0;
1645
1646         case SNDCTL_DSP_CHANNELS:
1647                 if (get_user(val, (int *)arg))
1648                         return -EFAULT;
1649                 if (val != 0) {
1650                         fmtd = 0;
1651                         fmtm = ~0;
1652                         if (file->f_mode & FMODE_READ) {
1653                                 stop_adc(s);
1654                                 s->dma_adc.ready = 0;
1655                                 if (val >= 2)
1656                                         fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1657                                 else
1658                                         fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1659                         }
1660                         if (file->f_mode & FMODE_WRITE) {
1661                                 stop_dac(s);
1662                                 s->dma_dac.ready = 0;
1663                                 if (val >= 2)
1664                                         fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1665                                 else
1666                                         fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1667                         }
1668                         set_fmt(s, fmtm, fmtd);
1669                 }
1670                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1671                                            : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, (int *)arg);
1672
1673         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1674                 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1675
1676         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1677                 if (get_user(val, (int *)arg))
1678                         return -EFAULT;
1679                 if (val != AFMT_QUERY) {
1680                         fmtd = 0;
1681                         fmtm = ~0;
1682                         if (file->f_mode & FMODE_READ) {
1683                                 stop_adc(s);
1684                                 s->dma_adc.ready = 0;
1685                                 if (val == AFMT_S16_LE)
1686                                         fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1687                                 else
1688                                         fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1689                         }
1690                         if (file->f_mode & FMODE_WRITE) {
1691                                 stop_dac(s);
1692                                 s->dma_dac.ready = 0;
1693                                 if (val == AFMT_S16_LE)
1694                                         fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1695                                 else
1696                                         fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1697                         }
1698                         set_fmt(s, fmtm, fmtd);
1699                 }
1700                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1701                                            : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
1702
1703         case SNDCTL_DSP_POST:
1704                 return 0;
1705
1706         case SNDCTL_DSP_GETTRIGGER:
1707                 val = 0;
1708                 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE)
1709                         val |= PCM_ENABLE_INPUT;
1710                 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE)
1711                         val |= PCM_ENABLE_OUTPUT;
1712                 return put_user(val, (int *)arg);
1713
1714         case SNDCTL_DSP_SETTRIGGER:
1715                 if (get_user(val, (int *)arg))
1716                         return -EFAULT;
1717                 if (file->f_mode & FMODE_READ) {
1718                         if (val & PCM_ENABLE_INPUT) {
1719                                 if (!s->dma_adc.ready && (ret =  prog_dmabuf(s, 1)))
1720                                         return ret;
1721                                 s->dma_adc.enabled = 1;
1722                                 start_adc(s);
1723                         } else {
1724                                 s->dma_adc.enabled = 0;
1725                                 stop_adc(s);
1726                         }
1727                 }
1728                 if (file->f_mode & FMODE_WRITE) {
1729                         if (val & PCM_ENABLE_OUTPUT) {
1730                                 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1731                                         return ret;
1732                                 s->dma_dac.enabled = 1;
1733                                 start_dac(s);
1734                         } else {
1735                                 s->dma_dac.enabled = 0;
1736                                 stop_dac(s);
1737                         }
1738                 }
1739                 return 0;
1740
1741         case SNDCTL_DSP_GETOSPACE:
1742                 if (!(file->f_mode & FMODE_WRITE))
1743                         return -EINVAL;
1744                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1745                         return val;
1746                 spin_lock_irqsave(&s->lock, flags);
1747                 sv_update_ptr(s);
1748                 abinfo.fragsize = s->dma_dac.fragsize;
1749                 count = s->dma_dac.count;
1750                 if (count < 0)
1751                         count = 0;
1752                 abinfo.bytes = s->dma_dac.dmasize - count;
1753                 abinfo.fragstotal = s->dma_dac.numfrag;
1754                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1755                 spin_unlock_irqrestore(&s->lock, flags);
1756                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1757
1758         case SNDCTL_DSP_GETISPACE:
1759                 if (!(file->f_mode & FMODE_READ))
1760                         return -EINVAL;
1761                 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1762                         return val;
1763                 spin_lock_irqsave(&s->lock, flags);
1764                 sv_update_ptr(s);
1765                 abinfo.fragsize = s->dma_adc.fragsize;
1766                 count = s->dma_adc.count;
1767                 if (count < 0)
1768                         count = 0;
1769                 abinfo.bytes = count;
1770                 abinfo.fragstotal = s->dma_adc.numfrag;
1771                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1772                 spin_unlock_irqrestore(&s->lock, flags);
1773                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1774
1775         case SNDCTL_DSP_NONBLOCK:
1776                 file->f_flags |= O_NONBLOCK;
1777                 return 0;
1778
1779         case SNDCTL_DSP_GETODELAY:
1780                 if (!(file->f_mode & FMODE_WRITE))
1781                         return -EINVAL;
1782                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1783                         return val;
1784                 spin_lock_irqsave(&s->lock, flags);
1785                 sv_update_ptr(s);
1786                 count = s->dma_dac.count;
1787                 spin_unlock_irqrestore(&s->lock, flags);
1788                 if (count < 0)
1789                         count = 0;
1790                 return put_user(count, (int *)arg);
1791
1792         case SNDCTL_DSP_GETIPTR:
1793                 if (!(file->f_mode & FMODE_READ))
1794                         return -EINVAL;
1795                 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1796                         return val;
1797                 spin_lock_irqsave(&s->lock, flags);
1798                 sv_update_ptr(s);
1799                 cinfo.bytes = s->dma_adc.total_bytes;
1800                 count = s->dma_adc.count;
1801                 if (count < 0)
1802                         count = 0;
1803                 cinfo.blocks = count >> s->dma_adc.fragshift;
1804                 cinfo.ptr = s->dma_adc.hwptr;
1805                 if (s->dma_adc.mapped)
1806                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1807                 spin_unlock_irqrestore(&s->lock, flags);
1808                 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1809                         return -EFAULT;
1810                 return 0;
1811
1812         case SNDCTL_DSP_GETOPTR:
1813                 if (!(file->f_mode & FMODE_WRITE))
1814                         return -EINVAL;
1815                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1816                         return val;
1817                 spin_lock_irqsave(&s->lock, flags);
1818                 sv_update_ptr(s);
1819                 cinfo.bytes = s->dma_dac.total_bytes;
1820                 count = s->dma_dac.count;
1821                 if (count < 0)
1822                         count = 0;
1823                 cinfo.blocks = count >> s->dma_dac.fragshift;
1824                 cinfo.ptr = s->dma_dac.hwptr;
1825                 if (s->dma_dac.mapped)
1826                         s->dma_dac.count &= s->dma_dac.fragsize-1;
1827                 spin_unlock_irqrestore(&s->lock, flags);
1828                 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1829                         return -EFAULT;
1830                 return 0;
1831
1832         case SNDCTL_DSP_GETBLKSIZE:
1833                 if (file->f_mode & FMODE_WRITE) {
1834                         if ((val = prog_dmabuf(s, 0)))
1835                                 return val;
1836                         return put_user(s->dma_dac.fragsize, (int *)arg);
1837                 }
1838                 if ((val = prog_dmabuf(s, 1)))
1839                         return val;
1840                 return put_user(s->dma_adc.fragsize, (int *)arg);
1841
1842         case SNDCTL_DSP_SETFRAGMENT:
1843                 if (get_user(val, (int *)arg))
1844                         return -EFAULT;
1845                 if (file->f_mode & FMODE_READ) {
1846                         s->dma_adc.ossfragshift = val & 0xffff;
1847                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1848                         if (s->dma_adc.ossfragshift < 4)
1849                                 s->dma_adc.ossfragshift = 4;
1850                         if (s->dma_adc.ossfragshift > 15)
1851                                 s->dma_adc.ossfragshift = 15;
1852                         if (s->dma_adc.ossmaxfrags < 4)
1853                                 s->dma_adc.ossmaxfrags = 4;
1854                 }
1855                 if (file->f_mode & FMODE_WRITE) {
1856                         s->dma_dac.ossfragshift = val & 0xffff;
1857                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1858                         if (s->dma_dac.ossfragshift < 4)
1859                                 s->dma_dac.ossfragshift = 4;
1860                         if (s->dma_dac.ossfragshift > 15)
1861                                 s->dma_dac.ossfragshift = 15;
1862                         if (s->dma_dac.ossmaxfrags < 4)
1863                                 s->dma_dac.ossmaxfrags = 4;
1864                 }
1865                 return 0;
1866
1867         case SNDCTL_DSP_SUBDIVIDE:
1868                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1869                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1870                         return -EINVAL;
1871                 if (get_user(val, (int *)arg))
1872                         return -EFAULT;
1873                 if (val != 1 && val != 2 && val != 4)
1874                         return -EINVAL;
1875                 if (file->f_mode & FMODE_READ)
1876                         s->dma_adc.subdivision = val;
1877                 if (file->f_mode & FMODE_WRITE)
1878                         s->dma_dac.subdivision = val;
1879                 return 0;
1880
1881         case SOUND_PCM_READ_RATE:
1882                 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1883
1884         case SOUND_PCM_READ_CHANNELS:
1885                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1886                                            : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, (int *)arg);
1887
1888         case SOUND_PCM_READ_BITS:
1889                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1890                                            : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? 16 : 8, (int *)arg);
1891
1892         case SOUND_PCM_WRITE_FILTER:
1893         case SNDCTL_DSP_SETSYNCRO:
1894         case SOUND_PCM_READ_FILTER:
1895                 return -EINVAL;
1896
1897         }
1898         return mixer_ioctl(s, cmd, arg);
1899 }
1900
1901 static int sv_open(struct inode *inode, struct file *file)
1902 {
1903         int minor = iminor(inode);
1904         DECLARE_WAITQUEUE(wait, current);
1905         unsigned char fmtm = ~0, fmts = 0;
1906         struct list_head *list;
1907         struct sv_state *s;
1908
1909         for (list = devs.next; ; list = list->next) {
1910                 if (list == &devs)
1911                         return -ENODEV;
1912                 s = list_entry(list, struct sv_state, devs);
1913                 if (!((s->dev_audio ^ minor) & ~0xf))
1914                         break;
1915         }
1916         VALIDATE_STATE(s);
1917         file->private_data = s;
1918         /* wait for device to become free */
1919         down(&s->open_sem);
1920         while (s->open_mode & file->f_mode) {
1921                 if (file->f_flags & O_NONBLOCK) {
1922                         up(&s->open_sem);
1923                         return -EBUSY;
1924                 }
1925                 add_wait_queue(&s->open_wait, &wait);
1926                 __set_current_state(TASK_INTERRUPTIBLE);
1927                 up(&s->open_sem);
1928                 schedule();
1929                 remove_wait_queue(&s->open_wait, &wait);
1930                 set_current_state(TASK_RUNNING);
1931                 if (signal_pending(current))
1932                         return -ERESTARTSYS;
1933                 down(&s->open_sem);
1934         }
1935         if (file->f_mode & FMODE_READ) {
1936                 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1937                 if ((minor & 0xf) == SND_DEV_DSP16)
1938                         fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1939                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1940                 s->dma_adc.enabled = 1;
1941                 set_adc_rate(s, 8000);
1942         }
1943         if (file->f_mode & FMODE_WRITE) {
1944                 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1945                 if ((minor & 0xf) == SND_DEV_DSP16)
1946                         fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1947                 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1948                 s->dma_dac.enabled = 1;
1949                 set_dac_rate(s, 8000);
1950         }
1951         set_fmt(s, fmtm, fmts);
1952         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1953         up(&s->open_sem);
1954         return 0;
1955 }
1956
1957 static int sv_release(struct inode *inode, struct file *file)
1958 {
1959         struct sv_state *s = (struct sv_state *)file->private_data;
1960
1961         VALIDATE_STATE(s);
1962         lock_kernel();
1963         if (file->f_mode & FMODE_WRITE)
1964                 drain_dac(s, file->f_flags & O_NONBLOCK);
1965         down(&s->open_sem);
1966         if (file->f_mode & FMODE_WRITE) {
1967                 stop_dac(s);
1968                 dealloc_dmabuf(s, &s->dma_dac);
1969         }
1970         if (file->f_mode & FMODE_READ) {
1971                 stop_adc(s);
1972                 dealloc_dmabuf(s, &s->dma_adc);
1973         }
1974         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
1975         wake_up(&s->open_wait);
1976         up(&s->open_sem);
1977         unlock_kernel();
1978         return 0;
1979 }
1980
1981 static /*const*/ struct file_operations sv_audio_fops = {
1982         .owner          = THIS_MODULE,
1983         .llseek         = no_llseek,
1984         .read           = sv_read,
1985         .write          = sv_write,
1986         .poll           = sv_poll,
1987         .ioctl          = sv_ioctl,
1988         .mmap           = sv_mmap,
1989         .open           = sv_open,
1990         .release        = sv_release,
1991 };
1992
1993 /* --------------------------------------------------------------------- */
1994
1995 static ssize_t sv_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1996 {
1997         struct sv_state *s = (struct sv_state *)file->private_data;
1998         DECLARE_WAITQUEUE(wait, current);
1999         ssize_t ret;
2000         unsigned long flags;
2001         unsigned ptr;
2002         int cnt;
2003
2004         VALIDATE_STATE(s);
2005         if (ppos != &file->f_pos)
2006                 return -ESPIPE;
2007         if (!access_ok(VERIFY_WRITE, buffer, count))
2008                 return -EFAULT;
2009         if (count == 0)
2010                 return 0;
2011         ret = 0;
2012         add_wait_queue(&s->midi.iwait, &wait);
2013         while (count > 0) {
2014                 spin_lock_irqsave(&s->lock, flags);
2015                 ptr = s->midi.ird;
2016                 cnt = MIDIINBUF - ptr;
2017                 if (s->midi.icnt < cnt)
2018                         cnt = s->midi.icnt;
2019                 if (cnt <= 0)
2020                       __set_current_state(TASK_INTERRUPTIBLE);
2021                 spin_unlock_irqrestore(&s->lock, flags);
2022                 if (cnt > count)
2023                         cnt = count;
2024                 if (cnt <= 0) {
2025                       if (file->f_flags & O_NONBLOCK) {
2026                               if (!ret)
2027                                       ret = -EAGAIN;
2028                               break;
2029                       }
2030                       schedule();
2031                       if (signal_pending(current)) {
2032                               if (!ret)
2033                                       ret = -ERESTARTSYS;
2034                               break;
2035                       }
2036                         continue;
2037                 }
2038                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2039                         if (!ret)
2040                                 ret = -EFAULT;
2041                         break;
2042                 }
2043                 ptr = (ptr + cnt) % MIDIINBUF;
2044                 spin_lock_irqsave(&s->lock, flags);
2045                 s->midi.ird = ptr;
2046                 s->midi.icnt -= cnt;
2047                 spin_unlock_irqrestore(&s->lock, flags);
2048                 count -= cnt;
2049                 buffer += cnt;
2050                 ret += cnt;
2051                 break;
2052         }
2053         __set_current_state(TASK_RUNNING);
2054         remove_wait_queue(&s->midi.iwait, &wait);
2055         return ret;
2056 }
2057
2058 static ssize_t sv_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2059 {
2060         struct sv_state *s = (struct sv_state *)file->private_data;
2061         DECLARE_WAITQUEUE(wait, current);
2062         ssize_t ret;
2063         unsigned long flags;
2064         unsigned ptr;
2065         int cnt;
2066
2067         VALIDATE_STATE(s);
2068         if (ppos != &file->f_pos)
2069                 return -ESPIPE;
2070         if (!access_ok(VERIFY_READ, buffer, count))
2071                 return -EFAULT;
2072         if (count == 0)
2073                 return 0;
2074         ret = 0;
2075         add_wait_queue(&s->midi.owait, &wait);
2076         while (count > 0) {
2077                 spin_lock_irqsave(&s->lock, flags);
2078                 ptr = s->midi.owr;
2079                 cnt = MIDIOUTBUF - ptr;
2080                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2081                         cnt = MIDIOUTBUF - s->midi.ocnt;
2082                 if (cnt <= 0) {
2083                         __set_current_state(TASK_INTERRUPTIBLE);
2084                         sv_handle_midi(s);
2085                 }
2086                 spin_unlock_irqrestore(&s->lock, flags);
2087                 if (cnt > count)
2088                         cnt = count;
2089                 if (cnt <= 0) {
2090                         if (file->f_flags & O_NONBLOCK) {
2091                                 if (!ret)
2092                                         ret = -EAGAIN;
2093                                 break;
2094                         }
2095                         schedule();
2096                         if (signal_pending(current)) {
2097                                 if (!ret)
2098                                         ret = -ERESTARTSYS;
2099                                 break;
2100                         }
2101                         continue;
2102                 }
2103                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2104                         if (!ret)
2105                                 ret = -EFAULT;
2106                         break;
2107                 }
2108                 ptr = (ptr + cnt) % MIDIOUTBUF;
2109                 spin_lock_irqsave(&s->lock, flags);
2110                 s->midi.owr = ptr;
2111                 s->midi.ocnt += cnt;
2112                 spin_unlock_irqrestore(&s->lock, flags);
2113                 count -= cnt;
2114                 buffer += cnt;
2115                 ret += cnt;
2116                 spin_lock_irqsave(&s->lock, flags);
2117                 sv_handle_midi(s);
2118                 spin_unlock_irqrestore(&s->lock, flags);
2119         }
2120         __set_current_state(TASK_RUNNING);
2121         remove_wait_queue(&s->midi.owait, &wait);
2122         return ret;
2123 }
2124
2125 /* No kernel lock - we have our own spinlock */
2126 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
2127 {
2128         struct sv_state *s = (struct sv_state *)file->private_data;
2129         unsigned long flags;
2130         unsigned int mask = 0;
2131
2132         VALIDATE_STATE(s);
2133         if (file->f_mode & FMODE_WRITE)
2134                 poll_wait(file, &s->midi.owait, wait);
2135         if (file->f_mode & FMODE_READ)
2136                 poll_wait(file, &s->midi.iwait, wait);
2137         spin_lock_irqsave(&s->lock, flags);
2138         if (file->f_mode & FMODE_READ) {
2139                 if (s->midi.icnt > 0)
2140                         mask |= POLLIN | POLLRDNORM;
2141         }
2142         if (file->f_mode & FMODE_WRITE) {
2143                 if (s->midi.ocnt < MIDIOUTBUF)
2144                         mask |= POLLOUT | POLLWRNORM;
2145         }
2146         spin_unlock_irqrestore(&s->lock, flags);
2147         return mask;
2148 }
2149
2150 static int sv_midi_open(struct inode *inode, struct file *file)
2151 {
2152         int minor = iminor(inode);
2153         DECLARE_WAITQUEUE(wait, current);
2154         unsigned long flags;
2155         struct list_head *list;
2156         struct sv_state *s;
2157
2158         for (list = devs.next; ; list = list->next) {
2159                 if (list == &devs)
2160                         return -ENODEV;
2161                 s = list_entry(list, struct sv_state, devs);
2162                 if (s->dev_midi == minor)
2163                         break;
2164         }
2165         VALIDATE_STATE(s);
2166         file->private_data = s;
2167         /* wait for device to become free */
2168         down(&s->open_sem);
2169         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2170                 if (file->f_flags & O_NONBLOCK) {
2171                         up(&s->open_sem);
2172                         return -EBUSY;
2173                 }
2174                 add_wait_queue(&s->open_wait, &wait);
2175                 __set_current_state(TASK_INTERRUPTIBLE);
2176                 up(&s->open_sem);
2177                 schedule();
2178                 remove_wait_queue(&s->open_wait, &wait);
2179                 set_current_state(TASK_RUNNING);
2180                 if (signal_pending(current))
2181                         return -ERESTARTSYS;
2182                 down(&s->open_sem);
2183         }
2184         spin_lock_irqsave(&s->lock, flags);
2185         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2186                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2187                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2188                 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
2189                 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2190                 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
2191                 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
2192                 outb(0xff, s->iomidi+1); /* reset command */
2193                 outb(0x3f, s->iomidi+1); /* uart command */
2194                 if (!(inb(s->iomidi+1) & 0x80))
2195                         inb(s->iomidi);
2196                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2197                 init_timer(&s->midi.timer);
2198                 s->midi.timer.expires = jiffies+1;
2199                 s->midi.timer.data = (unsigned long)s;
2200                 s->midi.timer.function = sv_midi_timer;
2201                 add_timer(&s->midi.timer);
2202         }
2203         if (file->f_mode & FMODE_READ) {
2204                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2205         }
2206         if (file->f_mode & FMODE_WRITE) {
2207                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2208         }
2209         spin_unlock_irqrestore(&s->lock, flags);
2210         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2211         up(&s->open_sem);
2212         return 0;
2213 }
2214
2215 static int sv_midi_release(struct inode *inode, struct file *file)
2216 {
2217         struct sv_state *s = (struct sv_state *)file->private_data;
2218         DECLARE_WAITQUEUE(wait, current);
2219         unsigned long flags;
2220         unsigned count, tmo;
2221
2222         VALIDATE_STATE(s);
2223
2224         lock_kernel();
2225         if (file->f_mode & FMODE_WRITE) {
2226                 add_wait_queue(&s->midi.owait, &wait);
2227                 for (;;) {
2228                         __set_current_state(TASK_INTERRUPTIBLE);
2229                         spin_lock_irqsave(&s->lock, flags);
2230                         count = s->midi.ocnt;
2231                         spin_unlock_irqrestore(&s->lock, flags);
2232                         if (count <= 0)
2233                                 break;
2234                         if (signal_pending(current))
2235                                 break;
2236                         if (file->f_flags & O_NONBLOCK) {
2237                                 remove_wait_queue(&s->midi.owait, &wait);
2238                                 set_current_state(TASK_RUNNING);
2239                                 unlock_kernel();
2240                                 return -EBUSY;
2241                         }
2242                         tmo = (count * HZ) / 3100;
2243                         if (!schedule_timeout(tmo ? : 1) && tmo)
2244                                 printk(KERN_DEBUG "sv: midi timed out??\n");
2245                 }
2246                 remove_wait_queue(&s->midi.owait, &wait);
2247                 set_current_state(TASK_RUNNING);
2248         }
2249         down(&s->open_sem);
2250         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2251         spin_lock_irqsave(&s->lock, flags);
2252         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2253                 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2254                 del_timer(&s->midi.timer);
2255         }
2256         spin_unlock_irqrestore(&s->lock, flags);
2257         wake_up(&s->open_wait);
2258         up(&s->open_sem);
2259         unlock_kernel();
2260         return 0;
2261 }
2262
2263 static /*const*/ struct file_operations sv_midi_fops = {
2264         .owner          = THIS_MODULE,
2265         .llseek         = no_llseek,
2266         .read           = sv_midi_read,
2267         .write          = sv_midi_write,
2268         .poll           = sv_midi_poll,
2269         .open           = sv_midi_open,
2270         .release        = sv_midi_release,
2271 };
2272
2273 /* --------------------------------------------------------------------- */
2274
2275 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2276 {
2277         static const unsigned char op_offset[18] = {
2278                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2279                 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2280                 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2281         };
2282         struct sv_state *s = (struct sv_state *)file->private_data;
2283         struct dm_fm_voice v;
2284         struct dm_fm_note n;
2285         struct dm_fm_params p;
2286         unsigned int io;
2287         unsigned int regb;
2288
2289         switch (cmd) {
2290         case FM_IOCTL_RESET:
2291                 for (regb = 0xb0; regb < 0xb9; regb++) {
2292                         outb(regb, s->iosynth);
2293                         outb(0, s->iosynth+1);
2294                         outb(regb, s->iosynth+2);
2295                         outb(0, s->iosynth+3);
2296                 }
2297                 return 0;
2298
2299         case FM_IOCTL_PLAY_NOTE:
2300                 if (copy_from_user(&n, (void *)arg, sizeof(n)))
2301                         return -EFAULT;
2302                 if (n.voice >= 18)
2303                         return -EINVAL;
2304                 if (n.voice >= 9) {
2305                         regb = n.voice - 9;
2306                         io = s->iosynth+2;
2307                 } else {
2308                         regb = n.voice;
2309                         io = s->iosynth;
2310                 }
2311                 outb(0xa0 + regb, io);
2312                 outb(n.fnum & 0xff, io+1);
2313                 outb(0xb0 + regb, io);
2314                 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2315                 return 0;
2316
2317         case FM_IOCTL_SET_VOICE:
2318                 if (copy_from_user(&v, (void *)arg, sizeof(v)))
2319                         return -EFAULT;
2320                 if (v.voice >= 18)
2321                         return -EINVAL;
2322                 regb = op_offset[v.voice];
2323                 io = s->iosynth + ((v.op & 1) << 1);
2324                 outb(0x20 + regb, io);
2325                 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2326                      ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2327                 outb(0x40 + regb, io);
2328                 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2329                 outb(0x60 + regb, io);
2330                 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2331                 outb(0x80 + regb, io);
2332                 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2333                 outb(0xe0 + regb, io);
2334                 outb(v.waveform & 0x7, io+1);
2335                 if (n.voice >= 9) {
2336                         regb = n.voice - 9;
2337                         io = s->iosynth+2;
2338                 } else {
2339                         regb = n.voice;
2340                         io = s->iosynth;
2341                 }
2342                 outb(0xc0 + regb, io);
2343                 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2344                      (v.connection & 1), io+1);
2345                 return 0;
2346
2347         case FM_IOCTL_SET_PARAMS:
2348                 if (copy_from_user(&p, (void *)arg, sizeof(p)))
2349                         return -EFAULT;
2350                 outb(0x08, s->iosynth);
2351                 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2352                 outb(0xbd, s->iosynth);
2353                 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2354                      ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2355                 return 0;
2356
2357         case FM_IOCTL_SET_OPL:
2358                 outb(4, s->iosynth+2);
2359                 outb(arg, s->iosynth+3);
2360                 return 0;
2361
2362         case FM_IOCTL_SET_MODE:
2363                 outb(5, s->iosynth+2);
2364                 outb(arg & 1, s->iosynth+3);
2365                 return 0;
2366
2367         default:
2368                 return -EINVAL;
2369         }
2370 }
2371
2372 static int sv_dmfm_open(struct inode *inode, struct file *file)
2373 {
2374         int minor = iminor(inode);
2375         DECLARE_WAITQUEUE(wait, current);
2376         struct list_head *list;
2377         struct sv_state *s;
2378
2379         for (list = devs.next; ; list = list->next) {
2380                 if (list == &devs)
2381                         return -ENODEV;
2382                 s = list_entry(list, struct sv_state, devs);
2383                 if (s->dev_dmfm == minor)
2384                         break;
2385         }
2386         VALIDATE_STATE(s);
2387         file->private_data = s;
2388         /* wait for device to become free */
2389         down(&s->open_sem);
2390         while (s->open_mode & FMODE_DMFM) {
2391                 if (file->f_flags & O_NONBLOCK) {
2392                         up(&s->open_sem);
2393                         return -EBUSY;
2394                 }
2395                 add_wait_queue(&s->open_wait, &wait);
2396                 __set_current_state(TASK_INTERRUPTIBLE);
2397                 up(&s->open_sem);
2398                 schedule();
2399                 remove_wait_queue(&s->open_wait, &wait);
2400                 set_current_state(TASK_RUNNING);
2401                 if (signal_pending(current))
2402                         return -ERESTARTSYS;
2403                 down(&s->open_sem);
2404         }
2405         /* init the stuff */
2406         outb(1, s->iosynth);
2407         outb(0x20, s->iosynth+1); /* enable waveforms */
2408         outb(4, s->iosynth+2);
2409         outb(0, s->iosynth+3);  /* no 4op enabled */
2410         outb(5, s->iosynth+2);
2411         outb(1, s->iosynth+3);  /* enable OPL3 */
2412         s->open_mode |= FMODE_DMFM;
2413         up(&s->open_sem);
2414         return 0;
2415 }
2416
2417 static int sv_dmfm_release(struct inode *inode, struct file *file)
2418 {
2419         struct sv_state *s = (struct sv_state *)file->private_data;
2420         unsigned int regb;
2421
2422         VALIDATE_STATE(s);
2423         lock_kernel();
2424         down(&s->open_sem);
2425         s->open_mode &= ~FMODE_DMFM;
2426         for (regb = 0xb0; regb < 0xb9; regb++) {
2427                 outb(regb, s->iosynth);
2428                 outb(0, s->iosynth+1);
2429                 outb(regb, s->iosynth+2);
2430                 outb(0, s->iosynth+3);
2431         }
2432         wake_up(&s->open_wait);
2433         up(&s->open_sem);
2434         unlock_kernel();
2435         return 0;
2436 }
2437
2438 static /*const*/ struct file_operations sv_dmfm_fops = {
2439         .owner          = THIS_MODULE,
2440         .llseek         = no_llseek,
2441         .ioctl          = sv_dmfm_ioctl,
2442         .open           = sv_dmfm_open,
2443         .release        = sv_dmfm_release,
2444 };
2445
2446 /* --------------------------------------------------------------------- */
2447
2448 /* maximum number of devices; only used for command line params */
2449 #define NR_DEVICE 5
2450
2451 static int reverb[NR_DEVICE];
2452
2453 #if 0
2454 static int wavetable[NR_DEVICE];
2455 #endif
2456
2457 static unsigned int devindex;
2458
2459 MODULE_PARM(reverb, "1-" __MODULE_STRING(NR_DEVICE) "i");
2460 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2461 #if 0
2462 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2463 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2464 #endif
2465
2466 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2467 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2468 MODULE_LICENSE("GPL");
2469
2470
2471 /* --------------------------------------------------------------------- */
2472
2473 static struct initvol {
2474         int mixch;
2475         int vol;
2476 } initvol[] __initdata = {
2477         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2478         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2479         { SOUND_MIXER_WRITE_CD, 0x4040 },
2480         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2481         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2482         { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2483         { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2484         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2485         { SOUND_MIXER_WRITE_PCM, 0x4040 }
2486 };
2487
2488 #define RSRCISIOREGION(dev,num) (pci_resource_start((dev), (num)) != 0 && \
2489                                  (pci_resource_flags((dev), (num)) & IORESOURCE_IO))
2490
2491 static int __devinit sv_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2492 {
2493         static char __initdata sv_ddma_name[] = "S3 Inc. SonicVibes DDMA Controller";
2494         struct sv_state *s;
2495         mm_segment_t fs;
2496         int i, val, ret;
2497         char *ddmaname;
2498         unsigned ddmanamelen;
2499
2500         if ((ret=pci_enable_device(pcidev)))
2501                 return ret;
2502
2503         if (!RSRCISIOREGION(pcidev, RESOURCE_SB) ||
2504             !RSRCISIOREGION(pcidev, RESOURCE_ENH) ||
2505             !RSRCISIOREGION(pcidev, RESOURCE_SYNTH) ||
2506             !RSRCISIOREGION(pcidev, RESOURCE_MIDI) ||
2507             !RSRCISIOREGION(pcidev, RESOURCE_GAME))
2508                 return -ENODEV;
2509         if (pcidev->irq == 0)
2510                 return -ENODEV;
2511         if (pci_set_dma_mask(pcidev, 0x00ffffff)) {
2512                 printk(KERN_WARNING "sonicvibes: architecture does not support 24bit PCI busmaster DMA\n");
2513                 return -ENODEV;
2514         }
2515         /* try to allocate a DDMA resource if not already available */
2516         if (!RSRCISIOREGION(pcidev, RESOURCE_DDMA)) {
2517                 pcidev->resource[RESOURCE_DDMA].start = 0;
2518                 pcidev->resource[RESOURCE_DDMA].end = 2*SV_EXTENT_DMA-1;
2519                 pcidev->resource[RESOURCE_DDMA].flags = PCI_BASE_ADDRESS_SPACE_IO | IORESOURCE_IO;
2520                 ddmanamelen = strlen(sv_ddma_name)+1;
2521                 if (!(ddmaname = kmalloc(ddmanamelen, GFP_KERNEL)))
2522                         return -1;
2523                 memcpy(ddmaname, sv_ddma_name, ddmanamelen);
2524                 pcidev->resource[RESOURCE_DDMA].name = ddmaname;
2525                 if (pci_assign_resource(pcidev, RESOURCE_DDMA)) {
2526                         pcidev->resource[RESOURCE_DDMA].name = NULL;
2527                         kfree(ddmaname);
2528                         printk(KERN_ERR "sv: cannot allocate DDMA controller io ports\n");
2529                         return -EBUSY;
2530                 }
2531         }
2532         if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2533                 printk(KERN_WARNING "sv: out of memory\n");
2534                 return -ENOMEM;
2535         }
2536         memset(s, 0, sizeof(struct sv_state));
2537         init_waitqueue_head(&s->dma_adc.wait);
2538         init_waitqueue_head(&s->dma_dac.wait);
2539         init_waitqueue_head(&s->open_wait);
2540         init_waitqueue_head(&s->midi.iwait);
2541         init_waitqueue_head(&s->midi.owait);
2542         init_MUTEX(&s->open_sem);
2543         spin_lock_init(&s->lock);
2544         s->magic = SV_MAGIC;
2545         s->dev = pcidev;
2546         s->iosb = pci_resource_start(pcidev, RESOURCE_SB);
2547         s->ioenh = pci_resource_start(pcidev, RESOURCE_ENH);
2548         s->iosynth = pci_resource_start(pcidev, RESOURCE_SYNTH);
2549         s->iomidi = pci_resource_start(pcidev, RESOURCE_MIDI);
2550         s->iodmaa = pci_resource_start(pcidev, RESOURCE_DDMA);
2551         s->iodmac = pci_resource_start(pcidev, RESOURCE_DDMA) + SV_EXTENT_DMA;
2552         s->gameport.io = pci_resource_start(pcidev, RESOURCE_GAME);
2553         pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9);  /* enable and use extended mode */
2554         pci_write_config_dword(pcidev, 0x48, s->iodmac | 9);  /* enable */
2555         printk(KERN_DEBUG "sv: io ports: %#lx %#lx %#lx %#lx %#x %#x %#x\n",
2556                s->iosb, s->ioenh, s->iosynth, s->iomidi, s->gameport.io, s->iodmaa, s->iodmac);
2557         s->irq = pcidev->irq;
2558
2559         /* hack */
2560         pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12);  /* wavetable base address */
2561
2562         ret = -EBUSY;
2563         if (!request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM")) {
2564                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2565                 goto err_region5;
2566         }
2567         if (!request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA")) {
2568                 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2569                 goto err_region4;
2570         }
2571         if (!request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC")) {
2572                 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2573                 goto err_region3;
2574         }
2575         if (!request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi")) {
2576                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2577                 goto err_region2;
2578         }
2579         if (!request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth")) {
2580                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2581                 goto err_region1;
2582         }
2583         if (s->gameport.io && !request_region(s->gameport.io, SV_EXTENT_GAME, "ESS Solo1")) {
2584                 printk(KERN_ERR "sv: gameport io ports in use\n");
2585                 s->gameport.io = 0;
2586         }
2587         /* initialize codec registers */
2588         outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2589         udelay(50);
2590         outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2591         udelay(50);
2592         outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2593              | (reverb[devindex] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2594         inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2595         wrindir(s, SV_CIDRIVECONTROL, 0);  /* drive current 16mA */
2596         wrindir(s, SV_CIENABLE, s->enable = 0);  /* disable DMAA and DMAC */
2597         outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2598         /* outb(0xff, s->iodmaa + SV_DMA_RESET); */
2599         /* outb(0xff, s->iodmac + SV_DMA_RESET); */
2600         inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2601         wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2602         wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2603         wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2604         setpll(s, SV_CIADCPLLM, 8000);
2605         wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2606         wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2607         wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2608         wrindir(s, SV_CIADCOUTPUT, 0);
2609         /* request irq */
2610         if ((ret=request_irq(s->irq,sv_interrupt,SA_SHIRQ,"S3 SonicVibes",s))) {
2611                 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2612                 goto err_irq;
2613         }
2614         printk(KERN_INFO "sv: found adapter at io %#lx irq %u dmaa %#06x dmac %#06x revision %u\n",
2615                s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2616         /* register devices */
2617         if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0) {
2618                 ret = s->dev_audio;
2619                 goto err_dev1;
2620         }
2621         if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0) {
2622                 ret = s->dev_mixer;
2623                 goto err_dev2;
2624         }
2625         if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0) {
2626                 ret = s->dev_midi;
2627                 goto err_dev3;
2628         }
2629         if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0) {
2630                 ret = s->dev_dmfm;
2631                 goto err_dev4;
2632         }
2633         pci_set_master(pcidev);  /* enable bus mastering */
2634         /* initialize the chips */
2635         fs = get_fs();
2636         set_fs(KERNEL_DS);
2637         val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2638         mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2639         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2640                 val = initvol[i].vol;
2641                 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2642         }
2643         set_fs(fs);
2644         /* register gameport */
2645         gameport_register_port(&s->gameport);
2646         /* store it in the driver field */
2647         pci_set_drvdata(pcidev, s);
2648         /* put it into driver list */
2649         list_add_tail(&s->devs, &devs);
2650         /* increment devindex */
2651         if (devindex < NR_DEVICE-1)
2652                 devindex++;
2653         return 0;
2654
2655  err_dev4:
2656         unregister_sound_midi(s->dev_midi);
2657  err_dev3:
2658         unregister_sound_mixer(s->dev_mixer);
2659  err_dev2:
2660         unregister_sound_dsp(s->dev_audio);
2661  err_dev1:
2662         printk(KERN_ERR "sv: cannot register misc device\n");
2663         free_irq(s->irq, s);
2664  err_irq:
2665         if (s->gameport.io)
2666                 release_region(s->gameport.io, SV_EXTENT_GAME);
2667         release_region(s->iosynth, SV_EXTENT_SYNTH);
2668  err_region1:
2669         release_region(s->iomidi, SV_EXTENT_MIDI);
2670  err_region2:
2671         release_region(s->iodmac, SV_EXTENT_DMA);
2672  err_region3:
2673         release_region(s->iodmaa, SV_EXTENT_DMA);
2674  err_region4:
2675         release_region(s->ioenh, SV_EXTENT_ENH);
2676  err_region5:
2677         kfree(s);
2678         return ret;
2679 }
2680
2681 static void __devexit sv_remove(struct pci_dev *dev)
2682 {
2683         struct sv_state *s = pci_get_drvdata(dev);
2684
2685         if (!s)
2686                 return;
2687         list_del(&s->devs);
2688         outb(~0, s->ioenh + SV_CODEC_INTMASK);  /* disable ints */
2689         synchronize_irq(s->irq);
2690         inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2691         wrindir(s, SV_CIENABLE, 0);     /* disable DMAA and DMAC */
2692         /*outb(0, s->iodmaa + SV_DMA_RESET);*/
2693         /*outb(0, s->iodmac + SV_DMA_RESET);*/
2694         free_irq(s->irq, s);
2695         if (s->gameport.io) {
2696                 gameport_unregister_port(&s->gameport);
2697                 release_region(s->gameport.io, SV_EXTENT_GAME);
2698         }
2699         release_region(s->iodmac, SV_EXTENT_DMA);
2700         release_region(s->iodmaa, SV_EXTENT_DMA);
2701         release_region(s->ioenh, SV_EXTENT_ENH);
2702         release_region(s->iomidi, SV_EXTENT_MIDI);
2703         release_region(s->iosynth, SV_EXTENT_SYNTH);
2704         unregister_sound_dsp(s->dev_audio);
2705         unregister_sound_mixer(s->dev_mixer);
2706         unregister_sound_midi(s->dev_midi);
2707         unregister_sound_special(s->dev_dmfm);
2708         kfree(s);
2709         pci_set_drvdata(dev, NULL);
2710 }
2711
2712 static struct pci_device_id id_table[] = {
2713        { PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2714        { 0, }
2715 };
2716
2717 MODULE_DEVICE_TABLE(pci, id_table);
2718
2719 static struct pci_driver sv_driver = {
2720        .name            = "sonicvibes",
2721        .id_table        = id_table,
2722        .probe           = sv_probe,
2723        .remove          = __devexit_p(sv_remove),
2724 };
2725
2726 static int __init init_sonicvibes(void)
2727 {
2728         printk(KERN_INFO "sv: version v0.31 time " __TIME__ " " __DATE__ "\n");
2729 #if 0
2730         if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2731                 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2732 #endif
2733         return pci_module_init(&sv_driver);
2734 }
2735
2736 static void __exit cleanup_sonicvibes(void)
2737 {
2738         printk(KERN_INFO "sv: unloading\n");
2739         pci_unregister_driver(&sv_driver);
2740         if (wavetable_mem)
2741                 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2742 }
2743
2744 module_init(init_sonicvibes);
2745 module_exit(cleanup_sonicvibes);
2746
2747 /* --------------------------------------------------------------------- */
2748
2749 #ifndef MODULE
2750
2751 /* format is: sonicvibes=[reverb] sonicvibesdmaio=dmaioaddr */
2752
2753 static int __init sonicvibes_setup(char *str)
2754 {
2755         static unsigned __initdata nr_dev = 0;
2756
2757         if (nr_dev >= NR_DEVICE)
2758                 return 0;
2759 #if 0
2760         if (get_option(&str, &reverb[nr_dev]) == 2)
2761                 (void)get_option(&str, &wavetable[nr_dev]);
2762 #else
2763         (void)get_option(&str, &reverb[nr_dev]);
2764 #endif
2765
2766         nr_dev++;
2767         return 1;
2768 }
2769
2770 __setup("sonicvibes=", sonicvibes_setup);
2771
2772 #endif /* MODULE */