sound/pci/azt3328.c

   1 /*
   2  *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
   3  *  Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
   4  *
   5  *  Framework borrowed from Bart Hartgers's als4000.c.
   6  *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
   7  *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
   8  *  Other versions are:
   9  *  PCI168 A(W), sub ID 1800
  10  *  PCI168 A/AP, sub ID 8000
  11  *  Please give me feedback in case you try my driver with one of these!!
  12  *
  13  * GPL LICENSE
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or
  17  *  (at your option) any later version.
  18  *
  19  *  This program is distributed in the hope that it will be useful,
  20  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  *  GNU General Public License for more details.
  23
  24  *  You should have received a copy of the GNU General Public License
  25  *  along with this program; if not, write to the Free Software
  26  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  27  *
  28  * NOTES
  29  *  Since Aztech does not provide any chipset documentation,
  30  *  even on repeated request to various addresses,
  31  *  and the answer that was finally given was negative
  32  *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
  33  *  in the first place >:-P}),
  34  *  I was forced to base this driver on reverse engineering
  35  *  (3 weeks' worth of evenings filled with driver work).
  36  *  (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
  37  *
  38  *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  39  *  for compatibility reasons) has the following features:
  40  *
  41  *  - builtin AC97 conformant codec (SNR over 80dB)
  42  *    (really AC97 compliant?? I really doubt it when looking
  43  *    at the mixer register layout)
  44  *  - builtin genuine OPL3
  45  *  - full duplex 16bit playback/record at independent sampling rate
  46  *  - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
  47  *  - game port (legacy address support)
  48  *  - built-in General DirectX timer having a 20 bits counter
  49  *    with 1us resolution (FIXME: where is it?)
  50  *  - I2S serial port for external DAC
  51  *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  52  *  - supports hardware volume control
  53  *  - single chip low cost solution (128 pin QFP)
  54  *  - supports programmable Sub-vendor and Sub-system ID
  55  *    required for Microsoft's logo compliance (FIXME: where?)
  56  *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  57  *
  58  *  Certain PCI versions of this card are susceptible to DMA traffic underruns
  59  *  in some systems (resulting in sound crackling/clicking/popping),
  60  *  probably because they don't have a DMA FIFO buffer or so.
  61  *  Overview (PCI ID/PCI subID/PCI rev.):
  62  *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
  63  *  - unknown performance: 0x50DC/0x1801/10
  64  *
  65  *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
  66  *  supposed to be very fast and supposed to get rid of crackling much
  67  *  better than a VIA, yet ironically I still get crackling, like many other
  68  *  people with the same chipset.
  69  *  Possible remedies:
  70  *  - plug card into a different PCI slot, preferrably one that isn't shared
  71  *    too much (this helps a lot, but not completely!)
  72  *  - get rid of PCI VGA card, use AGP instead
  73  *  - upgrade or downgrade BIOS
  74  *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
  75  *    Not too helpful.
  76  *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
  77  *
  78  * BUGS
  79  *  - when Ctrl-C'ing mpg321, the playback loops a bit
  80  *    (premature DMA playback reset?)
  81  *  - full-duplex sometimes breaks (IRQ management issues?).
  82  *    Once even a spontaneous REBOOT happened!!!
  83  *
  84  * TODO
  85  *  - test MPU401 MIDI playback etc.
  86  *  - power management (CONFIG_PM). See e.g. intel8x0 or cs4281.
  87  *    This would be nice since the chip runs a bit hot, and it's *required*
  88  *    anyway for proper ACPI power management. In other words: rest
  89  *    assured that I *will* implement this very soon; as soon as Linux 2.5.x
  90  *    has power management that's bugfree enough to work properly on my desktop.
  91  *  - figure out what all unknown port bits are responsible for
  92  */
  93
  94 #include <sound/driver.h>
  95 #include <asm/io.h>
  96 #include <linux/init.h>
  97 #include <linux/pci.h>
  98 #include <linux/delay.h>
  99 #include <linux/slab.h>
 100 #include <linux/gameport.h>
 101 #include <linux/moduleparam.h>
 102 #include <sound/core.h>
 103 #include <sound/control.h>
 104 #include <sound/pcm.h>
 105 #include <sound/rawmidi.h>
 106 #include <sound/mpu401.h>
 107 #include <sound/opl3.h>
 108 #include <sound/initval.h>
 109 #include "azt3328.h"
 110
 111 MODULE_AUTHOR("Andreas Mohr <hw7oshyuv3001@sneakemail.com>");
 112 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
 113 MODULE_LICENSE("GPL");
 114 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 115
 116 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 117 #define SUPPORT_JOYSTICK 1
 118 #endif
 119
 120 #define DEBUG_MISC      0
 121 #define DEBUG_CALLS     0
 122 #define DEBUG_MIXER     0
 123 #define DEBUG_PLAY_REC  0
 124 #define DEBUG_IO        0
 125 #define MIXER_TESTING   0
 126
 127 #if DEBUG_MISC
 128 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
 129 #else
 130 #define snd_azf3328_dbgmisc(format, args...)
 131 #endif
 132
 133 #if DEBUG_CALLS
 134 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
 135 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "entering %s\n", __FUNCTION__)
 136 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "leaving %s\n", __FUNCTION__)
 137 #else
 138 #define snd_azf3328_dbgcalls(format, args...)
 139 #define snd_azf3328_dbgcallenter()
 140 #define snd_azf3328_dbgcallleave()
 141 #endif
 142
 143 #if DEBUG_MIXER
 144 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
 145 #else
 146 #define snd_azf3328_dbgmixer(format, args...)
 147 #endif
 148
 149 #if DEBUG_PLAY_REC
 150 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
 151 #else
 152 #define snd_azf3328_dbgplay(format, args...)
 153 #endif
 154
 155 #if DEBUG_IO
 156 #define snd_azf3328_dbgio(chip, where) \
 157             printk(KERN_ERR "%s: IDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", where, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS))
 158 #else
 159 #define snd_azf3328_dbgio(chip, where)
 160 #endif
 161
 162 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
 163 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 164 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 165 #ifdef SUPPORT_JOYSTICK
 166 static int joystick[SNDRV_CARDS];
 167 #endif
 168
 169 module_param_array(index, int, NULL, 0444);
 170 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
 171 module_param_array(id, charp, NULL, 0444);
 172 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
 173 module_param_array(enable, bool, NULL, 0444);
 174 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
 175 #ifdef SUPPORT_JOYSTICK
 176 module_param_array(joystick, bool, NULL, 0444);
 177 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
 178 #endif
 179
 180 typedef struct _snd_azf3328 azf3328_t;
 181
 182 struct _snd_azf3328 {
 183         int irq;
 184
 185         unsigned long codec_port;
 186         unsigned long io2_port;
 187         unsigned long mpu_port;
 188         unsigned long synth_port;
 189         unsigned long mixer_port;
 190
 191 #ifdef SUPPORT_JOYSTICK
 192         struct gameport gameport;
 193         struct resource *res_joystick;
 194 #endif
 195
 196         struct pci_dev *pci;
 197         snd_card_t *card;
 198
 199         snd_pcm_t *pcm;
 200         snd_rawmidi_t *rmidi;
 201         snd_pcm_substream_t *playback_substream;
 202         snd_pcm_substream_t *capture_substream;
 203         unsigned int is_playing;
 204         unsigned int is_recording;
 205
 206         spinlock_t reg_lock;
 207 };
 208
 209 static struct pci_device_id snd_azf3328_ids[] = {
 210         { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
 211         { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
 212         { 0, }
 213 };
 214
 215 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
 216
 217 static inline void snd_azf3328_io2_write(azf3328_t *chip, int reg, unsigned char value)
 218 {
 219         outb(value, chip->io2_port + reg);
 220 }
 221
 222 static inline unsigned char snd_azf3328_io2_read(azf3328_t *chip, int reg)
 223 {
 224         return inb(chip->io2_port + reg);
 225 }
 226
 227 static void snd_azf3328_mixer_write(azf3328_t *chip, int reg, unsigned long value, int type)
 228 {
 229         switch(type) {
 230         case WORD_VALUE:
 231                 outw(value, chip->mixer_port + reg);
 232                 break;
 233         case DWORD_VALUE:
 234                 outl(value, chip->mixer_port + reg);
 235                 break;
 236         case BYTE_VALUE:
 237                 outb(value, chip->mixer_port + reg);
 238                 break;
 239         }
 240 }
 241
 242 static void snd_azf3328_mixer_set_mute(azf3328_t *chip, int reg, int do_mute)
 243 {
 244         unsigned char oldval;
 245
 246         /* the mute bit is on the *second* (i.e. right) register of a
 247          * left/right channel setting */
 248         oldval = inb(chip->mixer_port + reg + 1);
 249         if (do_mute)
 250                 oldval |= 0x80;
 251         else
 252                 oldval &= ~0x80;
 253         outb(oldval, chip->mixer_port + reg + 1);
 254 }
 255
 256 static void snd_azf3328_mixer_write_volume_gradually(azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
 257 {
 258         unsigned char curr_vol_left = 0, curr_vol_right = 0;
 259         int left_done = 0, right_done = 0;
 260
 261         snd_azf3328_dbgcallenter();
 262         if (chan_sel & SET_CHAN_LEFT)
 263                 curr_vol_left  = inb(chip->mixer_port + reg + 1);
 264         else
 265                 left_done = 1;
 266         if (chan_sel & SET_CHAN_RIGHT)
 267                 curr_vol_right = inb(chip->mixer_port + reg + 0);
 268         else
 269                 right_done = 1;
 270
 271         /* take care of muting flag (0x80) contained in left channel */
 272         if (curr_vol_left & 0x80)
 273                 dst_vol_left |= 0x80;
 274         else
 275                 dst_vol_left &= ~0x80;
 276
 277         do
 278         {
 279                 if (!left_done)
 280                 {
 281                         if (curr_vol_left > dst_vol_left)
 282                                 curr_vol_left--;
 283                         else
 284                         if (curr_vol_left < dst_vol_left)
 285                                 curr_vol_left++;
 286                         else
 287                             left_done = 1;
 288                         outb(curr_vol_left, chip->mixer_port + reg + 1);
 289                 }
 290                 if (!right_done)
 291                 {
 292                         if (curr_vol_right > dst_vol_right)
 293                                 curr_vol_right--;
 294                         else
 295                         if (curr_vol_right < dst_vol_right)
 296                                 curr_vol_right++;
 297                         else
 298                             right_done = 1;
 299                         /* during volume change, the right channel is crackling
 300                          * somewhat more than the left channel, unfortunately.
 301                          * This seems to be a hardware issue. */
 302                         outb(curr_vol_right, chip->mixer_port + reg + 0);
 303                 }
 304                 if (delay)
 305                         mdelay(delay);
 306         }
 307         while ((!left_done) || (!right_done));
 308         snd_azf3328_dbgcallleave();
 309 }
 310
 311 /*
 312  * general mixer element
 313  */
 314 typedef struct azf3328_mixer_reg {
 315         unsigned int reg;
 316         unsigned int lchan_shift, rchan_shift;
 317         unsigned int mask;
 318         unsigned int invert: 1;
 319         unsigned int stereo: 1;
 320         unsigned int enum_c: 4;
 321 } azf3328_mixer_reg_t;
 322
 323 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
 324  ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | (mask << 16) | (invert << 24) | (stereo << 25) | (enum_c << 26))
 325
 326 static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
 327 {
 328         r->reg = val & 0xff;
 329         r->lchan_shift = (val >> 8) & 0x0f;
 330         r->rchan_shift = (val >> 12) & 0x0f;
 331         r->mask = (val >> 16) & 0xff;
 332         r->invert = (val >> 24) & 1;
 333         r->stereo = (val >> 25) & 1;
 334         r->enum_c = (val >> 26) & 0x0f;
 335 }
 336
 337 /*
 338  * mixer switches/volumes
 339  */
 340
 341 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
 342 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 343   .info = snd_azf3328_info_mixer, \
 344   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 345   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
 346 }
 347
 348 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
 349 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 350   .info = snd_azf3328_info_mixer, \
 351   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 352   .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
 353 }
 354
 355 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
 356 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 357   .info = snd_azf3328_info_mixer, \
 358   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 359   .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
 360 }
 361
 362 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
 363 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 364   .info = snd_azf3328_info_mixer, \
 365   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 366   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
 367 }
 368
 369 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
 370 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 371   .info = snd_azf3328_info_mixer_enum, \
 372   .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
 373   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
 374 }
 375
 376 static int snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
 377 {
 378         azf3328_mixer_reg_t reg;
 379
 380         snd_azf3328_dbgcallenter();
 381         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 382         uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 383         uinfo->count = reg.stereo + 1;
 384         uinfo->value.integer.min = 0;
 385         uinfo->value.integer.max = reg.mask;
 386         snd_azf3328_dbgcallleave();
 387         return 0;
 388 }
 389
 390 static int snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 391 {
 392         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 393         azf3328_mixer_reg_t reg;
 394         unsigned int oreg, val;
 395
 396         snd_azf3328_dbgcallenter();
 397         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 398
 399         oreg = inw(chip->mixer_port + reg.reg);
 400         val = (oreg >> reg.lchan_shift) & reg.mask;
 401         if (reg.invert)
 402                 val = reg.mask - val;
 403         ucontrol->value.integer.value[0] = val;
 404         if (reg.stereo) {
 405                 val = (oreg >> reg.rchan_shift) & reg.mask;
 406                 if (reg.invert)
 407                         val = reg.mask - val;
 408                 ucontrol->value.integer.value[1] = val;
 409         }
 410         snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx (shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", reg.reg, oreg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
 411         snd_azf3328_dbgcallleave();
 412         return 0;
 413 }
 414
 415 static int snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 416 {
 417         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 418         azf3328_mixer_reg_t reg;
 419         unsigned int oreg, nreg, val;
 420
 421         snd_azf3328_dbgcallenter();
 422         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 423         oreg = inw(chip->mixer_port + reg.reg);
 424         val = ucontrol->value.integer.value[0] & reg.mask;
 425         if (reg.invert)
 426                 val = reg.mask - val;
 427         nreg = oreg & ~(reg.mask << reg.lchan_shift);
 428         nreg |= (val << reg.lchan_shift);
 429         if (reg.stereo) {
 430                 val = ucontrol->value.integer.value[1] & reg.mask;
 431                 if (reg.invert)
 432                         val = reg.mask - val;
 433                 nreg &= ~(reg.mask << reg.rchan_shift);
 434                 nreg |= (val << reg.rchan_shift);
 435         }
 436         if (reg.mask >= 0x07) /* it's a volume control, so better take care */
 437                 snd_azf3328_mixer_write_volume_gradually(chip, reg.reg, nreg >> 8, nreg & 0xff, SET_CHAN_LEFT|SET_CHAN_RIGHT, 0); /* just set both channels, doesn't matter */
 438         else
 439                 outw(nreg, chip->mixer_port + reg.reg);
 440
 441         snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], oreg, reg.lchan_shift, reg.rchan_shift, nreg, inw(chip->mixer_port + reg.reg));
 442         snd_azf3328_dbgcallleave();
 443         return (nreg != oreg);
 444 }
 445
 446 static int snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 447 {
 448         azf3328_mixer_reg_t reg;
 449         static char *texts1[2] = { "ModemOut1", "ModemOut2" };
 450         static char *texts2[2] = { "MonoSelectSource1", "MonoSelectSource2" };
 451         static char *texts3[8] = {
 452                 "Mic", "CD", "Video", "Aux", "Line",
 453                 "Mix", "Mix Mono", "Phone"
 454         };
 455
 456         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 457         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 458         uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
 459         uinfo->value.enumerated.items = reg.enum_c;
 460         if (uinfo->value.enumerated.item > reg.enum_c - 1U)
 461                 uinfo->value.enumerated.item = reg.enum_c - 1U;
 462         if (reg.reg == IDX_MIXER_ADVCTL2)
 463         {
 464                 if (reg.lchan_shift == 8) /* modem out sel */
 465                         strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
 466                 else /* mono sel source */
 467                         strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
 468         }
 469         else
 470                 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
 471 );
 472         return 0;
 473 }
 474
 475 static int snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 476 {
 477         azf3328_mixer_reg_t reg;
 478         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 479         unsigned short val;
 480
 481         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 482         val = inw(chip->mixer_port + reg.reg);
 483         if (reg.reg == IDX_MIXER_REC_SELECT)
 484         {
 485                 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
 486                 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
 487         }
 488         else
 489                 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
 490         snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], reg.lchan_shift, reg.enum_c);
 491         return 0;
 492 }
 493
 494 static int snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 495 {
 496         azf3328_mixer_reg_t reg;
 497         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 498         unsigned int oreg, nreg, val;
 499
 500         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 501         oreg = inw(chip->mixer_port + reg.reg);
 502         val = oreg;
 503         if (reg.reg == IDX_MIXER_REC_SELECT)
 504         {
 505                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
 506                 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
 507                         return -EINVAL;
 508                 val = (ucontrol->value.enumerated.item[0] << 8) |
 509                       (ucontrol->value.enumerated.item[1] << 0);
 510         }
 511         else
 512         {
 513                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
 514                         return -EINVAL;
 515                 val &= ~((reg.enum_c - 1) << reg.lchan_shift);
 516                 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
 517         }
 518         outw(val, chip->mixer_port + reg.reg);
 519         nreg = val;
 520
 521         snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
 522         return (nreg != oreg);
 523 }
 524
 525 static snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
 526         AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
 527         AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
 528         AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
 529         AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
 530         AZF3328_MIXER_SWITCH("Wave Playback 3D Bypass", IDX_MIXER_ADVCTL2, 7, 1),
 531         AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
 532         AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
 533         AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
 534         AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
 535         AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
 536         AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
 537         AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
 538         AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
 539         AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
 540         AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
 541         AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
 542         AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
 543         AZF3328_MIXER_SWITCH("PCBeep Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
 544         AZF3328_MIXER_VOL_SPECIAL("PCBeep Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
 545         AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
 546         AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
 547         AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
 548         AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
 549         AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
 550         AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
 551         AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
 552         AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
 553         AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
 554         AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
 555         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
 556         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
 557         AZF3328_MIXER_SWITCH("3D Control - Toggle", IDX_MIXER_ADVCTL2, 13, 0),
 558         AZF3328_MIXER_VOL_SPECIAL("3D Control - Volume", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
 559         AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
 560 #if MIXER_TESTING
 561         AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
 562         AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
 563         AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
 564         AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
 565         AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
 566         AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
 567         AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
 568         AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
 569         AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
 570         AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
 571         AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
 572         AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
 573         AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
 574         AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
 575         AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
 576         AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
 577 #endif
 578 };
 579
 580 #define AZF3328_INIT_VALUES (sizeof(snd_azf3328_init_values)/sizeof(unsigned int)/2)
 581
 582 static unsigned int snd_azf3328_init_values[][2] = {
 583         { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
 584         { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
 585         { IDX_MIXER_BASSTREBLE,         0x0000 },
 586         { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
 587         { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
 588         { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
 589         { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
 590         { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
 591         { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
 592         { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
 593         { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
 594         { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
 595         { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
 596 };
 597
 598 static int __devinit snd_azf3328_mixer_new(azf3328_t *chip)
 599 {
 600         snd_card_t *card;
 601         snd_kcontrol_new_t *sw;
 602         unsigned int idx;
 603         int err;
 604
 605         snd_azf3328_dbgcallenter();
 606         snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
 607
 608         card = chip->card;
 609
 610         /* mixer reset */
 611         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
 612
 613         /* mute and zero volume channels */
 614         for (idx = 0; idx < AZF3328_INIT_VALUES; idx++) {
 615                 snd_azf3328_mixer_write(chip, snd_azf3328_init_values[idx][0], snd_azf3328_init_values[idx][1], WORD_VALUE);
 616         }
 617
 618         /* add mixer controls */
 619         sw = snd_azf3328_mixer_controls;
 620         for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
 621                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
 622                         return err;
 623         }
 624         snd_component_add(card, "AZF3328 mixer");
 625         strcpy(card->mixername, "AZF3328 mixer");
 626
 627         snd_azf3328_dbgcallleave();
 628         return 0;
 629 }
 630
 631 static int snd_azf3328_hw_params(snd_pcm_substream_t * substream,
 632                                  snd_pcm_hw_params_t * hw_params)
 633 {
 634         int res;
 635         snd_azf3328_dbgcallenter();
 636         res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 637         snd_azf3328_dbgcallleave();
 638         return res;
 639 }
 640
 641 static int snd_azf3328_hw_free(snd_pcm_substream_t * substream)
 642 {
 643         snd_azf3328_dbgcallenter();
 644         snd_pcm_lib_free_pages(substream);
 645         snd_azf3328_dbgcallleave();
 646         return 0;
 647 }
 648
 649 static void snd_azf3328_setfmt(azf3328_t *chip,
 650                                unsigned int reg,
 651                                unsigned int bitrate,
 652                                unsigned int format_width,
 653                                unsigned int channels
 654 )
 655 {
 656         unsigned int val = 0xff00;
 657         unsigned long flags;
 658
 659         snd_azf3328_dbgcallenter();
 660         switch (bitrate) {
 661         case  5512: val |= 0x0d; break; /* the AZF3328 names it "5510" for some strange reason */
 662         case  6620: val |= 0x0b; break;
 663         case  8000: val |= 0x00; break;
 664         case  9600: val |= 0x08; break;
 665         case 11025: val |= 0x01; break;
 666         case 16000: val |= 0x02; break;
 667         case 22050: val |= 0x03; break;
 668         case 32000: val |= 0x04; break;
 669         case 44100: val |= 0x05; break;
 670         case 48000: val |= 0x06; break;
 671         case 64000: val |= 0x07; break;
 672         default:
 673                 snd_printk("unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
 674                 val |= 0x05; /* 44100 */
 675                 break;
 676         }
 677         /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) */
 678         /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) */
 679         /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) */
 680         /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) */
 681         /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
 682         /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
 683         /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
 684         /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
 685         /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
 686         if (channels == 2)
 687                 val |= SOUNDFORMAT_FLAG_2CHANNELS;
 688
 689         if (format_width == 16)
 690                 val |= SOUNDFORMAT_FLAG_16BIT;
 691
 692         spin_lock_irqsave(&chip->reg_lock, flags);
 693
 694         /* set bitrate/format */
 695         outw(val, chip->codec_port+reg);
 696
 697         /* changing the bitrate/format settings switches off the
 698          * audio output with an annoying click in case of 8/16bit format change
 699          * (maybe shutting down DAC/ADC?), thus immediately
 700          * do some tweaking to reenable it and get rid of the clicking
 701          * (FIXME: yes, it works, but what exactly am I doing here?? :)
 702          * FIXME: does this have some side effects for full-duplex
 703          * or other dramatic side effects? */
 704         if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
 705                 outw(inw(chip->codec_port + IDX_IO_PLAY_FLAGS)|DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
 706
 707         spin_unlock_irqrestore(&chip->reg_lock, flags);
 708         snd_azf3328_dbgcallleave();
 709 }
 710
 711 static void snd_azf3328_setdmaa(azf3328_t *chip,
 712                                 long unsigned int addr,
 713                                 unsigned int count,
 714                                 unsigned int size,
 715                                 int do_recording)
 716 {
 717         long unsigned int addr1;
 718         long unsigned int addr2;
 719         unsigned int count1;
 720         unsigned int count2;
 721         unsigned long flags;
 722         int reg_offs = do_recording ? 0x20 : 0x00;
 723
 724         snd_azf3328_dbgcallenter();
 725         /* AZF3328 uses a two buffer pointer DMA playback approach */
 726         if (!chip->is_playing)
 727         {
 728                 addr1 = addr;
 729                 addr2 = addr+(size/2);
 730                 count1 = (size/2)-1;
 731                 count2 = (size/2)-1;
 732 #if DEBUG_PLAY_REC
 733                 snd_azf3328_dbgplay("setting dma: buf1 %08lx[%d], buf2 %08lx[%d]\n", addr1, count1, addr2, count2);
 734 #endif
 735                 spin_lock_irqsave(&chip->reg_lock, flags);
 736                 outl(addr1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_1);
 737                 outl(addr2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_2);
 738                 outw(count1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_1);
 739                 outw(count2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_2);
 740                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 741         }
 742         snd_azf3328_dbgcallleave();
 743 }
 744
 745 static int snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
 746 {
 747 #if 0
 748         azf3328_t *chip = snd_pcm_substream_chip(substream);
 749         snd_pcm_runtime_t *runtime = substream->runtime;
 750         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 751         unsigned int count = snd_pcm_lib_period_bytes(substream);
 752 #endif
 753
 754         snd_azf3328_dbgcallenter();
 755 #if 0
 756         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 757         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
 758 #endif
 759         snd_azf3328_dbgcallleave();
 760         return 0;
 761 }
 762
 763 static int snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
 764 {
 765 #if 0
 766         azf3328_t *chip = snd_pcm_substream_chip(substream);
 767         snd_pcm_runtime_t *runtime = substream->runtime;
 768         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 769         unsigned int count = snd_pcm_lib_period_bytes(substream);
 770 #endif
 771
 772         snd_azf3328_dbgcallenter();
 773 #if 0
 774         snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 775         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
 776 #endif
 777         snd_azf3328_dbgcallleave();
 778         return 0;
 779 }
 780
 781 static int snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
 782 {
 783         azf3328_t *chip = snd_pcm_substream_chip(substream);
 784         snd_pcm_runtime_t *runtime = substream->runtime;
 785         int result = 0;
 786         unsigned int status1;
 787
 788         snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
 789         switch (cmd) {
 790         case SNDRV_PCM_TRIGGER_START:
 791
 792                 snd_azf3328_dbgio(chip, "trigger1");
 793
 794                 /* mute WaveOut */
 795                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 796
 797                 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 798
 799                 spin_lock(&chip->reg_lock);
 800                 /* stop playback */
 801                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 802                 status1 &= ~DMA_RESUME;
 803                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 804
 805                 /* FIXME: clear interrupts or what??? */
 806                 outw(0xffff, chip->codec_port+IDX_IO_PLAY_IRQMASK);
 807                 spin_unlock(&chip->reg_lock);
 808
 809                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 0);
 810
 811                 spin_lock(&chip->reg_lock);
 812 #ifdef WIN9X
 813                 /* FIXME: enable playback/recording??? */
 814                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 815                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 816
 817                 /* start playback again */
 818                 /* FIXME: what is this value (0x0010)??? */
 819                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 820                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 821 #else /* NT4 */
 822                 outw(0x00, chip->codec_port+IDX_IO_PLAY_FLAGS);
 823                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 824                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_PLAY_FLAGS);
 825                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_PLAY_FLAGS);
 826 #endif
 827                 spin_unlock(&chip->reg_lock);
 828
 829                 /* now unmute WaveOut */
 830                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 831
 832                 snd_azf3328_dbgio(chip, "trigger2");
 833                 chip->is_playing = 1;
 834                 break;
 835         case SNDRV_PCM_TRIGGER_STOP:
 836                 /* mute WaveOut */
 837                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 838
 839                 spin_lock(&chip->reg_lock);
 840                 /* stop playback */
 841                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 842
 843                 status1 &= ~DMA_RESUME;
 844                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 845
 846                 status1 |= DMA_PLAY_SOMETHING1;
 847                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 848
 849                 status1 &= ~DMA_PLAY_SOMETHING1;
 850                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 851                 spin_unlock(&chip->reg_lock);
 852
 853                 /* now unmute WaveOut */
 854                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 855                 chip->is_playing = 0;
 856                 break;
 857         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 858                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 859                 break;
 860         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 861                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 862                 break;
 863         default:
 864                 return -EINVAL;
 865         }
 866
 867         snd_azf3328_dbgcallleave();
 868         return result;
 869 }
 870
 871 /* this is just analogous to playback; I'm not quite sure whether recording
 872  * should actually be triggered like that */
 873 static int snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
 874 {
 875         azf3328_t *chip = snd_pcm_substream_chip(substream);
 876         snd_pcm_runtime_t *runtime = substream->runtime;
 877         int result = 0;
 878         unsigned int status1;
 879
 880         snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
 881         switch (cmd) {
 882         case SNDRV_PCM_TRIGGER_START:
 883
 884                 snd_azf3328_dbgio(chip, "trigger1");
 885
 886                 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 887
 888                 spin_lock(&chip->reg_lock);
 889                 /* stop recording */
 890                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 891                 status1 &= ~DMA_RESUME;
 892                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 893
 894                 /* FIXME: clear interrupts or what??? */
 895                 outw(0xffff, chip->codec_port+IDX_IO_REC_IRQMASK);
 896                 spin_unlock(&chip->reg_lock);
 897
 898                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 1);
 899
 900                 spin_lock(&chip->reg_lock);
 901 #ifdef WIN9X
 902                 /* FIXME: enable playback/recording??? */
 903                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 904                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 905
 906                 /* start playback again */
 907                 /* FIXME: what is this value (0x0010)??? */
 908                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 909                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 910 #else
 911                 outw(0x00, chip->codec_port+IDX_IO_REC_FLAGS);
 912                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_REC_FLAGS);
 913                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_REC_FLAGS);
 914                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_REC_FLAGS);
 915 #endif
 916                 spin_unlock(&chip->reg_lock);
 917
 918                 snd_azf3328_dbgio(chip, "trigger2");
 919                 chip->is_playing = 1;
 920                 break;
 921         case SNDRV_PCM_TRIGGER_STOP:
 922                 spin_lock(&chip->reg_lock);
 923                 /* stop recording */
 924                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 925
 926                 status1 &= ~DMA_RESUME;
 927                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 928
 929                 status1 |= DMA_PLAY_SOMETHING1;
 930                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 931
 932                 status1 &= ~DMA_PLAY_SOMETHING1;
 933                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 934                 spin_unlock(&chip->reg_lock);
 935
 936                 chip->is_playing = 0;
 937                 break;
 938         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 939                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 940                 break;
 941         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 942                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 943                 break;
 944         default:
 945                 return -EINVAL;
 946         }
 947
 948         snd_azf3328_dbgcallleave();
 949         return result;
 950 }
 951
 952 static snd_pcm_uframes_t snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
 953 {
 954         azf3328_t *chip = snd_pcm_substream_chip(substream);
 955         unsigned long bufptr, playptr;
 956         unsigned long result;
 957         snd_pcm_uframes_t frmres;
 958
 959 #ifdef QUERY_HARDWARE
 960         bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
 961 #else
 962         bufptr = substream->runtime->dma_addr;
 963 #endif
 964         playptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
 965
 966         result = playptr - bufptr;
 967         frmres = bytes_to_frames( substream->runtime, result );
 968         snd_azf3328_dbgplay("result %lx, playptr %lx (base %x), frames %ld\n", result, playptr, substream->runtime->dma_addr, frmres);
 969         return frmres;
 970 }
 971
 972 static snd_pcm_uframes_t snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
 973 {
 974         azf3328_t *chip = snd_pcm_substream_chip(substream);
 975         unsigned long bufptr, recptr;
 976         unsigned long result;
 977         snd_pcm_uframes_t frmres;
 978
 979 #ifdef QUERY_HARDWARE
 980         bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
 981 #else
 982         bufptr = substream->runtime->dma_addr;
 983 #endif
 984         recptr = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
 985
 986         result = recptr - bufptr;
 987         frmres = bytes_to_frames( substream->runtime, result );
 988         snd_azf3328_dbgplay("result %lx, rec ptr %lx (base %x), frames %ld\n", result, recptr, substream->runtime->dma_addr, frmres);
 989         return frmres;
 990 }
 991
 992 static irqreturn_t snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 993 {
 994         azf3328_t *chip = dev_id;
 995         unsigned int status, which;
 996         static unsigned long count;
 997
 998         status  = inw(chip->codec_port+IDX_IO_IRQSTATUS);
 999
1000         /* fast path out, to ease interrupt sharing */
1001         if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_SOMEIRQ)))
1002                 return IRQ_NONE; /* must be interrupt for another device */
1003
1004         snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", count, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS));
1005
1006         if (status & IRQ_PLAYBACK)
1007         {
1008                 spin_lock(&chip->reg_lock);
1009                 which = inw(chip->codec_port+IDX_IO_PLAY_IRQMASK);
1010                 if (which & IRQ_FINISHED_PLAYBUF_1)
1011                         /* ack IRQ */
1012                         outw(which | IRQ_FINISHED_PLAYBUF_1, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1013                 if (which & IRQ_FINISHED_PLAYBUF_2)
1014                         /* ack IRQ */
1015                         outw(which | IRQ_FINISHED_PLAYBUF_2, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1016                 if (which & IRQ_PLAY_SOMETHING)
1017                 {
1018                         snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1019                 }
1020                 if (chip->pcm && chip->playback_substream)
1021                 {
1022                         snd_azf3328_dbgplay("which %x, playptr %lx\n", which, inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1023                         snd_pcm_period_elapsed(chip->playback_substream);
1024                         snd_azf3328_dbgplay("period done, playptr %lx.\n", inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1025                 }
1026                 else
1027                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1028                 spin_unlock(&chip->reg_lock);
1029         }
1030         if (status & IRQ_RECORDING)
1031         {
1032                 spin_lock(&chip->reg_lock);
1033                 which = inw(chip->codec_port+IDX_IO_REC_IRQMASK);
1034                 if (which & IRQ_FINISHED_RECBUF_1)
1035                         /* ack interrupt */
1036                         outw(which | IRQ_FINISHED_RECBUF_1, chip->codec_port+IDX_IO_REC_IRQMASK);
1037                 if (which & IRQ_FINISHED_RECBUF_2)
1038                         /* ack interrupt */
1039                         outw(which | IRQ_FINISHED_RECBUF_2, chip->codec_port+IDX_IO_REC_IRQMASK);
1040                 if (which & IRQ_REC_SOMETHING)
1041                 {
1042                         snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1043                 }
1044                 if (chip->pcm && chip->capture_substream)
1045                 {
1046                         snd_azf3328_dbgplay("which %x, recptr %lx\n", which, inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1047                         spin_unlock(&chip->reg_lock);
1048                         snd_pcm_period_elapsed(chip->capture_substream);
1049                         spin_lock(&chip->reg_lock);
1050                         snd_azf3328_dbgplay("period done, recptr %lx.\n", inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1051                 }
1052                 spin_unlock(&chip->reg_lock);
1053         }
1054         if (status & IRQ_MPU401)
1055                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
1056         if (status & IRQ_SOMEIRQ)
1057                 snd_azf3328_dbgplay("azt3328: unknown IRQ type occurred, please report!\n");
1058         count++;
1059         return IRQ_HANDLED;
1060 }
1061
1062 /*****************************************************************/
1063
1064 static snd_pcm_hardware_t snd_azf3328_playback =
1065 {
1066         /* FIXME!! Correct? */
1067         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1068                                  SNDRV_PCM_INFO_MMAP_VALID),
1069         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1070                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1071         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1072         .rate_min =             5512,
1073         .rate_max =             64000,
1074         .channels_min =         1,
1075         .channels_max =         2,
1076         .buffer_bytes_max =     65536,
1077         .period_bytes_min =     64,
1078         .period_bytes_max =     65536,
1079         .periods_min =          1,
1080         .periods_max =          1024,
1081         /* FIXME: maybe that card actually has a FIFO?
1082          * Hmm, it seems newer revisions do have one, but we still don't know
1083          * its size... */
1084         .fifo_size =            0,
1085 };
1086
1087 static snd_pcm_hardware_t snd_azf3328_capture =
1088 {
1089         /* FIXME */
1090         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1091                                  SNDRV_PCM_INFO_MMAP_VALID),
1092         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1093                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1094         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1095         .rate_min =             5512,
1096         .rate_max =             64000,
1097         .channels_min =         1,
1098         .channels_max =         2,
1099         .buffer_bytes_max =     65536,
1100         .period_bytes_min =     64,
1101         .period_bytes_max =     65536,
1102         .periods_min =          1,
1103         .periods_max =          1024,
1104         .fifo_size =            0,
1105 };
1106
1107
1108 static unsigned int snd_azf3328_fixed_rates[] = {
1109         5512, 6620, 8000, 9600, 11025, 16000, 22050, 32000, 44100, 48000, 64000
1110 };
1111 static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
1112         .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
1113         .list = snd_azf3328_fixed_rates,
1114         .mask = 0,
1115 };
1116
1117 /*****************************************************************/
1118
1119 static int snd_azf3328_playback_open(snd_pcm_substream_t * substream)
1120 {
1121         azf3328_t *chip = snd_pcm_substream_chip(substream);
1122         snd_pcm_runtime_t *runtime = substream->runtime;
1123
1124         snd_azf3328_dbgcallenter();
1125         chip->playback_substream = substream;
1126         runtime->hw = snd_azf3328_playback;
1127         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1128                                    &snd_azf3328_hw_constraints_rates);
1129         snd_azf3328_dbgcallleave();
1130         return 0;
1131 }
1132
1133 static int snd_azf3328_capture_open(snd_pcm_substream_t * substream)
1134 {
1135         azf3328_t *chip = snd_pcm_substream_chip(substream);
1136         snd_pcm_runtime_t *runtime = substream->runtime;
1137
1138         snd_azf3328_dbgcallenter();
1139         chip->capture_substream = substream;
1140         runtime->hw = snd_azf3328_capture;
1141         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1142                                    &snd_azf3328_hw_constraints_rates);
1143         snd_azf3328_dbgcallleave();
1144         return 0;
1145 }
1146
1147 static int snd_azf3328_playback_close(snd_pcm_substream_t * substream)
1148 {
1149         azf3328_t *chip = snd_pcm_substream_chip(substream);
1150
1151         snd_azf3328_dbgcallenter();
1152
1153         chip->playback_substream = NULL;
1154         snd_azf3328_dbgcallleave();
1155         return 0;
1156 }
1157
1158 static int snd_azf3328_capture_close(snd_pcm_substream_t * substream)
1159 {
1160         azf3328_t *chip = snd_pcm_substream_chip(substream);
1161
1162         snd_azf3328_dbgcallenter();
1163         chip->capture_substream = NULL;
1164         snd_azf3328_dbgcallleave();
1165         return 0;
1166 }
1167
1168 /******************************************************************/
1169
1170 static snd_pcm_ops_t snd_azf3328_playback_ops = {
1171         .open =         snd_azf3328_playback_open,
1172         .close =        snd_azf3328_playback_close,
1173         .ioctl =        snd_pcm_lib_ioctl,
1174         .hw_params =    snd_azf3328_hw_params,
1175         .hw_free =      snd_azf3328_hw_free,
1176         .prepare =      snd_azf3328_playback_prepare,
1177         .trigger =      snd_azf3328_playback_trigger,
1178         .pointer =      snd_azf3328_playback_pointer
1179 };
1180
1181 static snd_pcm_ops_t snd_azf3328_capture_ops = {
1182         .open =         snd_azf3328_capture_open,
1183         .close =        snd_azf3328_capture_close,
1184         .ioctl =        snd_pcm_lib_ioctl,
1185         .hw_params =    snd_azf3328_hw_params,
1186         .hw_free =      snd_azf3328_hw_free,
1187         .prepare =      snd_azf3328_capture_prepare,
1188         .trigger =      snd_azf3328_capture_trigger,
1189         .pointer =      snd_azf3328_capture_pointer
1190 };
1191
1192 static void snd_azf3328_pcm_free(snd_pcm_t *pcm)
1193 {
1194         azf3328_t *chip = pcm->private_data;
1195         chip->pcm = NULL;
1196         snd_pcm_lib_preallocate_free_for_all(pcm);
1197 }
1198
1199 static int __devinit snd_azf3328_pcm(azf3328_t *chip, int device)
1200 {
1201         snd_pcm_t *pcm;
1202         int err;
1203
1204         snd_azf3328_dbgcallenter();
1205         if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1206                 return err;
1207         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1208         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1209
1210         pcm->private_data = chip;
1211         pcm->private_free = snd_azf3328_pcm_free;
1212         pcm->info_flags = 0;
1213         strcpy(pcm->name, chip->card->shortname);
1214         chip->pcm = pcm;
1215
1216         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1217                                               snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1218
1219         snd_azf3328_dbgcallleave();
1220         return 0;
1221 }
1222
1223 /******************************************************************/
1224
1225 static int snd_azf3328_free(azf3328_t *chip)
1226 {
1227         if (chip->irq < 0)
1228                 goto __end_hw;
1229
1230         /* reset (close) mixer */
1231         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1232         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
1233
1234         /* interrupt setup - mask everything */
1235         /* FIXME */
1236
1237         synchronize_irq(chip->irq);
1238       __end_hw:
1239 #ifdef SUPPORT_JOYSTICK
1240         if (chip->res_joystick) {
1241                 gameport_unregister_port(&chip->gameport);
1242                 /* disable gameport */
1243                 snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
1244                                       snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1245                 release_resource(chip->res_joystick);
1246                 kfree_nocheck(chip->res_joystick);
1247         }
1248 #endif
1249         if (chip->irq >= 0)
1250                 free_irq(chip->irq, (void *)chip);
1251         pci_release_regions(chip->pci);
1252         pci_disable_device(chip->pci);
1253
1254         kfree(chip);
1255         return 0;
1256 }
1257
1258 static int snd_azf3328_dev_free(snd_device_t *device)
1259 {
1260         azf3328_t *chip = device->device_data;
1261         return snd_azf3328_free(chip);
1262 }
1263
1264 #if 0
1265 /* check whether a bit can be modified */
1266 static void snd_azf3328_test_bit(unsigned int reg, int bit)
1267 {
1268         unsigned char val, valoff, valon;
1269
1270         val = inb(reg);
1271
1272         outb(val & ~(1 << bit), reg);
1273         valoff = inb(reg);
1274
1275         outb(val|(1 << bit), reg);
1276         valon = inb(reg);
1277
1278         outb(val, reg);
1279
1280         printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1281 }
1282 #endif
1283
1284 static int __devinit snd_azf3328_create(snd_card_t * card,
1285                                          struct pci_dev *pci,
1286                                          unsigned long device_type,
1287                                          azf3328_t ** rchip)
1288 {
1289         azf3328_t *chip;
1290         int err;
1291         static snd_device_ops_t ops = {
1292                 .dev_free =     snd_azf3328_dev_free,
1293         };
1294         u16 tmp;
1295
1296         *rchip = NULL;
1297
1298         if ((err = pci_enable_device(pci)) < 0)
1299                 return err;
1300
1301         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1302         if (chip == NULL) {
1303                 pci_disable_device(pci);
1304                 return -ENOMEM;
1305         }
1306         spin_lock_init(&chip->reg_lock);
1307         chip->card = card;
1308         chip->pci = pci;
1309         chip->irq = -1;
1310
1311         /* check if we can restrict PCI DMA transfers to 24 bits */
1312         if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
1313             pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
1314                 snd_printk("architecture does not support 24bit PCI busmaster DMA\n");
1315                 pci_disable_device(pci);
1316                 return -ENXIO;
1317         }
1318
1319         if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
1320                 kfree(chip);
1321                 pci_disable_device(pci);
1322                 return err;
1323         }
1324
1325         chip->codec_port = pci_resource_start(pci, 0);
1326         chip->io2_port = pci_resource_start(pci, 1);
1327         chip->mpu_port = pci_resource_start(pci, 2);
1328         chip->synth_port = pci_resource_start(pci, 3);
1329         chip->mixer_port = pci_resource_start(pci, 4);
1330
1331         if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1332                 snd_printk("unable to grab IRQ %d\n", pci->irq);
1333                 snd_azf3328_free(chip);
1334                 return -EBUSY;
1335         }
1336         chip->irq = pci->irq;
1337         pci_set_master(pci);
1338         synchronize_irq(chip->irq);
1339
1340         snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1341
1342         snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_read(chip, 0), snd_azf3328_io2_read(chip, 1), snd_azf3328_io2_read(chip, 2), snd_azf3328_io2_read(chip, 3), snd_azf3328_io2_read(chip, 4), snd_azf3328_io2_read(chip, 5));
1343
1344         for (tmp=0; tmp <= 0x01; tmp += 1)
1345                 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1346
1347         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1348                 snd_azf3328_free(chip);
1349                 return err;
1350         }
1351
1352         /* create mixer interface & switches */
1353         if ((err = snd_azf3328_mixer_new(chip)) < 0)
1354                 return err;
1355
1356 #if 0
1357         /* set very low bitrate to reduce noise and power consumption? */
1358         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1359 #endif
1360
1361         /* standard chip init stuff */
1362         spin_lock_irq(&chip->reg_lock);
1363         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
1364         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_SOMETHING_FLAGS);
1365         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_REC_FLAGS);
1366         outb(0x0, chip->codec_port + IDX_IO_IRQ63H);
1367
1368         spin_unlock_irq(&chip->reg_lock);
1369
1370         snd_card_set_dev(card, &pci->dev);
1371
1372         *rchip = chip;
1373         return 0;
1374 }
1375
1376 #ifdef SUPPORT_JOYSTICK
1377 static void __devinit snd_azf3328_config_joystick(azf3328_t *chip, int joystick)
1378 {
1379         unsigned char val;
1380
1381         if (joystick == 1) {
1382                 if ((chip->res_joystick = request_region(0x200, 8, "AZF3328 gameport")) != NULL)
1383                         chip->gameport.io = 0x200;
1384         }
1385
1386         val = inb(chip->io2_port + IDX_IO2_LEGACY_ADDR);
1387         if (chip->res_joystick)
1388                 val |= LEGACY_JOY;
1389         else
1390                 val &= ~LEGACY_JOY;
1391
1392         outb(val, chip->io2_port + IDX_IO2_LEGACY_ADDR);
1393         if (chip->res_joystick)
1394                 gameport_register_port(&chip->gameport);
1395 }
1396 #endif
1397
1398 static int __devinit snd_azf3328_probe(struct pci_dev *pci,
1399                                           const struct pci_device_id *pci_id)
1400 {
1401         static int dev;
1402         snd_card_t *card;
1403         azf3328_t *chip;
1404         opl3_t *opl3;
1405         int err;
1406
1407         snd_azf3328_dbgcallenter();
1408         if (dev >= SNDRV_CARDS)
1409                 return -ENODEV;
1410         if (!enable[dev]) {
1411                 dev++;
1412                 return -ENOENT;
1413         }
1414
1415         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1416         if (card == NULL)
1417                 return -ENOMEM;
1418
1419         strcpy(card->driver, "AZF3328");
1420         strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1421
1422         if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1423                 snd_card_free(card);
1424                 return err;
1425         }
1426
1427         if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1428                                         chip->mpu_port, 1, pci->irq, 0,
1429                                         &chip->rmidi)) < 0) {
1430                 snd_printk("azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1431                 snd_card_free(card);
1432                 return err;
1433         }
1434
1435         if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1436                 snd_card_free(card);
1437                 return err;
1438         }
1439
1440         if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1441                             OPL3_HW_AUTO, 1, &opl3) < 0) {
1442                 snd_printk("azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1443                            chip->synth_port, chip->synth_port+2 );
1444         } else {
1445                 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1446                         snd_card_free(card);
1447                         return err;
1448                 }
1449         }
1450
1451         snd_azf3328_dbgio(chip, "create");
1452
1453         sprintf(card->longname, "%s at 0x%lx, irq %i",
1454                 card->shortname, chip->codec_port, chip->irq);
1455
1456         if ((err = snd_card_register(card)) < 0) {
1457                 snd_card_free(card);
1458                 return err;
1459         }
1460
1461 #ifdef MODULE
1462         printk(
1463 "azt3328: Experimental driver for Aztech AZF3328-based soundcards such as PCI168.\n"
1464 "azt3328: ZERO support from Aztech: you might think hard about future purchase.\n"
1465 "azt3328: Feel free to contact hw7oshyuv3001@sneakemail.com for bug reports etc.!\n");
1466 #endif
1467
1468 #ifdef SUPPORT_JOYSTICK
1469         snd_azf3328_config_joystick(chip, joystick[dev]);
1470 #endif
1471
1472         pci_set_drvdata(pci, card);
1473         dev++;
1474
1475         snd_azf3328_dbgcallleave();
1476         return 0;
1477 }
1478
1479 static void __devexit snd_azf3328_remove(struct pci_dev *pci)
1480 {
1481         snd_azf3328_dbgcallenter();
1482         snd_card_free(pci_get_drvdata(pci));
1483         pci_set_drvdata(pci, NULL);
1484         snd_azf3328_dbgcallleave();
1485 }
1486
1487 static struct pci_driver driver = {
1488         .name = "AZF3328",
1489         .id_table = snd_azf3328_ids,
1490         .probe = snd_azf3328_probe,
1491         .remove = __devexit_p(snd_azf3328_remove),
1492 };
1493
1494 static int __init alsa_card_azf3328_init(void)
1495 {
1496         int err;
1497         snd_azf3328_dbgcallenter();
1498         err = pci_module_init(&driver);
1499         snd_azf3328_dbgcallleave();
1500         return err;
1501 }
1502
1503 static void __exit alsa_card_azf3328_exit(void)
1504 {
1505         snd_azf3328_dbgcallenter();
1506         pci_unregister_driver(&driver);
1507         snd_azf3328_dbgcallleave();
1508 }
1509
1510 module_init(alsa_card_azf3328_init)
1511 module_exit(alsa_card_azf3328_exit)