sound/pci/azt3328.c

   1 /*
   2  *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
   3  *  Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
   4  *
   5  *  Framework borrowed from Bart Hartgers's als4000.c.
   6  *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
   7  *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
   8  *  Other versions are:
   9  *  PCI168 A(W), sub ID 1800
  10  *  PCI168 A/AP, sub ID 8000
  11  *  Please give me feedback in case you try my driver with one of these!!
  12  *
  13  * GPL LICENSE
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or
  17  *  (at your option) any later version.
  18  *
  19  *  This program is distributed in the hope that it will be useful,
  20  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  *  GNU General Public License for more details.
  23
  24  *  You should have received a copy of the GNU General Public License
  25  *  along with this program; if not, write to the Free Software
  26  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  27  *
  28  * NOTES
  29  *  Since Aztech does not provide any chipset documentation,
  30  *  even on repeated request to various addresses,
  31  *  and the answer that was finally given was negative
  32  *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
  33  *  in the first place >:-P}),
  34  *  I was forced to base this driver on reverse engineering
  35  *  (3 weeks' worth of evenings filled with driver work).
  36  *  (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
  37  *
  38  *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  39  *  for compatibility reasons) has the following features:
  40  *
  41  *  - builtin AC97 conformant codec (SNR over 80dB)
  42  *    (really AC97 compliant?? I really doubt it when looking
  43  *    at the mixer register layout)
  44  *  - builtin genuine OPL3
  45  *  - full duplex 16bit playback/record at independent sampling rate
  46  *  - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
  47  *  - game port (legacy address support)
  48  *  - built-in General DirectX timer having a 20 bits counter
  49  *    with 1us resolution (FIXME: where is it?)
  50  *  - I2S serial port for external DAC
  51  *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  52  *  - supports hardware volume control
  53  *  - single chip low cost solution (128 pin QFP)
  54  *  - supports programmable Sub-vendor and Sub-system ID
  55  *    required for Microsoft's logo compliance (FIXME: where?)
  56  *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  57  *
  58  *  Certain PCI versions of this card are susceptible to DMA traffic underruns
  59  *  in some systems (resulting in sound crackling/clicking/popping),
  60  *  probably because they don't have a DMA FIFO buffer or so.
  61  *  Overview (PCI ID/PCI subID/PCI rev.):
  62  *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
  63  *  - unknown performance: 0x50DC/0x1801/10
  64  *
  65  *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
  66  *  supposed to be very fast and supposed to get rid of crackling much
  67  *  better than a VIA, yet ironically I still get crackling, like many other
  68  *  people with the same chipset.
  69  *  Possible remedies:
  70  *  - plug card into a different PCI slot, preferrably one that isn't shared
  71  *    too much (this helps a lot, but not completely!)
  72  *  - get rid of PCI VGA card, use AGP instead
  73  *  - upgrade or downgrade BIOS
  74  *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
  75  *    Not too helpful.
  76  *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
  77  *
  78  * BUGS
  79  *  - when Ctrl-C'ing mpg321, the playback loops a bit
  80  *    (premature DMA playback reset?)
  81  *  - full-duplex sometimes breaks (IRQ management issues?).
  82  *    Once even a spontaneous REBOOT happened!!!
  83  *
  84  * TODO
  85  *  - test MPU401 MIDI playback etc.
  86  *  - power management (CONFIG_PM). See e.g. intel8x0 or cs4281.
  87  *    This would be nice since the chip runs a bit hot, and it's *required*
  88  *    anyway for proper ACPI power management. In other words: rest
  89  *    assured that I *will* implement this very soon; as soon as Linux 2.5.x
  90  *    has power management that's bugfree enough to work properly on my desktop.
  91  *  - figure out what all unknown port bits are responsible for
  92  */
  93
  94 #include <sound/driver.h>
  95 #include <asm/io.h>
  96 #include <linux/init.h>
  97 #include <linux/pci.h>
  98 #include <linux/delay.h>
  99 #include <linux/slab.h>
 100 #include <linux/gameport.h>
 101 #include <linux/moduleparam.h>
 102 #include <sound/core.h>
 103 #include <sound/control.h>
 104 #include <sound/pcm.h>
 105 #include <sound/rawmidi.h>
 106 #include <sound/mpu401.h>
 107 #include <sound/opl3.h>
 108 #include <sound/initval.h>
 109 #include "azt3328.h"
 110
 111 MODULE_AUTHOR("Andreas Mohr <hw7oshyuv3001@sneakemail.com>");
 112 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
 113 MODULE_LICENSE("GPL");
 114 MODULE_CLASSES("{sound}");
 115 MODULE_DEVICES("{{Aztech,AZF3328}}");
 116
 117 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 118 #define SUPPORT_JOYSTICK 1
 119 #endif
 120
 121 #define DEBUG_MISC      0
 122 #define DEBUG_CALLS     0
 123 #define DEBUG_MIXER     0
 124 #define DEBUG_PLAY_REC  0
 125 #define DEBUG_IO        0
 126 #define MIXER_TESTING   0
 127
 128 #if DEBUG_MISC
 129 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
 130 #else
 131 #define snd_azf3328_dbgmisc(format, args...)
 132 #endif
 133
 134 #if DEBUG_CALLS
 135 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
 136 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "entering %s\n", __FUNCTION__)
 137 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "leaving %s\n", __FUNCTION__)
 138 #else
 139 #define snd_azf3328_dbgcalls(format, args...)
 140 #define snd_azf3328_dbgcallenter()
 141 #define snd_azf3328_dbgcallleave()
 142 #endif
 143
 144 #if DEBUG_MIXER
 145 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
 146 #else
 147 #define snd_azf3328_dbgmixer(format, args...)
 148 #endif
 149
 150 #if DEBUG_PLAY_REC
 151 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
 152 #else
 153 #define snd_azf3328_dbgplay(format, args...)
 154 #endif
 155
 156 #if DEBUG_IO
 157 #define snd_azf3328_dbgio(chip, where) \
 158             printk(KERN_ERR "%s: IDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", where, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS))
 159 #else
 160 #define snd_azf3328_dbgio(chip, where)
 161 #endif
 162
 163 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
 164 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 165 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 166 #ifdef SUPPORT_JOYSTICK
 167 static int joystick[SNDRV_CARDS];
 168 #endif
 169 static int boot_devs;
 170
 171 module_param_array(index, int, boot_devs, 0444);
 172 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
 173 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
 174 module_param_array(id, charp, boot_devs, 0444);
 175 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
 176 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
 177 module_param_array(enable, bool, boot_devs, 0444);
 178 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
 179 MODULE_PARM_SYNTAX(enable, SNDRV_INDEX_DESC);
 180 #ifdef SUPPORT_JOYSTICK
 181 module_param_array(joystick, bool, boot_devs, 0444);
 182 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
 183 MODULE_PARM_SYNTAX(joystick, SNDRV_BOOLEAN_FALSE_DESC);
 184 #endif
 185
 186 typedef struct _snd_azf3328 azf3328_t;
 187 #define chip_t azf3328_t
 188
 189 struct _snd_azf3328 {
 190         int irq;
 191
 192         unsigned long codec_port;
 193         struct resource *res_codec_port;
 194         unsigned long io2_port;
 195         struct resource *res_io2_port;
 196         unsigned long mpu_port;
 197         struct resource *res_mpu_port;
 198         unsigned long synth_port;
 199         struct resource *res_synth_port;
 200         unsigned long mixer_port;
 201         struct resource *res_mixer_port;
 202
 203 #ifdef SUPPORT_JOYSTICK
 204         struct gameport gameport;
 205         struct resource *res_joystick;
 206 #endif
 207
 208         struct pci_dev *pci;
 209         snd_card_t *card;
 210
 211         snd_pcm_t *pcm;
 212         snd_rawmidi_t *rmidi;
 213         snd_pcm_substream_t *playback_substream;
 214         snd_pcm_substream_t *capture_substream;
 215         unsigned int is_playing;
 216         unsigned int is_recording;
 217
 218         spinlock_t reg_lock;
 219 };
 220
 221 static struct pci_device_id snd_azf3328_ids[] = {
 222         { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
 223         { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
 224         { 0, }
 225 };
 226
 227 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
 228
 229 void snd_azf3328_io2_write(azf3328_t *chip, int reg, unsigned char value)
 230 {
 231         outb(value, chip->io2_port + reg);
 232 }
 233
 234 unsigned char snd_azf3328_io2_read(azf3328_t *chip, int reg)
 235 {
 236         return inb(chip->io2_port + reg);
 237 }
 238
 239 void snd_azf3328_mixer_write(azf3328_t *chip, int reg, unsigned long value, int type)
 240 {
 241         switch(type) {
 242         case WORD_VALUE:
 243                 outw(value, chip->mixer_port + reg);
 244                 break;
 245         case DWORD_VALUE:
 246                 outl(value, chip->mixer_port + reg);
 247                 break;
 248         case BYTE_VALUE:
 249                 outb(value, chip->mixer_port + reg);
 250                 break;
 251         }
 252 }
 253
 254 unsigned long snd_azf3328_mixer_read(azf3328_t *chip, int reg, int type)
 255 {
 256         unsigned long res = 0;
 257
 258         switch(type) {
 259         case WORD_VALUE:
 260                 res = (unsigned long)inw(chip->mixer_port + reg);
 261                 break;
 262         case DWORD_VALUE:
 263                 res = (unsigned long)inl(chip->mixer_port + reg);
 264                 break;
 265         case BYTE_VALUE:
 266                 res = (unsigned long)inb(chip->mixer_port + reg);
 267                 break;
 268         }
 269
 270         return res;
 271 }
 272
 273 void snd_azf3328_mixer_set_mute(azf3328_t *chip, int reg, int do_mute)
 274 {
 275         unsigned char oldval;
 276
 277         /* the mute bit is on the *second* (i.e. right) register of a
 278          * left/right channel setting */
 279         oldval = inb(chip->mixer_port + reg + 1);
 280         if (do_mute)
 281                 oldval |= 0x80;
 282         else
 283                 oldval &= ~0x80;
 284         outb(oldval, chip->mixer_port + reg + 1);
 285 }
 286
 287 void snd_azf3328_mixer_write_volume_gradually(azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
 288 {
 289         unsigned char curr_vol_left = 0, curr_vol_right = 0;
 290         int left_done = 0, right_done = 0;
 291
 292         snd_azf3328_dbgcallenter();
 293         if (chan_sel & SET_CHAN_LEFT)
 294                 curr_vol_left  = inb(chip->mixer_port + reg + 1);
 295         else
 296                 left_done = 1;
 297         if (chan_sel & SET_CHAN_RIGHT)
 298                 curr_vol_right = inb(chip->mixer_port + reg + 0);
 299         else
 300                 right_done = 1;
 301
 302         /* take care of muting flag (0x80) contained in left channel */
 303         if (curr_vol_left & 0x80)
 304                 dst_vol_left |= 0x80;
 305         else
 306                 dst_vol_left &= ~0x80;
 307
 308         do
 309         {
 310                 if (!left_done)
 311                 {
 312                         if (curr_vol_left > dst_vol_left)
 313                                 curr_vol_left--;
 314                         else
 315                         if (curr_vol_left < dst_vol_left)
 316                                 curr_vol_left++;
 317                         else
 318                             left_done = 1;
 319                         outb(curr_vol_left, chip->mixer_port + reg + 1);
 320                 }
 321                 if (!right_done)
 322                 {
 323                         if (curr_vol_right > dst_vol_right)
 324                                 curr_vol_right--;
 325                         else
 326                         if (curr_vol_right < dst_vol_right)
 327                                 curr_vol_right++;
 328                         else
 329                             right_done = 1;
 330                         /* during volume change, the right channel is crackling
 331                          * somewhat more than the left channel, unfortunately.
 332                          * This seems to be a hardware issue. */
 333                         outb(curr_vol_right, chip->mixer_port + reg + 0);
 334                 }
 335                 if (delay)
 336                         mdelay(delay);
 337         }
 338         while ((!left_done) || (!right_done));
 339         snd_azf3328_dbgcallleave();
 340 }
 341
 342 /*
 343  * general mixer element
 344  */
 345 typedef struct azf3328_mixer_reg {
 346         unsigned int reg;
 347         unsigned int lchan_shift, rchan_shift;
 348         unsigned int mask;
 349         unsigned int invert: 1;
 350         unsigned int stereo: 1;
 351         unsigned int enum_c: 4;
 352 } azf3328_mixer_reg_t;
 353
 354 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
 355  ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | (mask << 16) | (invert << 24) | (stereo << 25) | (enum_c << 26))
 356
 357 static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
 358 {
 359         r->reg = val & 0xff;
 360         r->lchan_shift = (val >> 8) & 0x0f;
 361         r->rchan_shift = (val >> 12) & 0x0f;
 362         r->mask = (val >> 16) & 0xff;
 363         r->invert = (val >> 24) & 1;
 364         r->stereo = (val >> 25) & 1;
 365         r->enum_c = (val >> 26) & 0x0f;
 366 }
 367
 368 /*
 369  * mixer switches/volumes
 370  */
 371
 372 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
 373 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 374   .info = snd_azf3328_info_mixer, \
 375   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 376   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
 377 }
 378
 379 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
 380 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 381   .info = snd_azf3328_info_mixer, \
 382   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 383   .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
 384 }
 385
 386 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
 387 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 388   .info = snd_azf3328_info_mixer, \
 389   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 390   .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
 391 }
 392
 393 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
 394 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 395   .info = snd_azf3328_info_mixer, \
 396   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 397   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
 398 }
 399
 400 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
 401 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 402   .info = snd_azf3328_info_mixer_enum, \
 403   .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
 404   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
 405 }
 406
 407 static int snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
 408 {
 409         azf3328_mixer_reg_t reg;
 410
 411         snd_azf3328_dbgcallenter();
 412         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 413         uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 414         uinfo->count = reg.stereo + 1;
 415         uinfo->value.integer.min = 0;
 416         uinfo->value.integer.max = reg.mask;
 417         snd_azf3328_dbgcallleave();
 418         return 0;
 419 }
 420
 421 static int snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 422 {
 423         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 424         azf3328_mixer_reg_t reg;
 425         unsigned int oreg, val;
 426
 427         snd_azf3328_dbgcallenter();
 428         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 429
 430         oreg = inw(chip->mixer_port + reg.reg);
 431         val = (oreg >> reg.lchan_shift) & reg.mask;
 432         if (reg.invert)
 433                 val = reg.mask - val;
 434         ucontrol->value.integer.value[0] = val;
 435         if (reg.stereo) {
 436                 val = (oreg >> reg.rchan_shift) & reg.mask;
 437                 if (reg.invert)
 438                         val = reg.mask - val;
 439                 ucontrol->value.integer.value[1] = val;
 440         }
 441         snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx (shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", reg.reg, oreg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
 442         snd_azf3328_dbgcallleave();
 443         return 0;
 444 }
 445
 446 static int snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 447 {
 448         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 449         azf3328_mixer_reg_t reg;
 450         unsigned int oreg, nreg, val;
 451
 452         snd_azf3328_dbgcallenter();
 453         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 454         oreg = inw(chip->mixer_port + reg.reg);
 455         val = ucontrol->value.integer.value[0] & reg.mask;
 456         if (reg.invert)
 457                 val = reg.mask - val;
 458         nreg = oreg & ~(reg.mask << reg.lchan_shift);
 459         nreg |= (val << reg.lchan_shift);
 460         if (reg.stereo) {
 461                 val = ucontrol->value.integer.value[1] & reg.mask;
 462                 if (reg.invert)
 463                         val = reg.mask - val;
 464                 nreg &= ~(reg.mask << reg.rchan_shift);
 465                 nreg |= (val << reg.rchan_shift);
 466         }
 467         if (reg.mask >= 0x07) /* it's a volume control, so better take care */
 468                 snd_azf3328_mixer_write_volume_gradually(chip, reg.reg, nreg >> 8, nreg & 0xff, SET_CHAN_LEFT|SET_CHAN_RIGHT, 0); /* just set both channels, doesn't matter */
 469         else
 470                 outw(nreg, chip->mixer_port + reg.reg);
 471
 472         snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], oreg, reg.lchan_shift, reg.rchan_shift, nreg, inw(chip->mixer_port + reg.reg));
 473         snd_azf3328_dbgcallleave();
 474         return (nreg != oreg);
 475 }
 476
 477 static int snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 478 {
 479         azf3328_mixer_reg_t reg;
 480         static char *texts1[2] = { "ModemOut1", "ModemOut2" };
 481         static char *texts2[2] = { "MonoSelectSource1", "MonoSelectSource2" };
 482         static char *texts3[8] = {
 483                 "Mic", "CD", "Video", "Aux", "Line",
 484                 "Mix", "Mix Mono", "Phone"
 485         };
 486
 487         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 488         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 489         uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
 490         uinfo->value.enumerated.items = reg.enum_c;
 491         if (uinfo->value.enumerated.item > reg.enum_c - 1U)
 492                 uinfo->value.enumerated.item = reg.enum_c - 1U;
 493         if (reg.reg == IDX_MIXER_ADVCTL2)
 494         {
 495                 if (reg.lchan_shift == 8) /* modem out sel */
 496                         strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
 497                 else /* mono sel source */
 498                         strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
 499         }
 500         else
 501                 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
 502 );
 503         return 0;
 504 }
 505
 506 static int snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 507 {
 508         azf3328_mixer_reg_t reg;
 509         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 510         unsigned short val;
 511
 512         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 513         val = inw(chip->mixer_port + reg.reg);
 514         if (reg.reg == IDX_MIXER_REC_SELECT)
 515         {
 516                 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
 517                 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
 518         }
 519         else
 520                 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
 521         snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], reg.lchan_shift, reg.enum_c);
 522         return 0;
 523 }
 524
 525 static int snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 526 {
 527         azf3328_mixer_reg_t reg;
 528         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 529         unsigned int oreg, nreg, val;
 530
 531         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 532         oreg = inw(chip->mixer_port + reg.reg);
 533         val = oreg;
 534         if (reg.reg == IDX_MIXER_REC_SELECT)
 535         {
 536                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
 537                 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
 538                         return -EINVAL;
 539                 val = (ucontrol->value.enumerated.item[0] << 8) |
 540                       (ucontrol->value.enumerated.item[1] << 0);
 541         }
 542         else
 543         {
 544                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
 545                         return -EINVAL;
 546                 val &= ~((reg.enum_c - 1) << reg.lchan_shift);
 547                 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
 548         }
 549         outw(val, chip->mixer_port + reg.reg);
 550         nreg = val;
 551
 552         snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
 553         return (nreg != oreg);
 554 }
 555
 556 #define NUM_CONTROLS(ary) (sizeof(ary) / sizeof(snd_kcontrol_new_t))
 557
 558 static snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
 559         AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
 560         AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
 561         AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
 562         AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
 563         AZF3328_MIXER_SWITCH("Wave Playback 3D Bypass", IDX_MIXER_ADVCTL2, 7, 1),
 564         AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
 565         AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
 566         AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
 567         AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
 568         AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
 569         AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
 570         AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
 571         AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
 572         AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
 573         AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
 574         AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
 575         AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
 576         AZF3328_MIXER_SWITCH("PCBeep Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
 577         AZF3328_MIXER_VOL_SPECIAL("PCBeep Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
 578         AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
 579         AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
 580         AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
 581         AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
 582         AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
 583         AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
 584         AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
 585         AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
 586         AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
 587         AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
 588         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
 589         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
 590         AZF3328_MIXER_SWITCH("3D Control - Toggle", IDX_MIXER_ADVCTL2, 13, 0),
 591         AZF3328_MIXER_VOL_SPECIAL("3D Control - Volume", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
 592         AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
 593 #if MIXER_TESTING
 594         AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
 595         AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
 596         AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
 597         AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
 598         AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
 599         AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
 600         AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
 601         AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
 602         AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
 603         AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
 604         AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
 605         AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
 606         AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
 607         AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
 608         AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
 609         AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
 610 #endif
 611 };
 612
 613 #define AZF3328_INIT_VALUES (sizeof(snd_azf3328_init_values)/sizeof(unsigned int)/2)
 614
 615 static unsigned int snd_azf3328_init_values[][2] = {
 616         { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
 617         { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
 618         { IDX_MIXER_BASSTREBLE,         0x0000 },
 619         { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
 620         { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
 621         { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
 622         { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
 623         { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
 624         { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
 625         { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
 626         { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
 627         { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
 628         { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
 629 };
 630
 631 static int __devinit snd_azf3328_mixer_new(azf3328_t *chip)
 632 {
 633         snd_card_t *card;
 634         snd_kcontrol_new_t *sw;
 635         unsigned int idx;
 636         int err;
 637
 638         snd_azf3328_dbgcallenter();
 639         snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
 640
 641         card = chip->card;
 642
 643         /* mixer reset */
 644         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
 645
 646         /* mute and zero volume channels */
 647         for (idx = 0; idx < AZF3328_INIT_VALUES; idx++) {
 648                 snd_azf3328_mixer_write(chip, snd_azf3328_init_values[idx][0], snd_azf3328_init_values[idx][1], WORD_VALUE);
 649         }
 650
 651         /* add mixer controls */
 652         sw = snd_azf3328_mixer_controls;
 653         for (idx = 0; idx < NUM_CONTROLS(snd_azf3328_mixer_controls); idx++, sw++) {
 654                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
 655                         return err;
 656         }
 657         snd_component_add(card, "AZF3328 mixer");
 658         strcpy(card->mixername, "AZF3328 mixer");
 659
 660         snd_azf3328_dbgcallleave();
 661         return 0;
 662 }
 663
 664 static int snd_azf3328_hw_params(snd_pcm_substream_t * substream,
 665                                  snd_pcm_hw_params_t * hw_params)
 666 {
 667         int res;
 668         snd_azf3328_dbgcallenter();
 669         res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 670         snd_azf3328_dbgcallleave();
 671         return res;
 672 }
 673
 674 static int snd_azf3328_hw_free(snd_pcm_substream_t * substream)
 675 {
 676         snd_azf3328_dbgcallenter();
 677         snd_pcm_lib_free_pages(substream);
 678         snd_azf3328_dbgcallleave();
 679         return 0;
 680 }
 681
 682 static void snd_azf3328_setfmt(azf3328_t *chip,
 683                                unsigned int reg,
 684                                unsigned int bitrate,
 685                                unsigned int format_width,
 686                                unsigned int channels
 687 )
 688 {
 689         unsigned int val = 0xff00;
 690         unsigned long flags;
 691
 692         snd_azf3328_dbgcallenter();
 693         switch (bitrate) {
 694         case  5512: val |= 0x0d; break; /* the AZF3328 names it "5510" for some strange reason */
 695         case  6620: val |= 0x0b; break;
 696         case  8000: val |= 0x00; break;
 697         case  9600: val |= 0x08; break;
 698         case 11025: val |= 0x01; break;
 699         case 16000: val |= 0x02; break;
 700         case 22050: val |= 0x03; break;
 701         case 32000: val |= 0x04; break;
 702         case 44100: val |= 0x05; break;
 703         case 48000: val |= 0x06; break;
 704         case 64000: val |= 0x07; break;
 705         default:
 706                 snd_printk("unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
 707                 val |= 0x05; /* 44100 */
 708                 break;
 709         }
 710         /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) */
 711         /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) */
 712         /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) */
 713         /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) */
 714         /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
 715         /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
 716         /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
 717         /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
 718         /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
 719         if (channels == 2)
 720                 val |= SOUNDFORMAT_FLAG_2CHANNELS;
 721
 722         if (format_width == 16)
 723                 val |= SOUNDFORMAT_FLAG_16BIT;
 724
 725         spin_lock_irqsave(&chip->reg_lock, flags);
 726
 727         /* set bitrate/format */
 728         outw(val, chip->codec_port+reg);
 729
 730         /* changing the bitrate/format settings switches off the
 731          * audio output with an annoying click in case of 8/16bit format change
 732          * (maybe shutting down DAC/ADC?), thus immediately
 733          * do some tweaking to reenable it and get rid of the clicking
 734          * (FIXME: yes, it works, but what exactly am I doing here?? :)
 735          * FIXME: does this have some side effects for full-duplex
 736          * or other dramatic side effects? */
 737         if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
 738                 outw(inw(chip->codec_port + IDX_IO_PLAY_FLAGS)|DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
 739
 740         spin_unlock_irqrestore(&chip->reg_lock, flags);
 741         snd_azf3328_dbgcallleave();
 742 }
 743
 744 static void snd_azf3328_setdmaa(azf3328_t *chip,
 745                                 long unsigned int addr,
 746                                 unsigned int count,
 747                                 unsigned int size,
 748                                 int do_recording)
 749 {
 750         long unsigned int addr1;
 751         long unsigned int addr2;
 752         unsigned int count1;
 753         unsigned int count2;
 754         unsigned long flags;
 755         int reg_offs = do_recording ? 0x20 : 0x00;
 756
 757         snd_azf3328_dbgcallenter();
 758         /* AZF3328 uses a two buffer pointer DMA playback approach */
 759         if (!chip->is_playing)
 760         {
 761                 addr1 = addr;
 762                 addr2 = addr+(size/2);
 763                 count1 = (size/2)-1;
 764                 count2 = (size/2)-1;
 765 #if DEBUG_PLAY_REC
 766                 snd_azf3328_dbgplay("setting dma: buf1 %08lx[%d], buf2 %08lx[%d]\n", addr1, count1, addr2, count2);
 767 #endif
 768                 spin_lock_irqsave(&chip->reg_lock, flags);
 769                 outl(addr1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_1);
 770                 outl(addr2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_2);
 771                 outw(count1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_1);
 772                 outw(count2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_2);
 773                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 774         }
 775         snd_azf3328_dbgcallleave();
 776 }
 777
 778 static int snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
 779 {
 780 #if 0
 781         azf3328_t *chip = snd_pcm_substream_chip(substream);
 782         snd_pcm_runtime_t *runtime = substream->runtime;
 783         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 784         unsigned int count = snd_pcm_lib_period_bytes(substream);
 785 #endif
 786
 787         snd_azf3328_dbgcallenter();
 788 #if 0
 789         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 790         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
 791 #endif
 792         snd_azf3328_dbgcallleave();
 793         return 0;
 794 }
 795
 796 static int snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
 797 {
 798 #if 0
 799         azf3328_t *chip = snd_pcm_substream_chip(substream);
 800         snd_pcm_runtime_t *runtime = substream->runtime;
 801         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 802         unsigned int count = snd_pcm_lib_period_bytes(substream);
 803 #endif
 804
 805         snd_azf3328_dbgcallenter();
 806 #if 0
 807         snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 808         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
 809 #endif
 810         snd_azf3328_dbgcallleave();
 811         return 0;
 812 }
 813
 814 static int snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
 815 {
 816         unsigned long flags;
 817         azf3328_t *chip = snd_pcm_substream_chip(substream);
 818         snd_pcm_runtime_t *runtime = substream->runtime;
 819         int result = 0;
 820         unsigned int status1;
 821
 822         snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
 823         switch (cmd) {
 824         case SNDRV_PCM_TRIGGER_START:
 825
 826                 snd_azf3328_dbgio(chip, "trigger1");
 827
 828                 /* mute WaveOut */
 829                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 830
 831                 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 832
 833                 spin_lock_irqsave(&chip->reg_lock, flags);
 834                 /* stop playback */
 835                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 836                 status1 &= ~DMA_RESUME;
 837                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 838
 839                 /* FIXME: clear interrupts or what??? */
 840                 outw(0xffff, chip->codec_port+IDX_IO_PLAY_IRQMASK);
 841                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 842
 843                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 0);
 844
 845                 spin_lock_irqsave(&chip->reg_lock, flags);
 846 #if WIN9X
 847                 /* FIXME: enable playback/recording??? */
 848                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 849                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 850
 851                 /* start playback again */
 852                 /* FIXME: what is this value (0x0010)??? */
 853                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 854                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 855 #else /* NT4 */
 856                 outw(0x00, chip->codec_port+IDX_IO_PLAY_FLAGS);
 857                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 858                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_PLAY_FLAGS);
 859                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_PLAY_FLAGS);
 860 #endif
 861                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 862
 863                 /* now unmute WaveOut */
 864                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 865
 866                 snd_azf3328_dbgio(chip, "trigger2");
 867                 chip->is_playing = 1;
 868                 break;
 869         case SNDRV_PCM_TRIGGER_STOP:
 870                 /* mute WaveOut */
 871                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 872
 873                 spin_lock_irqsave(&chip->reg_lock, flags);
 874                 /* stop playback */
 875                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 876
 877                 status1 &= ~DMA_RESUME;
 878                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 879
 880                 status1 |= DMA_PLAY_SOMETHING1;
 881                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 882
 883                 status1 &= ~DMA_PLAY_SOMETHING1;
 884                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 885                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 886
 887                 /* now unmute WaveOut */
 888                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 889                 chip->is_playing = 0;
 890                 break;
 891         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 892                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 893                 break;
 894         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 895                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 896                 break;
 897         default:
 898                 return -EINVAL;
 899         }
 900
 901         snd_azf3328_dbgcallleave();
 902         return result;
 903 }
 904
 905 /* this is just analogous to playback; I'm not quite sure whether recording
 906  * should actually be triggered like that */
 907 static int snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
 908 {
 909         unsigned long flags;
 910         azf3328_t *chip = snd_pcm_substream_chip(substream);
 911         snd_pcm_runtime_t *runtime = substream->runtime;
 912         int result = 0;
 913         unsigned int status1;
 914
 915         snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
 916         switch (cmd) {
 917         case SNDRV_PCM_TRIGGER_START:
 918
 919                 snd_azf3328_dbgio(chip, "trigger1");
 920
 921                 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 922
 923                 spin_lock_irqsave(&chip->reg_lock, flags);
 924                 /* stop recording */
 925                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 926                 status1 &= ~DMA_RESUME;
 927                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 928
 929                 /* FIXME: clear interrupts or what??? */
 930                 outw(0xffff, chip->codec_port+IDX_IO_REC_IRQMASK);
 931                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 932
 933                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 1);
 934
 935                 spin_lock_irqsave(&chip->reg_lock, flags);
 936 #if WIN9X
 937                 /* FIXME: enable playback/recording??? */
 938                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 939                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 940
 941                 /* start playback again */
 942                 /* FIXME: what is this value (0x0010)??? */
 943                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 944                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 945 #else
 946                 outw(0x00, chip->codec_port+IDX_IO_REC_FLAGS);
 947                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_REC_FLAGS);
 948                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_REC_FLAGS);
 949                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_REC_FLAGS);
 950 #endif
 951                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 952
 953                 snd_azf3328_dbgio(chip, "trigger2");
 954                 chip->is_playing = 1;
 955                 break;
 956         case SNDRV_PCM_TRIGGER_STOP:
 957                 spin_lock_irqsave(&chip->reg_lock, flags);
 958                 /* stop recording */
 959                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 960
 961                 status1 &= ~DMA_RESUME;
 962                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 963
 964                 status1 |= DMA_PLAY_SOMETHING1;
 965                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 966
 967                 status1 &= ~DMA_PLAY_SOMETHING1;
 968                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 969                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 970
 971                 chip->is_playing = 0;
 972                 break;
 973         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 974                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 975                 break;
 976         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 977                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 978                 break;
 979         default:
 980                 return -EINVAL;
 981         }
 982
 983         snd_azf3328_dbgcallleave();
 984         return result;
 985 }
 986
 987 static snd_pcm_uframes_t snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
 988 {
 989         azf3328_t *chip = snd_pcm_substream_chip(substream);
 990         unsigned long bufptr, playptr;
 991         unsigned long result;
 992         snd_pcm_uframes_t frmres;
 993         unsigned long flags;
 994
 995         spin_lock_irqsave(&chip->reg_lock, flags);
 996 #if QUERY_HARDWARE
 997         bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
 998 #else
 999         bufptr = substream->runtime->dma_addr;
1000 #endif
1001         playptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
1002         spin_unlock_irqrestore(&chip->reg_lock, flags);
1003
1004         result = playptr - bufptr;
1005         frmres = bytes_to_frames( substream->runtime, result );
1006         snd_azf3328_dbgplay("result %lx, playptr %lx (base %x), frames %ld\n", result, playptr, substream->runtime->dma_addr, frmres);
1007         return frmres;
1008 }
1009
1010 static snd_pcm_uframes_t snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
1011 {
1012         azf3328_t *chip = snd_pcm_substream_chip(substream);
1013         unsigned long bufptr, recptr;
1014         unsigned long result;
1015         snd_pcm_uframes_t frmres;
1016         unsigned long flags;
1017
1018         spin_lock_irqsave(&chip->reg_lock, flags);
1019 #if QUERY_HARDWARE
1020         bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
1021 #else
1022         bufptr = substream->runtime->dma_addr;
1023 #endif
1024         recptr = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
1025         spin_unlock_irqrestore(&chip->reg_lock, flags);
1026
1027         result = recptr - bufptr;
1028         frmres = bytes_to_frames( substream->runtime, result );
1029         snd_azf3328_dbgplay("result %lx, rec ptr %lx (base %x), frames %ld\n", result, recptr, substream->runtime->dma_addr, frmres);
1030         return frmres;
1031 }
1032
1033 static irqreturn_t snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1034 {
1035         azf3328_t *chip = snd_magic_cast(azf3328_t, dev_id, return IRQ_NONE);
1036         unsigned int status, which;
1037         static unsigned long count;
1038
1039         status  = inw(chip->codec_port+IDX_IO_IRQSTATUS);
1040
1041         /* fast path out, to ease interrupt sharing */
1042         if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_SOMEIRQ)))
1043                 return IRQ_NONE; /* must be interrupt for another device */
1044
1045         snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", count, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS));
1046
1047         if (status & IRQ_PLAYBACK)
1048         {
1049                 spin_lock(&chip->reg_lock);
1050                 which = inw(chip->codec_port+IDX_IO_PLAY_IRQMASK);
1051                 if (which & IRQ_FINISHED_PLAYBUF_1)
1052                         /* ack IRQ */
1053                         outw(which | IRQ_FINISHED_PLAYBUF_1, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1054                 if (which & IRQ_FINISHED_PLAYBUF_2)
1055                         /* ack IRQ */
1056                         outw(which | IRQ_FINISHED_PLAYBUF_2, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1057                 if (which & IRQ_PLAY_SOMETHING)
1058                 {
1059                         snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1060                 }
1061                 if (chip->pcm && chip->playback_substream)
1062                 {
1063                         snd_azf3328_dbgplay("which %x, playptr %lx\n", which, inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1064                         snd_pcm_period_elapsed(chip->playback_substream);
1065                         snd_azf3328_dbgplay("period done, playptr %lx.\n", inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1066                 }
1067                 else
1068                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1069                 spin_unlock(&chip->reg_lock);
1070         }
1071         if (status & IRQ_RECORDING)
1072         {
1073                 spin_lock(&chip->reg_lock);
1074                 which = inw(chip->codec_port+IDX_IO_REC_IRQMASK);
1075                 if (which & IRQ_FINISHED_RECBUF_1)
1076                         /* ack interrupt */
1077                         outw(which | IRQ_FINISHED_RECBUF_1, chip->codec_port+IDX_IO_REC_IRQMASK);
1078                 if (which & IRQ_FINISHED_RECBUF_2)
1079                         /* ack interrupt */
1080                         outw(which | IRQ_FINISHED_RECBUF_2, chip->codec_port+IDX_IO_REC_IRQMASK);
1081                 if (which & IRQ_REC_SOMETHING)
1082                 {
1083                         snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1084                 }
1085                 if (chip->pcm && chip->capture_substream)
1086                 {
1087                         snd_azf3328_dbgplay("which %x, recptr %lx\n", which, inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1088                         spin_unlock(&chip->reg_lock);
1089                         snd_pcm_period_elapsed(chip->capture_substream);
1090                         spin_lock(&chip->reg_lock);
1091                         snd_azf3328_dbgplay("period done, recptr %lx.\n", inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1092                 }
1093                 spin_unlock(&chip->reg_lock);
1094         }
1095         if (status & IRQ_MPU401)
1096                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
1097         if (status & IRQ_SOMEIRQ)
1098                 snd_azf3328_dbgplay("azt3328: unknown IRQ type occurred, please report!\n");
1099         count++;
1100         return IRQ_HANDLED;
1101 }
1102
1103 /*****************************************************************/
1104
1105 static snd_pcm_hardware_t snd_azf3328_playback =
1106 {
1107         /* FIXME!! Correct? */
1108         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1109                                  SNDRV_PCM_INFO_MMAP_VALID),
1110         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1111                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1112         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1113         .rate_min =             5512,
1114         .rate_max =             64000,
1115         .channels_min =         1,
1116         .channels_max =         2,
1117         .buffer_bytes_max =     65536,
1118         .period_bytes_min =     64,
1119         .period_bytes_max =     65536,
1120         .periods_min =          1,
1121         .periods_max =          1024,
1122         /* FIXME: maybe that card actually has a FIFO?
1123          * Hmm, it seems newer revisions do have one, but we still don't know
1124          * its size... */
1125         .fifo_size =            0,
1126 };
1127
1128 static snd_pcm_hardware_t snd_azf3328_capture =
1129 {
1130         /* FIXME */
1131         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1132                                  SNDRV_PCM_INFO_MMAP_VALID),
1133         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1134                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1135         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1136         .rate_min =             5512,
1137         .rate_max =             64000,
1138         .channels_min =         1,
1139         .channels_max =         2,
1140         .buffer_bytes_max =     65536,
1141         .period_bytes_min =     64,
1142         .period_bytes_max =     65536,
1143         .periods_min =          1,
1144         .periods_max =          1024,
1145         .fifo_size =            0,
1146 };
1147
1148
1149 static unsigned int snd_azf3328_fixed_rates[] = {
1150         5512, 6620, 8000, 9600, 11025, 16000, 22050, 32000, 44100, 48000, 64000
1151 };
1152 static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
1153         .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
1154         .list = snd_azf3328_fixed_rates,
1155         .mask = 0,
1156 };
1157
1158 /*****************************************************************/
1159
1160 static int snd_azf3328_playback_open(snd_pcm_substream_t * substream)
1161 {
1162         azf3328_t *chip = snd_pcm_substream_chip(substream);
1163         snd_pcm_runtime_t *runtime = substream->runtime;
1164
1165         snd_azf3328_dbgcallenter();
1166         chip->playback_substream = substream;
1167         runtime->hw = snd_azf3328_playback;
1168         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1169                                    &snd_azf3328_hw_constraints_rates);
1170         snd_azf3328_dbgcallleave();
1171         return 0;
1172 }
1173
1174 static int snd_azf3328_capture_open(snd_pcm_substream_t * substream)
1175 {
1176         azf3328_t *chip = snd_pcm_substream_chip(substream);
1177         snd_pcm_runtime_t *runtime = substream->runtime;
1178
1179         snd_azf3328_dbgcallenter();
1180         chip->capture_substream = substream;
1181         runtime->hw = snd_azf3328_capture;
1182         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1183                                    &snd_azf3328_hw_constraints_rates);
1184         snd_azf3328_dbgcallleave();
1185         return 0;
1186 }
1187
1188 static int snd_azf3328_playback_close(snd_pcm_substream_t * substream)
1189 {
1190         azf3328_t *chip = snd_pcm_substream_chip(substream);
1191
1192         snd_azf3328_dbgcallenter();
1193
1194         chip->playback_substream = NULL;
1195         snd_azf3328_dbgcallleave();
1196         return 0;
1197 }
1198
1199 static int snd_azf3328_capture_close(snd_pcm_substream_t * substream)
1200 {
1201         azf3328_t *chip = snd_pcm_substream_chip(substream);
1202
1203         snd_azf3328_dbgcallenter();
1204         chip->capture_substream = NULL;
1205         snd_azf3328_dbgcallleave();
1206         return 0;
1207 }
1208
1209 /******************************************************************/
1210
1211 static snd_pcm_ops_t snd_azf3328_playback_ops = {
1212         .open =         snd_azf3328_playback_open,
1213         .close =        snd_azf3328_playback_close,
1214         .ioctl =        snd_pcm_lib_ioctl,
1215         .hw_params =    snd_azf3328_hw_params,
1216         .hw_free =      snd_azf3328_hw_free,
1217         .prepare =      snd_azf3328_playback_prepare,
1218         .trigger =      snd_azf3328_playback_trigger,
1219         .pointer =      snd_azf3328_playback_pointer
1220 };
1221
1222 static snd_pcm_ops_t snd_azf3328_capture_ops = {
1223         .open =         snd_azf3328_capture_open,
1224         .close =        snd_azf3328_capture_close,
1225         .ioctl =        snd_pcm_lib_ioctl,
1226         .hw_params =    snd_azf3328_hw_params,
1227         .hw_free =      snd_azf3328_hw_free,
1228         .prepare =      snd_azf3328_capture_prepare,
1229         .trigger =      snd_azf3328_capture_trigger,
1230         .pointer =      snd_azf3328_capture_pointer
1231 };
1232
1233 static void snd_azf3328_pcm_free(snd_pcm_t *pcm)
1234 {
1235         azf3328_t *chip = snd_magic_cast(azf3328_t, pcm->private_data, return);
1236         chip->pcm = NULL;
1237         snd_pcm_lib_preallocate_free_for_all(pcm);
1238 }
1239
1240 static int __devinit snd_azf3328_pcm(azf3328_t *chip, int device)
1241 {
1242         snd_pcm_t *pcm;
1243         int err;
1244
1245         snd_azf3328_dbgcallenter();
1246         if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1247                 return err;
1248         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1249         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1250
1251         pcm->private_data = chip;
1252         pcm->private_free = snd_azf3328_pcm_free;
1253         pcm->info_flags = 0;
1254         strcpy(pcm->name, chip->card->shortname);
1255         chip->pcm = pcm;
1256
1257         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1258                                               snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1259
1260         snd_azf3328_dbgcallleave();
1261         return 0;
1262 }
1263
1264 /******************************************************************/
1265
1266 static int snd_azf3328_free(azf3328_t *chip)
1267 {
1268         if (chip->irq < 0)
1269                 goto __end_hw;
1270
1271         /* reset (close) mixer */
1272         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1273         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
1274
1275         /* interrupt setup - mask everything */
1276         /* FIXME */
1277
1278         synchronize_irq(chip->irq);
1279       __end_hw:
1280 #ifdef SUPPORT_JOYSTICK
1281         if (chip->res_joystick) {
1282                 gameport_unregister_port(&chip->gameport);
1283                 /* disable gameport */
1284                 snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
1285                                       snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1286                 release_resource(chip->res_joystick);
1287                 kfree_nocheck(chip->res_joystick);
1288         }
1289 #endif
1290         if (chip->res_codec_port) {
1291                 release_resource(chip->res_codec_port);
1292                 kfree_nocheck(chip->res_codec_port);
1293         }
1294         if (chip->res_io2_port) {
1295                 release_resource(chip->res_io2_port);
1296                 kfree_nocheck(chip->res_io2_port);
1297         }
1298         if (chip->res_mpu_port) {
1299                 release_resource(chip->res_mpu_port);
1300                 kfree_nocheck(chip->res_mpu_port);
1301         }
1302         if (chip->res_synth_port) {
1303                 release_resource(chip->res_synth_port);
1304                 kfree_nocheck(chip->res_synth_port);
1305         }
1306         if (chip->res_mixer_port) {
1307                 release_resource(chip->res_mixer_port);
1308                 kfree_nocheck(chip->res_mixer_port);
1309         }
1310         if (chip->irq >= 0)
1311                 free_irq(chip->irq, (void *)chip);
1312
1313         snd_magic_kfree(chip);
1314         return 0;
1315 }
1316
1317 static int snd_azf3328_dev_free(snd_device_t *device)
1318 {
1319         azf3328_t *chip = snd_magic_cast(azf3328_t, device->device_data, return -ENXIO);
1320         return snd_azf3328_free(chip);
1321 }
1322
1323 #if 0
1324 /* check whether a bit can be modified */
1325 static void snd_azf3328_test_bit(unsigned int reg, int bit)
1326 {
1327         unsigned char val, valoff, valon;
1328
1329         val = inb(reg);
1330
1331         outb(val & ~(1 << bit), reg);
1332         valoff = inb(reg);
1333
1334         outb(val|(1 << bit), reg);
1335         valon = inb(reg);
1336
1337         outb(val, reg);
1338
1339         printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1340 }
1341 #endif
1342
1343 static int __devinit snd_azf3328_create(snd_card_t * card,
1344                                          struct pci_dev *pci,
1345                                          unsigned long device_type,
1346                                          azf3328_t ** rchip)
1347 {
1348         unsigned long flags;
1349         azf3328_t *chip;
1350         int err;
1351         static snd_device_ops_t ops = {
1352                 .dev_free =     snd_azf3328_dev_free,
1353         };
1354         u16 tmp;
1355
1356         *rchip = NULL;
1357
1358         if ((err = pci_enable_device(pci)) < 0)
1359                 return err;
1360
1361         chip = snd_magic_kcalloc(azf3328_t, 0, GFP_KERNEL);
1362         if (chip == NULL)
1363                 return -ENOMEM;
1364         spin_lock_init(&chip->reg_lock);
1365         chip->card = card;
1366         chip->pci = pci;
1367         chip->irq = -1;
1368
1369         /* check if we can restrict PCI DMA transfers to 24 bits */
1370         if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
1371             pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
1372                 snd_printk("architecture does not support 24bit PCI busmaster DMA\n");
1373                 return -ENXIO;
1374         }
1375
1376         chip->codec_port = pci_resource_start(pci, 0);
1377         if ((chip->res_codec_port = request_region(chip->codec_port, 0x80, "Aztech AZF3328 I/O")) == NULL) {
1378                 snd_printk("unable to grab I/O port at 0x%lx-0x%lx\n", chip->codec_port, chip->codec_port + 0x80 - 1);
1379                 snd_azf3328_free(chip);
1380                 return -EBUSY;
1381         }
1382         chip->io2_port = pci_resource_start(pci, 1);
1383         if ((chip->res_io2_port = request_region(chip->io2_port, 0x08, "Aztech AZF3328 I/O 2")) == NULL) {
1384                 snd_printk("unable to grab I/O 2 port at 0x%lx-0x%lx\n", chip->io2_port, chip->io2_port + 0x08 - 1);
1385                 snd_azf3328_free(chip);
1386                 return -EBUSY;
1387         }
1388         chip->mpu_port = pci_resource_start(pci, 2);
1389         if ((chip->res_mpu_port = request_region(chip->mpu_port, 0x04, "Aztech AZF3328 MPU401")) == NULL) {
1390                 snd_printk("unable to grab MPU401 port at 0x%lx-0x%lx\n", chip->mpu_port, chip->mpu_port + 0x04 - 1);
1391                 snd_azf3328_free(chip);
1392                 return -EBUSY;
1393         }
1394         chip->synth_port = pci_resource_start(pci, 3);
1395         if ((chip->res_synth_port = request_region(chip->synth_port, 0x08, "Aztech AZF3328 OPL3")) == NULL) {
1396                 snd_printk("unable to grab OPL3 port at 0x%lx-0x%lx\n", chip->synth_port, chip->synth_port + 0x08 - 1);
1397                 snd_azf3328_free(chip);
1398                 return -EBUSY;
1399         }
1400         chip->mixer_port = pci_resource_start(pci, 4);
1401         if ((chip->res_mixer_port = request_region(chip->mixer_port, 0x40, "Aztech AZF3328 Mixer")) == NULL) {
1402                 snd_printk("unable to grab mixer port at 0x%lx-0x%lx\n", chip->mixer_port, chip->mixer_port + 0x40 - 1);
1403                 snd_azf3328_free(chip);
1404                 return -EBUSY;
1405         }
1406
1407         if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1408                 snd_printk("unable to grab IRQ %d\n", pci->irq);
1409                 snd_azf3328_free(chip);
1410                 return -EBUSY;
1411         }
1412         chip->irq = pci->irq;
1413         pci_set_master(pci);
1414         synchronize_irq(chip->irq);
1415
1416         snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1417
1418         snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_read(chip, 0), snd_azf3328_io2_read(chip, 1), snd_azf3328_io2_read(chip, 2), snd_azf3328_io2_read(chip, 3), snd_azf3328_io2_read(chip, 4), snd_azf3328_io2_read(chip, 5));
1419
1420         for (tmp=0; tmp <= 0x01; tmp += 1)
1421                 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1422
1423         /* create mixer interface & switches */
1424         if ((err = snd_azf3328_mixer_new(chip)) < 0)
1425                 return err;
1426
1427         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1428                 snd_azf3328_free(chip);
1429                 return err;
1430         }
1431
1432 #if 0
1433         /* set very low bitrate to reduce noise and power consumption? */
1434         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1435 #endif
1436
1437         /* standard chip init stuff */
1438         spin_lock_irqsave(&chip->reg_lock, flags);
1439         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
1440         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_SOMETHING_FLAGS);
1441         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_REC_FLAGS);
1442         outb(0x0, chip->codec_port + IDX_IO_IRQ63H);
1443
1444         spin_unlock_irqrestore(&chip->reg_lock, flags);
1445
1446         snd_card_set_dev(card, &pci->dev);
1447
1448         *rchip = chip;
1449         return 0;
1450 }
1451
1452 #ifdef SUPPORT_JOYSTICK
1453 static void __devinit snd_azf3328_config_joystick(azf3328_t *chip, int joystick)
1454 {
1455         unsigned char val;
1456
1457         if (joystick == 1) {
1458                 if ((chip->res_joystick = request_region(0x200, 8, "AZF3328 gameport")) != NULL)
1459                         chip->gameport.io = 0x200;
1460         }
1461
1462         val = inb(chip->io2_port + IDX_IO2_LEGACY_ADDR);
1463         if (chip->res_joystick)
1464                 val |= LEGACY_JOY;
1465         else
1466                 val &= ~LEGACY_JOY;
1467
1468         outb(val, chip->io2_port + IDX_IO2_LEGACY_ADDR);
1469         if (chip->res_joystick)
1470                 gameport_register_port(&chip->gameport);
1471 }
1472 #endif
1473
1474 static int __devinit snd_azf3328_probe(struct pci_dev *pci,
1475                                           const struct pci_device_id *pci_id)
1476 {
1477         static int dev;
1478         snd_card_t *card;
1479         azf3328_t *chip;
1480         opl3_t *opl3;
1481         int err;
1482
1483         snd_azf3328_dbgcallenter();
1484         if (dev >= SNDRV_CARDS)
1485                 return -ENODEV;
1486         if (!enable[dev]) {
1487                 dev++;
1488                 return -ENOENT;
1489         }
1490
1491         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1492         if (card == NULL)
1493                 return -ENOMEM;
1494
1495         strcpy(card->driver, "AZF3328");
1496         strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1497
1498         if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1499                 snd_card_free(card);
1500                 return err;
1501         }
1502
1503         if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1504                                         chip->mpu_port, 1, pci->irq, 0,
1505                                         &chip->rmidi)) < 0) {
1506                 snd_printk("azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1507                 snd_card_free(card);
1508                 return err;
1509         }
1510
1511         if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1512                 snd_card_free(card);
1513                 return err;
1514         }
1515
1516         if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1517                             OPL3_HW_AUTO, 1, &opl3) < 0) {
1518                 snd_printk("azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1519                            chip->synth_port, chip->synth_port+2 );
1520         } else {
1521                 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1522                         snd_card_free(card);
1523                         return err;
1524                 }
1525         }
1526
1527         snd_azf3328_dbgio(chip, "create");
1528
1529         sprintf(card->longname, "%s at 0x%lx, irq %i",
1530                 card->shortname, chip->codec_port, chip->irq);
1531
1532         if ((err = snd_card_register(card)) < 0) {
1533                 snd_card_free(card);
1534                 return err;
1535         }
1536
1537 #ifdef MODULE
1538         printk(
1539 "azt3328: Experimental driver for Aztech AZF3328-based soundcards such as PCI168.\n"
1540 "azt3328: ZERO support from Aztech: you might think hard about future purchase.\n"
1541 "azt3328: Feel free to contact hw7oshyuv3001@sneakemail.com for bug reports etc.!\n");
1542 #endif
1543
1544 #ifdef SUPPORT_JOYSTICK
1545         snd_azf3328_config_joystick(chip, joystick[dev]);
1546 #endif
1547
1548         pci_set_drvdata(pci, card);
1549         dev++;
1550
1551         snd_azf3328_dbgcallleave();
1552         return 0;
1553 }
1554
1555 static void __devexit snd_azf3328_remove(struct pci_dev *pci)
1556 {
1557         snd_azf3328_dbgcallenter();
1558         snd_card_free(pci_get_drvdata(pci));
1559         pci_set_drvdata(pci, NULL);
1560         snd_azf3328_dbgcallleave();
1561 }
1562
1563 static struct pci_driver driver = {
1564         .name = "AZF3328",
1565         .id_table = snd_azf3328_ids,
1566         .probe = snd_azf3328_probe,
1567         .remove = __devexit_p(snd_azf3328_remove),
1568 };
1569
1570 static int __init alsa_card_azf3328_init(void)
1571 {
1572         int err;
1573         snd_azf3328_dbgcallenter();
1574         err = pci_module_init(&driver);
1575         snd_azf3328_dbgcallleave();
1576         return err;
1577 }
1578
1579 static void __exit alsa_card_azf3328_exit(void)
1580 {
1581         snd_azf3328_dbgcallenter();
1582         pci_unregister_driver(&driver);
1583         snd_azf3328_dbgcallleave();
1584 }
1585
1586 module_init(alsa_card_azf3328_init)
1587 module_exit(alsa_card_azf3328_exit)