sound/pci/azt3328.c

   1 /*
   2  *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
   3  *  Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
   4  *
   5  *  Framework borrowed from Bart Hartgers's als4000.c.
   6  *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
   7  *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
   8  *  Other versions are:
   9  *  PCI168 A(W), sub ID 1800
  10  *  PCI168 A/AP, sub ID 8000
  11  *  Please give me feedback in case you try my driver with one of these!!
  12  *
  13  * GPL LICENSE
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or
  17  *  (at your option) any later version.
  18  *
  19  *  This program is distributed in the hope that it will be useful,
  20  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  *  GNU General Public License for more details.
  23
  24  *  You should have received a copy of the GNU General Public License
  25  *  along with this program; if not, write to the Free Software
  26  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  27  *
  28  * NOTES
  29  *  Since Aztech does not provide any chipset documentation,
  30  *  even on repeated request to various addresses,
  31  *  and the answer that was finally given was negative
  32  *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
  33  *  in the first place >:-P}),
  34  *  I was forced to base this driver on reverse engineering
  35  *  (3 weeks' worth of evenings filled with driver work).
  36  *  (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
  37  *
  38  *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  39  *  for compatibility reasons) has the following features:
  40  *
  41  *  - builtin AC97 conformant codec (SNR over 80dB)
  42  *    (really AC97 compliant?? I really doubt it when looking
  43  *    at the mixer register layout)
  44  *  - builtin genuine OPL3
  45  *  - full duplex 16bit playback/record at independent sampling rate
  46  *  - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
  47  *  - game port (legacy address support)
  48  *  - built-in General DirectX timer having a 20 bits counter
  49  *    with 1us resolution (FIXME: where is it?)
  50  *  - I2S serial port for external DAC
  51  *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  52  *  - supports hardware volume control
  53  *  - single chip low cost solution (128 pin QFP)
  54  *  - supports programmable Sub-vendor and Sub-system ID
  55  *    required for Microsoft's logo compliance (FIXME: where?)
  56  *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  57  *
  58  *  Certain PCI versions of this card are susceptible to DMA traffic underruns
  59  *  in some systems (resulting in sound crackling/clicking/popping),
  60  *  probably because they don't have a DMA FIFO buffer or so.
  61  *  Overview (PCI ID/PCI subID/PCI rev.):
  62  *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
  63  *  - unknown performance: 0x50DC/0x1801/10
  64  *
  65  *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
  66  *  supposed to be very fast and supposed to get rid of crackling much
  67  *  better than a VIA, yet ironically I still get crackling, like many other
  68  *  people with the same chipset.
  69  *  Possible remedies:
  70  *  - plug card into a different PCI slot, preferrably one that isn't shared
  71  *    too much (this helps a lot, but not completely!)
  72  *  - get rid of PCI VGA card, use AGP instead
  73  *  - upgrade or downgrade BIOS
  74  *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
  75  *    Not too helpful.
  76  *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
  77  *
  78  * BUGS
  79  *  - when Ctrl-C'ing mpg321, the playback loops a bit
  80  *    (premature DMA playback reset?)
  81  *  - full-duplex sometimes breaks (IRQ management issues?).
  82  *    Once even a spontaneous REBOOT happened!!!
  83  *
  84  * TODO
  85  *  - test MPU401 MIDI playback etc.
  86  *  - power management (CONFIG_PM). See e.g. intel8x0 or cs4281.
  87  *    This would be nice since the chip runs a bit hot, and it's *required*
  88  *    anyway for proper ACPI power management. In other words: rest
  89  *    assured that I *will* implement this very soon; as soon as Linux 2.5.x
  90  *    has power management that's bugfree enough to work properly on my desktop.
  91  *  - figure out what all unknown port bits are responsible for
  92  */
  93
  94 #include <sound/driver.h>
  95 #include <asm/io.h>
  96 #include <linux/init.h>
  97 #include <linux/pci.h>
  98 #include <linux/delay.h>
  99 #include <linux/slab.h>
 100 #include <linux/gameport.h>
 101 #include <linux/moduleparam.h>
 102 #include <sound/core.h>
 103 #include <sound/control.h>
 104 #include <sound/pcm.h>
 105 #include <sound/rawmidi.h>
 106 #include <sound/mpu401.h>
 107 #include <sound/opl3.h>
 108 #include <sound/initval.h>
 109 #include "azt3328.h"
 110
 111 MODULE_AUTHOR("Andreas Mohr <hw7oshyuv3001@sneakemail.com>");
 112 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
 113 MODULE_LICENSE("GPL");
 114 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 115
 116 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 117 #define SUPPORT_JOYSTICK 1
 118 #endif
 119
 120 #define DEBUG_MISC      0
 121 #define DEBUG_CALLS     0
 122 #define DEBUG_MIXER     0
 123 #define DEBUG_PLAY_REC  0
 124 #define DEBUG_IO        0
 125 #define MIXER_TESTING   0
 126
 127 #if DEBUG_MISC
 128 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
 129 #else
 130 #define snd_azf3328_dbgmisc(format, args...)
 131 #endif
 132
 133 #if DEBUG_CALLS
 134 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
 135 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "entering %s\n", __FUNCTION__)
 136 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "leaving %s\n", __FUNCTION__)
 137 #else
 138 #define snd_azf3328_dbgcalls(format, args...)
 139 #define snd_azf3328_dbgcallenter()
 140 #define snd_azf3328_dbgcallleave()
 141 #endif
 142
 143 #if DEBUG_MIXER
 144 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
 145 #else
 146 #define snd_azf3328_dbgmixer(format, args...)
 147 #endif
 148
 149 #if DEBUG_PLAY_REC
 150 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
 151 #else
 152 #define snd_azf3328_dbgplay(format, args...)
 153 #endif
 154
 155 #if DEBUG_IO
 156 #define snd_azf3328_dbgio(chip, where) \
 157             printk(KERN_ERR "%s: IDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", where, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS))
 158 #else
 159 #define snd_azf3328_dbgio(chip, where)
 160 #endif
 161
 162 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
 163 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 164 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 165 #ifdef SUPPORT_JOYSTICK
 166 static int joystick[SNDRV_CARDS];
 167 #endif
 168 static int boot_devs;
 169
 170 module_param_array(index, int, boot_devs, 0444);
 171 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
 172 module_param_array(id, charp, boot_devs, 0444);
 173 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
 174 module_param_array(enable, bool, boot_devs, 0444);
 175 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
 176 #ifdef SUPPORT_JOYSTICK
 177 module_param_array(joystick, bool, boot_devs, 0444);
 178 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
 179 #endif
 180
 181 typedef struct _snd_azf3328 azf3328_t;
 182
 183 struct _snd_azf3328 {
 184         int irq;
 185
 186         unsigned long codec_port;
 187         unsigned long io2_port;
 188         unsigned long mpu_port;
 189         unsigned long synth_port;
 190         unsigned long mixer_port;
 191
 192 #ifdef SUPPORT_JOYSTICK
 193         struct gameport gameport;
 194         struct resource *res_joystick;
 195 #endif
 196
 197         struct pci_dev *pci;
 198         snd_card_t *card;
 199
 200         snd_pcm_t *pcm;
 201         snd_rawmidi_t *rmidi;
 202         snd_pcm_substream_t *playback_substream;
 203         snd_pcm_substream_t *capture_substream;
 204         unsigned int is_playing;
 205         unsigned int is_recording;
 206
 207         spinlock_t reg_lock;
 208 };
 209
 210 static struct pci_device_id snd_azf3328_ids[] = {
 211         { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
 212         { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
 213         { 0, }
 214 };
 215
 216 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
 217
 218 void snd_azf3328_io2_write(azf3328_t *chip, int reg, unsigned char value)
 219 {
 220         outb(value, chip->io2_port + reg);
 221 }
 222
 223 unsigned char snd_azf3328_io2_read(azf3328_t *chip, int reg)
 224 {
 225         return inb(chip->io2_port + reg);
 226 }
 227
 228 void snd_azf3328_mixer_write(azf3328_t *chip, int reg, unsigned long value, int type)
 229 {
 230         switch(type) {
 231         case WORD_VALUE:
 232                 outw(value, chip->mixer_port + reg);
 233                 break;
 234         case DWORD_VALUE:
 235                 outl(value, chip->mixer_port + reg);
 236                 break;
 237         case BYTE_VALUE:
 238                 outb(value, chip->mixer_port + reg);
 239                 break;
 240         }
 241 }
 242
 243 unsigned long snd_azf3328_mixer_read(azf3328_t *chip, int reg, int type)
 244 {
 245         unsigned long res = 0;
 246
 247         switch(type) {
 248         case WORD_VALUE:
 249                 res = (unsigned long)inw(chip->mixer_port + reg);
 250                 break;
 251         case DWORD_VALUE:
 252                 res = (unsigned long)inl(chip->mixer_port + reg);
 253                 break;
 254         case BYTE_VALUE:
 255                 res = (unsigned long)inb(chip->mixer_port + reg);
 256                 break;
 257         }
 258
 259         return res;
 260 }
 261
 262 void snd_azf3328_mixer_set_mute(azf3328_t *chip, int reg, int do_mute)
 263 {
 264         unsigned char oldval;
 265
 266         /* the mute bit is on the *second* (i.e. right) register of a
 267          * left/right channel setting */
 268         oldval = inb(chip->mixer_port + reg + 1);
 269         if (do_mute)
 270                 oldval |= 0x80;
 271         else
 272                 oldval &= ~0x80;
 273         outb(oldval, chip->mixer_port + reg + 1);
 274 }
 275
 276 void snd_azf3328_mixer_write_volume_gradually(azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
 277 {
 278         unsigned char curr_vol_left = 0, curr_vol_right = 0;
 279         int left_done = 0, right_done = 0;
 280
 281         snd_azf3328_dbgcallenter();
 282         if (chan_sel & SET_CHAN_LEFT)
 283                 curr_vol_left  = inb(chip->mixer_port + reg + 1);
 284         else
 285                 left_done = 1;
 286         if (chan_sel & SET_CHAN_RIGHT)
 287                 curr_vol_right = inb(chip->mixer_port + reg + 0);
 288         else
 289                 right_done = 1;
 290
 291         /* take care of muting flag (0x80) contained in left channel */
 292         if (curr_vol_left & 0x80)
 293                 dst_vol_left |= 0x80;
 294         else
 295                 dst_vol_left &= ~0x80;
 296
 297         do
 298         {
 299                 if (!left_done)
 300                 {
 301                         if (curr_vol_left > dst_vol_left)
 302                                 curr_vol_left--;
 303                         else
 304                         if (curr_vol_left < dst_vol_left)
 305                                 curr_vol_left++;
 306                         else
 307                             left_done = 1;
 308                         outb(curr_vol_left, chip->mixer_port + reg + 1);
 309                 }
 310                 if (!right_done)
 311                 {
 312                         if (curr_vol_right > dst_vol_right)
 313                                 curr_vol_right--;
 314                         else
 315                         if (curr_vol_right < dst_vol_right)
 316                                 curr_vol_right++;
 317                         else
 318                             right_done = 1;
 319                         /* during volume change, the right channel is crackling
 320                          * somewhat more than the left channel, unfortunately.
 321                          * This seems to be a hardware issue. */
 322                         outb(curr_vol_right, chip->mixer_port + reg + 0);
 323                 }
 324                 if (delay)
 325                         mdelay(delay);
 326         }
 327         while ((!left_done) || (!right_done));
 328         snd_azf3328_dbgcallleave();
 329 }
 330
 331 /*
 332  * general mixer element
 333  */
 334 typedef struct azf3328_mixer_reg {
 335         unsigned int reg;
 336         unsigned int lchan_shift, rchan_shift;
 337         unsigned int mask;
 338         unsigned int invert: 1;
 339         unsigned int stereo: 1;
 340         unsigned int enum_c: 4;
 341 } azf3328_mixer_reg_t;
 342
 343 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
 344  ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | (mask << 16) | (invert << 24) | (stereo << 25) | (enum_c << 26))
 345
 346 static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
 347 {
 348         r->reg = val & 0xff;
 349         r->lchan_shift = (val >> 8) & 0x0f;
 350         r->rchan_shift = (val >> 12) & 0x0f;
 351         r->mask = (val >> 16) & 0xff;
 352         r->invert = (val >> 24) & 1;
 353         r->stereo = (val >> 25) & 1;
 354         r->enum_c = (val >> 26) & 0x0f;
 355 }
 356
 357 /*
 358  * mixer switches/volumes
 359  */
 360
 361 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
 362 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 363   .info = snd_azf3328_info_mixer, \
 364   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 365   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
 366 }
 367
 368 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
 369 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 370   .info = snd_azf3328_info_mixer, \
 371   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 372   .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
 373 }
 374
 375 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
 376 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 377   .info = snd_azf3328_info_mixer, \
 378   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 379   .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
 380 }
 381
 382 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
 383 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 384   .info = snd_azf3328_info_mixer, \
 385   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 386   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
 387 }
 388
 389 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
 390 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 391   .info = snd_azf3328_info_mixer_enum, \
 392   .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
 393   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
 394 }
 395
 396 static int snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
 397 {
 398         azf3328_mixer_reg_t reg;
 399
 400         snd_azf3328_dbgcallenter();
 401         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 402         uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 403         uinfo->count = reg.stereo + 1;
 404         uinfo->value.integer.min = 0;
 405         uinfo->value.integer.max = reg.mask;
 406         snd_azf3328_dbgcallleave();
 407         return 0;
 408 }
 409
 410 static int snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 411 {
 412         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 413         azf3328_mixer_reg_t reg;
 414         unsigned int oreg, val;
 415
 416         snd_azf3328_dbgcallenter();
 417         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 418
 419         oreg = inw(chip->mixer_port + reg.reg);
 420         val = (oreg >> reg.lchan_shift) & reg.mask;
 421         if (reg.invert)
 422                 val = reg.mask - val;
 423         ucontrol->value.integer.value[0] = val;
 424         if (reg.stereo) {
 425                 val = (oreg >> reg.rchan_shift) & reg.mask;
 426                 if (reg.invert)
 427                         val = reg.mask - val;
 428                 ucontrol->value.integer.value[1] = val;
 429         }
 430         snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx (shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", reg.reg, oreg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
 431         snd_azf3328_dbgcallleave();
 432         return 0;
 433 }
 434
 435 static int snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 436 {
 437         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 438         azf3328_mixer_reg_t reg;
 439         unsigned int oreg, nreg, val;
 440
 441         snd_azf3328_dbgcallenter();
 442         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 443         oreg = inw(chip->mixer_port + reg.reg);
 444         val = ucontrol->value.integer.value[0] & reg.mask;
 445         if (reg.invert)
 446                 val = reg.mask - val;
 447         nreg = oreg & ~(reg.mask << reg.lchan_shift);
 448         nreg |= (val << reg.lchan_shift);
 449         if (reg.stereo) {
 450                 val = ucontrol->value.integer.value[1] & reg.mask;
 451                 if (reg.invert)
 452                         val = reg.mask - val;
 453                 nreg &= ~(reg.mask << reg.rchan_shift);
 454                 nreg |= (val << reg.rchan_shift);
 455         }
 456         if (reg.mask >= 0x07) /* it's a volume control, so better take care */
 457                 snd_azf3328_mixer_write_volume_gradually(chip, reg.reg, nreg >> 8, nreg & 0xff, SET_CHAN_LEFT|SET_CHAN_RIGHT, 0); /* just set both channels, doesn't matter */
 458         else
 459                 outw(nreg, chip->mixer_port + reg.reg);
 460
 461         snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], oreg, reg.lchan_shift, reg.rchan_shift, nreg, inw(chip->mixer_port + reg.reg));
 462         snd_azf3328_dbgcallleave();
 463         return (nreg != oreg);
 464 }
 465
 466 static int snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 467 {
 468         azf3328_mixer_reg_t reg;
 469         static char *texts1[2] = { "ModemOut1", "ModemOut2" };
 470         static char *texts2[2] = { "MonoSelectSource1", "MonoSelectSource2" };
 471         static char *texts3[8] = {
 472                 "Mic", "CD", "Video", "Aux", "Line",
 473                 "Mix", "Mix Mono", "Phone"
 474         };
 475
 476         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 477         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 478         uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
 479         uinfo->value.enumerated.items = reg.enum_c;
 480         if (uinfo->value.enumerated.item > reg.enum_c - 1U)
 481                 uinfo->value.enumerated.item = reg.enum_c - 1U;
 482         if (reg.reg == IDX_MIXER_ADVCTL2)
 483         {
 484                 if (reg.lchan_shift == 8) /* modem out sel */
 485                         strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
 486                 else /* mono sel source */
 487                         strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
 488         }
 489         else
 490                 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
 491 );
 492         return 0;
 493 }
 494
 495 static int snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 496 {
 497         azf3328_mixer_reg_t reg;
 498         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 499         unsigned short val;
 500
 501         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 502         val = inw(chip->mixer_port + reg.reg);
 503         if (reg.reg == IDX_MIXER_REC_SELECT)
 504         {
 505                 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
 506                 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
 507         }
 508         else
 509                 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
 510         snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], reg.lchan_shift, reg.enum_c);
 511         return 0;
 512 }
 513
 514 static int snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 515 {
 516         azf3328_mixer_reg_t reg;
 517         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 518         unsigned int oreg, nreg, val;
 519
 520         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 521         oreg = inw(chip->mixer_port + reg.reg);
 522         val = oreg;
 523         if (reg.reg == IDX_MIXER_REC_SELECT)
 524         {
 525                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
 526                 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
 527                         return -EINVAL;
 528                 val = (ucontrol->value.enumerated.item[0] << 8) |
 529                       (ucontrol->value.enumerated.item[1] << 0);
 530         }
 531         else
 532         {
 533                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
 534                         return -EINVAL;
 535                 val &= ~((reg.enum_c - 1) << reg.lchan_shift);
 536                 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
 537         }
 538         outw(val, chip->mixer_port + reg.reg);
 539         nreg = val;
 540
 541         snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
 542         return (nreg != oreg);
 543 }
 544
 545 static snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
 546         AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
 547         AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
 548         AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
 549         AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
 550         AZF3328_MIXER_SWITCH("Wave Playback 3D Bypass", IDX_MIXER_ADVCTL2, 7, 1),
 551         AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
 552         AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
 553         AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
 554         AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
 555         AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
 556         AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
 557         AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
 558         AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
 559         AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
 560         AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
 561         AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
 562         AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
 563         AZF3328_MIXER_SWITCH("PCBeep Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
 564         AZF3328_MIXER_VOL_SPECIAL("PCBeep Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
 565         AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
 566         AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
 567         AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
 568         AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
 569         AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
 570         AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
 571         AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
 572         AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
 573         AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
 574         AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
 575         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
 576         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
 577         AZF3328_MIXER_SWITCH("3D Control - Toggle", IDX_MIXER_ADVCTL2, 13, 0),
 578         AZF3328_MIXER_VOL_SPECIAL("3D Control - Volume", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
 579         AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
 580 #if MIXER_TESTING
 581         AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
 582         AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
 583         AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
 584         AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
 585         AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
 586         AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
 587         AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
 588         AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
 589         AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
 590         AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
 591         AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
 592         AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
 593         AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
 594         AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
 595         AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
 596         AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
 597 #endif
 598 };
 599
 600 #define AZF3328_INIT_VALUES (sizeof(snd_azf3328_init_values)/sizeof(unsigned int)/2)
 601
 602 static unsigned int snd_azf3328_init_values[][2] = {
 603         { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
 604         { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
 605         { IDX_MIXER_BASSTREBLE,         0x0000 },
 606         { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
 607         { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
 608         { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
 609         { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
 610         { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
 611         { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
 612         { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
 613         { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
 614         { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
 615         { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
 616 };
 617
 618 static int __devinit snd_azf3328_mixer_new(azf3328_t *chip)
 619 {
 620         snd_card_t *card;
 621         snd_kcontrol_new_t *sw;
 622         unsigned int idx;
 623         int err;
 624
 625         snd_azf3328_dbgcallenter();
 626         snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
 627
 628         card = chip->card;
 629
 630         /* mixer reset */
 631         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
 632
 633         /* mute and zero volume channels */
 634         for (idx = 0; idx < AZF3328_INIT_VALUES; idx++) {
 635                 snd_azf3328_mixer_write(chip, snd_azf3328_init_values[idx][0], snd_azf3328_init_values[idx][1], WORD_VALUE);
 636         }
 637
 638         /* add mixer controls */
 639         sw = snd_azf3328_mixer_controls;
 640         for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
 641                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
 642                         return err;
 643         }
 644         snd_component_add(card, "AZF3328 mixer");
 645         strcpy(card->mixername, "AZF3328 mixer");
 646
 647         snd_azf3328_dbgcallleave();
 648         return 0;
 649 }
 650
 651 static int snd_azf3328_hw_params(snd_pcm_substream_t * substream,
 652                                  snd_pcm_hw_params_t * hw_params)
 653 {
 654         int res;
 655         snd_azf3328_dbgcallenter();
 656         res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 657         snd_azf3328_dbgcallleave();
 658         return res;
 659 }
 660
 661 static int snd_azf3328_hw_free(snd_pcm_substream_t * substream)
 662 {
 663         snd_azf3328_dbgcallenter();
 664         snd_pcm_lib_free_pages(substream);
 665         snd_azf3328_dbgcallleave();
 666         return 0;
 667 }
 668
 669 static void snd_azf3328_setfmt(azf3328_t *chip,
 670                                unsigned int reg,
 671                                unsigned int bitrate,
 672                                unsigned int format_width,
 673                                unsigned int channels
 674 )
 675 {
 676         unsigned int val = 0xff00;
 677         unsigned long flags;
 678
 679         snd_azf3328_dbgcallenter();
 680         switch (bitrate) {
 681         case  5512: val |= 0x0d; break; /* the AZF3328 names it "5510" for some strange reason */
 682         case  6620: val |= 0x0b; break;
 683         case  8000: val |= 0x00; break;
 684         case  9600: val |= 0x08; break;
 685         case 11025: val |= 0x01; break;
 686         case 16000: val |= 0x02; break;
 687         case 22050: val |= 0x03; break;
 688         case 32000: val |= 0x04; break;
 689         case 44100: val |= 0x05; break;
 690         case 48000: val |= 0x06; break;
 691         case 64000: val |= 0x07; break;
 692         default:
 693                 snd_printk("unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
 694                 val |= 0x05; /* 44100 */
 695                 break;
 696         }
 697         /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) */
 698         /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) */
 699         /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) */
 700         /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) */
 701         /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
 702         /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
 703         /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
 704         /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
 705         /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
 706         if (channels == 2)
 707                 val |= SOUNDFORMAT_FLAG_2CHANNELS;
 708
 709         if (format_width == 16)
 710                 val |= SOUNDFORMAT_FLAG_16BIT;
 711
 712         spin_lock_irqsave(&chip->reg_lock, flags);
 713
 714         /* set bitrate/format */
 715         outw(val, chip->codec_port+reg);
 716
 717         /* changing the bitrate/format settings switches off the
 718          * audio output with an annoying click in case of 8/16bit format change
 719          * (maybe shutting down DAC/ADC?), thus immediately
 720          * do some tweaking to reenable it and get rid of the clicking
 721          * (FIXME: yes, it works, but what exactly am I doing here?? :)
 722          * FIXME: does this have some side effects for full-duplex
 723          * or other dramatic side effects? */
 724         if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
 725                 outw(inw(chip->codec_port + IDX_IO_PLAY_FLAGS)|DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
 726
 727         spin_unlock_irqrestore(&chip->reg_lock, flags);
 728         snd_azf3328_dbgcallleave();
 729 }
 730
 731 static void snd_azf3328_setdmaa(azf3328_t *chip,
 732                                 long unsigned int addr,
 733                                 unsigned int count,
 734                                 unsigned int size,
 735                                 int do_recording)
 736 {
 737         long unsigned int addr1;
 738         long unsigned int addr2;
 739         unsigned int count1;
 740         unsigned int count2;
 741         unsigned long flags;
 742         int reg_offs = do_recording ? 0x20 : 0x00;
 743
 744         snd_azf3328_dbgcallenter();
 745         /* AZF3328 uses a two buffer pointer DMA playback approach */
 746         if (!chip->is_playing)
 747         {
 748                 addr1 = addr;
 749                 addr2 = addr+(size/2);
 750                 count1 = (size/2)-1;
 751                 count2 = (size/2)-1;
 752 #if DEBUG_PLAY_REC
 753                 snd_azf3328_dbgplay("setting dma: buf1 %08lx[%d], buf2 %08lx[%d]\n", addr1, count1, addr2, count2);
 754 #endif
 755                 spin_lock_irqsave(&chip->reg_lock, flags);
 756                 outl(addr1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_1);
 757                 outl(addr2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_2);
 758                 outw(count1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_1);
 759                 outw(count2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_2);
 760                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 761         }
 762         snd_azf3328_dbgcallleave();
 763 }
 764
 765 static int snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
 766 {
 767 #if 0
 768         azf3328_t *chip = snd_pcm_substream_chip(substream);
 769         snd_pcm_runtime_t *runtime = substream->runtime;
 770         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 771         unsigned int count = snd_pcm_lib_period_bytes(substream);
 772 #endif
 773
 774         snd_azf3328_dbgcallenter();
 775 #if 0
 776         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 777         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
 778 #endif
 779         snd_azf3328_dbgcallleave();
 780         return 0;
 781 }
 782
 783 static int snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
 784 {
 785 #if 0
 786         azf3328_t *chip = snd_pcm_substream_chip(substream);
 787         snd_pcm_runtime_t *runtime = substream->runtime;
 788         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 789         unsigned int count = snd_pcm_lib_period_bytes(substream);
 790 #endif
 791
 792         snd_azf3328_dbgcallenter();
 793 #if 0
 794         snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 795         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
 796 #endif
 797         snd_azf3328_dbgcallleave();
 798         return 0;
 799 }
 800
 801 static int snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
 802 {
 803         azf3328_t *chip = snd_pcm_substream_chip(substream);
 804         snd_pcm_runtime_t *runtime = substream->runtime;
 805         int result = 0;
 806         unsigned int status1;
 807
 808         snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
 809         switch (cmd) {
 810         case SNDRV_PCM_TRIGGER_START:
 811
 812                 snd_azf3328_dbgio(chip, "trigger1");
 813
 814                 /* mute WaveOut */
 815                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 816
 817                 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 818
 819                 spin_lock(&chip->reg_lock);
 820                 /* stop playback */
 821                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 822                 status1 &= ~DMA_RESUME;
 823                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 824
 825                 /* FIXME: clear interrupts or what??? */
 826                 outw(0xffff, chip->codec_port+IDX_IO_PLAY_IRQMASK);
 827                 spin_unlock(&chip->reg_lock);
 828
 829                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 0);
 830
 831                 spin_lock(&chip->reg_lock);
 832 #ifdef WIN9X
 833                 /* FIXME: enable playback/recording??? */
 834                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 835                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 836
 837                 /* start playback again */
 838                 /* FIXME: what is this value (0x0010)??? */
 839                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 840                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 841 #else /* NT4 */
 842                 outw(0x00, chip->codec_port+IDX_IO_PLAY_FLAGS);
 843                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 844                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_PLAY_FLAGS);
 845                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_PLAY_FLAGS);
 846 #endif
 847                 spin_unlock(&chip->reg_lock);
 848
 849                 /* now unmute WaveOut */
 850                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 851
 852                 snd_azf3328_dbgio(chip, "trigger2");
 853                 chip->is_playing = 1;
 854                 break;
 855         case SNDRV_PCM_TRIGGER_STOP:
 856                 /* mute WaveOut */
 857                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 858
 859                 spin_lock(&chip->reg_lock);
 860                 /* stop playback */
 861                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 862
 863                 status1 &= ~DMA_RESUME;
 864                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 865
 866                 status1 |= DMA_PLAY_SOMETHING1;
 867                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 868
 869                 status1 &= ~DMA_PLAY_SOMETHING1;
 870                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 871                 spin_unlock(&chip->reg_lock);
 872
 873                 /* now unmute WaveOut */
 874                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 875                 chip->is_playing = 0;
 876                 break;
 877         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 878                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 879                 break;
 880         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 881                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 882                 break;
 883         default:
 884                 return -EINVAL;
 885         }
 886
 887         snd_azf3328_dbgcallleave();
 888         return result;
 889 }
 890
 891 /* this is just analogous to playback; I'm not quite sure whether recording
 892  * should actually be triggered like that */
 893 static int snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
 894 {
 895         azf3328_t *chip = snd_pcm_substream_chip(substream);
 896         snd_pcm_runtime_t *runtime = substream->runtime;
 897         int result = 0;
 898         unsigned int status1;
 899
 900         snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
 901         switch (cmd) {
 902         case SNDRV_PCM_TRIGGER_START:
 903
 904                 snd_azf3328_dbgio(chip, "trigger1");
 905
 906                 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 907
 908                 spin_lock(&chip->reg_lock);
 909                 /* stop recording */
 910                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 911                 status1 &= ~DMA_RESUME;
 912                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 913
 914                 /* FIXME: clear interrupts or what??? */
 915                 outw(0xffff, chip->codec_port+IDX_IO_REC_IRQMASK);
 916                 spin_unlock(&chip->reg_lock);
 917
 918                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 1);
 919
 920                 spin_lock(&chip->reg_lock);
 921 #ifdef WIN9X
 922                 /* FIXME: enable playback/recording??? */
 923                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 924                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 925
 926                 /* start playback again */
 927                 /* FIXME: what is this value (0x0010)??? */
 928                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 929                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 930 #else
 931                 outw(0x00, chip->codec_port+IDX_IO_REC_FLAGS);
 932                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_REC_FLAGS);
 933                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_REC_FLAGS);
 934                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_REC_FLAGS);
 935 #endif
 936                 spin_unlock(&chip->reg_lock);
 937
 938                 snd_azf3328_dbgio(chip, "trigger2");
 939                 chip->is_playing = 1;
 940                 break;
 941         case SNDRV_PCM_TRIGGER_STOP:
 942                 spin_lock(&chip->reg_lock);
 943                 /* stop recording */
 944                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 945
 946                 status1 &= ~DMA_RESUME;
 947                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 948
 949                 status1 |= DMA_PLAY_SOMETHING1;
 950                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 951
 952                 status1 &= ~DMA_PLAY_SOMETHING1;
 953                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 954                 spin_unlock(&chip->reg_lock);
 955
 956                 chip->is_playing = 0;
 957                 break;
 958         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 959                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 960                 break;
 961         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 962                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 963                 break;
 964         default:
 965                 return -EINVAL;
 966         }
 967
 968         snd_azf3328_dbgcallleave();
 969         return result;
 970 }
 971
 972 static snd_pcm_uframes_t snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
 973 {
 974         azf3328_t *chip = snd_pcm_substream_chip(substream);
 975         unsigned long bufptr, playptr;
 976         unsigned long result;
 977         snd_pcm_uframes_t frmres;
 978
 979 #ifdef QUERY_HARDWARE
 980         bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
 981 #else
 982         bufptr = substream->runtime->dma_addr;
 983 #endif
 984         playptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
 985
 986         result = playptr - bufptr;
 987         frmres = bytes_to_frames( substream->runtime, result );
 988         snd_azf3328_dbgplay("result %lx, playptr %lx (base %x), frames %ld\n", result, playptr, substream->runtime->dma_addr, frmres);
 989         return frmres;
 990 }
 991
 992 static snd_pcm_uframes_t snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
 993 {
 994         azf3328_t *chip = snd_pcm_substream_chip(substream);
 995         unsigned long bufptr, recptr;
 996         unsigned long result;
 997         snd_pcm_uframes_t frmres;
 998
 999 #ifdef QUERY_HARDWARE
1000         bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
1001 #else
1002         bufptr = substream->runtime->dma_addr;
1003 #endif
1004         recptr = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
1005
1006         result = recptr - bufptr;
1007         frmres = bytes_to_frames( substream->runtime, result );
1008         snd_azf3328_dbgplay("result %lx, rec ptr %lx (base %x), frames %ld\n", result, recptr, substream->runtime->dma_addr, frmres);
1009         return frmres;
1010 }
1011
1012 static irqreturn_t snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1013 {
1014         azf3328_t *chip = dev_id;
1015         unsigned int status, which;
1016         static unsigned long count;
1017
1018         status  = inw(chip->codec_port+IDX_IO_IRQSTATUS);
1019
1020         /* fast path out, to ease interrupt sharing */
1021         if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_SOMEIRQ)))
1022                 return IRQ_NONE; /* must be interrupt for another device */
1023
1024         snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", count, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS));
1025
1026         if (status & IRQ_PLAYBACK)
1027         {
1028                 spin_lock(&chip->reg_lock);
1029                 which = inw(chip->codec_port+IDX_IO_PLAY_IRQMASK);
1030                 if (which & IRQ_FINISHED_PLAYBUF_1)
1031                         /* ack IRQ */
1032                         outw(which | IRQ_FINISHED_PLAYBUF_1, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1033                 if (which & IRQ_FINISHED_PLAYBUF_2)
1034                         /* ack IRQ */
1035                         outw(which | IRQ_FINISHED_PLAYBUF_2, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1036                 if (which & IRQ_PLAY_SOMETHING)
1037                 {
1038                         snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1039                 }
1040                 if (chip->pcm && chip->playback_substream)
1041                 {
1042                         snd_azf3328_dbgplay("which %x, playptr %lx\n", which, inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1043                         snd_pcm_period_elapsed(chip->playback_substream);
1044                         snd_azf3328_dbgplay("period done, playptr %lx.\n", inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1045                 }
1046                 else
1047                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1048                 spin_unlock(&chip->reg_lock);
1049         }
1050         if (status & IRQ_RECORDING)
1051         {
1052                 spin_lock(&chip->reg_lock);
1053                 which = inw(chip->codec_port+IDX_IO_REC_IRQMASK);
1054                 if (which & IRQ_FINISHED_RECBUF_1)
1055                         /* ack interrupt */
1056                         outw(which | IRQ_FINISHED_RECBUF_1, chip->codec_port+IDX_IO_REC_IRQMASK);
1057                 if (which & IRQ_FINISHED_RECBUF_2)
1058                         /* ack interrupt */
1059                         outw(which | IRQ_FINISHED_RECBUF_2, chip->codec_port+IDX_IO_REC_IRQMASK);
1060                 if (which & IRQ_REC_SOMETHING)
1061                 {
1062                         snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1063                 }
1064                 if (chip->pcm && chip->capture_substream)
1065                 {
1066                         snd_azf3328_dbgplay("which %x, recptr %lx\n", which, inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1067                         spin_unlock(&chip->reg_lock);
1068                         snd_pcm_period_elapsed(chip->capture_substream);
1069                         spin_lock(&chip->reg_lock);
1070                         snd_azf3328_dbgplay("period done, recptr %lx.\n", inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1071                 }
1072                 spin_unlock(&chip->reg_lock);
1073         }
1074         if (status & IRQ_MPU401)
1075                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
1076         if (status & IRQ_SOMEIRQ)
1077                 snd_azf3328_dbgplay("azt3328: unknown IRQ type occurred, please report!\n");
1078         count++;
1079         return IRQ_HANDLED;
1080 }
1081
1082 /*****************************************************************/
1083
1084 static snd_pcm_hardware_t snd_azf3328_playback =
1085 {
1086         /* FIXME!! Correct? */
1087         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1088                                  SNDRV_PCM_INFO_MMAP_VALID),
1089         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1090                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1091         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1092         .rate_min =             5512,
1093         .rate_max =             64000,
1094         .channels_min =         1,
1095         .channels_max =         2,
1096         .buffer_bytes_max =     65536,
1097         .period_bytes_min =     64,
1098         .period_bytes_max =     65536,
1099         .periods_min =          1,
1100         .periods_max =          1024,
1101         /* FIXME: maybe that card actually has a FIFO?
1102          * Hmm, it seems newer revisions do have one, but we still don't know
1103          * its size... */
1104         .fifo_size =            0,
1105 };
1106
1107 static snd_pcm_hardware_t snd_azf3328_capture =
1108 {
1109         /* FIXME */
1110         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1111                                  SNDRV_PCM_INFO_MMAP_VALID),
1112         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1113                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1114         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1115         .rate_min =             5512,
1116         .rate_max =             64000,
1117         .channels_min =         1,
1118         .channels_max =         2,
1119         .buffer_bytes_max =     65536,
1120         .period_bytes_min =     64,
1121         .period_bytes_max =     65536,
1122         .periods_min =          1,
1123         .periods_max =          1024,
1124         .fifo_size =            0,
1125 };
1126
1127
1128 static unsigned int snd_azf3328_fixed_rates[] = {
1129         5512, 6620, 8000, 9600, 11025, 16000, 22050, 32000, 44100, 48000, 64000
1130 };
1131 static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
1132         .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
1133         .list = snd_azf3328_fixed_rates,
1134         .mask = 0,
1135 };
1136
1137 /*****************************************************************/
1138
1139 static int snd_azf3328_playback_open(snd_pcm_substream_t * substream)
1140 {
1141         azf3328_t *chip = snd_pcm_substream_chip(substream);
1142         snd_pcm_runtime_t *runtime = substream->runtime;
1143
1144         snd_azf3328_dbgcallenter();
1145         chip->playback_substream = substream;
1146         runtime->hw = snd_azf3328_playback;
1147         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1148                                    &snd_azf3328_hw_constraints_rates);
1149         snd_azf3328_dbgcallleave();
1150         return 0;
1151 }
1152
1153 static int snd_azf3328_capture_open(snd_pcm_substream_t * substream)
1154 {
1155         azf3328_t *chip = snd_pcm_substream_chip(substream);
1156         snd_pcm_runtime_t *runtime = substream->runtime;
1157
1158         snd_azf3328_dbgcallenter();
1159         chip->capture_substream = substream;
1160         runtime->hw = snd_azf3328_capture;
1161         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1162                                    &snd_azf3328_hw_constraints_rates);
1163         snd_azf3328_dbgcallleave();
1164         return 0;
1165 }
1166
1167 static int snd_azf3328_playback_close(snd_pcm_substream_t * substream)
1168 {
1169         azf3328_t *chip = snd_pcm_substream_chip(substream);
1170
1171         snd_azf3328_dbgcallenter();
1172
1173         chip->playback_substream = NULL;
1174         snd_azf3328_dbgcallleave();
1175         return 0;
1176 }
1177
1178 static int snd_azf3328_capture_close(snd_pcm_substream_t * substream)
1179 {
1180         azf3328_t *chip = snd_pcm_substream_chip(substream);
1181
1182         snd_azf3328_dbgcallenter();
1183         chip->capture_substream = NULL;
1184         snd_azf3328_dbgcallleave();
1185         return 0;
1186 }
1187
1188 /******************************************************************/
1189
1190 static snd_pcm_ops_t snd_azf3328_playback_ops = {
1191         .open =         snd_azf3328_playback_open,
1192         .close =        snd_azf3328_playback_close,
1193         .ioctl =        snd_pcm_lib_ioctl,
1194         .hw_params =    snd_azf3328_hw_params,
1195         .hw_free =      snd_azf3328_hw_free,
1196         .prepare =      snd_azf3328_playback_prepare,
1197         .trigger =      snd_azf3328_playback_trigger,
1198         .pointer =      snd_azf3328_playback_pointer
1199 };
1200
1201 static snd_pcm_ops_t snd_azf3328_capture_ops = {
1202         .open =         snd_azf3328_capture_open,
1203         .close =        snd_azf3328_capture_close,
1204         .ioctl =        snd_pcm_lib_ioctl,
1205         .hw_params =    snd_azf3328_hw_params,
1206         .hw_free =      snd_azf3328_hw_free,
1207         .prepare =      snd_azf3328_capture_prepare,
1208         .trigger =      snd_azf3328_capture_trigger,
1209         .pointer =      snd_azf3328_capture_pointer
1210 };
1211
1212 static void snd_azf3328_pcm_free(snd_pcm_t *pcm)
1213 {
1214         azf3328_t *chip = pcm->private_data;
1215         chip->pcm = NULL;
1216         snd_pcm_lib_preallocate_free_for_all(pcm);
1217 }
1218
1219 static int __devinit snd_azf3328_pcm(azf3328_t *chip, int device)
1220 {
1221         snd_pcm_t *pcm;
1222         int err;
1223
1224         snd_azf3328_dbgcallenter();
1225         if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1226                 return err;
1227         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1228         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1229
1230         pcm->private_data = chip;
1231         pcm->private_free = snd_azf3328_pcm_free;
1232         pcm->info_flags = 0;
1233         strcpy(pcm->name, chip->card->shortname);
1234         chip->pcm = pcm;
1235
1236         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1237                                               snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1238
1239         snd_azf3328_dbgcallleave();
1240         return 0;
1241 }
1242
1243 /******************************************************************/
1244
1245 static int snd_azf3328_free(azf3328_t *chip)
1246 {
1247         if (chip->irq < 0)
1248                 goto __end_hw;
1249
1250         /* reset (close) mixer */
1251         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1252         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
1253
1254         /* interrupt setup - mask everything */
1255         /* FIXME */
1256
1257         synchronize_irq(chip->irq);
1258       __end_hw:
1259 #ifdef SUPPORT_JOYSTICK
1260         if (chip->res_joystick) {
1261                 gameport_unregister_port(&chip->gameport);
1262                 /* disable gameport */
1263                 snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
1264                                       snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1265                 release_resource(chip->res_joystick);
1266                 kfree_nocheck(chip->res_joystick);
1267         }
1268 #endif
1269         if (chip->irq >= 0)
1270                 free_irq(chip->irq, (void *)chip);
1271         pci_release_regions(chip->pci);
1272
1273         kfree(chip);
1274         return 0;
1275 }
1276
1277 static int snd_azf3328_dev_free(snd_device_t *device)
1278 {
1279         azf3328_t *chip = device->device_data;
1280         return snd_azf3328_free(chip);
1281 }
1282
1283 #if 0
1284 /* check whether a bit can be modified */
1285 static void snd_azf3328_test_bit(unsigned int reg, int bit)
1286 {
1287         unsigned char val, valoff, valon;
1288
1289         val = inb(reg);
1290
1291         outb(val & ~(1 << bit), reg);
1292         valoff = inb(reg);
1293
1294         outb(val|(1 << bit), reg);
1295         valon = inb(reg);
1296
1297         outb(val, reg);
1298
1299         printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1300 }
1301 #endif
1302
1303 static int __devinit snd_azf3328_create(snd_card_t * card,
1304                                          struct pci_dev *pci,
1305                                          unsigned long device_type,
1306                                          azf3328_t ** rchip)
1307 {
1308         azf3328_t *chip;
1309         int err;
1310         static snd_device_ops_t ops = {
1311                 .dev_free =     snd_azf3328_dev_free,
1312         };
1313         u16 tmp;
1314
1315         *rchip = NULL;
1316
1317         if ((err = pci_enable_device(pci)) < 0)
1318                 return err;
1319
1320         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1321         if (chip == NULL)
1322                 return -ENOMEM;
1323         spin_lock_init(&chip->reg_lock);
1324         chip->card = card;
1325         chip->pci = pci;
1326         chip->irq = -1;
1327
1328         /* check if we can restrict PCI DMA transfers to 24 bits */
1329         if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
1330             pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
1331                 snd_printk("architecture does not support 24bit PCI busmaster DMA\n");
1332                 return -ENXIO;
1333         }
1334
1335         if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
1336                 kfree(chip);
1337                 return err;
1338         }
1339
1340         chip->codec_port = pci_resource_start(pci, 0);
1341         chip->io2_port = pci_resource_start(pci, 1);
1342         chip->mpu_port = pci_resource_start(pci, 2);
1343         chip->synth_port = pci_resource_start(pci, 3);
1344         chip->mixer_port = pci_resource_start(pci, 4);
1345
1346         if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1347                 snd_printk("unable to grab IRQ %d\n", pci->irq);
1348                 snd_azf3328_free(chip);
1349                 return -EBUSY;
1350         }
1351         chip->irq = pci->irq;
1352         pci_set_master(pci);
1353         synchronize_irq(chip->irq);
1354
1355         snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1356
1357         snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_read(chip, 0), snd_azf3328_io2_read(chip, 1), snd_azf3328_io2_read(chip, 2), snd_azf3328_io2_read(chip, 3), snd_azf3328_io2_read(chip, 4), snd_azf3328_io2_read(chip, 5));
1358
1359         for (tmp=0; tmp <= 0x01; tmp += 1)
1360                 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1361
1362         /* create mixer interface & switches */
1363         if ((err = snd_azf3328_mixer_new(chip)) < 0)
1364                 return err;
1365
1366         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1367                 snd_azf3328_free(chip);
1368                 return err;
1369         }
1370
1371 #if 0
1372         /* set very low bitrate to reduce noise and power consumption? */
1373         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1374 #endif
1375
1376         /* standard chip init stuff */
1377         spin_lock_irq(&chip->reg_lock);
1378         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
1379         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_SOMETHING_FLAGS);
1380         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_REC_FLAGS);
1381         outb(0x0, chip->codec_port + IDX_IO_IRQ63H);
1382
1383         spin_unlock_irq(&chip->reg_lock);
1384
1385         snd_card_set_dev(card, &pci->dev);
1386
1387         *rchip = chip;
1388         return 0;
1389 }
1390
1391 #ifdef SUPPORT_JOYSTICK
1392 static void __devinit snd_azf3328_config_joystick(azf3328_t *chip, int joystick)
1393 {
1394         unsigned char val;
1395
1396         if (joystick == 1) {
1397                 if ((chip->res_joystick = request_region(0x200, 8, "AZF3328 gameport")) != NULL)
1398                         chip->gameport.io = 0x200;
1399         }
1400
1401         val = inb(chip->io2_port + IDX_IO2_LEGACY_ADDR);
1402         if (chip->res_joystick)
1403                 val |= LEGACY_JOY;
1404         else
1405                 val &= ~LEGACY_JOY;
1406
1407         outb(val, chip->io2_port + IDX_IO2_LEGACY_ADDR);
1408         if (chip->res_joystick)
1409                 gameport_register_port(&chip->gameport);
1410 }
1411 #endif
1412
1413 static int __devinit snd_azf3328_probe(struct pci_dev *pci,
1414                                           const struct pci_device_id *pci_id)
1415 {
1416         static int dev;
1417         snd_card_t *card;
1418         azf3328_t *chip;
1419         opl3_t *opl3;
1420         int err;
1421
1422         snd_azf3328_dbgcallenter();
1423         if (dev >= SNDRV_CARDS)
1424                 return -ENODEV;
1425         if (!enable[dev]) {
1426                 dev++;
1427                 return -ENOENT;
1428         }
1429
1430         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1431         if (card == NULL)
1432                 return -ENOMEM;
1433
1434         strcpy(card->driver, "AZF3328");
1435         strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1436
1437         if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1438                 snd_card_free(card);
1439                 return err;
1440         }
1441
1442         if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1443                                         chip->mpu_port, 1, pci->irq, 0,
1444                                         &chip->rmidi)) < 0) {
1445                 snd_printk("azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1446                 snd_card_free(card);
1447                 return err;
1448         }
1449
1450         if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1451                 snd_card_free(card);
1452                 return err;
1453         }
1454
1455         if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1456                             OPL3_HW_AUTO, 1, &opl3) < 0) {
1457                 snd_printk("azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1458                            chip->synth_port, chip->synth_port+2 );
1459         } else {
1460                 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1461                         snd_card_free(card);
1462                         return err;
1463                 }
1464         }
1465
1466         snd_azf3328_dbgio(chip, "create");
1467
1468         sprintf(card->longname, "%s at 0x%lx, irq %i",
1469                 card->shortname, chip->codec_port, chip->irq);
1470
1471         if ((err = snd_card_register(card)) < 0) {
1472                 snd_card_free(card);
1473                 return err;
1474         }
1475
1476 #ifdef MODULE
1477         printk(
1478 "azt3328: Experimental driver for Aztech AZF3328-based soundcards such as PCI168.\n"
1479 "azt3328: ZERO support from Aztech: you might think hard about future purchase.\n"
1480 "azt3328: Feel free to contact hw7oshyuv3001@sneakemail.com for bug reports etc.!\n");
1481 #endif
1482
1483 #ifdef SUPPORT_JOYSTICK
1484         snd_azf3328_config_joystick(chip, joystick[dev]);
1485 #endif
1486
1487         pci_set_drvdata(pci, card);
1488         dev++;
1489
1490         snd_azf3328_dbgcallleave();
1491         return 0;
1492 }
1493
1494 static void __devexit snd_azf3328_remove(struct pci_dev *pci)
1495 {
1496         snd_azf3328_dbgcallenter();
1497         snd_card_free(pci_get_drvdata(pci));
1498         pci_set_drvdata(pci, NULL);
1499         snd_azf3328_dbgcallleave();
1500 }
1501
1502 static struct pci_driver driver = {
1503         .name = "AZF3328",
1504         .id_table = snd_azf3328_ids,
1505         .probe = snd_azf3328_probe,
1506         .remove = __devexit_p(snd_azf3328_remove),
1507 };
1508
1509 static int __init alsa_card_azf3328_init(void)
1510 {
1511         int err;
1512         snd_azf3328_dbgcallenter();
1513         err = pci_module_init(&driver);
1514         snd_azf3328_dbgcallleave();
1515         return err;
1516 }
1517
1518 static void __exit alsa_card_azf3328_exit(void)
1519 {
1520         snd_azf3328_dbgcallenter();
1521         pci_unregister_driver(&driver);
1522         snd_azf3328_dbgcallleave();
1523 }
1524
1525 module_init(alsa_card_azf3328_init)
1526 module_exit(alsa_card_azf3328_exit)