patch-2_6_7-vs1_9_1_12
[linux-2.6.git] / sound / pci / bt87x.c
1 /*
2  * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
3  *
4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5  *
6  * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
7  *
8  *
9  *  This driver is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This driver is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
22  */
23
24 #include <sound/driver.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <asm/io.h>
31 #include <asm/bitops.h>
32 #include <sound/core.h>
33 #include <sound/pcm.h>
34 #include <sound/pcm_params.h>
35 #include <sound/control.h>
36 #include <sound/initval.h>
37
38 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
39 MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
40 MODULE_LICENSE("GPL");
41 MODULE_CLASSES("{sound}");
42 MODULE_DEVICES("{{Brooktree,Bt878},"
43                 "{Brooktree,Bt879}}");
44
45 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
46 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
47 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
48 static int digital_rate[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* digital input rate */
49 static int boot_devs;
50
51 module_param_array(index, int, boot_devs, 0444);
52 MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
53 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
54 module_param_array(id, charp, boot_devs, 0444);
55 MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
56 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
57 module_param_array(enable, bool, boot_devs, 0444);
58 MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
59 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
60 module_param_array(digital_rate, int, boot_devs, 0444);
61 MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
62 MODULE_PARM_SYNTAX(digital_rate, SNDRV_ENABLED);
63
64
65 #ifndef PCI_VENDOR_ID_BROOKTREE
66 #define PCI_VENDOR_ID_BROOKTREE 0x109e
67 #endif
68 #ifndef PCI_DEVICE_ID_BROOKTREE_878
69 #define PCI_DEVICE_ID_BROOKTREE_878 0x0878
70 #endif
71 #ifndef PCI_DEVICE_ID_BROOKTREE_879
72 #define PCI_DEVICE_ID_BROOKTREE_879 0x0879
73 #endif
74
75 /* register offsets */
76 #define REG_INT_STAT            0x100   /* interrupt status */
77 #define REG_INT_MASK            0x104   /* interrupt mask */
78 #define REG_GPIO_DMA_CTL        0x10c   /* audio control */
79 #define REG_PACKET_LEN          0x110   /* audio packet lengths */
80 #define REG_RISC_STRT_ADD       0x114   /* RISC program start address */
81 #define REG_RISC_COUNT          0x120   /* RISC program counter */
82
83 /* interrupt bits */
84 #define INT_OFLOW       (1 <<  3)       /* audio A/D overflow */
85 #define INT_RISCI       (1 << 11)       /* RISC instruction IRQ bit set */
86 #define INT_FBUS        (1 << 12)       /* FIFO overrun due to bus access latency */
87 #define INT_FTRGT       (1 << 13)       /* FIFO overrun due to target latency */
88 #define INT_FDSR        (1 << 14)       /* FIFO data stream resynchronization */
89 #define INT_PPERR       (1 << 15)       /* PCI parity error */
90 #define INT_RIPERR      (1 << 16)       /* RISC instruction parity error */
91 #define INT_PABORT      (1 << 17)       /* PCI master or target abort */
92 #define INT_OCERR       (1 << 18)       /* invalid opcode */
93 #define INT_SCERR       (1 << 19)       /* sync counter overflow */
94 #define INT_RISC_EN     (1 << 27)       /* DMA controller running */
95 #define INT_RISCS_SHIFT       28        /* RISC status bits */
96
97 /* audio control bits */
98 #define CTL_FIFO_ENABLE         (1 <<  0)       /* enable audio data FIFO */
99 #define CTL_RISC_ENABLE         (1 <<  1)       /* enable audio DMA controller */
100 #define CTL_PKTP_4              (0 <<  2)       /* packet mode FIFO trigger point - 4 DWORDs */
101 #define CTL_PKTP_8              (1 <<  2)       /* 8 DWORDs */
102 #define CTL_PKTP_16             (2 <<  2)       /* 16 DWORDs */
103 #define CTL_ACAP_EN             (1 <<  4)       /* enable audio capture */
104 #define CTL_DA_APP              (1 <<  5)       /* GPIO input */
105 #define CTL_DA_IOM_AFE          (0 <<  6)       /* audio A/D input */
106 #define CTL_DA_IOM_DA           (1 <<  6)       /* digital audio input */
107 #define CTL_DA_SDR_SHIFT               8        /* DDF first stage decimation rate */
108 #define CTL_DA_SDR_MASK         (0xf<< 8)
109 #define CTL_DA_LMT              (1 << 12)       /* limit audio data values */
110 #define CTL_DA_ES2              (1 << 13)       /* enable DDF stage 2 */
111 #define CTL_DA_SBR              (1 << 14)       /* samples rounded to 8 bits */
112 #define CTL_DA_DPM              (1 << 15)       /* data packet mode */
113 #define CTL_DA_LRD_SHIFT              16        /* ALRCK delay */
114 #define CTL_DA_MLB              (1 << 21)       /* MSB/LSB format */
115 #define CTL_DA_LRI              (1 << 22)       /* left/right indication */
116 #define CTL_DA_SCE              (1 << 23)       /* sample clock edge */
117 #define CTL_A_SEL_STV           (0 << 24)       /* TV tuner audio input */
118 #define CTL_A_SEL_SFM           (1 << 24)       /* FM audio input */
119 #define CTL_A_SEL_SML           (2 << 24)       /* mic/line audio input */
120 #define CTL_A_SEL_SMXC          (3 << 24)       /* MUX bypass */
121 #define CTL_A_SEL_SHIFT               24
122 #define CTL_A_SEL_MASK          (3 << 24)
123 #define CTL_A_PWRDN             (1 << 26)       /* analog audio power-down */
124 #define CTL_A_G2X               (1 << 27)       /* audio gain boost */
125 #define CTL_A_GAIN_SHIFT              28        /* audio input gain */
126 #define CTL_A_GAIN_MASK         (0xf<<28)
127
128 /* RISC instruction opcodes */
129 #define RISC_WRITE      (0x1 << 28)     /* write FIFO data to memory at address */
130 #define RISC_WRITEC     (0x5 << 28)     /* write FIFO data to memory at current address */
131 #define RISC_SKIP       (0x2 << 28)     /* skip FIFO data */
132 #define RISC_JUMP       (0x7 << 28)     /* jump to address */
133 #define RISC_SYNC       (0x8 << 28)     /* synchronize with FIFO */
134
135 /* RISC instruction bits */
136 #define RISC_BYTES_ENABLE       (0xf << 12)     /* byte enable bits */
137 #define RISC_RESYNC             (  1 << 15)     /* disable FDSR errors */
138 #define RISC_SET_STATUS_SHIFT           16      /* set status bits */
139 #define RISC_RESET_STATUS_SHIFT         20      /* clear status bits */
140 #define RISC_IRQ                (  1 << 24)     /* interrupt */
141 #define RISC_EOL                (  1 << 26)     /* end of line */
142 #define RISC_SOL                (  1 << 27)     /* start of line */
143
144 /* SYNC status bits values */
145 #define RISC_SYNC_FM1   0x6
146 #define RISC_SYNC_VRO   0xc
147
148 #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
149                           INT_RIPERR | INT_PABORT | INT_OCERR)
150 #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
151
152 /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
153 #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
154
155 #define chip_t bt87x_t
156 typedef struct snd_bt87x bt87x_t;
157 struct snd_bt87x {
158         snd_card_t *card;
159         struct pci_dev *pci;
160
161         void *mmio;
162         struct resource *res_mmio;
163         int irq;
164
165         int dig_rate;
166
167         spinlock_t reg_lock;
168         long opened;
169         snd_pcm_substream_t *substream;
170
171         struct snd_dma_device dma_dev;
172         struct snd_dma_buffer dma_risc;
173         unsigned int line_bytes;
174         unsigned int lines;
175
176         u32 reg_control;
177         int current_line;
178 };
179
180 enum { DEVICE_DIGITAL, DEVICE_ANALOG };
181
182 static inline u32 snd_bt87x_readl(bt87x_t *chip, u32 reg)
183 {
184         return readl(chip->mmio + reg);
185 }
186
187 static inline void snd_bt87x_writel(bt87x_t *chip, u32 reg, u32 value)
188 {
189         writel(value, chip->mmio + reg);
190 }
191
192 static int snd_bt87x_create_risc(bt87x_t *chip, snd_pcm_substream_t *substream,
193                                  unsigned int periods, unsigned int period_bytes)
194 {
195         struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream);
196         unsigned int i, offset;
197         u32 *risc;
198
199         if (chip->dma_risc.area == NULL) {
200                 memset(&chip->dma_dev, 0, sizeof(chip->dma_dev));
201                 chip->dma_dev.type = SNDRV_DMA_TYPE_DEV;
202                 chip->dma_dev.dev = snd_dma_pci_data(chip->pci);
203                 if (snd_dma_alloc_pages(&chip->dma_dev, PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
204                         return -ENOMEM;
205         }
206         risc = (u32 *)chip->dma_risc.area;
207         offset = 0;
208         *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
209         *risc++ = cpu_to_le32(0);
210         for (i = 0; i < periods; ++i) {
211                 u32 rest;
212
213                 rest = period_bytes;
214                 do {
215                         u32 cmd, len;
216
217                         len = PAGE_SIZE - (offset % PAGE_SIZE);
218                         if (len > rest)
219                                 len = rest;
220                         cmd = RISC_WRITE | len;
221                         if (rest == period_bytes) {
222                                 u32 block = i * 16 / periods;
223                                 cmd |= RISC_SOL;
224                                 cmd |= block << RISC_SET_STATUS_SHIFT;
225                                 cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
226                         }
227                         if (len == rest)
228                                 cmd |= RISC_EOL | RISC_IRQ;
229                         *risc++ = cpu_to_le32(cmd);
230                         *risc++ = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, offset));
231                         offset += len;
232                         rest -= len;
233                 } while (rest > 0);
234         }
235         *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
236         *risc++ = cpu_to_le32(0);
237         *risc++ = cpu_to_le32(RISC_JUMP);
238         *risc++ = cpu_to_le32(chip->dma_risc.addr);
239         chip->line_bytes = period_bytes;
240         chip->lines = periods;
241         return 0;
242 }
243
244 static void snd_bt87x_free_risc(bt87x_t *chip)
245 {
246         if (chip->dma_risc.area) {
247                 snd_dma_free_pages(&chip->dma_dev, &chip->dma_risc);
248                 chip->dma_risc.area = NULL;
249         }
250 }
251
252 static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
253 {
254         bt87x_t *chip = snd_magic_cast(bt87x_t, dev_id, return IRQ_NONE);
255         unsigned int status;
256
257         status = snd_bt87x_readl(chip, REG_INT_STAT);
258         if (!(status & MY_INTERRUPTS))
259                 return IRQ_NONE;
260         snd_bt87x_writel(chip, REG_INT_STAT, status & MY_INTERRUPTS);
261
262         if (status & ERROR_INTERRUPTS) {
263                 if (status & (INT_FBUS | INT_FTRGT))
264                         snd_printk(KERN_WARNING "FIFO overrun, status %#08x\n", status);
265                 if (status & INT_OCERR)
266                         snd_printk(KERN_ERR "internal RISC error, status %#08x\n", status);
267                 if (status & (INT_PPERR | INT_RIPERR | INT_PABORT)) {
268                         u16 pci_status;
269                         pci_read_config_word(chip->pci, PCI_STATUS, &pci_status);
270                         pci_write_config_word(chip->pci, PCI_STATUS, pci_status &
271                                               (PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT |
272                                                PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT |
273                                                PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY));
274                         snd_printk(KERN_ERR "Aieee - PCI error! status %#08x, PCI status %#04x\n",
275                                    status, pci_status);
276                 }
277         }
278         if (status & INT_RISCI) {
279                 int current_block, irq_block;
280
281                 /* assume that exactly one line has been recorded */
282                 chip->current_line = (chip->current_line + 1) % chip->lines;
283                 /* but check if some interrupts have been skipped */
284                 current_block = chip->current_line * 16 / chip->lines;
285                 irq_block = status >> INT_RISCS_SHIFT;
286                 if (current_block != irq_block)
287                         chip->current_line = (irq_block * chip->lines + 15) / 16;
288
289                 snd_pcm_period_elapsed(chip->substream);
290         }
291         return IRQ_HANDLED;
292 }
293
294 static snd_pcm_hardware_t snd_bt87x_digital_hw = {
295         .info = SNDRV_PCM_INFO_MMAP |
296                 SNDRV_PCM_INFO_INTERLEAVED |
297                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
298                 SNDRV_PCM_INFO_MMAP_VALID,
299         .formats = SNDRV_PCM_FMTBIT_S16_LE,
300         .rates = 0, /* set at runtime */
301         .channels_min = 2,
302         .channels_max = 2,
303         .buffer_bytes_max = 255 * 4092,
304         .period_bytes_min = 32,
305         .period_bytes_max = 4092,
306         .periods_min = 2,
307         .periods_max = 255,
308 };
309
310 static snd_pcm_hardware_t snd_bt87x_analog_hw = {
311         .info = SNDRV_PCM_INFO_MMAP |
312                 SNDRV_PCM_INFO_INTERLEAVED |
313                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
314                 SNDRV_PCM_INFO_MMAP_VALID,
315         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
316         .rates = SNDRV_PCM_RATE_KNOT,
317         .rate_min = 119467,
318         .rate_max = 448000,
319         .channels_min = 1,
320         .channels_max = 1,
321         .buffer_bytes_max = 255 * 4092,
322         .period_bytes_min = 32,
323         .period_bytes_max = 4092,
324         .periods_min = 2,
325         .periods_max = 255,
326 };
327
328 static int snd_bt87x_set_digital_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
329 {
330         static struct {
331                 int rate;
332                 unsigned int bit;
333         } ratebits[] = {
334                 {8000, SNDRV_PCM_RATE_8000},
335                 {11025, SNDRV_PCM_RATE_11025},
336                 {16000, SNDRV_PCM_RATE_16000},
337                 {22050, SNDRV_PCM_RATE_22050},
338                 {32000, SNDRV_PCM_RATE_32000},
339                 {44100, SNDRV_PCM_RATE_44100},
340                 {48000, SNDRV_PCM_RATE_48000}
341         };
342         int i;
343
344         chip->reg_control |= CTL_DA_IOM_DA;
345         runtime->hw = snd_bt87x_digital_hw;
346         runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
347         for (i = 0; i < ARRAY_SIZE(ratebits); ++i)
348                 if (chip->dig_rate == ratebits[i].rate) {
349                         runtime->hw.rates = ratebits[i].bit;
350                         break;
351                 }
352         runtime->hw.rate_min = chip->dig_rate;
353         runtime->hw.rate_max = chip->dig_rate;
354         return 0;
355 }
356
357 static int snd_bt87x_set_analog_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
358 {
359         static unsigned int rates[] = {
360                 119467, 128000, 137846, 149333, 162909, 179200,
361                 199111, 224000, 256000, 298667, 358400, 448000
362         };
363         static snd_pcm_hw_constraint_list_t constraint_rates = {
364                 .count = ARRAY_SIZE(rates),
365                 .list = rates,
366                 .mask = 0,
367         };
368
369         chip->reg_control &= ~CTL_DA_IOM_DA;
370         runtime->hw = snd_bt87x_analog_hw;
371         return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
372                                           &constraint_rates);
373 }
374
375 static int snd_bt87x_pcm_open(snd_pcm_substream_t *substream)
376 {
377         bt87x_t *chip = snd_pcm_substream_chip(substream);
378         snd_pcm_runtime_t *runtime = substream->runtime;
379         int err;
380
381         if (test_and_set_bit(0, &chip->opened))
382                 return -EBUSY;
383
384         if (substream->pcm->device == DEVICE_DIGITAL)
385                 err = snd_bt87x_set_digital_hw(chip, runtime);
386         else
387                 err = snd_bt87x_set_analog_hw(chip, runtime);
388         if (err < 0)
389                 goto _error;
390
391         err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
392         if (err < 0)
393                 goto _error;
394
395         chip->substream = substream;
396         return 0;
397
398 _error:
399         clear_bit(0, &chip->opened);
400         smp_mb__after_clear_bit();
401         return err;
402 }
403
404 static int snd_bt87x_close(snd_pcm_substream_t *substream)
405 {
406         bt87x_t *chip = snd_pcm_substream_chip(substream);
407
408         chip->substream = NULL;
409         clear_bit(0, &chip->opened);
410         smp_mb__after_clear_bit();
411         return 0;
412 }
413
414 static int snd_bt87x_hw_params(snd_pcm_substream_t *substream,
415                                snd_pcm_hw_params_t *hw_params)
416 {
417         bt87x_t *chip = snd_pcm_substream_chip(substream);
418         int err;
419
420         err = snd_pcm_lib_malloc_pages(substream,
421                                        params_buffer_bytes(hw_params));
422         if (err < 0)
423                 return err;
424         return snd_bt87x_create_risc(chip, substream,
425                                      params_periods(hw_params),
426                                      params_period_bytes(hw_params));
427 }
428
429 static int snd_bt87x_hw_free(snd_pcm_substream_t *substream)
430 {
431         bt87x_t *chip = snd_pcm_substream_chip(substream);
432
433         snd_bt87x_free_risc(chip);
434         snd_pcm_lib_free_pages(substream);
435         return 0;
436 }
437
438 static int snd_bt87x_prepare(snd_pcm_substream_t *substream)
439 {
440         bt87x_t *chip = snd_pcm_substream_chip(substream);
441         snd_pcm_runtime_t *runtime = substream->runtime;
442         unsigned long flags;
443         int decimation;
444
445         spin_lock_irqsave(&chip->reg_lock, flags);
446         chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
447         decimation = (1792000 + 5) / runtime->rate;
448         chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
449         if (runtime->format == SNDRV_PCM_FORMAT_S8)
450                 chip->reg_control |= CTL_DA_SBR;
451         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
452         spin_unlock_irqrestore(&chip->reg_lock, flags);
453         return 0;
454 }
455
456 static int snd_bt87x_start(bt87x_t *chip)
457 {
458         unsigned long flags;
459
460         spin_lock_irqsave(&chip->reg_lock, flags);
461         chip->current_line = 0;
462         chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
463         snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
464         snd_bt87x_writel(chip, REG_PACKET_LEN,
465                          chip->line_bytes | (chip->lines << 16));
466         snd_bt87x_writel(chip, REG_INT_MASK, MY_INTERRUPTS);
467         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
468         spin_unlock_irqrestore(&chip->reg_lock, flags);
469         return 0;
470 }
471
472 static int snd_bt87x_stop(bt87x_t *chip)
473 {
474         unsigned long flags;
475
476         spin_lock_irqsave(&chip->reg_lock, flags);
477         chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
478         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
479         snd_bt87x_writel(chip, REG_INT_MASK, 0);
480         snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
481         spin_unlock_irqrestore(&chip->reg_lock, flags);
482         return 0;
483 }
484
485 static int snd_bt87x_trigger(snd_pcm_substream_t *substream, int cmd)
486 {
487         bt87x_t *chip = snd_pcm_substream_chip(substream);
488
489         switch (cmd) {
490         case SNDRV_PCM_TRIGGER_START:
491                 return snd_bt87x_start(chip);
492         case SNDRV_PCM_TRIGGER_STOP:
493                 return snd_bt87x_stop(chip);
494         default:
495                 return -EINVAL;
496         }
497 }
498
499 static snd_pcm_uframes_t snd_bt87x_pointer(snd_pcm_substream_t *substream)
500 {
501         bt87x_t *chip = snd_pcm_substream_chip(substream);
502         snd_pcm_runtime_t *runtime = substream->runtime;
503
504         return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
505 }
506
507 static snd_pcm_ops_t snd_bt87x_pcm_ops = {
508         .open = snd_bt87x_pcm_open,
509         .close = snd_bt87x_close,
510         .ioctl = snd_pcm_lib_ioctl,
511         .hw_params = snd_bt87x_hw_params,
512         .hw_free = snd_bt87x_hw_free,
513         .prepare = snd_bt87x_prepare,
514         .trigger = snd_bt87x_trigger,
515         .pointer = snd_bt87x_pointer,
516         .page = snd_pcm_sgbuf_ops_page,
517 };
518
519 static int snd_bt87x_capture_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
520 {
521         info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
522         info->count = 1;
523         info->value.integer.min = 0;
524         info->value.integer.max = 15;
525         return 0;
526 }
527
528 static int snd_bt87x_capture_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
529 {
530         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
531
532         value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
533         return 0;
534 }
535
536 static int snd_bt87x_capture_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
537 {
538         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
539         unsigned long flags;
540         u32 old_control;
541         int changed;
542
543         spin_lock_irqsave(&chip->reg_lock, flags);
544         old_control = chip->reg_control;
545         chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
546                 | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
547         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
548         changed = old_control != chip->reg_control;
549         spin_unlock_irqrestore(&chip->reg_lock, flags);
550         return changed;
551 }
552
553 static snd_kcontrol_new_t snd_bt87x_capture_volume = {
554         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
555         .name = "Capture Volume",
556         .info = snd_bt87x_capture_volume_info,
557         .get = snd_bt87x_capture_volume_get,
558         .put = snd_bt87x_capture_volume_put,
559 };
560
561 static int snd_bt87x_capture_boost_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
562 {
563         info->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
564         info->count = 1;
565         info->value.integer.min = 0;
566         info->value.integer.max = 1;
567         return 0;
568 }
569
570 static int snd_bt87x_capture_boost_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
571 {
572         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
573
574         value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
575         return 0;
576 }
577
578 static int snd_bt87x_capture_boost_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
579 {
580         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
581         unsigned long flags;
582         u32 old_control;
583         int changed;
584
585         spin_lock_irqsave(&chip->reg_lock, flags);
586         old_control = chip->reg_control;
587         chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
588                 | (value->value.integer.value[0] ? CTL_A_G2X : 0);
589         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
590         changed = chip->reg_control != old_control;
591         spin_unlock_irqrestore(&chip->reg_lock, flags);
592         return changed;
593 }
594
595 static snd_kcontrol_new_t snd_bt87x_capture_boost = {
596         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
597         .name = "Capture Boost",
598         .info = snd_bt87x_capture_boost_info,
599         .get = snd_bt87x_capture_boost_get,
600         .put = snd_bt87x_capture_boost_put,
601 };
602
603 static int snd_bt87x_capture_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
604 {
605         static char *texts[3] = {"TV Tuner", "FM", "Mic/Line"};
606
607         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
608         info->count = 1;
609         info->value.enumerated.items = 3;
610         if (info->value.enumerated.item > 2)
611                 info->value.enumerated.item = 2;
612         strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
613         return 0;
614 }
615
616 static int snd_bt87x_capture_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
617 {
618         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
619
620         value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
621         return 0;
622 }
623
624 static int snd_bt87x_capture_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
625 {
626         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
627         unsigned long flags;
628         u32 old_control;
629         int changed;
630
631         spin_lock_irqsave(&chip->reg_lock, flags);
632         old_control = chip->reg_control;
633         chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
634                 | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
635         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
636         changed = chip->reg_control != old_control;
637         spin_unlock_irqrestore(&chip->reg_lock, flags);
638         return changed;
639 }
640
641 static snd_kcontrol_new_t snd_bt87x_capture_source = {
642         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
643         .name = "Capture Source",
644         .info = snd_bt87x_capture_source_info,
645         .get = snd_bt87x_capture_source_get,
646         .put = snd_bt87x_capture_source_put,
647 };
648
649 static int snd_bt87x_free(bt87x_t *chip)
650 {
651         if (chip->mmio) {
652                 snd_bt87x_stop(chip);
653                 if (chip->irq >= 0)
654                         synchronize_irq(chip->irq);
655
656                 iounmap(chip->mmio);
657         }
658         if (chip->res_mmio) {
659                 release_resource(chip->res_mmio);
660                 kfree_nocheck(chip->res_mmio);
661         }
662         if (chip->irq >= 0)
663                 free_irq(chip->irq, chip);
664         snd_magic_kfree(chip);
665         return 0;
666 }
667
668 static int snd_bt87x_dev_free(snd_device_t *device)
669 {
670         bt87x_t *chip = snd_magic_cast(bt87x_t, device->device_data, return -ENXIO);
671         return snd_bt87x_free(chip);
672 }
673
674 static int __devinit snd_bt87x_pcm(bt87x_t *chip, int device, char *name)
675 {
676         int err;
677         snd_pcm_t *pcm;
678
679         err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
680         if (err < 0)
681                 return err;
682         pcm->private_data = chip;
683         strcpy(pcm->name, name);
684         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
685         return snd_pcm_lib_preallocate_pages_for_all(pcm,
686                                                      SNDRV_DMA_TYPE_DEV_SG,
687                                                      snd_dma_pci_data(chip->pci),
688                                                         128 * 1024,
689                                                         (255 * 4092 + 1023) & ~1023);
690 }
691
692 static int __devinit snd_bt87x_create(snd_card_t *card,
693                                       struct pci_dev *pci,
694                                       bt87x_t **rchip)
695 {
696         bt87x_t *chip;
697         int err;
698         static snd_device_ops_t ops = {
699                 .dev_free = snd_bt87x_dev_free
700         };
701
702         *rchip = NULL;
703
704         err = pci_enable_device(pci);
705         if (err < 0)
706                 return err;
707
708         chip = snd_magic_kcalloc(bt87x_t, 0, GFP_KERNEL);
709         if (!chip)
710                 return -ENOMEM;
711         chip->card = card;
712         chip->pci = pci;
713         chip->irq = -1;
714         spin_lock_init(&chip->reg_lock);
715
716         chip->res_mmio = request_mem_region(pci_resource_start(pci, 0),
717                                             pci_resource_len(pci, 0),
718                                             "Bt87x audio");
719         if (!chip->res_mmio) {
720                 snd_bt87x_free(chip);
721                 snd_printk(KERN_ERR "cannot allocate io memory\n");
722                 return -EBUSY;
723         }
724         chip->mmio = ioremap_nocache(pci_resource_start(pci, 0),
725                                      pci_resource_len(pci, 0));
726         if (!chip->mmio) {
727                 snd_bt87x_free(chip);
728                 snd_printk(KERN_ERR "cannot remap io memory\n");
729                 return -ENOMEM;
730         }
731
732         chip->reg_control = CTL_DA_ES2 | CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
733         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
734         snd_bt87x_writel(chip, REG_INT_MASK, 0);
735         snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
736
737         if (request_irq(pci->irq, snd_bt87x_interrupt, SA_INTERRUPT | SA_SHIRQ,
738                         "Bt87x audio", chip)) {
739                 snd_bt87x_free(chip);
740                 snd_printk(KERN_ERR "cannot grab irq\n");
741                 return -EBUSY;
742         }
743         chip->irq = pci->irq;
744         pci_set_master(pci);
745         synchronize_irq(chip->irq);
746
747         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
748         if (err < 0) {
749                 snd_bt87x_free(chip);
750                 return err;
751         }
752         snd_card_set_dev(card, &pci->dev);
753         *rchip = chip;
754         return 0;
755 }
756
757 static int __devinit snd_bt87x_probe(struct pci_dev *pci,
758                                      const struct pci_device_id *pci_id)
759 {
760         static int dev;
761         snd_card_t *card;
762         bt87x_t *chip;
763         int err;
764
765         if (dev >= SNDRV_CARDS)
766                 return -ENODEV;
767         if (!enable[dev]) {
768                 ++dev;
769                 return -ENOENT;
770         }
771
772         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
773         if (!card)
774                 return -ENOMEM;
775
776         err = snd_bt87x_create(card, pci, &chip);
777         if (err < 0)
778                 goto _error;
779
780         if (digital_rate[dev] > 0)
781                 chip->dig_rate = digital_rate[dev];
782         else
783                 chip->dig_rate = (int)pci_id->driver_data;
784
785         err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
786         if (err < 0)
787                 goto _error;
788         err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
789         if (err < 0)
790                 goto _error;
791
792         err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_volume, chip));
793         if (err < 0)
794                 goto _error;
795         err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_boost, chip));
796         if (err < 0)
797                 goto _error;
798         err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_source, chip));
799         if (err < 0)
800                 goto _error;
801
802         strcpy(card->driver, "Bt87x");
803         sprintf(card->shortname, "Brooktree Bt%x", pci->device);
804         sprintf(card->longname, "%s at %#lx, irq %i",
805                 card->shortname, pci_resource_start(pci, 0), chip->irq);
806         strcpy(card->mixername, "Bt87x");
807
808         err = snd_card_register(card);
809         if (err < 0)
810                 goto _error;
811
812         pci_set_drvdata(pci, card);
813         ++dev;
814         return 0;
815
816 _error:
817         snd_card_free(card);
818         return err;
819 }
820
821 static void __devexit snd_bt87x_remove(struct pci_dev *pci)
822 {
823         snd_card_free(pci_get_drvdata(pci));
824         pci_set_drvdata(pci, NULL);
825 }
826
827 #define BT_DEVICE(chip, subvend, subdev, rate) \
828         { .vendor = PCI_VENDOR_ID_BROOKTREE, \
829           .device = PCI_DEVICE_ID_BROOKTREE_##chip, \
830           .subvendor = subvend, .subdevice = subdev, \
831           .driver_data = rate }
832
833 /* driver_data is the default digital_rate value for that device */
834 static struct pci_device_id snd_bt87x_ids[] = {
835         BT_DEVICE(878, 0x0070, 0xff01, 44100), /* Osprey 200 */
836
837         /* default entries for 32kHz and generic Bt87x cards */
838         BT_DEVICE(878, PCI_ANY_ID, PCI_ANY_ID, 32000),
839         BT_DEVICE(879, PCI_ANY_ID, PCI_ANY_ID, 32000),
840         { }
841 };
842 MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
843
844 static struct pci_driver driver = {
845         .name = "Bt87x",
846         .id_table = snd_bt87x_ids,
847         .probe = snd_bt87x_probe,
848         .remove = __devexit_p(snd_bt87x_remove),
849 };
850
851 static int __init alsa_card_bt87x_init(void)
852 {
853         return pci_module_init(&driver);
854 }
855
856 static void __exit alsa_card_bt87x_exit(void)
857 {
858         pci_unregister_driver(&driver);
859 }
860
861 module_init(alsa_card_bt87x_init)
862 module_exit(alsa_card_bt87x_exit)