sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <sound/driver.h>
  24 #include <asm/io.h>
  25 #include <linux/delay.h>
  26 #include <linux/pci.h>
  27 #include <linux/pm.h>
  28 #include <linux/init.h>
  29 #include <linux/slab.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/mutex.h>
  32
  33 #include <sound/core.h>
  34 #include <sound/control.h>
  35 #include <sound/info.h>
  36 #include <sound/asoundef.h>
  37 #include <sound/cs46xx.h>
  38
  39 #include "cs46xx_lib.h"
  40 #include "dsp_spos.h"
  41
  42 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  43                                   struct dsp_scb_descriptor * fg_entry);
  44
  45 static enum wide_opcode wide_opcodes[] = {
  46         WIDE_FOR_BEGIN_LOOP,
  47         WIDE_FOR_BEGIN_LOOP2,
  48         WIDE_COND_GOTO_ADDR,
  49         WIDE_COND_GOTO_CALL,
  50         WIDE_TBEQ_COND_GOTO_ADDR,
  51         WIDE_TBEQ_COND_CALL_ADDR,
  52         WIDE_TBEQ_NCOND_GOTO_ADDR,
  53         WIDE_TBEQ_NCOND_CALL_ADDR,
  54         WIDE_TBEQ_COND_GOTO1_ADDR,
  55         WIDE_TBEQ_COND_CALL1_ADDR,
  56         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  57         WIDE_TBEQ_NCOND_CALL1_ADDR
  58 };
  59
  60 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  61                                        u32 overlay_begin_address)
  62 {
  63         unsigned int i = 0, j, nreallocated = 0;
  64         u32 hival,loval,address;
  65         u32 mop_operands,mop_type,wide_op;
  66         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  67
  68         snd_assert( ((size % 2) == 0), return -EINVAL);
  69
  70         while (i < size) {
  71                 loval = data[i++];
  72                 hival = data[i++];
  73
  74                 if (ins->code.offset > 0) {
  75                         mop_operands = (hival >> 6) & 0x03fff;
  76                         mop_type = mop_operands >> 10;
  77
  78                         /* check for wide type instruction */
  79                         if (mop_type == 0 &&
  80                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  81                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  82                                 wide_op = loval & 0x7f;
  83                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  84                                         if (wide_opcodes[j] == wide_op) {
  85                                                 /* need to reallocate instruction */
  86                                                 address  = (hival & 0x00FFF) << 5;
  87                                                 address |=  loval >> 15;
  88
  89                                                 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
  90
  91                                                 if ( !(address & 0x8000) ) {
  92                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  93                                                 } else {
  94                                                         snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
  95                                                 }
  96
  97                                                 hival &= 0xFF000;
  98                                                 loval &= 0x07FFF;
  99
 100                                                 hival |= ( (address >> 5)  & 0x00FFF);
 101                                                 loval |= ( (address << 15) & 0xF8000);
 102
 103                                                 address  = (hival & 0x00FFF) << 5;
 104                                                 address |=  loval >> 15;
 105
 106                                                 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
 107                                                 nreallocated ++;
 108                                         } /* wide_opcodes[j] == wide_op */
 109                                 } /* for */
 110                         } /* mod_type == 0 ... */
 111                 } /* ins->code.offset > 0 */
 112
 113                 ins->code.data[ins->code.size++] = loval;
 114                 ins->code.data[ins->code.size++] = hival;
 115         }
 116
 117         snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
 118         return nreallocated;
 119 }
 120
 121 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 122 {
 123         int i;
 124         for (i = 0;i < module->nsegments; ++i) {
 125                 if (module->segments[i].segment_type == seg_type) {
 126                         return (module->segments + i);
 127                 }
 128         }
 129
 130         return NULL;
 131 };
 132
 133 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 134 {
 135         int index = ins->symbol_table.nsymbols,i;
 136
 137         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 138                 if (ins->symbol_table.symbols[i].deleted) {
 139                         index = i;
 140                         break;
 141                 }
 142         }
 143
 144         return index;
 145 }
 146
 147 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 148 {
 149         int i;
 150         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 151
 152         if (module->symbol_table.nsymbols > 0) {
 153                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 154                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 155                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 156                 }
 157         }
 158
 159         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 160                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 161                         snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 162                         return -ENOMEM;
 163                 }
 164
 165
 166                 if (cs46xx_dsp_lookup_symbol(chip,
 167                                              module->symbol_table.symbols[i].symbol_name,
 168                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 169
 170                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 171                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 172                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 173                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 174
 175                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 176                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 177
 178                         ins->symbol_table.nsymbols++;
 179                 } else {
 180           /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 181                              module->symbol_table.symbols[i].symbol_name); */
 182                 }
 183         }
 184
 185         return 0;
 186 }
 187
 188 static struct dsp_symbol_entry *
 189 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 190 {
 191         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 192         struct dsp_symbol_entry * symbol = NULL;
 193         int index;
 194
 195         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 196                 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 197                 return NULL;
 198         }
 199
 200         if (cs46xx_dsp_lookup_symbol(chip,
 201                                      symbol_name,
 202                                      type) != NULL) {
 203                 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 204                 return NULL;
 205         }
 206
 207         index = find_free_symbol_index (ins);
 208
 209         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 210         ins->symbol_table.symbols[index].address = address;
 211         ins->symbol_table.symbols[index].symbol_type = type;
 212         ins->symbol_table.symbols[index].module = NULL;
 213         ins->symbol_table.symbols[index].deleted = 0;
 214         symbol = (ins->symbol_table.symbols + index);
 215
 216         if (index > ins->symbol_table.highest_frag_index)
 217                 ins->symbol_table.highest_frag_index = index;
 218
 219         if (index == ins->symbol_table.nsymbols)
 220                 ins->symbol_table.nsymbols++; /* no frag. in list */
 221
 222         return symbol;
 223 }
 224
 225 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 226 {
 227         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 228
 229         if (ins == NULL)
 230                 return NULL;
 231
 232         /* better to use vmalloc for this big table */
 233         ins->symbol_table.nsymbols = 0;
 234         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 235                                             DSP_MAX_SYMBOLS);
 236         ins->symbol_table.highest_frag_index = 0;
 237
 238         if (ins->symbol_table.symbols == NULL) {
 239                 cs46xx_dsp_spos_destroy(chip);
 240                 goto error;
 241         }
 242
 243         ins->code.offset = 0;
 244         ins->code.size = 0;
 245         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 246
 247         if (ins->code.data == NULL) {
 248                 cs46xx_dsp_spos_destroy(chip);
 249                 goto error;
 250         }
 251
 252         ins->nscb = 0;
 253         ins->ntask = 0;
 254
 255         ins->nmodules = 0;
 256         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 257
 258         if (ins->modules == NULL) {
 259                 cs46xx_dsp_spos_destroy(chip);
 260                 goto error;
 261         }
 262
 263         /* default SPDIF input sample rate
 264            to 48000 khz */
 265         ins->spdif_in_sample_rate = 48000;
 266
 267         /* maximize volume */
 268         ins->dac_volume_right = 0x8000;
 269         ins->dac_volume_left = 0x8000;
 270         ins->spdif_input_volume_right = 0x8000;
 271         ins->spdif_input_volume_left = 0x8000;
 272
 273         /* set left and right validity bits and
 274            default channel status */
 275         ins->spdif_csuv_default =
 276                 ins->spdif_csuv_stream =
 277          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 278          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 279          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 280          /* left and right validity bits */ (1 << 13) | (1 << 12);
 281
 282         return ins;
 283
 284 error:
 285         kfree(ins);
 286         return NULL;
 287 }
 288
 289 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 290 {
 291         int i;
 292         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 293
 294         snd_assert(ins != NULL, return);
 295
 296         mutex_lock(&chip->spos_mutex);
 297         for (i = 0; i < ins->nscb; ++i) {
 298                 if (ins->scbs[i].deleted) continue;
 299
 300                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 301         }
 302
 303         kfree(ins->code.data);
 304         vfree(ins->symbol_table.symbols);
 305         kfree(ins->modules);
 306         kfree(ins);
 307         mutex_unlock(&chip->spos_mutex);
 308 }
 309
 310 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 311 {
 312         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 313         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 314         struct dsp_segment_desc * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER);
 315         struct dsp_segment_desc * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE);
 316         u32 doffset, dsize;
 317
 318         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 319                 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
 320                 return -ENOMEM;
 321         }
 322
 323         snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
 324
 325         if (ins->nmodules == 0) {
 326                 snd_printdd("dsp_spos: clearing parameter area\n");
 327                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 328         }
 329
 330         if (parameter == NULL) {
 331                 snd_printdd("dsp_spos: module got no parameter segment\n");
 332         } else {
 333                 if (ins->nmodules > 0) {
 334                         snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n");
 335                 }
 336
 337                 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 338                 dsize   = parameter->size * 4;
 339
 340                 snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
 341                             doffset,doffset + dsize);
 342
 343                 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 344                         snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n");
 345                         return -EINVAL;
 346                 }
 347         }
 348
 349         if (ins->nmodules == 0) {
 350                 snd_printdd("dsp_spos: clearing sample area\n");
 351                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 352         }
 353
 354         if (sample == NULL) {
 355                 snd_printdd("dsp_spos: module got no sample segment\n");
 356         } else {
 357                 if (ins->nmodules > 0) {
 358                         snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n");
 359                 }
 360
 361                 doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 362                 dsize   =  sample->size * 4;
 363
 364                 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 365                             doffset,doffset + dsize);
 366
 367                 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 368                         snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
 369                         return -EINVAL;
 370                 }
 371         }
 372
 373
 374         if (ins->nmodules == 0) {
 375                 snd_printdd("dsp_spos: clearing code area\n");
 376                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 377         }
 378
 379         if (code == NULL) {
 380                 snd_printdd("dsp_spos: module got no code segment\n");
 381         } else {
 382                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 383                         snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
 384                         return -ENOMEM;
 385                 }
 386
 387                 module->load_address = ins->code.offset;
 388                 module->overlay_begin_address = 0x000;
 389
 390                 /* if module has a code segment it must have
 391                    symbol table */
 392                 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
 393                 if (add_symbols(chip,module)) {
 394                         snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
 395                         return -ENOMEM;
 396                 }
 397
 398                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 399                 dsize   = code->size * 4;
 400                 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
 401                             doffset,doffset + dsize);
 402
 403                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 404
 405                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 406                         snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
 407                         return -EINVAL;
 408                 }
 409
 410                 ins->code.offset += code->size;
 411         }
 412
 413         /* NOTE: module segments and symbol table must be
 414            statically allocated. Case that module data is
 415            not generated by the ospparser */
 416         ins->modules[ins->nmodules] = *module;
 417         ins->nmodules++;
 418
 419         return 0;
 420 }
 421
 422 struct dsp_symbol_entry *
 423 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 424 {
 425         int i;
 426         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 427
 428         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 429
 430                 if (ins->symbol_table.symbols[i].deleted)
 431                         continue;
 432
 433                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 434                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 435                         return (ins->symbol_table.symbols + i);
 436                 }
 437         }
 438
 439 #if 0
 440         printk ("dsp_spos: symbol <%s> type %02x not found\n",
 441                 symbol_name,symbol_type);
 442 #endif
 443
 444         return NULL;
 445 }
 446
 447
 448 #ifdef CONFIG_PROC_FS
 449 static struct dsp_symbol_entry *
 450 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 451 {
 452         int i;
 453         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 454
 455         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 456
 457                 if (ins->symbol_table.symbols[i].deleted)
 458                         continue;
 459
 460                 if (ins->symbol_table.symbols[i].address == address &&
 461                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 462                         return (ins->symbol_table.symbols + i);
 463                 }
 464         }
 465
 466
 467         return NULL;
 468 }
 469
 470
 471 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 472                                                struct snd_info_buffer *buffer)
 473 {
 474         struct snd_cs46xx *chip = entry->private_data;
 475         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 476         int i;
 477
 478         snd_iprintf(buffer, "SYMBOLS:\n");
 479         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 480                 char *module_str = "system";
 481
 482                 if (ins->symbol_table.symbols[i].deleted)
 483                         continue;
 484
 485                 if (ins->symbol_table.symbols[i].module != NULL) {
 486                         module_str = ins->symbol_table.symbols[i].module->module_name;
 487                 }
 488
 489
 490                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 491                             ins->symbol_table.symbols[i].address,
 492                             ins->symbol_table.symbols[i].symbol_type,
 493                             ins->symbol_table.symbols[i].symbol_name,
 494                             module_str);
 495         }
 496 }
 497
 498
 499 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 500                                           struct snd_info_buffer *buffer)
 501 {
 502         struct snd_cs46xx *chip = entry->private_data;
 503         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 504         int i,j;
 505
 506         mutex_lock(&chip->spos_mutex);
 507         snd_iprintf(buffer, "MODULES:\n");
 508         for ( i = 0; i < ins->nmodules; ++i ) {
 509                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 510                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 511                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 512
 513                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 514                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 515                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 516                                     desc->segment_type,desc->offset, desc->size);
 517                 }
 518         }
 519         mutex_unlock(&chip->spos_mutex);
 520 }
 521
 522 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 523                                             struct snd_info_buffer *buffer)
 524 {
 525         struct snd_cs46xx *chip = entry->private_data;
 526         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 527         int i, j, col;
 528         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 529
 530         mutex_lock(&chip->spos_mutex);
 531         snd_iprintf(buffer, "TASK TREES:\n");
 532         for ( i = 0; i < ins->ntask; ++i) {
 533                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 534
 535                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 536                         u32 val;
 537                         if (col == 4) {
 538                                 snd_iprintf(buffer,"\n");
 539                                 col = 0;
 540                         }
 541                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 542                         snd_iprintf(buffer,"%08x ",val);
 543                 }
 544         }
 545
 546         snd_iprintf(buffer,"\n");
 547         mutex_unlock(&chip->spos_mutex);
 548 }
 549
 550 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 551                                       struct snd_info_buffer *buffer)
 552 {
 553         struct snd_cs46xx *chip = entry->private_data;
 554         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 555         int i;
 556
 557         mutex_lock(&chip->spos_mutex);
 558         snd_iprintf(buffer, "SCB's:\n");
 559         for ( i = 0; i < ins->nscb; ++i) {
 560                 if (ins->scbs[i].deleted)
 561                         continue;
 562                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 563
 564                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 565                         snd_iprintf(buffer,"parent [%s:%04x] ",
 566                                     ins->scbs[i].parent_scb_ptr->scb_name,
 567                                     ins->scbs[i].parent_scb_ptr->address);
 568                 } else snd_iprintf(buffer,"parent [none] ");
 569
 570                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 571                             ins->scbs[i].sub_list_ptr->scb_name,
 572                             ins->scbs[i].sub_list_ptr->address,
 573                             ins->scbs[i].next_scb_ptr->scb_name,
 574                             ins->scbs[i].next_scb_ptr->address,
 575                             ins->scbs[i].task_entry->symbol_name,
 576                             ins->scbs[i].task_entry->address);
 577         }
 578
 579         snd_iprintf(buffer,"\n");
 580         mutex_unlock(&chip->spos_mutex);
 581 }
 582
 583 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 584                                                  struct snd_info_buffer *buffer)
 585 {
 586         struct snd_cs46xx *chip = entry->private_data;
 587         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 588         unsigned int i, col = 0;
 589         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 590         struct dsp_symbol_entry * symbol;
 591
 592         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 593                 if (col == 4) {
 594                         snd_iprintf(buffer,"\n");
 595                         col = 0;
 596                 }
 597
 598                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 599                         col = 0;
 600                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 601                 }
 602
 603                 if (col == 0) {
 604                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 605                 }
 606
 607                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 608         }
 609 }
 610
 611 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 612                                               struct snd_info_buffer *buffer)
 613 {
 614         struct snd_cs46xx *chip = entry->private_data;
 615         int i,col = 0;
 616         void __iomem *dst = chip->region.idx[2].remap_addr;
 617
 618         snd_iprintf(buffer,"PCMREADER:\n");
 619         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 620                 if (col == 4) {
 621                         snd_iprintf(buffer,"\n");
 622                         col = 0;
 623                 }
 624
 625                 if (col == 0) {
 626                         snd_iprintf(buffer, "%04X ",i);
 627                 }
 628
 629                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 630         }
 631
 632         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 633
 634         col = 0;
 635         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 636                 if (col == 4) {
 637                         snd_iprintf(buffer,"\n");
 638                         col = 0;
 639                 }
 640
 641                 if (col == 0) {
 642                         snd_iprintf(buffer, "%04X ",i);
 643                 }
 644
 645                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 646         }
 647
 648         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 649         col = 0;
 650         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 651                 if (col == 4) {
 652                         snd_iprintf(buffer,"\n");
 653                         col = 0;
 654                 }
 655
 656                 if (col == 0) {
 657                         snd_iprintf(buffer, "%04X ",i);
 658                 }
 659
 660                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 661         }
 662
 663
 664         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 665         col = 0;
 666         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 667                 if (col == 4) {
 668                         snd_iprintf(buffer,"\n");
 669                         col = 0;
 670                 }
 671
 672                 if (col == 0) {
 673                         snd_iprintf(buffer, "%04X ",i);
 674                 }
 675
 676                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 677         }
 678
 679         snd_iprintf(buffer,"\n...\n");
 680         col = 0;
 681
 682         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 683                 if (col == 4) {
 684                         snd_iprintf(buffer,"\n");
 685                         col = 0;
 686                 }
 687
 688                 if (col == 0) {
 689                         snd_iprintf(buffer, "%04X ",i);
 690                 }
 691
 692                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 693         }
 694
 695
 696         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 697         col = 0;
 698         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 699                 if (col == 4) {
 700                         snd_iprintf(buffer,"\n");
 701                         col = 0;
 702                 }
 703
 704                 if (col == 0) {
 705                         snd_iprintf(buffer, "%04X ",i);
 706                 }
 707
 708                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 709         }
 710
 711         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 712         col = 0;
 713         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 714                 if (col == 4) {
 715                         snd_iprintf(buffer,"\n");
 716                         col = 0;
 717                 }
 718
 719                 if (col == 0) {
 720                         snd_iprintf(buffer, "%04X ",i);
 721                 }
 722
 723                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 724         }
 725 #if 0
 726         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 727         col = 0;
 728         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 729                 if (col == 4) {
 730                         snd_iprintf(buffer,"\n");
 731                         col = 0;
 732                 }
 733
 734                 if (col == 0) {
 735                         snd_iprintf(buffer, "%04X ",i);
 736                 }
 737
 738                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 739         }
 740 #endif
 741
 742         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 743         col = 0;
 744         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 745                 if (col == 4) {
 746                         snd_iprintf(buffer,"\n");
 747                         col = 0;
 748                 }
 749
 750                 if (col == 0) {
 751                         snd_iprintf(buffer, "%04X ",i);
 752                 }
 753
 754                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 755         }
 756         snd_iprintf(buffer,"\n");
 757 }
 758
 759 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 760 {
 761         struct snd_info_entry *entry;
 762         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 763         int i;
 764
 765         ins->snd_card = card;
 766
 767         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 768                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 769                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 770
 771                 if (snd_info_register(entry) < 0) {
 772                         snd_info_free_entry(entry);
 773                         entry = NULL;
 774                 }
 775         }
 776
 777         ins->proc_dsp_dir = entry;
 778
 779         if (!ins->proc_dsp_dir)
 780                 return -ENOMEM;
 781
 782         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 783                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 784                 entry->private_data = chip;
 785                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 786                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 787                 if (snd_info_register(entry) < 0) {
 788                         snd_info_free_entry(entry);
 789                         entry = NULL;
 790                 }
 791         }
 792         ins->proc_sym_info_entry = entry;
 793
 794         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 795                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 796                 entry->private_data = chip;
 797                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 798                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 799                 if (snd_info_register(entry) < 0) {
 800                         snd_info_free_entry(entry);
 801                         entry = NULL;
 802                 }
 803         }
 804         ins->proc_modules_info_entry = entry;
 805
 806         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 807                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 808                 entry->private_data = chip;
 809                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 810                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 811                 if (snd_info_register(entry) < 0) {
 812                         snd_info_free_entry(entry);
 813                         entry = NULL;
 814                 }
 815         }
 816         ins->proc_parameter_dump_info_entry = entry;
 817
 818         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 819                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 820                 entry->private_data = chip;
 821                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 822                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 823                 if (snd_info_register(entry) < 0) {
 824                         snd_info_free_entry(entry);
 825                         entry = NULL;
 826                 }
 827         }
 828         ins->proc_sample_dump_info_entry = entry;
 829
 830         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 831                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 832                 entry->private_data = chip;
 833                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 834                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 835                 if (snd_info_register(entry) < 0) {
 836                         snd_info_free_entry(entry);
 837                         entry = NULL;
 838                 }
 839         }
 840         ins->proc_task_info_entry = entry;
 841
 842         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 843                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 844                 entry->private_data = chip;
 845                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 846                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 847                 if (snd_info_register(entry) < 0) {
 848                         snd_info_free_entry(entry);
 849                         entry = NULL;
 850                 }
 851         }
 852         ins->proc_scb_info_entry = entry;
 853
 854         mutex_lock(&chip->spos_mutex);
 855         /* register/update SCB's entries on proc */
 856         for (i = 0; i < ins->nscb; ++i) {
 857                 if (ins->scbs[i].deleted) continue;
 858
 859                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 860         }
 861         mutex_unlock(&chip->spos_mutex);
 862
 863         return 0;
 864 }
 865
 866 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 867 {
 868         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 869         int i;
 870
 871         snd_info_free_entry(ins->proc_sym_info_entry);
 872         ins->proc_sym_info_entry = NULL;
 873
 874         snd_info_free_entry(ins->proc_modules_info_entry);
 875         ins->proc_modules_info_entry = NULL;
 876
 877         snd_info_free_entry(ins->proc_parameter_dump_info_entry);
 878         ins->proc_parameter_dump_info_entry = NULL;
 879
 880         snd_info_free_entry(ins->proc_sample_dump_info_entry);
 881         ins->proc_sample_dump_info_entry = NULL;
 882
 883         snd_info_free_entry(ins->proc_scb_info_entry);
 884         ins->proc_scb_info_entry = NULL;
 885
 886         snd_info_free_entry(ins->proc_task_info_entry);
 887         ins->proc_task_info_entry = NULL;
 888
 889         mutex_lock(&chip->spos_mutex);
 890         for (i = 0; i < ins->nscb; ++i) {
 891                 if (ins->scbs[i].deleted) continue;
 892                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 893         }
 894         mutex_unlock(&chip->spos_mutex);
 895
 896         snd_info_free_entry(ins->proc_dsp_dir);
 897         ins->proc_dsp_dir = NULL;
 898
 899         return 0;
 900 }
 901 #endif /* CONFIG_PROC_FS */
 902
 903 static int debug_tree;
 904 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 905                                    u32  dest, int size)
 906 {
 907         void __iomem *spdst = chip->region.idx[1].remap_addr +
 908                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 909         int i;
 910
 911         for (i = 0; i < size; ++i) {
 912                 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
 913                 writel(task_data[i],spdst);
 914                 spdst += sizeof(u32);
 915         }
 916 }
 917
 918 static int debug_scb;
 919 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 920 {
 921         void __iomem *spdst = chip->region.idx[1].remap_addr +
 922                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 923         int i;
 924
 925         for (i = 0; i < 0x10; ++i) {
 926                 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
 927                 writel(scb_data[i],spdst);
 928                 spdst += sizeof(u32);
 929         }
 930 }
 931
 932 static int find_free_scb_index (struct dsp_spos_instance * ins)
 933 {
 934         int index = ins->nscb, i;
 935
 936         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 937                 if (ins->scbs[i].deleted) {
 938                         index = i;
 939                         break;
 940                 }
 941         }
 942
 943         return index;
 944 }
 945
 946 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 947 {
 948         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 949         struct dsp_scb_descriptor * desc = NULL;
 950         int index;
 951
 952         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 953                 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
 954                 return NULL;
 955         }
 956
 957         index = find_free_scb_index (ins);
 958
 959         strcpy(ins->scbs[index].scb_name, name);
 960         ins->scbs[index].address = dest;
 961         ins->scbs[index].index = index;
 962         ins->scbs[index].proc_info = NULL;
 963         ins->scbs[index].ref_count = 1;
 964         ins->scbs[index].deleted = 0;
 965         spin_lock_init(&ins->scbs[index].lock);
 966
 967         desc = (ins->scbs + index);
 968         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
 969
 970         if (index > ins->scb_highest_frag_index)
 971                 ins->scb_highest_frag_index = index;
 972
 973         if (index == ins->nscb)
 974                 ins->nscb++;
 975
 976         return desc;
 977 }
 978
 979 static struct dsp_task_descriptor *
 980 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
 981 {
 982         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 983         struct dsp_task_descriptor * desc = NULL;
 984
 985         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
 986                 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
 987                 return NULL;
 988         }
 989
 990         strcpy(ins->tasks[ins->ntask].task_name,name);
 991         ins->tasks[ins->ntask].address = dest;
 992         ins->tasks[ins->ntask].size = size;
 993
 994         /* quick find in list */
 995         ins->tasks[ins->ntask].index = ins->ntask;
 996         desc = (ins->tasks + ins->ntask);
 997         ins->ntask++;
 998
 999         add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1000         return desc;
1001 }
1002
1003 struct dsp_scb_descriptor *
1004 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1005 {
1006         struct dsp_scb_descriptor * desc;
1007
1008         desc = _map_scb (chip,name,dest);
1009         if (desc) {
1010                 _dsp_create_scb(chip,scb_data,dest);
1011         } else {
1012                 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1013         }
1014
1015         return desc;
1016 }
1017
1018
1019 static struct dsp_task_descriptor *
1020 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1021                              u32 dest, int size)
1022 {
1023         struct dsp_task_descriptor * desc;
1024
1025         desc = _map_task_tree (chip,name,dest,size);
1026         if (desc) {
1027                 _dsp_create_task_tree(chip,task_data,dest,size);
1028         } else {
1029                 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1030         }
1031
1032         return desc;
1033 }
1034
1035 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1036 {
1037         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1038         struct dsp_symbol_entry * fg_task_tree_header_code;
1039         struct dsp_symbol_entry * task_tree_header_code;
1040         struct dsp_symbol_entry * task_tree_thread;
1041         struct dsp_symbol_entry * null_algorithm;
1042         struct dsp_symbol_entry * magic_snoop_task;
1043
1044         struct dsp_scb_descriptor * timing_master_scb;
1045         struct dsp_scb_descriptor * codec_out_scb;
1046         struct dsp_scb_descriptor * codec_in_scb;
1047         struct dsp_scb_descriptor * src_task_scb;
1048         struct dsp_scb_descriptor * master_mix_scb;
1049         struct dsp_scb_descriptor * rear_mix_scb;
1050         struct dsp_scb_descriptor * record_mix_scb;
1051         struct dsp_scb_descriptor * write_back_scb;
1052         struct dsp_scb_descriptor * vari_decimate_scb;
1053         struct dsp_scb_descriptor * rear_codec_out_scb;
1054         struct dsp_scb_descriptor * clfe_codec_out_scb;
1055         struct dsp_scb_descriptor * magic_snoop_scb;
1056
1057         int fifo_addr, fifo_span, valid_slots;
1058
1059         static struct dsp_spos_control_block sposcb = {
1060                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1061                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1062                 /* 2 */ DSP_SPOS_DC,0,
1063                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1064                 /* 4 */ 0,0,
1065                 /* 5 */ DSP_SPOS_UU,0,
1066                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1067                 /* 7 */ 0,0,
1068                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1069                 /* 9 */ 0,
1070                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1071                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1072                 /* C */ DSP_SPOS_DC_DC,
1073                 /* D */ DSP_SPOS_DC_DC,
1074                 /* E */ DSP_SPOS_DC_DC,
1075                 /* F */ DSP_SPOS_DC_DC
1076         };
1077
1078         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1079
1080         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1081         if (null_algorithm == NULL) {
1082                 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1083                 return -EIO;
1084         }
1085
1086         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1087         if (fg_task_tree_header_code == NULL) {
1088                 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1089                 return -EIO;
1090         }
1091
1092         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1093         if (task_tree_header_code == NULL) {
1094                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1095                 return -EIO;
1096         }
1097
1098         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1099         if (task_tree_thread == NULL) {
1100                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1101                 return -EIO;
1102         }
1103
1104         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1105         if (magic_snoop_task == NULL) {
1106                 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1107                 return -EIO;
1108         }
1109
1110         {
1111                 /* create the null SCB */
1112                 static struct dsp_generic_scb null_scb = {
1113                         { 0, 0, 0, 0 },
1114                         { 0, 0, 0, 0, 0 },
1115                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1116                         0, 0, 0, 0, 0,
1117                         {
1118                                 0,0,
1119                                 0,0,
1120                         }
1121                 };
1122
1123                 null_scb.entry_point = null_algorithm->address;
1124                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1125                 ins->the_null_scb->task_entry = null_algorithm;
1126                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1127                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1128                 ins->the_null_scb->parent_scb_ptr = NULL;
1129                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1130         }
1131
1132         {
1133                 /* setup foreground task tree */
1134                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1135                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1136                           DSP_SPOS_DC_DC,
1137                           DSP_SPOS_DC_DC,
1138                           0x0000,DSP_SPOS_DC,
1139                           DSP_SPOS_DC, DSP_SPOS_DC,
1140                           DSP_SPOS_DC_DC,
1141                           DSP_SPOS_DC_DC,
1142                           DSP_SPOS_DC_DC,
1143                           DSP_SPOS_DC,DSP_SPOS_DC },
1144
1145                         {
1146                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1147                                 0,
1148                                 FG_TASK_HEADER_ADDR + TCBData,
1149                         },
1150
1151                         {
1152                                 4,0,
1153                                 1,0,
1154                                 2,SPOSCB_ADDR + HFGFlags,
1155                                 0,0,
1156                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1157                         },
1158
1159                         {
1160                                 DSP_SPOS_DC,0,
1161                                 DSP_SPOS_DC,DSP_SPOS_DC,
1162                                 DSP_SPOS_DC,DSP_SPOS_DC,
1163                                 DSP_SPOS_DC,DSP_SPOS_DC,
1164                                 DSP_SPOS_DC,DSP_SPOS_DC,
1165                                 DSP_SPOS_DCDC,
1166                                 DSP_SPOS_UU,1,
1167                                 DSP_SPOS_DCDC,
1168                                 DSP_SPOS_DCDC,
1169                                 DSP_SPOS_DCDC,
1170                                 DSP_SPOS_DCDC,
1171                                 DSP_SPOS_DCDC,
1172                                 DSP_SPOS_DCDC,
1173                                 DSP_SPOS_DCDC,
1174                                 DSP_SPOS_DCDC,
1175                                 DSP_SPOS_DCDC,
1176                                 DSP_SPOS_DCDC,
1177                                 DSP_SPOS_DCDC,
1178                                 DSP_SPOS_DCDC,
1179                                 DSP_SPOS_DCDC,
1180                                 DSP_SPOS_DCDC,
1181                                 DSP_SPOS_DCDC,
1182                                 DSP_SPOS_DCDC,
1183                                 DSP_SPOS_DCDC,
1184                                 DSP_SPOS_DCDC,
1185                                 DSP_SPOS_DCDC,
1186                                 DSP_SPOS_DCDC,
1187                                 DSP_SPOS_DCDC,
1188                                 DSP_SPOS_DCDC,
1189                                 DSP_SPOS_DCDC,
1190                                 DSP_SPOS_DCDC,
1191                                 DSP_SPOS_DCDC,
1192                                 DSP_SPOS_DCDC,
1193                                 DSP_SPOS_DCDC,
1194                                 DSP_SPOS_DCDC
1195                         },
1196                         {
1197                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1198                                 0,0
1199                         }
1200                 };
1201
1202                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1203                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1204                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1205         }
1206
1207
1208         {
1209                 /* setup foreground task tree */
1210                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1211                         { DSP_SPOS_DC_DC,
1212                           DSP_SPOS_DC_DC,
1213                           DSP_SPOS_DC_DC,
1214                           DSP_SPOS_DC, DSP_SPOS_DC,
1215                           DSP_SPOS_DC, DSP_SPOS_DC,
1216                           DSP_SPOS_DC_DC,
1217                           DSP_SPOS_DC_DC,
1218                           DSP_SPOS_DC_DC,
1219                           DSP_SPOS_DC,DSP_SPOS_DC },
1220
1221                         {
1222                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1223                                 0,
1224                                 BG_TREE_SCB_ADDR + TCBData,
1225                         },
1226
1227                         {
1228                                 9999,0,
1229                                 0,1,
1230                                 0,SPOSCB_ADDR + HFGFlags,
1231                                 0,0,
1232                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1233                         },
1234
1235                         {
1236                                 DSP_SPOS_DC,0,
1237                                 DSP_SPOS_DC,DSP_SPOS_DC,
1238                                 DSP_SPOS_DC,DSP_SPOS_DC,
1239                                 DSP_SPOS_DC,DSP_SPOS_DC,
1240                                 DSP_SPOS_DC,DSP_SPOS_DC,
1241                                 DSP_SPOS_DCDC,
1242                                 DSP_SPOS_UU,1,
1243                                 DSP_SPOS_DCDC,
1244                                 DSP_SPOS_DCDC,
1245                                 DSP_SPOS_DCDC,
1246                                 DSP_SPOS_DCDC,
1247                                 DSP_SPOS_DCDC,
1248                                 DSP_SPOS_DCDC,
1249                                 DSP_SPOS_DCDC,
1250                                 DSP_SPOS_DCDC,
1251                                 DSP_SPOS_DCDC,
1252                                 DSP_SPOS_DCDC,
1253                                 DSP_SPOS_DCDC,
1254                                 DSP_SPOS_DCDC,
1255                                 DSP_SPOS_DCDC,
1256                                 DSP_SPOS_DCDC,
1257                                 DSP_SPOS_DCDC,
1258                                 DSP_SPOS_DCDC,
1259                                 DSP_SPOS_DCDC,
1260                                 DSP_SPOS_DCDC,
1261                                 DSP_SPOS_DCDC,
1262                                 DSP_SPOS_DCDC,
1263                                 DSP_SPOS_DCDC,
1264                                 DSP_SPOS_DCDC,
1265                                 DSP_SPOS_DCDC,
1266                                 DSP_SPOS_DCDC,
1267                                 DSP_SPOS_DCDC,
1268                                 DSP_SPOS_DCDC,
1269                                 DSP_SPOS_DCDC,
1270                                 DSP_SPOS_DCDC
1271                         },
1272                         {
1273                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1274                                 0,0
1275                         }
1276                 };
1277
1278                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1279                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1280                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1281         }
1282
1283         /* create timing master SCB */
1284         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1285
1286         /* create the CODEC output task */
1287         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1288                                                         MASTERMIX_SCB_ADDR,
1289                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1290                                                         SCB_ON_PARENT_SUBLIST_SCB);
1291
1292         if (!codec_out_scb) goto _fail_end;
1293         /* create the master mix SCB */
1294         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1295                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1296                                                         codec_out_scb,
1297                                                         SCB_ON_PARENT_SUBLIST_SCB);
1298         ins->master_mix_scb = master_mix_scb;
1299
1300         if (!master_mix_scb) goto _fail_end;
1301
1302         /* create codec in */
1303         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1304                                                       CODEC_INPUT_BUF1,
1305                                                       CODECIN_SCB_ADDR,codec_out_scb,
1306                                                       SCB_ON_PARENT_NEXT_SCB);
1307         if (!codec_in_scb) goto _fail_end;
1308         ins->codec_in_scb = codec_in_scb;
1309
1310         /* create write back scb */
1311         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1312                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1313                                                               WRITEBACK_SCB_ADDR,
1314                                                               timing_master_scb,
1315                                                               SCB_ON_PARENT_NEXT_SCB);
1316         if (!write_back_scb) goto _fail_end;
1317
1318         {
1319                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1320                         0x00020000,
1321                         0x0000ffff
1322                 };
1323
1324                 /* dirty hack ... */
1325                 _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2);
1326         }
1327
1328         /* input sample converter */
1329         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1330                                                                 VARI_DECIMATE_BUF0,
1331                                                                 VARI_DECIMATE_BUF1,
1332                                                                 VARIDECIMATE_SCB_ADDR,
1333                                                                 write_back_scb,
1334                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1335         if (!vari_decimate_scb) goto _fail_end;
1336
1337         /* create the record mixer SCB */
1338         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1339                                                         MIX_SAMPLE_BUF2,
1340                                                         RECORD_MIXER_SCB_ADDR,
1341                                                         vari_decimate_scb,
1342                                                         SCB_ON_PARENT_SUBLIST_SCB);
1343         ins->record_mixer_scb = record_mix_scb;
1344
1345         if (!record_mix_scb) goto _fail_end;
1346
1347         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1348
1349         snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
1350
1351         if (chip->nr_ac97_codecs == 1) {
1352                 /* output on slot 5 and 11
1353                    on primary CODEC */
1354                 fifo_addr = 0x20;
1355                 fifo_span = 0x60;
1356
1357                 /* enable slot 5 and 11 */
1358                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1359         } else {
1360                 /* output on slot 7 and 8
1361                    on secondary CODEC */
1362                 fifo_addr = 0x40;
1363                 fifo_span = 0x10;
1364
1365                 /* enable slot 7 and 8 */
1366                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1367         }
1368         /* create CODEC tasklet for rear speakers output*/
1369         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1370                                                              REAR_MIXER_SCB_ADDR,
1371                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1372                                                              SCB_ON_PARENT_NEXT_SCB);
1373         if (!rear_codec_out_scb) goto _fail_end;
1374
1375
1376         /* create the rear PCM channel  mixer SCB */
1377         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1378                                                       MIX_SAMPLE_BUF3,
1379                                                       REAR_MIXER_SCB_ADDR,
1380                                                       rear_codec_out_scb,
1381                                                       SCB_ON_PARENT_SUBLIST_SCB);
1382         ins->rear_mix_scb = rear_mix_scb;
1383         if (!rear_mix_scb) goto _fail_end;
1384
1385         if (chip->nr_ac97_codecs == 2) {
1386                 /* create CODEC tasklet for rear Center/LFE output
1387                    slot 6 and 9 on seconadry CODEC */
1388                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1389                                                                      CLFE_MIXER_SCB_ADDR,
1390                                                                      CLFE_CODEC_SCB_ADDR,
1391                                                                      rear_codec_out_scb,
1392                                                                      SCB_ON_PARENT_NEXT_SCB);
1393                 if (!clfe_codec_out_scb) goto _fail_end;
1394
1395
1396                 /* create the rear PCM channel  mixer SCB */
1397                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1398                                                                          MIX_SAMPLE_BUF4,
1399                                                                          CLFE_MIXER_SCB_ADDR,
1400                                                                          clfe_codec_out_scb,
1401                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1402                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1403
1404                 /* enable slot 6 and 9 */
1405                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1406         } else {
1407                 clfe_codec_out_scb = rear_codec_out_scb;
1408                 ins->center_lfe_mix_scb = rear_mix_scb;
1409         }
1410
1411         /* enable slots depending on CODEC configuration */
1412         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1413
1414         /* the magic snooper */
1415         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1416                                                              OUTPUT_SNOOP_BUFFER,
1417                                                              codec_out_scb,
1418                                                              clfe_codec_out_scb,
1419                                                              SCB_ON_PARENT_NEXT_SCB);
1420
1421
1422         if (!magic_snoop_scb) goto _fail_end;
1423         ins->ref_snoop_scb = magic_snoop_scb;
1424
1425         /* SP IO access */
1426         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1427                                               magic_snoop_scb,
1428                                               SCB_ON_PARENT_NEXT_SCB))
1429                 goto _fail_end;
1430
1431         /* SPDIF input sampel rate converter */
1432         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1433                                                       ins->spdif_in_sample_rate,
1434                                                       SRC_OUTPUT_BUF1,
1435                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1436                                                       master_mix_scb,
1437                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1438
1439         if (!src_task_scb) goto _fail_end;
1440         cs46xx_src_unlink(chip,src_task_scb);
1441
1442         /* NOTE: when we now how to detect the SPDIF input
1443            sample rate we will use this SRC to adjust it */
1444         ins->spdif_in_src = src_task_scb;
1445
1446         cs46xx_dsp_async_init(chip,timing_master_scb);
1447         return 0;
1448
1449  _fail_end:
1450         snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1451         return -EINVAL;
1452 }
1453
1454 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1455                                   struct dsp_scb_descriptor * fg_entry)
1456 {
1457         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1458         struct dsp_symbol_entry * s16_async_codec_input_task;
1459         struct dsp_symbol_entry * spdifo_task;
1460         struct dsp_symbol_entry * spdifi_task;
1461         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1462
1463         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1464         if (s16_async_codec_input_task == NULL) {
1465                 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1466                 return -EIO;
1467         }
1468         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1469         if (spdifo_task == NULL) {
1470                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1471                 return -EIO;
1472         }
1473
1474         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1475         if (spdifi_task == NULL) {
1476                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1477                 return -EIO;
1478         }
1479
1480         {
1481                 /* 0xBC0 */
1482                 struct dsp_spdifoscb spdifo_scb = {
1483                         /* 0 */ DSP_SPOS_UUUU,
1484                         {
1485                                 /* 1 */ 0xb0,
1486                                 /* 2 */ 0,
1487                                 /* 3 */ 0,
1488                                 /* 4 */ 0,
1489                         },
1490                         /* NOTE: the SPDIF output task read samples in mono
1491                            format, the AsynchFGTxSCB task writes to buffer
1492                            in stereo format
1493                         */
1494                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1495                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1496                         /* 7 */ 0,0,
1497                         /* 8 */ 0,
1498                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1499                         /* A */ spdifo_task->address,
1500                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1501                         {
1502                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1503                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1504                         },
1505                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1506                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1507                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1508                 };
1509
1510                 /* 0xBB0 */
1511                 struct dsp_spdifiscb spdifi_scb = {
1512                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1513                         /* 1 */ 0,
1514                         /* 2 */ 0,
1515                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1516                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1517                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1518                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1519                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1520                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1521                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1522                         /* A */ spdifi_task->address,
1523                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1524                         /* NOTE: The SPDIF input task write the sample in mono
1525                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1526                            them in stereo
1527                         */
1528                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1529                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1530                         /* D */ 0x8048,0,
1531                         /* E */ 0x01f0,0x0001,
1532                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1533                 };
1534
1535                 /* 0xBA0 */
1536                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1537                         /* 0 */ DSP_SPOS_UUUU,
1538                         /* 1 */ 0,
1539                         /* 2 */ 0,
1540                         /* 3 */ 1,4000,
1541                         /* 4 */ 0x0118,0x0001,
1542                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1543                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1544                         /* 7 */ DSP_SPOS_UU,0x3,
1545                         /* 8 */ DSP_SPOS_UUUU,
1546                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1547                         /* A */ s16_async_codec_input_task->address,
1548                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1549
1550                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1551                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1552
1553 #ifdef UseASER1Input
1554                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1555                            Init. 0000:8042: for ASER1
1556                            0000:8044: for ASER2 */
1557                         /* D */ 0x8042,0,
1558
1559                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1560                            Init 1 stero:8050 ASER1
1561                            Init 0  mono:8070 ASER2
1562                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1563                         /* E */ 0x0100,0x0001,
1564
1565 #endif
1566
1567 #ifdef UseASER2Input
1568                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1569                            Init. 0000:8042: for ASER1
1570                            0000:8044: for ASER2 */
1571                         /* D */ 0x8044,0,
1572
1573                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1574                            Init 1 stero:8050 ASER1
1575                            Init 0  mono:8070 ASER2
1576                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1577                         /* E */ 0x0110,0x0001,
1578
1579 #endif
1580
1581                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1582                            AsyncCIOutputBufModulo: The modulo size for
1583                            the output buffer of this task */
1584                         /* F */ 0, /* DSP_SPOS_UUUU */
1585                 };
1586
1587                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1588
1589                 snd_assert(spdifo_scb_desc, return -EIO);
1590                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1591                 snd_assert(spdifi_scb_desc, return -EIO);
1592                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1593                 snd_assert(async_codec_scb_desc, return -EIO);
1594
1595                 async_codec_scb_desc->parent_scb_ptr = NULL;
1596                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1597                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1598                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1599
1600                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1601                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1602                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1603                 spdifi_scb_desc->task_entry = spdifi_task;
1604
1605                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1606                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1607                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1608                 spdifo_scb_desc->task_entry = spdifo_task;
1609
1610                 /* this one is faked, as the parnet of SPDIFO task
1611                    is the FG task tree */
1612                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1613
1614                 /* for proc fs */
1615                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1616                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1617                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1618
1619                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1620                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1621         }
1622
1623         return 0;
1624 }
1625
1626
1627 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1628 {
1629         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1630
1631         /* set SPDIF output FIFO slot */
1632         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1633
1634         /* SPDIF output MASTER ENABLE */
1635         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1636
1637         /* right and left validate bit */
1638         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1639         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1640
1641         /* clear fifo pointer */
1642         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1643
1644         /* monitor state */
1645         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1646 }
1647
1648 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1649 {
1650         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1651
1652         /* if hw-ctrl already enabled, turn off to reset logic ... */
1653         cs46xx_dsp_disable_spdif_hw (chip);
1654         udelay(50);
1655
1656         /* set SPDIF output FIFO slot */
1657         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1658
1659         /* SPDIF output MASTER ENABLE */
1660         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1661
1662         /* right and left validate bit */
1663         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1664
1665         /* monitor state */
1666         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1667
1668         return 0;
1669 }
1670
1671 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1672 {
1673         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1674
1675         /* turn on amplifier */
1676         chip->active_ctrl(chip, 1);
1677         chip->amplifier_ctrl(chip, 1);
1678
1679         snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
1680         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1681
1682         mutex_lock(&chip->spos_mutex);
1683
1684         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1685                 /* time countdown enable */
1686                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1687                 /* NOTE: 80000005 value is just magic. With all values
1688                    that I've tested this one seem to give the best result.
1689                    Got no explication why. (Benny) */
1690
1691                 /* SPDIF input MASTER ENABLE */
1692                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1693
1694                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1695         }
1696
1697         /* create and start the asynchronous receiver SCB */
1698         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1699                                                                 ASYNCRX_SCB_ADDR,
1700                                                                 SPDIFI_SCB_INST,
1701                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1702                                                                 ins->spdif_in_src,
1703                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1704
1705         spin_lock_irq(&chip->reg_lock);
1706
1707         /* reset SPDIF input sample buffer pointer */
1708         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1709           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1710
1711         /* reset FIFO ptr */
1712         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1713         cs46xx_src_link(chip,ins->spdif_in_src);
1714
1715         /* unmute SRC volume */
1716         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1717
1718         spin_unlock_irq(&chip->reg_lock);
1719
1720         /* set SPDIF input sample rate and unmute
1721            NOTE: only 48khz support for SPDIF input this time */
1722         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1723
1724         /* monitor state */
1725         ins->spdif_status_in = 1;
1726         mutex_unlock(&chip->spos_mutex);
1727
1728         return 0;
1729 }
1730
1731 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1732 {
1733         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1734
1735         snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
1736         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1737
1738         mutex_lock(&chip->spos_mutex);
1739
1740         /* Remove the asynchronous receiver SCB */
1741         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1742         ins->asynch_rx_scb = NULL;
1743
1744         cs46xx_src_unlink(chip,ins->spdif_in_src);
1745
1746         /* monitor state */
1747         ins->spdif_status_in = 0;
1748         mutex_unlock(&chip->spos_mutex);
1749
1750         /* restore amplifier */
1751         chip->active_ctrl(chip, -1);
1752         chip->amplifier_ctrl(chip, -1);
1753
1754         return 0;
1755 }
1756
1757 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1758 {
1759         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1760
1761         snd_assert (ins->pcm_input == NULL,return -EINVAL);
1762         snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
1763
1764         mutex_lock(&chip->spos_mutex);
1765         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1766                                                   "PCMSerialInput_Wave");
1767         mutex_unlock(&chip->spos_mutex);
1768
1769         return 0;
1770 }
1771
1772 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1773 {
1774         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1775
1776         snd_assert (ins->pcm_input != NULL,return -EINVAL);
1777
1778         mutex_lock(&chip->spos_mutex);
1779         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1780         ins->pcm_input = NULL;
1781         mutex_unlock(&chip->spos_mutex);
1782
1783         return 0;
1784 }
1785
1786 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1787 {
1788         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1789
1790         snd_assert (ins->adc_input == NULL,return -EINVAL);
1791         snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
1792
1793         mutex_lock(&chip->spos_mutex);
1794         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1795                                                   "PCMSerialInput_ADC");
1796         mutex_unlock(&chip->spos_mutex);
1797
1798         return 0;
1799 }
1800
1801 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1802 {
1803         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1804
1805         snd_assert (ins->adc_input != NULL,return -EINVAL);
1806
1807         mutex_lock(&chip->spos_mutex);
1808         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1809         ins->adc_input = NULL;
1810         mutex_unlock(&chip->spos_mutex);
1811
1812         return 0;
1813 }
1814
1815 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1816 {
1817         u32 temp;
1818         int  i;
1819
1820         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1821            a rough guess from looking at the controller spec.) */
1822         if (address < 0x8000 || address >= 0x9000)
1823                 return -EINVAL;
1824
1825         /* initialize the SP_IO_WRITE SCB with the data. */
1826         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1827
1828         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1829         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1830         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1831
1832         /* Poke this location to tell the task to start */
1833         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1834
1835         /* Verify that the task ran */
1836         for (i=0; i<25; i++) {
1837                 udelay(125);
1838
1839                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1840                 if (temp == 0x00000000)
1841                         break;
1842         }
1843
1844         if (i == 25) {
1845                 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1846                 return -EBUSY;
1847         }
1848
1849         return 0;
1850 }
1851
1852 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1853 {
1854         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1855         struct dsp_scb_descriptor * scb;
1856
1857         mutex_lock(&chip->spos_mutex);
1858
1859         /* main output */
1860         scb = ins->master_mix_scb->sub_list_ptr;
1861         while (scb != ins->the_null_scb) {
1862                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1863                 scb = scb->next_scb_ptr;
1864         }
1865
1866         /* rear output */
1867         scb = ins->rear_mix_scb->sub_list_ptr;
1868         while (scb != ins->the_null_scb) {
1869                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1870                 scb = scb->next_scb_ptr;
1871         }
1872
1873         ins->dac_volume_left = left;
1874         ins->dac_volume_right = right;
1875
1876         mutex_unlock(&chip->spos_mutex);
1877
1878         return 0;
1879 }
1880
1881 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1882 {
1883         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1884
1885         mutex_lock(&chip->spos_mutex);
1886
1887         if (ins->asynch_rx_scb != NULL)
1888                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1889                                            left,right);
1890
1891         ins->spdif_input_volume_left = left;
1892         ins->spdif_input_volume_right = right;
1893
1894         mutex_unlock(&chip->spos_mutex);
1895
1896         return 0;
1897 }