ftp://ftp.kernel.org/pub/linux/kernel/v2.6/linux-2.6.6.tar.bz2
[linux-2.6.git] / sound / pci / emu10k1 / irq.c
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3  *                   Creative Labs, Inc.
4  *  Routines for IRQ control of EMU10K1 chips
5  *
6  *  BUGS:
7  *    --
8  *
9  *  TODO:
10  *    --
11  *
12  *   This program is free software; you can redistribute it and/or modify
13  *   it under the terms of the GNU General Public License as published by
14  *   the Free Software Foundation; either version 2 of the License, or
15  *   (at your option) any later version.
16  *
17  *   This program is distributed in the hope that it will be useful,
18  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
19  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  *   GNU General Public License for more details.
21  *
22  *   You should have received a copy of the GNU General Public License
23  *   along with this program; if not, write to the Free Software
24  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
25  *
26  */
27
28 #include <sound/driver.h>
29 #include <linux/time.h>
30 #include <sound/core.h>
31 #include <sound/emu10k1.h>
32
33 irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
34 {
35         emu10k1_t *emu = snd_magic_cast(emu10k1_t, dev_id, return IRQ_NONE);
36         unsigned int status, orig_status;
37         int handled = 0;
38
39         while ((status = inl(emu->port + IPR)) != 0) {
40                 // printk("irq - status = 0x%x\n", status);
41                 orig_status = status;
42                 handled = 1;
43                 if (status & IPR_PCIERROR) {
44                         snd_printk("interrupt: PCI error\n");
45                         snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
46                         status &= ~IPR_PCIERROR;
47                 }
48                 if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
49                         if (emu->hwvol_interrupt)
50                                 emu->hwvol_interrupt(emu, status);
51                         else
52                                 snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
53                         status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
54                 }
55                 if (status & IPR_CHANNELLOOP) {
56                         int voice;
57                         int voice_max = status & IPR_CHANNELNUMBERMASK;
58                         u32 val;
59                         emu10k1_voice_t *pvoice = emu->voices;
60
61                         val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
62                         for (voice = 0; voice <= voice_max; voice++) {
63                                 if (voice == 0x20)
64                                         val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
65                                 if (val & 1) {
66                                         if (pvoice->use && pvoice->interrupt != NULL) {
67                                                 pvoice->interrupt(emu, pvoice);
68                                                 snd_emu10k1_voice_intr_ack(emu, voice);
69                                         } else {
70                                                 snd_emu10k1_voice_intr_disable(emu, voice);
71                                         }
72                                 }
73                                 val >>= 1;
74                                 pvoice++;
75                         }
76                         status &= ~IPR_CHANNELLOOP;
77                 }
78                 status &= ~IPR_CHANNELNUMBERMASK;
79                 if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
80                         if (emu->capture_interrupt)
81                                 emu->capture_interrupt(emu, status);
82                         else
83                                 snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
84                         status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
85                 }
86                 if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
87                         if (emu->capture_mic_interrupt)
88                                 emu->capture_mic_interrupt(emu, status);
89                         else
90                                 snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
91                         status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
92                 }
93                 if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
94                         if (emu->capture_efx_interrupt)
95                                 emu->capture_efx_interrupt(emu, status);
96                         else
97                                 snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
98                         status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
99                 }
100                 if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
101                         if (emu->midi.interrupt)
102                                 emu->midi.interrupt(emu, status);
103                         else
104                                 snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
105                         status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
106                 }
107                 if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
108                         if (emu->midi2.interrupt)
109                                 emu->midi2.interrupt(emu, status);
110                         else
111                                 snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
112                         status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
113                 }
114                 if (status & IPR_INTERVALTIMER) {
115                         if (emu->timer_interrupt)
116                                 emu->timer_interrupt(emu);
117                         else
118                                 snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
119                         status &= ~IPR_INTERVALTIMER;
120                 }
121                 if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
122                         if (emu->spdif_interrupt)
123                                 emu->spdif_interrupt(emu, status);
124                         else
125                                 snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
126                         status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
127                 }
128                 if (status & IPR_FXDSP) {
129                         if (emu->dsp_interrupt)
130                                 emu->dsp_interrupt(emu);
131                         else
132                                 snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
133                         status &= ~IPR_FXDSP;
134                 }
135                 if (status) {
136                         unsigned int bits;
137                         snd_printk(KERN_ERR "emu10k1: unhandled interrupt: 0x%08x\n", status);
138                         //make sure any interrupts we don't handle are disabled:
139                         bits = INTE_FXDSPENABLE |
140                                 INTE_PCIERRORENABLE |
141                                 INTE_VOLINCRENABLE |
142                                 INTE_VOLDECRENABLE |
143                                 INTE_MUTEENABLE |
144                                 INTE_MICBUFENABLE |
145                                 INTE_ADCBUFENABLE |
146                                 INTE_EFXBUFENABLE |
147                                 INTE_GPSPDIFENABLE |
148                                 INTE_CDSPDIFENABLE |
149                                 INTE_INTERVALTIMERENB |
150                                 INTE_MIDITXENABLE |
151                                 INTE_MIDIRXENABLE;
152                         if (emu->audigy)
153                                 bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
154                         snd_emu10k1_intr_disable(emu, bits);
155                 }
156                 outl(orig_status, emu->port + IPR); /* ack all */
157         }
158         return IRQ_RETVAL(handled);
159 }