sound/pci/fm801.c

   1 /*
   2  *  The driver for the ForteMedia FM801 based soundcards
   3  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   4  *
   5  *
   6  *   This program is free software; you can redistribute it and/or modify
   7  *   it under the terms of the GNU General Public License as published by
   8  *   the Free Software Foundation; either version 2 of the License, or
   9  *   (at your option) any later version.
  10  *
  11  *   This program is distributed in the hope that it will be useful,
  12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *   GNU General Public License for more details.
  15  *
  16  *   You should have received a copy of the GNU General Public License
  17  *   along with this program; if not, write to the Free Software
  18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  19  *
  20  */
  21
  22 #include <sound/driver.h>
  23 #include <linux/delay.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/pci.h>
  27 #include <linux/slab.h>
  28 #include <linux/moduleparam.h>
  29 #include <sound/core.h>
  30 #include <sound/pcm.h>
  31 #include <sound/ac97_codec.h>
  32 #include <sound/mpu401.h>
  33 #include <sound/opl3.h>
  34 #include <sound/initval.h>
  35
  36 #include <asm/io.h>
  37
  38 #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
  39 #include <sound/tea575x-tuner.h>
  40 #define TEA575X_RADIO 1
  41 #endif
  42
  43 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  44 MODULE_DESCRIPTION("ForteMedia FM801");
  45 MODULE_LICENSE("GPL");
  46 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
  47                 "{Genius,SoundMaker Live 5.1}}");
  48
  49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  52 /*
  53  *  Enable TEA575x tuner
  54  *    1 = MediaForte 256-PCS
  55  *    2 = MediaForte 256-PCPR
  56  *    3 = MediaForte 64-PCR
  57  *  High 16-bits are video (radio) device number + 1
  58  */
  59 static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 };
  60
  61 module_param_array(index, int, NULL, 0444);
  62 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
  63 module_param_array(id, charp, NULL, 0444);
  64 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
  65 module_param_array(enable, bool, NULL, 0444);
  66 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
  67 module_param_array(tea575x_tuner, int, NULL, 0444);
  68 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
  69
  70 /*
  71  *  Direct registers
  72  */
  73
  74 #define FM801_REG(chip, reg)    (chip->port + FM801_##reg)
  75
  76 #define FM801_PCM_VOL           0x00    /* PCM Output Volume */
  77 #define FM801_FM_VOL            0x02    /* FM Output Volume */
  78 #define FM801_I2S_VOL           0x04    /* I2S Volume */
  79 #define FM801_REC_SRC           0x06    /* Record Source */
  80 #define FM801_PLY_CTRL          0x08    /* Playback Control */
  81 #define FM801_PLY_COUNT         0x0a    /* Playback Count */
  82 #define FM801_PLY_BUF1          0x0c    /* Playback Bufer I */
  83 #define FM801_PLY_BUF2          0x10    /* Playback Buffer II */
  84 #define FM801_CAP_CTRL          0x14    /* Capture Control */
  85 #define FM801_CAP_COUNT         0x16    /* Capture Count */
  86 #define FM801_CAP_BUF1          0x18    /* Capture Buffer I */
  87 #define FM801_CAP_BUF2          0x1c    /* Capture Buffer II */
  88 #define FM801_CODEC_CTRL        0x22    /* Codec Control */
  89 #define FM801_I2S_MODE          0x24    /* I2S Mode Control */
  90 #define FM801_VOLUME            0x26    /* Volume Up/Down/Mute Status */
  91 #define FM801_I2C_CTRL          0x29    /* I2C Control */
  92 #define FM801_AC97_CMD          0x2a    /* AC'97 Command */
  93 #define FM801_AC97_DATA         0x2c    /* AC'97 Data */
  94 #define FM801_MPU401_DATA       0x30    /* MPU401 Data */
  95 #define FM801_MPU401_CMD        0x31    /* MPU401 Command */
  96 #define FM801_GPIO_CTRL         0x52    /* General Purpose I/O Control */
  97 #define FM801_GEN_CTRL          0x54    /* General Control */
  98 #define FM801_IRQ_MASK          0x56    /* Interrupt Mask */
  99 #define FM801_IRQ_STATUS        0x5a    /* Interrupt Status */
 100 #define FM801_OPL3_BANK0        0x68    /* OPL3 Status Read / Bank 0 Write */
 101 #define FM801_OPL3_DATA0        0x69    /* OPL3 Data 0 Write */
 102 #define FM801_OPL3_BANK1        0x6a    /* OPL3 Bank 1 Write */
 103 #define FM801_OPL3_DATA1        0x6b    /* OPL3 Bank 1 Write */
 104 #define FM801_POWERDOWN         0x70    /* Blocks Power Down Control */
 105
 106 #define FM801_AC97_ADDR_SHIFT   10
 107
 108 /* playback and record control register bits */
 109 #define FM801_BUF1_LAST         (1<<1)
 110 #define FM801_BUF2_LAST         (1<<2)
 111 #define FM801_START             (1<<5)
 112 #define FM801_PAUSE             (1<<6)
 113 #define FM801_IMMED_STOP        (1<<7)
 114 #define FM801_RATE_SHIFT        8
 115 #define FM801_RATE_MASK         (15 << FM801_RATE_SHIFT)
 116 #define FM801_CHANNELS_4        (1<<12) /* playback only */
 117 #define FM801_CHANNELS_6        (2<<12) /* playback only */
 118 #define FM801_CHANNELS_6MS      (3<<12) /* playback only */
 119 #define FM801_CHANNELS_MASK     (3<<12)
 120 #define FM801_16BIT             (1<<14)
 121 #define FM801_STEREO            (1<<15)
 122
 123 /* IRQ status bits */
 124 #define FM801_IRQ_PLAYBACK      (1<<8)
 125 #define FM801_IRQ_CAPTURE       (1<<9)
 126 #define FM801_IRQ_VOLUME        (1<<14)
 127 #define FM801_IRQ_MPU           (1<<15)
 128
 129 /* GPIO control register */
 130 #define FM801_GPIO_GP0          (1<<0)  /* read/write */
 131 #define FM801_GPIO_GP1          (1<<1)
 132 #define FM801_GPIO_GP2          (1<<2)
 133 #define FM801_GPIO_GP3          (1<<3)
 134 #define FM801_GPIO_GP(x)        (1<<(0+(x)))
 135 #define FM801_GPIO_GD0          (1<<8)  /* directions: 1 = input, 0 = output*/
 136 #define FM801_GPIO_GD1          (1<<9)
 137 #define FM801_GPIO_GD2          (1<<10)
 138 #define FM801_GPIO_GD3          (1<<11)
 139 #define FM801_GPIO_GD(x)        (1<<(8+(x)))
 140 #define FM801_GPIO_GS0          (1<<12) /* function select: */
 141 #define FM801_GPIO_GS1          (1<<13) /*    1 = GPIO */
 142 #define FM801_GPIO_GS2          (1<<14) /*    0 = other (S/PDIF, VOL) */
 143 #define FM801_GPIO_GS3          (1<<15)
 144 #define FM801_GPIO_GS(x)        (1<<(12+(x)))
 145
 146 /*
 147
 148  */
 149
 150 typedef struct _snd_fm801 fm801_t;
 151
 152 struct _snd_fm801 {
 153         int irq;
 154
 155         unsigned long port;     /* I/O port number */
 156         unsigned int multichannel: 1,   /* multichannel support */
 157                      secondary: 1;      /* secondary codec */
 158         unsigned char secondary_addr;   /* address of the secondary codec */
 159
 160         unsigned short ply_ctrl; /* playback control */
 161         unsigned short cap_ctrl; /* capture control */
 162
 163         unsigned long ply_buffer;
 164         unsigned int ply_buf;
 165         unsigned int ply_count;
 166         unsigned int ply_size;
 167         unsigned int ply_pos;
 168
 169         unsigned long cap_buffer;
 170         unsigned int cap_buf;
 171         unsigned int cap_count;
 172         unsigned int cap_size;
 173         unsigned int cap_pos;
 174
 175         ac97_bus_t *ac97_bus;
 176         ac97_t *ac97;
 177         ac97_t *ac97_sec;
 178
 179         struct pci_dev *pci;
 180         snd_card_t *card;
 181         snd_pcm_t *pcm;
 182         snd_rawmidi_t *rmidi;
 183         snd_pcm_substream_t *playback_substream;
 184         snd_pcm_substream_t *capture_substream;
 185         unsigned int p_dma_size;
 186         unsigned int c_dma_size;
 187
 188         spinlock_t reg_lock;
 189         snd_info_entry_t *proc_entry;
 190
 191 #ifdef TEA575X_RADIO
 192         tea575x_t tea;
 193 #endif
 194 };
 195
 196 static struct pci_device_id snd_fm801_ids[] = {
 197         { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* FM801 */
 198         { 0, }
 199 };
 200
 201 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
 202
 203 /*
 204  *  common I/O routines
 205  */
 206
 207 static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg,
 208                                  unsigned short mask, unsigned short value)
 209 {
 210         int change;
 211         unsigned long flags;
 212         unsigned short old, new;
 213
 214         spin_lock_irqsave(&chip->reg_lock, flags);
 215         old = inw(chip->port + reg);
 216         new = (old & ~mask) | value;
 217         change = old != new;
 218         if (change)
 219                 outw(new, chip->port + reg);
 220         spin_unlock_irqrestore(&chip->reg_lock, flags);
 221         return change;
 222 }
 223
 224 static void snd_fm801_codec_write(ac97_t *ac97,
 225                                   unsigned short reg,
 226                                   unsigned short val)
 227 {
 228         fm801_t *chip = ac97->private_data;
 229         int idx;
 230
 231         /*
 232          *  Wait until the codec interface is not ready..
 233          */
 234         for (idx = 0; idx < 100; idx++) {
 235                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 236                         goto ok1;
 237                 udelay(10);
 238         }
 239         snd_printk("AC'97 interface is busy (1)\n");
 240         return;
 241
 242  ok1:
 243         /* write data and address */
 244         outw(val, FM801_REG(chip, AC97_DATA));
 245         outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
 246         /*
 247          *  Wait until the write command is not completed..
 248          */
 249         for (idx = 0; idx < 1000; idx++) {
 250                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 251                         return;
 252                 udelay(10);
 253         }
 254         snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
 255 }
 256
 257 static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg)
 258 {
 259         fm801_t *chip = ac97->private_data;
 260         int idx;
 261
 262         /*
 263          *  Wait until the codec interface is not ready..
 264          */
 265         for (idx = 0; idx < 100; idx++) {
 266                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 267                         goto ok1;
 268                 udelay(10);
 269         }
 270         snd_printk("AC'97 interface is busy (1)\n");
 271         return 0;
 272
 273  ok1:
 274         /* read command */
 275         outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD));
 276         for (idx = 0; idx < 100; idx++) {
 277                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 278                         goto ok2;
 279                 udelay(10);
 280         }
 281         snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
 282         return 0;
 283
 284  ok2:
 285         for (idx = 0; idx < 1000; idx++) {
 286                 if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8))
 287                         goto ok3;
 288                 udelay(10);
 289         }
 290         snd_printk("AC'97 interface #%d is not valid (2)\n", ac97->num);
 291         return 0;
 292
 293  ok3:
 294         return inw(FM801_REG(chip, AC97_DATA));
 295 }
 296
 297 static unsigned int rates[] = {
 298   5500,  8000,  9600, 11025,
 299   16000, 19200, 22050, 32000,
 300   38400, 44100, 48000
 301 };
 302
 303 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
 304         .count = ARRAY_SIZE(rates),
 305         .list = rates,
 306         .mask = 0,
 307 };
 308
 309 static unsigned int channels[] = {
 310   2, 4, 6
 311 };
 312
 313 #define CHANNELS sizeof(channels) / sizeof(channels[0])
 314
 315 static snd_pcm_hw_constraint_list_t hw_constraints_channels = {
 316         .count = CHANNELS,
 317         .list = channels,
 318         .mask = 0,
 319 };
 320
 321 /*
 322  *  Sample rate routines
 323  */
 324
 325 static unsigned short snd_fm801_rate_bits(unsigned int rate)
 326 {
 327         unsigned int idx;
 328
 329         for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
 330                 if (rates[idx] == rate)
 331                         return idx;
 332         snd_BUG();
 333         return ARRAY_SIZE(rates) - 1;
 334 }
 335
 336 /*
 337  *  PCM part
 338  */
 339
 340 static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream,
 341                                       int cmd)
 342 {
 343         fm801_t *chip = snd_pcm_substream_chip(substream);
 344
 345         spin_lock(&chip->reg_lock);
 346         switch (cmd) {
 347         case SNDRV_PCM_TRIGGER_START:
 348                 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
 349                                      FM801_BUF2_LAST |
 350                                      FM801_PAUSE);
 351                 chip->ply_ctrl |= FM801_START |
 352                                    FM801_IMMED_STOP;
 353                 break;
 354         case SNDRV_PCM_TRIGGER_STOP:
 355                 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
 356                 break;
 357         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 358                 chip->ply_ctrl |= FM801_PAUSE;
 359                 break;
 360         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 361                 chip->ply_ctrl &= ~FM801_PAUSE;
 362                 break;
 363         default:
 364                 spin_unlock(&chip->reg_lock);
 365                 snd_BUG();
 366                 return -EINVAL;
 367         }
 368         outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
 369         spin_unlock(&chip->reg_lock);
 370         return 0;
 371 }
 372
 373 static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream,
 374                                      int cmd)
 375 {
 376         fm801_t *chip = snd_pcm_substream_chip(substream);
 377
 378         spin_lock(&chip->reg_lock);
 379         switch (cmd) {
 380         case SNDRV_PCM_TRIGGER_START:
 381                 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
 382                                      FM801_BUF2_LAST |
 383                                      FM801_PAUSE);
 384                 chip->cap_ctrl |= FM801_START |
 385                                    FM801_IMMED_STOP;
 386                 break;
 387         case SNDRV_PCM_TRIGGER_STOP:
 388                 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
 389                 break;
 390         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 391                 chip->cap_ctrl |= FM801_PAUSE;
 392                 break;
 393         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 394                 chip->cap_ctrl &= ~FM801_PAUSE;
 395                 break;
 396         default:
 397                 spin_unlock(&chip->reg_lock);
 398                 snd_BUG();
 399                 return -EINVAL;
 400         }
 401         outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
 402         spin_unlock(&chip->reg_lock);
 403         return 0;
 404 }
 405
 406 static int snd_fm801_hw_params(snd_pcm_substream_t * substream,
 407                                snd_pcm_hw_params_t * hw_params)
 408 {
 409         return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 410 }
 411
 412 static int snd_fm801_hw_free(snd_pcm_substream_t * substream)
 413 {
 414         return snd_pcm_lib_free_pages(substream);
 415 }
 416
 417 static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream)
 418 {
 419         fm801_t *chip = snd_pcm_substream_chip(substream);
 420         snd_pcm_runtime_t *runtime = substream->runtime;
 421
 422         chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
 423         chip->ply_count = snd_pcm_lib_period_bytes(substream);
 424         spin_lock_irq(&chip->reg_lock);
 425         chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
 426                              FM801_STEREO | FM801_RATE_MASK |
 427                              FM801_CHANNELS_MASK);
 428         if (snd_pcm_format_width(runtime->format) == 16)
 429                 chip->ply_ctrl |= FM801_16BIT;
 430         if (runtime->channels > 1) {
 431                 chip->ply_ctrl |= FM801_STEREO;
 432                 if (runtime->channels == 4)
 433                         chip->ply_ctrl |= FM801_CHANNELS_4;
 434                 else if (runtime->channels == 6)
 435                         chip->ply_ctrl |= FM801_CHANNELS_6;
 436         }
 437         chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
 438         chip->ply_buf = 0;
 439         outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
 440         outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
 441         chip->ply_buffer = runtime->dma_addr;
 442         chip->ply_pos = 0;
 443         outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
 444         outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
 445         spin_unlock_irq(&chip->reg_lock);
 446         return 0;
 447 }
 448
 449 static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream)
 450 {
 451         fm801_t *chip = snd_pcm_substream_chip(substream);
 452         snd_pcm_runtime_t *runtime = substream->runtime;
 453
 454         chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
 455         chip->cap_count = snd_pcm_lib_period_bytes(substream);
 456         spin_lock_irq(&chip->reg_lock);
 457         chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
 458                              FM801_STEREO | FM801_RATE_MASK);
 459         if (snd_pcm_format_width(runtime->format) == 16)
 460                 chip->cap_ctrl |= FM801_16BIT;
 461         if (runtime->channels > 1)
 462                 chip->cap_ctrl |= FM801_STEREO;
 463         chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
 464         chip->cap_buf = 0;
 465         outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
 466         outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
 467         chip->cap_buffer = runtime->dma_addr;
 468         chip->cap_pos = 0;
 469         outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
 470         outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
 471         spin_unlock_irq(&chip->reg_lock);
 472         return 0;
 473 }
 474
 475 static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream)
 476 {
 477         fm801_t *chip = snd_pcm_substream_chip(substream);
 478         size_t ptr;
 479
 480         if (!(chip->ply_ctrl & FM801_START))
 481                 return 0;
 482         spin_lock(&chip->reg_lock);
 483         ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
 484         if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
 485                 ptr += chip->ply_count;
 486                 ptr %= chip->ply_size;
 487         }
 488         spin_unlock(&chip->reg_lock);
 489         return bytes_to_frames(substream->runtime, ptr);
 490 }
 491
 492 static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream)
 493 {
 494         fm801_t *chip = snd_pcm_substream_chip(substream);
 495         size_t ptr;
 496
 497         if (!(chip->cap_ctrl & FM801_START))
 498                 return 0;
 499         spin_lock(&chip->reg_lock);
 500         ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
 501         if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
 502                 ptr += chip->cap_count;
 503                 ptr %= chip->cap_size;
 504         }
 505         spin_unlock(&chip->reg_lock);
 506         return bytes_to_frames(substream->runtime, ptr);
 507 }
 508
 509 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 510 {
 511         fm801_t *chip = dev_id;
 512         unsigned short status;
 513         unsigned int tmp;
 514
 515         status = inw(FM801_REG(chip, IRQ_STATUS));
 516         status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
 517         if (! status)
 518                 return IRQ_NONE;
 519         /* ack first */
 520         outw(status, FM801_REG(chip, IRQ_STATUS));
 521         if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
 522                 spin_lock(&chip->reg_lock);
 523                 chip->ply_buf++;
 524                 chip->ply_pos += chip->ply_count;
 525                 chip->ply_pos %= chip->ply_size;
 526                 tmp = chip->ply_pos + chip->ply_count;
 527                 tmp %= chip->ply_size;
 528                 outl(chip->ply_buffer + tmp,
 529                                 (chip->ply_buf & 1) ?
 530                                         FM801_REG(chip, PLY_BUF1) :
 531                                         FM801_REG(chip, PLY_BUF2));
 532                 spin_unlock(&chip->reg_lock);
 533                 snd_pcm_period_elapsed(chip->playback_substream);
 534         }
 535         if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
 536                 spin_lock(&chip->reg_lock);
 537                 chip->cap_buf++;
 538                 chip->cap_pos += chip->cap_count;
 539                 chip->cap_pos %= chip->cap_size;
 540                 tmp = chip->cap_pos + chip->cap_count;
 541                 tmp %= chip->cap_size;
 542                 outl(chip->cap_buffer + tmp,
 543                                 (chip->cap_buf & 1) ?
 544                                         FM801_REG(chip, CAP_BUF1) :
 545                                         FM801_REG(chip, CAP_BUF2));
 546                 spin_unlock(&chip->reg_lock);
 547                 snd_pcm_period_elapsed(chip->capture_substream);
 548         }
 549         if (chip->rmidi && (status & FM801_IRQ_MPU))
 550                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
 551         if (status & FM801_IRQ_VOLUME)
 552                 ;/* TODO */
 553
 554         return IRQ_HANDLED;
 555 }
 556
 557 static snd_pcm_hardware_t snd_fm801_playback =
 558 {
 559         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 560                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 561                                  SNDRV_PCM_INFO_PAUSE |
 562                                  SNDRV_PCM_INFO_MMAP_VALID),
 563         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 564         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
 565         .rate_min =             5500,
 566         .rate_max =             48000,
 567         .channels_min =         1,
 568         .channels_max =         2,
 569         .buffer_bytes_max =     (128*1024),
 570         .period_bytes_min =     64,
 571         .period_bytes_max =     (128*1024),
 572         .periods_min =          1,
 573         .periods_max =          1024,
 574         .fifo_size =            0,
 575 };
 576
 577 static snd_pcm_hardware_t snd_fm801_capture =
 578 {
 579         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 580                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 581                                  SNDRV_PCM_INFO_PAUSE |
 582                                  SNDRV_PCM_INFO_MMAP_VALID),
 583         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 584         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
 585         .rate_min =             5500,
 586         .rate_max =             48000,
 587         .channels_min =         1,
 588         .channels_max =         2,
 589         .buffer_bytes_max =     (128*1024),
 590         .period_bytes_min =     64,
 591         .period_bytes_max =     (128*1024),
 592         .periods_min =          1,
 593         .periods_max =          1024,
 594         .fifo_size =            0,
 595 };
 596
 597 static int snd_fm801_playback_open(snd_pcm_substream_t * substream)
 598 {
 599         fm801_t *chip = snd_pcm_substream_chip(substream);
 600         snd_pcm_runtime_t *runtime = substream->runtime;
 601         int err;
 602
 603         chip->playback_substream = substream;
 604         runtime->hw = snd_fm801_playback;
 605         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
 606         if (chip->multichannel) {
 607                 runtime->hw.channels_max = 6;
 608                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
 609         }
 610         if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
 611                 return err;
 612         return 0;
 613 }
 614
 615 static int snd_fm801_capture_open(snd_pcm_substream_t * substream)
 616 {
 617         fm801_t *chip = snd_pcm_substream_chip(substream);
 618         snd_pcm_runtime_t *runtime = substream->runtime;
 619         int err;
 620
 621         chip->capture_substream = substream;
 622         runtime->hw = snd_fm801_capture;
 623         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
 624         if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
 625                 return err;
 626         return 0;
 627 }
 628
 629 static int snd_fm801_playback_close(snd_pcm_substream_t * substream)
 630 {
 631         fm801_t *chip = snd_pcm_substream_chip(substream);
 632
 633         chip->playback_substream = NULL;
 634         return 0;
 635 }
 636
 637 static int snd_fm801_capture_close(snd_pcm_substream_t * substream)
 638 {
 639         fm801_t *chip = snd_pcm_substream_chip(substream);
 640
 641         chip->capture_substream = NULL;
 642         return 0;
 643 }
 644
 645 static snd_pcm_ops_t snd_fm801_playback_ops = {
 646         .open =         snd_fm801_playback_open,
 647         .close =        snd_fm801_playback_close,
 648         .ioctl =        snd_pcm_lib_ioctl,
 649         .hw_params =    snd_fm801_hw_params,
 650         .hw_free =      snd_fm801_hw_free,
 651         .prepare =      snd_fm801_playback_prepare,
 652         .trigger =      snd_fm801_playback_trigger,
 653         .pointer =      snd_fm801_playback_pointer,
 654 };
 655
 656 static snd_pcm_ops_t snd_fm801_capture_ops = {
 657         .open =         snd_fm801_capture_open,
 658         .close =        snd_fm801_capture_close,
 659         .ioctl =        snd_pcm_lib_ioctl,
 660         .hw_params =    snd_fm801_hw_params,
 661         .hw_free =      snd_fm801_hw_free,
 662         .prepare =      snd_fm801_capture_prepare,
 663         .trigger =      snd_fm801_capture_trigger,
 664         .pointer =      snd_fm801_capture_pointer,
 665 };
 666
 667 static void snd_fm801_pcm_free(snd_pcm_t *pcm)
 668 {
 669         fm801_t *chip = pcm->private_data;
 670         chip->pcm = NULL;
 671         snd_pcm_lib_preallocate_free_for_all(pcm);
 672 }
 673
 674 static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm)
 675 {
 676         snd_pcm_t *pcm;
 677         int err;
 678
 679         if (rpcm)
 680                 *rpcm = NULL;
 681         if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
 682                 return err;
 683
 684         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
 685         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
 686
 687         pcm->private_data = chip;
 688         pcm->private_free = snd_fm801_pcm_free;
 689         pcm->info_flags = 0;
 690         strcpy(pcm->name, "FM801");
 691         chip->pcm = pcm;
 692
 693         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 694                                               snd_dma_pci_data(chip->pci),
 695                                               chip->multichannel ? 128*1024 : 64*1024, 128*1024);
 696
 697         if (rpcm)
 698                 *rpcm = pcm;
 699         return 0;
 700 }
 701
 702 /*
 703  *  TEA5757 radio
 704  */
 705
 706 #ifdef TEA575X_RADIO
 707
 708 /* 256PCS GPIO numbers */
 709 #define TEA_256PCS_DATA                 1
 710 #define TEA_256PCS_WRITE_ENABLE         2       /* inverted */
 711 #define TEA_256PCS_BUS_CLOCK            3
 712
 713 static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val)
 714 {
 715         fm801_t *chip = tea->private_data;
 716         unsigned short reg;
 717         int i = 25;
 718
 719         spin_lock_irq(&chip->reg_lock);
 720         reg = inw(FM801_REG(chip, GPIO_CTRL));
 721         /* use GPIO lines and set write enable bit */
 722         reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
 723                FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
 724                FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
 725         /* all of lines are in the write direction */
 726         /* clear data and clock lines */
 727         reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
 728                  FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
 729                  FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
 730                  FM801_GPIO_GP(TEA_256PCS_DATA) |
 731                  FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
 732                  FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
 733         outw(reg, FM801_REG(chip, GPIO_CTRL));
 734         udelay(1);
 735
 736         while (i--) {
 737                 if (val & (1 << i))
 738                         reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
 739                 else
 740                         reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
 741                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 742                 udelay(1);
 743                 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 744                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 745                 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 746                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 747                 udelay(1);
 748         }
 749
 750         /* and reset the write enable bit */
 751         reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
 752                FM801_GPIO_GP(TEA_256PCS_DATA);
 753         outw(reg, FM801_REG(chip, GPIO_CTRL));
 754         spin_unlock_irq(&chip->reg_lock);
 755 }
 756
 757 static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea)
 758 {
 759         fm801_t *chip = tea->private_data;
 760         unsigned short reg;
 761         unsigned int val = 0;
 762         int i;
 763
 764         spin_lock_irq(&chip->reg_lock);
 765         reg = inw(FM801_REG(chip, GPIO_CTRL));
 766         /* use GPIO lines, set data direction to input */
 767         reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
 768                FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
 769                FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
 770                FM801_GPIO_GD(TEA_256PCS_DATA) |
 771                FM801_GPIO_GP(TEA_256PCS_DATA) |
 772                FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
 773         /* all of lines are in the write direction, except data */
 774         /* clear data, write enable and clock lines */
 775         reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
 776                  FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
 777                  FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
 778
 779         for (i = 0; i < 24; i++) {
 780                 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 781                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 782                 udelay(1);
 783                 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 784                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 785                 udelay(1);
 786                 val <<= 1;
 787                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
 788                         val |= 1;
 789         }
 790
 791         spin_unlock_irq(&chip->reg_lock);
 792
 793         return val;
 794 }
 795
 796 /* 256PCPR GPIO numbers */
 797 #define TEA_256PCPR_BUS_CLOCK           0
 798 #define TEA_256PCPR_DATA                1
 799 #define TEA_256PCPR_WRITE_ENABLE        2       /* inverted */
 800
 801 static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val)
 802 {
 803         fm801_t *chip = tea->private_data;
 804         unsigned short reg;
 805         int i = 25;
 806
 807         spin_lock_irq(&chip->reg_lock);
 808         reg = inw(FM801_REG(chip, GPIO_CTRL));
 809         /* use GPIO lines and set write enable bit */
 810         reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
 811                FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
 812                FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
 813         /* all of lines are in the write direction */
 814         /* clear data and clock lines */
 815         reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
 816                  FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
 817                  FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
 818                  FM801_GPIO_GP(TEA_256PCPR_DATA) |
 819                  FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
 820                  FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
 821         outw(reg, FM801_REG(chip, GPIO_CTRL));
 822         udelay(1);
 823
 824         while (i--) {
 825                 if (val & (1 << i))
 826                         reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
 827                 else
 828                         reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
 829                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 830                 udelay(1);
 831                 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 832                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 833                 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 834                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 835                 udelay(1);
 836         }
 837
 838         /* and reset the write enable bit */
 839         reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
 840                FM801_GPIO_GP(TEA_256PCPR_DATA);
 841         outw(reg, FM801_REG(chip, GPIO_CTRL));
 842         spin_unlock_irq(&chip->reg_lock);
 843 }
 844
 845 static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea)
 846 {
 847         fm801_t *chip = tea->private_data;
 848         unsigned short reg;
 849         unsigned int val = 0;
 850         int i;
 851
 852         spin_lock_irq(&chip->reg_lock);
 853         reg = inw(FM801_REG(chip, GPIO_CTRL));
 854         /* use GPIO lines, set data direction to input */
 855         reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
 856                FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
 857                FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
 858                FM801_GPIO_GD(TEA_256PCPR_DATA) |
 859                FM801_GPIO_GP(TEA_256PCPR_DATA) |
 860                FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
 861         /* all of lines are in the write direction, except data */
 862         /* clear data, write enable and clock lines */
 863         reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
 864                  FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
 865                  FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
 866
 867         for (i = 0; i < 24; i++) {
 868                 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 869                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 870                 udelay(1);
 871                 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 872                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 873                 udelay(1);
 874                 val <<= 1;
 875                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
 876                         val |= 1;
 877         }
 878
 879         spin_unlock_irq(&chip->reg_lock);
 880
 881         return val;
 882 }
 883
 884 /* 64PCR GPIO numbers */
 885 #define TEA_64PCR_BUS_CLOCK             0
 886 #define TEA_64PCR_WRITE_ENABLE          1       /* inverted */
 887 #define TEA_64PCR_DATA                  2
 888
 889 static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val)
 890 {
 891         fm801_t *chip = tea->private_data;
 892         unsigned short reg;
 893         int i = 25;
 894
 895         spin_lock_irq(&chip->reg_lock);
 896         reg = inw(FM801_REG(chip, GPIO_CTRL));
 897         /* use GPIO lines and set write enable bit */
 898         reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
 899                FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
 900                FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
 901         /* all of lines are in the write direction */
 902         /* clear data and clock lines */
 903         reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
 904                  FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
 905                  FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
 906                  FM801_GPIO_GP(TEA_64PCR_DATA) |
 907                  FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
 908                  FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
 909         outw(reg, FM801_REG(chip, GPIO_CTRL));
 910         udelay(1);
 911
 912         while (i--) {
 913                 if (val & (1 << i))
 914                         reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
 915                 else
 916                         reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
 917                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 918                 udelay(1);
 919                 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 920                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 921                 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 922                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 923                 udelay(1);
 924         }
 925
 926         /* and reset the write enable bit */
 927         reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
 928                FM801_GPIO_GP(TEA_64PCR_DATA);
 929         outw(reg, FM801_REG(chip, GPIO_CTRL));
 930         spin_unlock_irq(&chip->reg_lock);
 931 }
 932
 933 static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea)
 934 {
 935         fm801_t *chip = tea->private_data;
 936         unsigned short reg;
 937         unsigned int val = 0;
 938         int i;
 939
 940         spin_lock_irq(&chip->reg_lock);
 941         reg = inw(FM801_REG(chip, GPIO_CTRL));
 942         /* use GPIO lines, set data direction to input */
 943         reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
 944                FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
 945                FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
 946                FM801_GPIO_GD(TEA_64PCR_DATA) |
 947                FM801_GPIO_GP(TEA_64PCR_DATA) |
 948                FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
 949         /* all of lines are in the write direction, except data */
 950         /* clear data, write enable and clock lines */
 951         reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
 952                  FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
 953                  FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
 954
 955         for (i = 0; i < 24; i++) {
 956                 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 957                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 958                 udelay(1);
 959                 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 960                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 961                 udelay(1);
 962                 val <<= 1;
 963                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
 964                         val |= 1;
 965         }
 966
 967         spin_unlock_irq(&chip->reg_lock);
 968
 969         return val;
 970 }
 971
 972 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
 973         {
 974                 /* 1 = MediaForte 256-PCS */
 975                 .write = snd_fm801_tea575x_256pcs_write,
 976                 .read = snd_fm801_tea575x_256pcs_read,
 977         },
 978         {
 979                 /* 2 = MediaForte 256-PCPR */
 980                 .write = snd_fm801_tea575x_256pcpr_write,
 981                 .read = snd_fm801_tea575x_256pcpr_read,
 982         },
 983         {
 984                 /* 3 = MediaForte 64-PCR */
 985                 .write = snd_fm801_tea575x_64pcr_write,
 986                 .read = snd_fm801_tea575x_64pcr_read,
 987         }
 988 };
 989 #endif
 990
 991 /*
 992  *  Mixer routines
 993  */
 994
 995 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
 996 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
 997   .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
 998   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
 999
1000 static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1001 {
1002         int mask = (kcontrol->private_value >> 16) & 0xff;
1003
1004         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1005         uinfo->count = 1;
1006         uinfo->value.integer.min = 0;
1007         uinfo->value.integer.max = mask;
1008         return 0;
1009 }
1010
1011 static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1012 {
1013         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1014         int reg = kcontrol->private_value & 0xff;
1015         int shift = (kcontrol->private_value >> 8) & 0xff;
1016         int mask = (kcontrol->private_value >> 16) & 0xff;
1017         int invert = (kcontrol->private_value >> 24) & 0xff;
1018
1019         ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1020         if (invert)
1021                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1022         return 0;
1023 }
1024
1025 static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1026 {
1027         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1028         int reg = kcontrol->private_value & 0xff;
1029         int shift = (kcontrol->private_value >> 8) & 0xff;
1030         int mask = (kcontrol->private_value >> 16) & 0xff;
1031         int invert = (kcontrol->private_value >> 24) & 0xff;
1032         unsigned short val;
1033
1034         val = (ucontrol->value.integer.value[0] & mask);
1035         if (invert)
1036                 val = mask - val;
1037         return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1038 }
1039
1040 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1041 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
1042   .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1043   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1044
1045 static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1046 {
1047         int mask = (kcontrol->private_value >> 16) & 0xff;
1048
1049         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1050         uinfo->count = 2;
1051         uinfo->value.integer.min = 0;
1052         uinfo->value.integer.max = mask;
1053         return 0;
1054 }
1055
1056 static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1057 {
1058         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1059         int reg = kcontrol->private_value & 0xff;
1060         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1061         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1062         int mask = (kcontrol->private_value >> 16) & 0xff;
1063         int invert = (kcontrol->private_value >> 24) & 0xff;
1064
1065         spin_lock_irq(&chip->reg_lock);
1066         ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1067         ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1068         spin_unlock_irq(&chip->reg_lock);
1069         if (invert) {
1070                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1071                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1072         }
1073         return 0;
1074 }
1075
1076 static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1077 {
1078         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1079         int reg = kcontrol->private_value & 0xff;
1080         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1081         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1082         int mask = (kcontrol->private_value >> 16) & 0xff;
1083         int invert = (kcontrol->private_value >> 24) & 0xff;
1084         unsigned short val1, val2;
1085
1086         val1 = ucontrol->value.integer.value[0] & mask;
1087         val2 = ucontrol->value.integer.value[1] & mask;
1088         if (invert) {
1089                 val1 = mask - val1;
1090                 val2 = mask - val2;
1091         }
1092         return snd_fm801_update_bits(chip, reg,
1093                                      (mask << shift_left) | (mask << shift_right),
1094                                      (val1 << shift_left ) | (val2 << shift_right));
1095 }
1096
1097 static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1098 {
1099         static char *texts[5] = {
1100                 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1101         };
1102
1103         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1104         uinfo->count = 1;
1105         uinfo->value.enumerated.items = 5;
1106         if (uinfo->value.enumerated.item > 4)
1107                 uinfo->value.enumerated.item = 4;
1108         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1109         return 0;
1110 }
1111
1112 static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1113 {
1114         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1115         unsigned short val;
1116
1117         val = inw(FM801_REG(chip, REC_SRC)) & 7;
1118         if (val > 4)
1119                 val = 4;
1120         ucontrol->value.enumerated.item[0] = val;
1121         return 0;
1122 }
1123
1124 static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1125 {
1126         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1127         unsigned short val;
1128
1129         if ((val = ucontrol->value.enumerated.item[0]) > 4)
1130                 return -EINVAL;
1131         return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1132 }
1133
1134 #define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t))
1135
1136 static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = {
1137 FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
1138 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1139 FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
1140 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1141 FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
1142 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1143 {
1144         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1145         .name = "Digital Capture Source",
1146         .info = snd_fm801_info_mux,
1147         .get = snd_fm801_get_mux,
1148         .put = snd_fm801_put_mux,
1149 }
1150 };
1151
1152 #define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t))
1153
1154 static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = {
1155 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1156 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1157 FM801_SINGLE("IEC958 Capture Switch", FM801_I2S_MODE, 8, 1, 0),
1158 FM801_SINGLE("IEC958 Raw Data Playback Switch", FM801_I2S_MODE, 9, 1, 0),
1159 FM801_SINGLE("IEC958 Raw Data Capture Switch", FM801_I2S_MODE, 10, 1, 0),
1160 FM801_SINGLE("IEC958 Playback Switch", FM801_GEN_CTRL, 2, 1, 0),
1161 };
1162
1163 static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus)
1164 {
1165         fm801_t *chip = bus->private_data;
1166         chip->ac97_bus = NULL;
1167 }
1168
1169 static void snd_fm801_mixer_free_ac97(ac97_t *ac97)
1170 {
1171         fm801_t *chip = ac97->private_data;
1172         if (ac97->num == 0) {
1173                 chip->ac97 = NULL;
1174         } else {
1175                 chip->ac97_sec = NULL;
1176         }
1177 }
1178
1179 static int __devinit snd_fm801_mixer(fm801_t *chip)
1180 {
1181         ac97_template_t ac97;
1182         unsigned int i;
1183         int err;
1184         static ac97_bus_ops_t ops = {
1185                 .write = snd_fm801_codec_write,
1186                 .read = snd_fm801_codec_read,
1187         };
1188
1189         if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1190                 return err;
1191         chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1192
1193         memset(&ac97, 0, sizeof(ac97));
1194         ac97.private_data = chip;
1195         ac97.private_free = snd_fm801_mixer_free_ac97;
1196         if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1197                 return err;
1198         if (chip->secondary) {
1199                 ac97.num = 1;
1200                 ac97.addr = chip->secondary_addr;
1201                 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1202                         return err;
1203         }
1204         for (i = 0; i < FM801_CONTROLS; i++)
1205                 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1206         if (chip->multichannel) {
1207                 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1208                         snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1209         }
1210         return 0;
1211 }
1212
1213 /*
1214  *  initialization routines
1215  */
1216
1217 static int snd_fm801_free(fm801_t *chip)
1218 {
1219         unsigned short cmdw;
1220
1221         if (chip->irq < 0)
1222                 goto __end_hw;
1223
1224         /* interrupt setup - mask everything */
1225         cmdw = inw(FM801_REG(chip, IRQ_MASK));
1226         cmdw |= 0x00c3;
1227         outw(cmdw, FM801_REG(chip, IRQ_MASK));
1228
1229       __end_hw:
1230 #ifdef TEA575X_RADIO
1231         snd_tea575x_exit(&chip->tea);
1232 #endif
1233         if (chip->irq >= 0)
1234                 free_irq(chip->irq, (void *)chip);
1235         pci_release_regions(chip->pci);
1236         pci_disable_device(chip->pci);
1237
1238         kfree(chip);
1239         return 0;
1240 }
1241
1242 static int snd_fm801_dev_free(snd_device_t *device)
1243 {
1244         fm801_t *chip = device->device_data;
1245         return snd_fm801_free(chip);
1246 }
1247
1248 static int __devinit snd_fm801_create(snd_card_t * card,
1249                                       struct pci_dev * pci,
1250                                       int tea575x_tuner,
1251                                       fm801_t ** rchip)
1252 {
1253         fm801_t *chip;
1254         unsigned char rev, id;
1255         unsigned short cmdw;
1256         unsigned long timeout;
1257         int err;
1258         static snd_device_ops_t ops = {
1259                 .dev_free =     snd_fm801_dev_free,
1260         };
1261
1262         *rchip = NULL;
1263         if ((err = pci_enable_device(pci)) < 0)
1264                 return err;
1265         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1266         if (chip == NULL) {
1267                 pci_disable_device(pci);
1268                 return -ENOMEM;
1269         }
1270         spin_lock_init(&chip->reg_lock);
1271         chip->card = card;
1272         chip->pci = pci;
1273         chip->irq = -1;
1274         if ((err = pci_request_regions(pci, "FM801")) < 0) {
1275                 kfree(chip);
1276                 pci_disable_device(pci);
1277                 return err;
1278         }
1279         chip->port = pci_resource_start(pci, 0);
1280         if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) {
1281                 snd_printk("unable to grab IRQ %d\n", chip->irq);
1282                 snd_fm801_free(chip);
1283                 return -EBUSY;
1284         }
1285         chip->irq = pci->irq;
1286         pci_set_master(pci);
1287
1288         pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
1289         if (rev >= 0xb1)        /* FM801-AU */
1290                 chip->multichannel = 1;
1291
1292         /* codec cold reset + AC'97 warm reset */
1293         outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL));
1294         inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
1295         udelay(100);
1296         outw(0, FM801_REG(chip, CODEC_CTRL));
1297
1298         timeout = (jiffies + (3 * HZ) / 4) + 1;         /* min 750ms */
1299
1300         outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1301         udelay(5);
1302         do {
1303                 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1304                         goto __ac97_secondary;
1305                 set_current_state(TASK_UNINTERRUPTIBLE);
1306                 schedule_timeout(1);
1307         } while (time_after(timeout, jiffies));
1308         snd_printk("Primary AC'97 codec not found\n");
1309         snd_fm801_free(chip);
1310         return -EIO;
1311
1312       __ac97_secondary:
1313         if (!chip->multichannel)        /* lookup is not required */
1314                 goto __ac97_ok;
1315         for (id = 3; id > 0; id--) {    /* my card has the secondary codec */
1316                                         /* at address #3, so the loop is inverted */
1317
1318                 timeout = jiffies + HZ / 20;
1319
1320                 outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD));
1321                 udelay(5);
1322                 do {
1323                         if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) {
1324                                 cmdw = inw(FM801_REG(chip, AC97_DATA));
1325                                 if (cmdw != 0xffff && cmdw != 0) {
1326                                         chip->secondary = 1;
1327                                         chip->secondary_addr = id;
1328                                         goto __ac97_ok;
1329                                 }
1330                         }
1331                         set_current_state(TASK_UNINTERRUPTIBLE);
1332                         schedule_timeout(1);
1333                 } while (time_after(timeout, jiffies));
1334         }
1335
1336         /* the recovery phase, it seems that probing for non-existing codec might */
1337         /* cause timeout problems */
1338         timeout = (jiffies + (3 * HZ) / 4) + 1;         /* min 750ms */
1339
1340         outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1341         udelay(5);
1342         do {
1343                 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1344                         goto __ac97_ok;
1345                 set_current_state(TASK_UNINTERRUPTIBLE);
1346                 schedule_timeout(1);
1347         } while (time_after(timeout, jiffies));
1348         snd_printk("Primary AC'97 codec not responding\n");
1349         snd_fm801_free(chip);
1350         return -EIO;
1351
1352       __ac97_ok:
1353
1354         /* init volume */
1355         outw(0x0808, FM801_REG(chip, PCM_VOL));
1356         outw(0x9f1f, FM801_REG(chip, FM_VOL));
1357         outw(0x8808, FM801_REG(chip, I2S_VOL));
1358
1359         /* I2S control - I2S mode */
1360         outw(0x0003, FM801_REG(chip, I2S_MODE));
1361
1362         /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
1363         cmdw = inw(FM801_REG(chip, IRQ_MASK));
1364         cmdw &= ~0x0083;
1365         outw(cmdw, FM801_REG(chip, IRQ_MASK));
1366
1367         /* interrupt clear */
1368         outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1369
1370         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1371                 snd_fm801_free(chip);
1372                 return err;
1373         }
1374
1375         snd_card_set_dev(card, &pci->dev);
1376
1377 #ifdef TEA575X_RADIO
1378         if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
1379                 chip->tea.dev_nr = tea575x_tuner >> 16;
1380                 chip->tea.card = card;
1381                 chip->tea.freq_fixup = 10700;
1382                 chip->tea.private_data = chip;
1383                 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
1384                 snd_tea575x_init(&chip->tea);
1385         }
1386 #endif
1387
1388         *rchip = chip;
1389         return 0;
1390 }
1391
1392 static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1393                                           const struct pci_device_id *pci_id)
1394 {
1395         static int dev;
1396         snd_card_t *card;
1397         fm801_t *chip;
1398         opl3_t *opl3;
1399         int err;
1400
1401         if (dev >= SNDRV_CARDS)
1402                 return -ENODEV;
1403         if (!enable[dev]) {
1404                 dev++;
1405                 return -ENOENT;
1406         }
1407
1408         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1409         if (card == NULL)
1410                 return -ENOMEM;
1411         if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1412                 snd_card_free(card);
1413                 return err;
1414         }
1415
1416         strcpy(card->driver, "FM801");
1417         strcpy(card->shortname, "ForteMedia FM801-");
1418         strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1419         sprintf(card->longname, "%s at 0x%lx, irq %i",
1420                 card->shortname, chip->port, chip->irq);
1421
1422         if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1423                 snd_card_free(card);
1424                 return err;
1425         }
1426         if ((err = snd_fm801_mixer(chip)) < 0) {
1427                 snd_card_free(card);
1428                 return err;
1429         }
1430         if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1431                                        FM801_REG(chip, MPU401_DATA), 1,
1432                                        chip->irq, 0, &chip->rmidi)) < 0) {
1433                 snd_card_free(card);
1434                 return err;
1435         }
1436         if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1437                                    FM801_REG(chip, OPL3_BANK1),
1438                                    OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1439                 snd_card_free(card);
1440                 return err;
1441         }
1442         if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1443                 snd_card_free(card);
1444                 return err;
1445         }
1446
1447         if ((err = snd_card_register(card)) < 0) {
1448                 snd_card_free(card);
1449                 return err;
1450         }
1451         pci_set_drvdata(pci, card);
1452         dev++;
1453         return 0;
1454 }
1455
1456 static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1457 {
1458         snd_card_free(pci_get_drvdata(pci));
1459         pci_set_drvdata(pci, NULL);
1460 }
1461
1462 static struct pci_driver driver = {
1463         .name = "FM801",
1464         .id_table = snd_fm801_ids,
1465         .probe = snd_card_fm801_probe,
1466         .remove = __devexit_p(snd_card_fm801_remove),
1467 };
1468
1469 static int __init alsa_card_fm801_init(void)
1470 {
1471         return pci_module_init(&driver);
1472 }
1473
1474 static void __exit alsa_card_fm801_exit(void)
1475 {
1476         pci_unregister_driver(&driver);
1477 }
1478
1479 module_init(alsa_card_fm801_init)
1480 module_exit(alsa_card_fm801_exit)