sound/pci/fm801.c

   1 /*
   2  *  The driver for the ForteMedia FM801 based soundcards
   3  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   4  *
   5  *
   6  *   This program is free software; you can redistribute it and/or modify
   7  *   it under the terms of the GNU General Public License as published by
   8  *   the Free Software Foundation; either version 2 of the License, or
   9  *   (at your option) any later version.
  10  *
  11  *   This program is distributed in the hope that it will be useful,
  12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *   GNU General Public License for more details.
  15  *
  16  *   You should have received a copy of the GNU General Public License
  17  *   along with this program; if not, write to the Free Software
  18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  19  *
  20  */
  21
  22 #include <sound/driver.h>
  23 #include <linux/delay.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/pci.h>
  27 #include <linux/slab.h>
  28 #include <linux/moduleparam.h>
  29 #include <sound/core.h>
  30 #include <sound/pcm.h>
  31 #include <sound/ac97_codec.h>
  32 #include <sound/mpu401.h>
  33 #include <sound/opl3.h>
  34 #include <sound/initval.h>
  35
  36 #include <asm/io.h>
  37
  38 #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
  39 #include <sound/tea575x-tuner.h>
  40 #define TEA575X_RADIO 1
  41 #endif
  42
  43 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  44 MODULE_DESCRIPTION("ForteMedia FM801");
  45 MODULE_LICENSE("GPL");
  46 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
  47                 "{Genius,SoundMaker Live 5.1}}");
  48
  49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  52 /*
  53  *  Enable TEA575x tuner
  54  *    1 = MediaForte 256-PCS
  55  *    2 = MediaForte 256-PCPR
  56  *    3 = MediaForte 64-PCR
  57  *  High 16-bits are video (radio) device number + 1
  58  */
  59 static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 };
  60 static int boot_devs;
  61
  62 module_param_array(index, int, boot_devs, 0444);
  63 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
  64 module_param_array(id, charp, boot_devs, 0444);
  65 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
  66 module_param_array(enable, bool, boot_devs, 0444);
  67 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
  68 module_param_array(tea575x_tuner, bool, boot_devs, 0444);
  69 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
  70
  71 /*
  72  *  Direct registers
  73  */
  74
  75 #define FM801_REG(chip, reg)    (chip->port + FM801_##reg)
  76
  77 #define FM801_PCM_VOL           0x00    /* PCM Output Volume */
  78 #define FM801_FM_VOL            0x02    /* FM Output Volume */
  79 #define FM801_I2S_VOL           0x04    /* I2S Volume */
  80 #define FM801_REC_SRC           0x06    /* Record Source */
  81 #define FM801_PLY_CTRL          0x08    /* Playback Control */
  82 #define FM801_PLY_COUNT         0x0a    /* Playback Count */
  83 #define FM801_PLY_BUF1          0x0c    /* Playback Bufer I */
  84 #define FM801_PLY_BUF2          0x10    /* Playback Buffer II */
  85 #define FM801_CAP_CTRL          0x14    /* Capture Control */
  86 #define FM801_CAP_COUNT         0x16    /* Capture Count */
  87 #define FM801_CAP_BUF1          0x18    /* Capture Buffer I */
  88 #define FM801_CAP_BUF2          0x1c    /* Capture Buffer II */
  89 #define FM801_CODEC_CTRL        0x22    /* Codec Control */
  90 #define FM801_I2S_MODE          0x24    /* I2S Mode Control */
  91 #define FM801_VOLUME            0x26    /* Volume Up/Down/Mute Status */
  92 #define FM801_I2C_CTRL          0x29    /* I2C Control */
  93 #define FM801_AC97_CMD          0x2a    /* AC'97 Command */
  94 #define FM801_AC97_DATA         0x2c    /* AC'97 Data */
  95 #define FM801_MPU401_DATA       0x30    /* MPU401 Data */
  96 #define FM801_MPU401_CMD        0x31    /* MPU401 Command */
  97 #define FM801_GPIO_CTRL         0x52    /* General Purpose I/O Control */
  98 #define FM801_GEN_CTRL          0x54    /* General Control */
  99 #define FM801_IRQ_MASK          0x56    /* Interrupt Mask */
 100 #define FM801_IRQ_STATUS        0x5a    /* Interrupt Status */
 101 #define FM801_OPL3_BANK0        0x68    /* OPL3 Status Read / Bank 0 Write */
 102 #define FM801_OPL3_DATA0        0x69    /* OPL3 Data 0 Write */
 103 #define FM801_OPL3_BANK1        0x6a    /* OPL3 Bank 1 Write */
 104 #define FM801_OPL3_DATA1        0x6b    /* OPL3 Bank 1 Write */
 105 #define FM801_POWERDOWN         0x70    /* Blocks Power Down Control */
 106
 107 #define FM801_AC97_ADDR_SHIFT   10
 108
 109 /* playback and record control register bits */
 110 #define FM801_BUF1_LAST         (1<<1)
 111 #define FM801_BUF2_LAST         (1<<2)
 112 #define FM801_START             (1<<5)
 113 #define FM801_PAUSE             (1<<6)
 114 #define FM801_IMMED_STOP        (1<<7)
 115 #define FM801_RATE_SHIFT        8
 116 #define FM801_RATE_MASK         (15 << FM801_RATE_SHIFT)
 117 #define FM801_CHANNELS_4        (1<<12) /* playback only */
 118 #define FM801_CHANNELS_6        (2<<12) /* playback only */
 119 #define FM801_CHANNELS_6MS      (3<<12) /* playback only */
 120 #define FM801_CHANNELS_MASK     (3<<12)
 121 #define FM801_16BIT             (1<<14)
 122 #define FM801_STEREO            (1<<15)
 123
 124 /* IRQ status bits */
 125 #define FM801_IRQ_PLAYBACK      (1<<8)
 126 #define FM801_IRQ_CAPTURE       (1<<9)
 127 #define FM801_IRQ_VOLUME        (1<<14)
 128 #define FM801_IRQ_MPU           (1<<15)
 129
 130 /* GPIO control register */
 131 #define FM801_GPIO_GP0          (1<<0)  /* read/write */
 132 #define FM801_GPIO_GP1          (1<<1)
 133 #define FM801_GPIO_GP2          (1<<2)
 134 #define FM801_GPIO_GP3          (1<<3)
 135 #define FM801_GPIO_GP(x)        (1<<(0+(x)))
 136 #define FM801_GPIO_GD0          (1<<8)  /* directions: 1 = input, 0 = output*/
 137 #define FM801_GPIO_GD1          (1<<9)
 138 #define FM801_GPIO_GD2          (1<<10)
 139 #define FM801_GPIO_GD3          (1<<11)
 140 #define FM801_GPIO_GD(x)        (1<<(8+(x)))
 141 #define FM801_GPIO_GS0          (1<<12) /* function select: */
 142 #define FM801_GPIO_GS1          (1<<13) /*    1 = GPIO */
 143 #define FM801_GPIO_GS2          (1<<14) /*    0 = other (S/PDIF, VOL) */
 144 #define FM801_GPIO_GS3          (1<<15)
 145 #define FM801_GPIO_GS(x)        (1<<(12+(x)))
 146
 147 /*
 148
 149  */
 150
 151 typedef struct _snd_fm801 fm801_t;
 152
 153 struct _snd_fm801 {
 154         int irq;
 155
 156         unsigned long port;     /* I/O port number */
 157         unsigned int multichannel: 1,   /* multichannel support */
 158                      secondary: 1;      /* secondary codec */
 159         unsigned char secondary_addr;   /* address of the secondary codec */
 160
 161         unsigned short ply_ctrl; /* playback control */
 162         unsigned short cap_ctrl; /* capture control */
 163
 164         unsigned long ply_buffer;
 165         unsigned int ply_buf;
 166         unsigned int ply_count;
 167         unsigned int ply_size;
 168         unsigned int ply_pos;
 169
 170         unsigned long cap_buffer;
 171         unsigned int cap_buf;
 172         unsigned int cap_count;
 173         unsigned int cap_size;
 174         unsigned int cap_pos;
 175
 176         ac97_bus_t *ac97_bus;
 177         ac97_t *ac97;
 178         ac97_t *ac97_sec;
 179
 180         struct pci_dev *pci;
 181         snd_card_t *card;
 182         snd_pcm_t *pcm;
 183         snd_rawmidi_t *rmidi;
 184         snd_pcm_substream_t *playback_substream;
 185         snd_pcm_substream_t *capture_substream;
 186         unsigned int p_dma_size;
 187         unsigned int c_dma_size;
 188
 189         spinlock_t reg_lock;
 190         snd_info_entry_t *proc_entry;
 191
 192 #ifdef TEA575X_RADIO
 193         tea575x_t tea;
 194 #endif
 195 };
 196
 197 static struct pci_device_id snd_fm801_ids[] = {
 198         { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* FM801 */
 199         { 0, }
 200 };
 201
 202 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
 203
 204 /*
 205  *  common I/O routines
 206  */
 207
 208 static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg,
 209                                  unsigned short mask, unsigned short value)
 210 {
 211         int change;
 212         unsigned short old, new;
 213
 214         spin_lock(&chip->reg_lock);
 215         old = inw(chip->port + reg);
 216         new = (old & ~mask) | value;
 217         change = old != new;
 218         if (change)
 219                 outw(new, chip->port + reg);
 220         spin_unlock(&chip->reg_lock);
 221         return change;
 222 }
 223
 224 static void snd_fm801_codec_write(ac97_t *ac97,
 225                                   unsigned short reg,
 226                                   unsigned short val)
 227 {
 228         fm801_t *chip = ac97->private_data;
 229         int idx;
 230
 231         /*
 232          *  Wait until the codec interface is not ready..
 233          */
 234         for (idx = 0; idx < 100; idx++) {
 235                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 236                         goto ok1;
 237                 udelay(10);
 238         }
 239         snd_printk("AC'97 interface is busy (1)\n");
 240         return;
 241
 242  ok1:
 243         /* write data and address */
 244         outw(val, FM801_REG(chip, AC97_DATA));
 245         outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
 246         /*
 247          *  Wait until the write command is not completed..
 248          */
 249         for (idx = 0; idx < 1000; idx++) {
 250                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 251                         return;
 252                 udelay(10);
 253         }
 254         snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
 255 }
 256
 257 static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg)
 258 {
 259         fm801_t *chip = ac97->private_data;
 260         int idx;
 261
 262         /*
 263          *  Wait until the codec interface is not ready..
 264          */
 265         for (idx = 0; idx < 100; idx++) {
 266                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 267                         goto ok1;
 268                 udelay(10);
 269         }
 270         snd_printk("AC'97 interface is busy (1)\n");
 271         return 0;
 272
 273  ok1:
 274         /* read command */
 275         outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD));
 276         for (idx = 0; idx < 100; idx++) {
 277                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
 278                         goto ok2;
 279                 udelay(10);
 280         }
 281         snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
 282         return 0;
 283
 284  ok2:
 285         for (idx = 0; idx < 1000; idx++) {
 286                 if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8))
 287                         goto ok3;
 288                 udelay(10);
 289         }
 290         snd_printk("AC'97 interface #%d is not valid (2)\n", ac97->num);
 291         return 0;
 292
 293  ok3:
 294         return inw(FM801_REG(chip, AC97_DATA));
 295 }
 296
 297 static unsigned int rates[] = {
 298   5500,  8000,  9600, 11025,
 299   16000, 19200, 22050, 32000,
 300   38400, 44100, 48000
 301 };
 302
 303 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
 304         .count = ARRAY_SIZE(rates),
 305         .list = rates,
 306         .mask = 0,
 307 };
 308
 309 static unsigned int channels[] = {
 310   2, 4, 6
 311 };
 312
 313 #define CHANNELS sizeof(channels) / sizeof(channels[0])
 314
 315 static snd_pcm_hw_constraint_list_t hw_constraints_channels = {
 316         .count = CHANNELS,
 317         .list = channels,
 318         .mask = 0,
 319 };
 320
 321 /*
 322  *  Sample rate routines
 323  */
 324
 325 static unsigned short snd_fm801_rate_bits(unsigned int rate)
 326 {
 327         unsigned int idx;
 328
 329         for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
 330                 if (rates[idx] == rate)
 331                         return idx;
 332         snd_BUG();
 333         return ARRAY_SIZE(rates) - 1;
 334 }
 335
 336 /*
 337  *  PCM part
 338  */
 339
 340 static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream,
 341                                       int cmd)
 342 {
 343         fm801_t *chip = snd_pcm_substream_chip(substream);
 344
 345         spin_lock(&chip->reg_lock);
 346         switch (cmd) {
 347         case SNDRV_PCM_TRIGGER_START:
 348                 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
 349                                      FM801_BUF2_LAST |
 350                                      FM801_PAUSE);
 351                 chip->ply_ctrl |= FM801_START |
 352                                    FM801_IMMED_STOP;
 353                 break;
 354         case SNDRV_PCM_TRIGGER_STOP:
 355                 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
 356                 break;
 357         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 358                 chip->ply_ctrl |= FM801_PAUSE;
 359                 break;
 360         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 361                 chip->ply_ctrl &= ~FM801_PAUSE;
 362                 break;
 363         default:
 364                 spin_unlock(&chip->reg_lock);
 365                 snd_BUG();
 366                 return -EINVAL;
 367         }
 368         outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
 369         spin_unlock(&chip->reg_lock);
 370         return 0;
 371 }
 372
 373 static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream,
 374                                      int cmd)
 375 {
 376         fm801_t *chip = snd_pcm_substream_chip(substream);
 377
 378         spin_lock(&chip->reg_lock);
 379         switch (cmd) {
 380         case SNDRV_PCM_TRIGGER_START:
 381                 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
 382                                      FM801_BUF2_LAST |
 383                                      FM801_PAUSE);
 384                 chip->cap_ctrl |= FM801_START |
 385                                    FM801_IMMED_STOP;
 386                 break;
 387         case SNDRV_PCM_TRIGGER_STOP:
 388                 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
 389                 break;
 390         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 391                 chip->cap_ctrl |= FM801_PAUSE;
 392                 break;
 393         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 394                 chip->cap_ctrl &= ~FM801_PAUSE;
 395                 break;
 396         default:
 397                 spin_unlock(&chip->reg_lock);
 398                 snd_BUG();
 399                 return -EINVAL;
 400         }
 401         outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
 402         spin_unlock(&chip->reg_lock);
 403         return 0;
 404 }
 405
 406 static int snd_fm801_hw_params(snd_pcm_substream_t * substream,
 407                                snd_pcm_hw_params_t * hw_params)
 408 {
 409         return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 410 }
 411
 412 static int snd_fm801_hw_free(snd_pcm_substream_t * substream)
 413 {
 414         return snd_pcm_lib_free_pages(substream);
 415 }
 416
 417 static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream)
 418 {
 419         unsigned long flags;
 420         fm801_t *chip = snd_pcm_substream_chip(substream);
 421         snd_pcm_runtime_t *runtime = substream->runtime;
 422
 423         chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
 424         chip->ply_count = snd_pcm_lib_period_bytes(substream);
 425         spin_lock_irqsave(&chip->reg_lock, flags);
 426         chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
 427                              FM801_STEREO | FM801_RATE_MASK |
 428                              FM801_CHANNELS_MASK);
 429         if (snd_pcm_format_width(runtime->format) == 16)
 430                 chip->ply_ctrl |= FM801_16BIT;
 431         if (runtime->channels > 1) {
 432                 chip->ply_ctrl |= FM801_STEREO;
 433                 if (runtime->channels == 4)
 434                         chip->ply_ctrl |= FM801_CHANNELS_4;
 435                 else if (runtime->channels == 6)
 436                         chip->ply_ctrl |= FM801_CHANNELS_6;
 437         }
 438         chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
 439         chip->ply_buf = 0;
 440         outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
 441         outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
 442         chip->ply_buffer = runtime->dma_addr;
 443         chip->ply_pos = 0;
 444         outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
 445         outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
 446         spin_unlock_irqrestore(&chip->reg_lock, flags);
 447         return 0;
 448 }
 449
 450 static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream)
 451 {
 452         unsigned long flags;
 453         fm801_t *chip = snd_pcm_substream_chip(substream);
 454         snd_pcm_runtime_t *runtime = substream->runtime;
 455
 456         chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
 457         chip->cap_count = snd_pcm_lib_period_bytes(substream);
 458         spin_lock_irqsave(&chip->reg_lock, flags);
 459         chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
 460                              FM801_STEREO | FM801_RATE_MASK);
 461         if (snd_pcm_format_width(runtime->format) == 16)
 462                 chip->cap_ctrl |= FM801_16BIT;
 463         if (runtime->channels > 1)
 464                 chip->cap_ctrl |= FM801_STEREO;
 465         chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
 466         chip->cap_buf = 0;
 467         outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
 468         outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
 469         chip->cap_buffer = runtime->dma_addr;
 470         chip->cap_pos = 0;
 471         outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
 472         outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
 473         spin_unlock_irqrestore(&chip->reg_lock, flags);
 474         return 0;
 475 }
 476
 477 static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream)
 478 {
 479         fm801_t *chip = snd_pcm_substream_chip(substream);
 480         size_t ptr;
 481
 482         if (!(chip->ply_ctrl & FM801_START))
 483                 return 0;
 484         spin_lock(&chip->reg_lock);
 485         ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
 486         if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
 487                 ptr += chip->ply_count;
 488                 ptr %= chip->ply_size;
 489         }
 490         spin_unlock(&chip->reg_lock);
 491         return bytes_to_frames(substream->runtime, ptr);
 492 }
 493
 494 static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream)
 495 {
 496         fm801_t *chip = snd_pcm_substream_chip(substream);
 497         size_t ptr;
 498
 499         if (!(chip->cap_ctrl & FM801_START))
 500                 return 0;
 501         spin_lock(&chip->reg_lock);
 502         ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
 503         if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
 504                 ptr += chip->cap_count;
 505                 ptr %= chip->cap_size;
 506         }
 507         spin_unlock(&chip->reg_lock);
 508         return bytes_to_frames(substream->runtime, ptr);
 509 }
 510
 511 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 512 {
 513         fm801_t *chip = dev_id;
 514         unsigned short status;
 515         unsigned int tmp;
 516
 517         status = inw(FM801_REG(chip, IRQ_STATUS));
 518         status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
 519         if (! status)
 520                 return IRQ_NONE;
 521         /* ack first */
 522         outw(status, FM801_REG(chip, IRQ_STATUS));
 523         if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
 524                 spin_lock(&chip->reg_lock);
 525                 chip->ply_buf++;
 526                 chip->ply_pos += chip->ply_count;
 527                 chip->ply_pos %= chip->ply_size;
 528                 tmp = chip->ply_pos + chip->ply_count;
 529                 tmp %= chip->ply_size;
 530                 outl(chip->ply_buffer + tmp,
 531                                 (chip->ply_buf & 1) ?
 532                                         FM801_REG(chip, PLY_BUF1) :
 533                                         FM801_REG(chip, PLY_BUF2));
 534                 spin_unlock(&chip->reg_lock);
 535                 snd_pcm_period_elapsed(chip->playback_substream);
 536         }
 537         if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
 538                 spin_lock(&chip->reg_lock);
 539                 chip->cap_buf++;
 540                 chip->cap_pos += chip->cap_count;
 541                 chip->cap_pos %= chip->cap_size;
 542                 tmp = chip->cap_pos + chip->cap_count;
 543                 tmp %= chip->cap_size;
 544                 outl(chip->cap_buffer + tmp,
 545                                 (chip->cap_buf & 1) ?
 546                                         FM801_REG(chip, CAP_BUF1) :
 547                                         FM801_REG(chip, CAP_BUF2));
 548                 spin_unlock(&chip->reg_lock);
 549                 snd_pcm_period_elapsed(chip->capture_substream);
 550         }
 551         if (chip->rmidi && (status & FM801_IRQ_MPU))
 552                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
 553         if (status & FM801_IRQ_VOLUME)
 554                 ;/* TODO */
 555
 556         return IRQ_HANDLED;
 557 }
 558
 559 static snd_pcm_hardware_t snd_fm801_playback =
 560 {
 561         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 562                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 563                                  SNDRV_PCM_INFO_PAUSE |
 564                                  SNDRV_PCM_INFO_MMAP_VALID),
 565         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 566         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
 567         .rate_min =             5500,
 568         .rate_max =             48000,
 569         .channels_min =         1,
 570         .channels_max =         2,
 571         .buffer_bytes_max =     (128*1024),
 572         .period_bytes_min =     64,
 573         .period_bytes_max =     (128*1024),
 574         .periods_min =          1,
 575         .periods_max =          1024,
 576         .fifo_size =            0,
 577 };
 578
 579 static snd_pcm_hardware_t snd_fm801_capture =
 580 {
 581         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 582                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 583                                  SNDRV_PCM_INFO_PAUSE |
 584                                  SNDRV_PCM_INFO_MMAP_VALID),
 585         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 586         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
 587         .rate_min =             5500,
 588         .rate_max =             48000,
 589         .channels_min =         1,
 590         .channels_max =         2,
 591         .buffer_bytes_max =     (128*1024),
 592         .period_bytes_min =     64,
 593         .period_bytes_max =     (128*1024),
 594         .periods_min =          1,
 595         .periods_max =          1024,
 596         .fifo_size =            0,
 597 };
 598
 599 static int snd_fm801_playback_open(snd_pcm_substream_t * substream)
 600 {
 601         fm801_t *chip = snd_pcm_substream_chip(substream);
 602         snd_pcm_runtime_t *runtime = substream->runtime;
 603         int err;
 604
 605         chip->playback_substream = substream;
 606         runtime->hw = snd_fm801_playback;
 607         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
 608         if (chip->multichannel) {
 609                 runtime->hw.channels_max = 6;
 610                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
 611         }
 612         if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
 613                 return err;
 614         return 0;
 615 }
 616
 617 static int snd_fm801_capture_open(snd_pcm_substream_t * substream)
 618 {
 619         fm801_t *chip = snd_pcm_substream_chip(substream);
 620         snd_pcm_runtime_t *runtime = substream->runtime;
 621         int err;
 622
 623         chip->capture_substream = substream;
 624         runtime->hw = snd_fm801_capture;
 625         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
 626         if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
 627                 return err;
 628         return 0;
 629 }
 630
 631 static int snd_fm801_playback_close(snd_pcm_substream_t * substream)
 632 {
 633         fm801_t *chip = snd_pcm_substream_chip(substream);
 634
 635         chip->playback_substream = NULL;
 636         return 0;
 637 }
 638
 639 static int snd_fm801_capture_close(snd_pcm_substream_t * substream)
 640 {
 641         fm801_t *chip = snd_pcm_substream_chip(substream);
 642
 643         chip->capture_substream = NULL;
 644         return 0;
 645 }
 646
 647 static snd_pcm_ops_t snd_fm801_playback_ops = {
 648         .open =         snd_fm801_playback_open,
 649         .close =        snd_fm801_playback_close,
 650         .ioctl =        snd_pcm_lib_ioctl,
 651         .hw_params =    snd_fm801_hw_params,
 652         .hw_free =      snd_fm801_hw_free,
 653         .prepare =      snd_fm801_playback_prepare,
 654         .trigger =      snd_fm801_playback_trigger,
 655         .pointer =      snd_fm801_playback_pointer,
 656 };
 657
 658 static snd_pcm_ops_t snd_fm801_capture_ops = {
 659         .open =         snd_fm801_capture_open,
 660         .close =        snd_fm801_capture_close,
 661         .ioctl =        snd_pcm_lib_ioctl,
 662         .hw_params =    snd_fm801_hw_params,
 663         .hw_free =      snd_fm801_hw_free,
 664         .prepare =      snd_fm801_capture_prepare,
 665         .trigger =      snd_fm801_capture_trigger,
 666         .pointer =      snd_fm801_capture_pointer,
 667 };
 668
 669 static void snd_fm801_pcm_free(snd_pcm_t *pcm)
 670 {
 671         fm801_t *chip = pcm->private_data;
 672         chip->pcm = NULL;
 673         snd_pcm_lib_preallocate_free_for_all(pcm);
 674 }
 675
 676 static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm)
 677 {
 678         snd_pcm_t *pcm;
 679         int err;
 680
 681         if (rpcm)
 682                 *rpcm = NULL;
 683         if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
 684                 return err;
 685
 686         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
 687         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
 688
 689         pcm->private_data = chip;
 690         pcm->private_free = snd_fm801_pcm_free;
 691         pcm->info_flags = 0;
 692         strcpy(pcm->name, "FM801");
 693         chip->pcm = pcm;
 694
 695         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 696                                               snd_dma_pci_data(chip->pci),
 697                                               chip->multichannel ? 128*1024 : 64*1024, 128*1024);
 698
 699         if (rpcm)
 700                 *rpcm = pcm;
 701         return 0;
 702 }
 703
 704 /*
 705  *  TEA5757 radio
 706  */
 707
 708 #ifdef TEA575X_RADIO
 709
 710 /* 256PCS GPIO numbers */
 711 #define TEA_256PCS_DATA                 1
 712 #define TEA_256PCS_WRITE_ENABLE         2       /* inverted */
 713 #define TEA_256PCS_BUS_CLOCK            3
 714
 715 static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val)
 716 {
 717         fm801_t *chip = tea->private_data;
 718         unsigned short reg;
 719         int i = 25;
 720
 721         spin_lock_irq(&chip->reg_lock);
 722         reg = inw(FM801_REG(chip, GPIO_CTRL));
 723         /* use GPIO lines and set write enable bit */
 724         reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
 725                FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
 726                FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
 727         /* all of lines are in the write direction */
 728         /* clear data and clock lines */
 729         reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
 730                  FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
 731                  FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
 732                  FM801_GPIO_GP(TEA_256PCS_DATA) |
 733                  FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
 734                  FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
 735         outw(reg, FM801_REG(chip, GPIO_CTRL));
 736         udelay(1);
 737
 738         while (i--) {
 739                 if (val & (1 << i))
 740                         reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
 741                 else
 742                         reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
 743                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 744                 udelay(1);
 745                 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 746                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 747                 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 748                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 749                 udelay(1);
 750         }
 751
 752         /* and reset the write enable bit */
 753         reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
 754                FM801_GPIO_GP(TEA_256PCS_DATA);
 755         outw(reg, FM801_REG(chip, GPIO_CTRL));
 756         spin_unlock_irq(&chip->reg_lock);
 757 }
 758
 759 static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea)
 760 {
 761         fm801_t *chip = tea->private_data;
 762         unsigned short reg;
 763         unsigned int val = 0;
 764         int i;
 765
 766         spin_lock_irq(&chip->reg_lock);
 767         reg = inw(FM801_REG(chip, GPIO_CTRL));
 768         /* use GPIO lines, set data direction to input */
 769         reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
 770                FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
 771                FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
 772                FM801_GPIO_GD(TEA_256PCS_DATA) |
 773                FM801_GPIO_GP(TEA_256PCS_DATA) |
 774                FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
 775         /* all of lines are in the write direction, except data */
 776         /* clear data, write enable and clock lines */
 777         reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
 778                  FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
 779                  FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
 780
 781         for (i = 0; i < 24; i++) {
 782                 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 783                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 784                 udelay(1);
 785                 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
 786                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 787                 udelay(1);
 788                 val <<= 1;
 789                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
 790                         val |= 1;
 791         }
 792
 793         spin_unlock_irq(&chip->reg_lock);
 794
 795         return val;
 796 }
 797
 798 /* 256PCPR GPIO numbers */
 799 #define TEA_256PCPR_BUS_CLOCK           0
 800 #define TEA_256PCPR_DATA                1
 801 #define TEA_256PCPR_WRITE_ENABLE        2       /* inverted */
 802
 803 static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val)
 804 {
 805         fm801_t *chip = tea->private_data;
 806         unsigned short reg;
 807         int i = 25;
 808
 809         spin_lock_irq(&chip->reg_lock);
 810         reg = inw(FM801_REG(chip, GPIO_CTRL));
 811         /* use GPIO lines and set write enable bit */
 812         reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
 813                FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
 814                FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
 815         /* all of lines are in the write direction */
 816         /* clear data and clock lines */
 817         reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
 818                  FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
 819                  FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
 820                  FM801_GPIO_GP(TEA_256PCPR_DATA) |
 821                  FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
 822                  FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
 823         outw(reg, FM801_REG(chip, GPIO_CTRL));
 824         udelay(1);
 825
 826         while (i--) {
 827                 if (val & (1 << i))
 828                         reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
 829                 else
 830                         reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
 831                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 832                 udelay(1);
 833                 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 834                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 835                 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 836                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 837                 udelay(1);
 838         }
 839
 840         /* and reset the write enable bit */
 841         reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
 842                FM801_GPIO_GP(TEA_256PCPR_DATA);
 843         outw(reg, FM801_REG(chip, GPIO_CTRL));
 844         spin_unlock_irq(&chip->reg_lock);
 845 }
 846
 847 static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea)
 848 {
 849         fm801_t *chip = tea->private_data;
 850         unsigned short reg;
 851         unsigned int val = 0;
 852         int i;
 853
 854         spin_lock_irq(&chip->reg_lock);
 855         reg = inw(FM801_REG(chip, GPIO_CTRL));
 856         /* use GPIO lines, set data direction to input */
 857         reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
 858                FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
 859                FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
 860                FM801_GPIO_GD(TEA_256PCPR_DATA) |
 861                FM801_GPIO_GP(TEA_256PCPR_DATA) |
 862                FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
 863         /* all of lines are in the write direction, except data */
 864         /* clear data, write enable and clock lines */
 865         reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
 866                  FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
 867                  FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
 868
 869         for (i = 0; i < 24; i++) {
 870                 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 871                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 872                 udelay(1);
 873                 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
 874                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 875                 udelay(1);
 876                 val <<= 1;
 877                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
 878                         val |= 1;
 879         }
 880
 881         spin_unlock_irq(&chip->reg_lock);
 882
 883         return val;
 884 }
 885
 886 /* 64PCR GPIO numbers */
 887 #define TEA_64PCR_BUS_CLOCK             0
 888 #define TEA_64PCR_WRITE_ENABLE          1       /* inverted */
 889 #define TEA_64PCR_DATA                  2
 890
 891 static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val)
 892 {
 893         fm801_t *chip = tea->private_data;
 894         unsigned short reg;
 895         int i = 25;
 896
 897         spin_lock_irq(&chip->reg_lock);
 898         reg = inw(FM801_REG(chip, GPIO_CTRL));
 899         /* use GPIO lines and set write enable bit */
 900         reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
 901                FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
 902                FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
 903         /* all of lines are in the write direction */
 904         /* clear data and clock lines */
 905         reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
 906                  FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
 907                  FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
 908                  FM801_GPIO_GP(TEA_64PCR_DATA) |
 909                  FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
 910                  FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
 911         outw(reg, FM801_REG(chip, GPIO_CTRL));
 912         udelay(1);
 913
 914         while (i--) {
 915                 if (val & (1 << i))
 916                         reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
 917                 else
 918                         reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
 919                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 920                 udelay(1);
 921                 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 922                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 923                 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 924                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 925                 udelay(1);
 926         }
 927
 928         /* and reset the write enable bit */
 929         reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
 930                FM801_GPIO_GP(TEA_64PCR_DATA);
 931         outw(reg, FM801_REG(chip, GPIO_CTRL));
 932         spin_unlock_irq(&chip->reg_lock);
 933 }
 934
 935 static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea)
 936 {
 937         fm801_t *chip = tea->private_data;
 938         unsigned short reg;
 939         unsigned int val = 0;
 940         int i;
 941
 942         spin_lock_irq(&chip->reg_lock);
 943         reg = inw(FM801_REG(chip, GPIO_CTRL));
 944         /* use GPIO lines, set data direction to input */
 945         reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
 946                FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
 947                FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
 948                FM801_GPIO_GD(TEA_64PCR_DATA) |
 949                FM801_GPIO_GP(TEA_64PCR_DATA) |
 950                FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
 951         /* all of lines are in the write direction, except data */
 952         /* clear data, write enable and clock lines */
 953         reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
 954                  FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
 955                  FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
 956
 957         for (i = 0; i < 24; i++) {
 958                 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 959                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 960                 udelay(1);
 961                 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
 962                 outw(reg, FM801_REG(chip, GPIO_CTRL));
 963                 udelay(1);
 964                 val <<= 1;
 965                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
 966                         val |= 1;
 967         }
 968
 969         spin_unlock_irq(&chip->reg_lock);
 970
 971         return val;
 972 }
 973
 974 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
 975         {
 976                 /* 1 = MediaForte 256-PCS */
 977                 .write = snd_fm801_tea575x_256pcs_write,
 978                 .read = snd_fm801_tea575x_256pcs_read,
 979         },
 980         {
 981                 /* 2 = MediaForte 256-PCPR */
 982                 .write = snd_fm801_tea575x_256pcpr_write,
 983                 .read = snd_fm801_tea575x_256pcpr_read,
 984         },
 985         {
 986                 /* 3 = MediaForte 64-PCR */
 987                 .write = snd_fm801_tea575x_64pcr_write,
 988                 .read = snd_fm801_tea575x_64pcr_read,
 989         }
 990 };
 991 #endif
 992
 993 /*
 994  *  Mixer routines
 995  */
 996
 997 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
 998 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
 999   .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
1000   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1001
1002 static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1003 {
1004         int mask = (kcontrol->private_value >> 16) & 0xff;
1005
1006         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1007         uinfo->count = 1;
1008         uinfo->value.integer.min = 0;
1009         uinfo->value.integer.max = mask;
1010         return 0;
1011 }
1012
1013 static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1014 {
1015         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1016         int reg = kcontrol->private_value & 0xff;
1017         int shift = (kcontrol->private_value >> 8) & 0xff;
1018         int mask = (kcontrol->private_value >> 16) & 0xff;
1019         int invert = (kcontrol->private_value >> 24) & 0xff;
1020
1021         ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1022         if (invert)
1023                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1024         return 0;
1025 }
1026
1027 static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1028 {
1029         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1030         int reg = kcontrol->private_value & 0xff;
1031         int shift = (kcontrol->private_value >> 8) & 0xff;
1032         int mask = (kcontrol->private_value >> 16) & 0xff;
1033         int invert = (kcontrol->private_value >> 24) & 0xff;
1034         unsigned short val;
1035
1036         val = (ucontrol->value.integer.value[0] & mask);
1037         if (invert)
1038                 val = mask - val;
1039         return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1040 }
1041
1042 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1043 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
1044   .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1045   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1046
1047 static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1048 {
1049         int mask = (kcontrol->private_value >> 16) & 0xff;
1050
1051         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1052         uinfo->count = 2;
1053         uinfo->value.integer.min = 0;
1054         uinfo->value.integer.max = mask;
1055         return 0;
1056 }
1057
1058 static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1059 {
1060         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1061         int reg = kcontrol->private_value & 0xff;
1062         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1063         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1064         int mask = (kcontrol->private_value >> 16) & 0xff;
1065         int invert = (kcontrol->private_value >> 24) & 0xff;
1066
1067         spin_lock_irq(&chip->reg_lock);
1068         ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1069         ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1070         spin_unlock_irq(&chip->reg_lock);
1071         if (invert) {
1072                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1073                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1074         }
1075         return 0;
1076 }
1077
1078 static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1079 {
1080         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1081         int reg = kcontrol->private_value & 0xff;
1082         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1083         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1084         int mask = (kcontrol->private_value >> 16) & 0xff;
1085         int invert = (kcontrol->private_value >> 24) & 0xff;
1086         unsigned short val1, val2;
1087
1088         val1 = ucontrol->value.integer.value[0] & mask;
1089         val2 = ucontrol->value.integer.value[1] & mask;
1090         if (invert) {
1091                 val1 = mask - val1;
1092                 val2 = mask - val2;
1093         }
1094         return snd_fm801_update_bits(chip, reg,
1095                                      (mask << shift_left) | (mask << shift_right),
1096                                      (val1 << shift_left ) | (val2 << shift_right));
1097 }
1098
1099 static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1100 {
1101         static char *texts[5] = {
1102                 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1103         };
1104
1105         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1106         uinfo->count = 1;
1107         uinfo->value.enumerated.items = 5;
1108         if (uinfo->value.enumerated.item > 4)
1109                 uinfo->value.enumerated.item = 4;
1110         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1111         return 0;
1112 }
1113
1114 static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1115 {
1116         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1117         unsigned short val;
1118
1119         val = inw(FM801_REG(chip, REC_SRC)) & 7;
1120         if (val > 4)
1121                 val = 4;
1122         ucontrol->value.enumerated.item[0] = val;
1123         return 0;
1124 }
1125
1126 static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1127 {
1128         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1129         unsigned short val;
1130
1131         if ((val = ucontrol->value.enumerated.item[0]) > 4)
1132                 return -EINVAL;
1133         return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1134 }
1135
1136 #define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t))
1137
1138 static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = {
1139 FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
1140 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1141 FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
1142 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1143 FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
1144 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1145 {
1146         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1147         .name = "Digital Capture Source",
1148         .info = snd_fm801_info_mux,
1149         .get = snd_fm801_get_mux,
1150         .put = snd_fm801_put_mux,
1151 }
1152 };
1153
1154 #define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t))
1155
1156 static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = {
1157 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1158 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1159 FM801_SINGLE("IEC958 Capture Switch", FM801_I2S_MODE, 8, 1, 0),
1160 FM801_SINGLE("IEC958 Raw Data Playback Switch", FM801_I2S_MODE, 9, 1, 0),
1161 FM801_SINGLE("IEC958 Raw Data Capture Switch", FM801_I2S_MODE, 10, 1, 0),
1162 FM801_SINGLE("IEC958 Playback Switch", FM801_GEN_CTRL, 2, 1, 0),
1163 };
1164
1165 static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus)
1166 {
1167         fm801_t *chip = bus->private_data;
1168         chip->ac97_bus = NULL;
1169 }
1170
1171 static void snd_fm801_mixer_free_ac97(ac97_t *ac97)
1172 {
1173         fm801_t *chip = ac97->private_data;
1174         if (ac97->num == 0) {
1175                 chip->ac97 = NULL;
1176         } else {
1177                 chip->ac97_sec = NULL;
1178         }
1179 }
1180
1181 static int __devinit snd_fm801_mixer(fm801_t *chip)
1182 {
1183         ac97_template_t ac97;
1184         unsigned int i;
1185         int err;
1186         static ac97_bus_ops_t ops = {
1187                 .write = snd_fm801_codec_write,
1188                 .read = snd_fm801_codec_read,
1189         };
1190
1191         if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1192                 return err;
1193         chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1194
1195         memset(&ac97, 0, sizeof(ac97));
1196         ac97.private_data = chip;
1197         ac97.private_free = snd_fm801_mixer_free_ac97;
1198         if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1199                 return err;
1200         if (chip->secondary) {
1201                 ac97.num = 1;
1202                 ac97.addr = chip->secondary_addr;
1203                 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1204                         return err;
1205         }
1206         for (i = 0; i < FM801_CONTROLS; i++)
1207                 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1208         if (chip->multichannel) {
1209                 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1210                         snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1211         }
1212         return 0;
1213 }
1214
1215 /*
1216  *  initialization routines
1217  */
1218
1219 static int snd_fm801_free(fm801_t *chip)
1220 {
1221         unsigned short cmdw;
1222
1223         if (chip->irq < 0)
1224                 goto __end_hw;
1225
1226         /* interrupt setup - mask everything */
1227         cmdw = inw(FM801_REG(chip, IRQ_MASK));
1228         cmdw |= 0x00c3;
1229         outw(cmdw, FM801_REG(chip, IRQ_MASK));
1230
1231       __end_hw:
1232 #ifdef TEA575X_RADIO
1233         snd_tea575x_exit(&chip->tea);
1234 #endif
1235         if (chip->irq >= 0)
1236                 free_irq(chip->irq, (void *)chip);
1237         pci_release_regions(chip->pci);
1238
1239         kfree(chip);
1240         return 0;
1241 }
1242
1243 static int snd_fm801_dev_free(snd_device_t *device)
1244 {
1245         fm801_t *chip = device->device_data;
1246         return snd_fm801_free(chip);
1247 }
1248
1249 static int __devinit snd_fm801_create(snd_card_t * card,
1250                                       struct pci_dev * pci,
1251                                       int tea575x_tuner,
1252                                       fm801_t ** rchip)
1253 {
1254         fm801_t *chip;
1255         unsigned char rev, id;
1256         unsigned short cmdw;
1257         unsigned long timeout;
1258         int err;
1259         static snd_device_ops_t ops = {
1260                 .dev_free =     snd_fm801_dev_free,
1261         };
1262
1263         *rchip = NULL;
1264         if ((err = pci_enable_device(pci)) < 0)
1265                 return err;
1266         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1267         if (chip == NULL)
1268                 return -ENOMEM;
1269         spin_lock_init(&chip->reg_lock);
1270         chip->card = card;
1271         chip->pci = pci;
1272         chip->irq = -1;
1273         if ((err = pci_request_regions(pci, "FM801")) < 0) {
1274                 kfree(chip);
1275                 return err;
1276         }
1277         chip->port = pci_resource_start(pci, 0);
1278         if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) {
1279                 snd_printk("unable to grab IRQ %d\n", chip->irq);
1280                 snd_fm801_free(chip);
1281                 return -EBUSY;
1282         }
1283         chip->irq = pci->irq;
1284         pci_set_master(pci);
1285
1286         pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
1287         if (rev >= 0xb1)        /* FM801-AU */
1288                 chip->multichannel = 1;
1289
1290         /* codec cold reset + AC'97 warm reset */
1291         outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL));
1292         inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
1293         udelay(100);
1294         outw(0, FM801_REG(chip, CODEC_CTRL));
1295
1296         timeout = (jiffies + (3 * HZ) / 4) + 1;         /* min 750ms */
1297
1298         outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1299         udelay(5);
1300         do {
1301                 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1302                         goto __ac97_secondary;
1303                 set_current_state(TASK_UNINTERRUPTIBLE);
1304                 schedule_timeout(1);
1305         } while (time_after(timeout, jiffies));
1306         snd_printk("Primary AC'97 codec not found\n");
1307         snd_fm801_free(chip);
1308         return -EIO;
1309
1310       __ac97_secondary:
1311         if (!chip->multichannel)        /* lookup is not required */
1312                 goto __ac97_ok;
1313         for (id = 3; id > 0; id--) {    /* my card has the secondary codec */
1314                                         /* at address #3, so the loop is inverted */
1315
1316                 timeout = jiffies + HZ / 20;
1317
1318                 outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD));
1319                 udelay(5);
1320                 do {
1321                         if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) {
1322                                 cmdw = inw(FM801_REG(chip, AC97_DATA));
1323                                 if (cmdw != 0xffff && cmdw != 0) {
1324                                         chip->secondary = 1;
1325                                         chip->secondary_addr = id;
1326                                         goto __ac97_ok;
1327                                 }
1328                         }
1329                         set_current_state(TASK_UNINTERRUPTIBLE);
1330                         schedule_timeout(1);
1331                 } while (time_after(timeout, jiffies));
1332         }
1333
1334         /* the recovery phase, it seems that probing for non-existing codec might */
1335         /* cause timeout problems */
1336         timeout = (jiffies + (3 * HZ) / 4) + 1;         /* min 750ms */
1337
1338         outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1339         udelay(5);
1340         do {
1341                 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1342                         goto __ac97_ok;
1343                 set_current_state(TASK_UNINTERRUPTIBLE);
1344                 schedule_timeout(1);
1345         } while (time_after(timeout, jiffies));
1346         snd_printk("Primary AC'97 codec not responding\n");
1347         snd_fm801_free(chip);
1348         return -EIO;
1349
1350       __ac97_ok:
1351
1352         /* init volume */
1353         outw(0x0808, FM801_REG(chip, PCM_VOL));
1354         outw(0x9f1f, FM801_REG(chip, FM_VOL));
1355         outw(0x8808, FM801_REG(chip, I2S_VOL));
1356
1357         /* I2S control - I2S mode */
1358         outw(0x0003, FM801_REG(chip, I2S_MODE));
1359
1360         /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
1361         cmdw = inw(FM801_REG(chip, IRQ_MASK));
1362         cmdw &= ~0x0083;
1363         outw(cmdw, FM801_REG(chip, IRQ_MASK));
1364
1365         /* interrupt clear */
1366         outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1367
1368         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1369                 snd_fm801_free(chip);
1370                 return err;
1371         }
1372
1373         snd_card_set_dev(card, &pci->dev);
1374
1375 #ifdef TEA575X_RADIO
1376         if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
1377                 chip->tea.dev_nr = tea575x_tuner >> 16;
1378                 chip->tea.card = card;
1379                 chip->tea.freq_fixup = 10700;
1380                 chip->tea.private_data = chip;
1381                 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
1382                 snd_tea575x_init(&chip->tea);
1383         }
1384 #endif
1385
1386         *rchip = chip;
1387         return 0;
1388 }
1389
1390 static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1391                                           const struct pci_device_id *pci_id)
1392 {
1393         static int dev;
1394         snd_card_t *card;
1395         fm801_t *chip;
1396         opl3_t *opl3;
1397         int err;
1398
1399         if (dev >= SNDRV_CARDS)
1400                 return -ENODEV;
1401         if (!enable[dev]) {
1402                 dev++;
1403                 return -ENOENT;
1404         }
1405
1406         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1407         if (card == NULL)
1408                 return -ENOMEM;
1409         if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1410                 snd_card_free(card);
1411                 return err;
1412         }
1413
1414         strcpy(card->driver, "FM801");
1415         strcpy(card->shortname, "ForteMedia FM801-");
1416         strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1417         sprintf(card->longname, "%s at 0x%lx, irq %i",
1418                 card->shortname, chip->port, chip->irq);
1419
1420         if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1421                 snd_card_free(card);
1422                 return err;
1423         }
1424         if ((err = snd_fm801_mixer(chip)) < 0) {
1425                 snd_card_free(card);
1426                 return err;
1427         }
1428         if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1429                                        FM801_REG(chip, MPU401_DATA), 1,
1430                                        chip->irq, 0, &chip->rmidi)) < 0) {
1431                 snd_card_free(card);
1432                 return err;
1433         }
1434         if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1435                                    FM801_REG(chip, OPL3_BANK1),
1436                                    OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1437                 snd_card_free(card);
1438                 return err;
1439         }
1440         if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1441                 snd_card_free(card);
1442                 return err;
1443         }
1444
1445         if ((err = snd_card_register(card)) < 0) {
1446                 snd_card_free(card);
1447                 return err;
1448         }
1449         pci_set_drvdata(pci, card);
1450         dev++;
1451         return 0;
1452 }
1453
1454 static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1455 {
1456         snd_card_free(pci_get_drvdata(pci));
1457         pci_set_drvdata(pci, NULL);
1458 }
1459
1460 static struct pci_driver driver = {
1461         .name = "FM801",
1462         .id_table = snd_fm801_ids,
1463         .probe = snd_card_fm801_probe,
1464         .remove = __devexit_p(snd_card_fm801_remove),
1465 };
1466
1467 static int __init alsa_card_fm801_init(void)
1468 {
1469         return pci_module_init(&driver);
1470 }
1471
1472 static void __exit alsa_card_fm801_exit(void)
1473 {
1474         pci_unregister_driver(&driver);
1475 }
1476
1477 module_init(alsa_card_fm801_init)
1478 module_exit(alsa_card_fm801_exit)