patch-2_6_7-vs1_9_1_12
[linux-2.6.git] / sound / pci / fm801.c
1 /*
2  *  The driver for the ForteMedia FM801 based soundcards
3  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4  *
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  *   This program is distributed in the hope that it will be useful,
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *   GNU General Public License for more details.
15  *
16  *   You should have received a copy of the GNU General Public License
17  *   along with this program; if not, write to the Free Software
18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
19  *
20  */
21
22 #include <sound/driver.h>
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/pci.h>
27 #include <linux/slab.h>
28 #include <linux/moduleparam.h>
29 #include <sound/core.h>
30 #include <sound/pcm.h>
31 #include <sound/ac97_codec.h>
32 #include <sound/mpu401.h>
33 #include <sound/opl3.h>
34 #include <sound/initval.h>
35
36 #include <asm/io.h>
37
38 #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
39 #include <sound/tea575x-tuner.h>
40 #define TEA575X_RADIO 1
41 #endif
42
43 #define chip_t fm801_t
44
45 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
46 MODULE_DESCRIPTION("ForteMedia FM801");
47 MODULE_LICENSE("GPL");
48 MODULE_CLASSES("{sound}");
49 MODULE_DEVICES("{{ForteMedia,FM801},"
50                 "{Genius,SoundMaker Live 5.1}}");
51
52 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
53 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
54 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
55 /*
56  *  Enable TEA575x tuner
57  *    1 = MediaForte 256-PCS
58  *    2 = MediaForte 256-PCPR
59  *    3 = MediaForte 64-PCR
60  *  High 16-bits are video (radio) device number + 1
61  */
62 static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 };
63 static int boot_devs;
64
65 module_param_array(index, int, boot_devs, 0444);
66 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
67 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
68 module_param_array(id, charp, boot_devs, 0444);
69 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
70 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
71 module_param_array(enable, bool, boot_devs, 0444);
72 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
73 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
74 module_param_array(tea575x_tuner, bool, boot_devs, 0444);
75 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
76 MODULE_PARM_SYNTAX(tea575x_tuner, SNDRV_ENABLE_DESC);
77
78 /*
79  *  Direct registers
80  */
81
82 #define FM801_REG(chip, reg)    (chip->port + FM801_##reg)
83
84 #define FM801_PCM_VOL           0x00    /* PCM Output Volume */
85 #define FM801_FM_VOL            0x02    /* FM Output Volume */
86 #define FM801_I2S_VOL           0x04    /* I2S Volume */
87 #define FM801_REC_SRC           0x06    /* Record Source */
88 #define FM801_PLY_CTRL          0x08    /* Playback Control */
89 #define FM801_PLY_COUNT         0x0a    /* Playback Count */
90 #define FM801_PLY_BUF1          0x0c    /* Playback Bufer I */
91 #define FM801_PLY_BUF2          0x10    /* Playback Buffer II */
92 #define FM801_CAP_CTRL          0x14    /* Capture Control */
93 #define FM801_CAP_COUNT         0x16    /* Capture Count */
94 #define FM801_CAP_BUF1          0x18    /* Capture Buffer I */
95 #define FM801_CAP_BUF2          0x1c    /* Capture Buffer II */
96 #define FM801_CODEC_CTRL        0x22    /* Codec Control */
97 #define FM801_I2S_MODE          0x24    /* I2S Mode Control */
98 #define FM801_VOLUME            0x26    /* Volume Up/Down/Mute Status */
99 #define FM801_I2C_CTRL          0x29    /* I2C Control */
100 #define FM801_AC97_CMD          0x2a    /* AC'97 Command */
101 #define FM801_AC97_DATA         0x2c    /* AC'97 Data */
102 #define FM801_MPU401_DATA       0x30    /* MPU401 Data */
103 #define FM801_MPU401_CMD        0x31    /* MPU401 Command */
104 #define FM801_GPIO_CTRL         0x52    /* General Purpose I/O Control */
105 #define FM801_GEN_CTRL          0x54    /* General Control */
106 #define FM801_IRQ_MASK          0x56    /* Interrupt Mask */
107 #define FM801_IRQ_STATUS        0x5a    /* Interrupt Status */
108 #define FM801_OPL3_BANK0        0x68    /* OPL3 Status Read / Bank 0 Write */
109 #define FM801_OPL3_DATA0        0x69    /* OPL3 Data 0 Write */
110 #define FM801_OPL3_BANK1        0x6a    /* OPL3 Bank 1 Write */
111 #define FM801_OPL3_DATA1        0x6b    /* OPL3 Bank 1 Write */
112 #define FM801_POWERDOWN         0x70    /* Blocks Power Down Control */
113
114 #define FM801_AC97_ADDR_SHIFT   10
115
116 /* playback and record control register bits */
117 #define FM801_BUF1_LAST         (1<<1)
118 #define FM801_BUF2_LAST         (1<<2)
119 #define FM801_START             (1<<5)
120 #define FM801_PAUSE             (1<<6)
121 #define FM801_IMMED_STOP        (1<<7)
122 #define FM801_RATE_SHIFT        8
123 #define FM801_RATE_MASK         (15 << FM801_RATE_SHIFT)
124 #define FM801_CHANNELS_4        (1<<12) /* playback only */
125 #define FM801_CHANNELS_6        (2<<12) /* playback only */
126 #define FM801_CHANNELS_6MS      (3<<12) /* playback only */
127 #define FM801_CHANNELS_MASK     (3<<12)
128 #define FM801_16BIT             (1<<14)
129 #define FM801_STEREO            (1<<15)
130
131 /* IRQ status bits */
132 #define FM801_IRQ_PLAYBACK      (1<<8)
133 #define FM801_IRQ_CAPTURE       (1<<9)
134 #define FM801_IRQ_VOLUME        (1<<14)
135 #define FM801_IRQ_MPU           (1<<15)
136
137 /* GPIO control register */
138 #define FM801_GPIO_GP0          (1<<0)  /* read/write */
139 #define FM801_GPIO_GP1          (1<<1)
140 #define FM801_GPIO_GP2          (1<<2)
141 #define FM801_GPIO_GP3          (1<<3)
142 #define FM801_GPIO_GP(x)        (1<<(0+(x)))
143 #define FM801_GPIO_GD0          (1<<8)  /* directions: 1 = input, 0 = output*/
144 #define FM801_GPIO_GD1          (1<<9)
145 #define FM801_GPIO_GD2          (1<<10)
146 #define FM801_GPIO_GD3          (1<<11)
147 #define FM801_GPIO_GD(x)        (1<<(8+(x)))
148 #define FM801_GPIO_GS0          (1<<12) /* function select: */
149 #define FM801_GPIO_GS1          (1<<13) /*    1 = GPIO */
150 #define FM801_GPIO_GS2          (1<<14) /*    0 = other (S/PDIF, VOL) */
151 #define FM801_GPIO_GS3          (1<<15)
152 #define FM801_GPIO_GS(x)        (1<<(12+(x)))
153         
154 /*
155
156  */
157
158 typedef struct _snd_fm801 fm801_t;
159
160 struct _snd_fm801 {
161         int irq;
162
163         unsigned long port;     /* I/O port number */
164         struct resource *res_port;
165         unsigned int multichannel: 1,   /* multichannel support */
166                      secondary: 1;      /* secondary codec */
167         unsigned char secondary_addr;   /* address of the secondary codec */
168
169         unsigned short ply_ctrl; /* playback control */
170         unsigned short cap_ctrl; /* capture control */
171
172         unsigned long ply_buffer;
173         unsigned int ply_buf;
174         unsigned int ply_count;
175         unsigned int ply_size;
176         unsigned int ply_pos;
177
178         unsigned long cap_buffer;
179         unsigned int cap_buf;
180         unsigned int cap_count;
181         unsigned int cap_size;
182         unsigned int cap_pos;
183
184         ac97_bus_t *ac97_bus;
185         ac97_t *ac97;
186         ac97_t *ac97_sec;
187
188         struct pci_dev *pci;
189         snd_card_t *card;
190         snd_pcm_t *pcm;
191         snd_rawmidi_t *rmidi;
192         snd_pcm_substream_t *playback_substream;
193         snd_pcm_substream_t *capture_substream;
194         unsigned int p_dma_size;
195         unsigned int c_dma_size;
196
197         spinlock_t reg_lock;
198         snd_info_entry_t *proc_entry;
199
200 #ifdef TEA575X_RADIO
201         tea575x_t tea;
202 #endif
203 };
204
205 static struct pci_device_id snd_fm801_ids[] = {
206         { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* FM801 */
207         { 0, }
208 };
209
210 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
211
212 /*
213  *  common I/O routines
214  */
215
216 static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg,
217                                  unsigned short mask, unsigned short value)
218 {
219         int change;
220         unsigned short old, new;
221
222         spin_lock(&chip->reg_lock);
223         old = inw(chip->port + reg);
224         new = (old & ~mask) | value;
225         change = old != new;
226         if (change)
227                 outw(new, chip->port + reg);
228         spin_unlock(&chip->reg_lock);
229         return change;
230 }
231
232 static void snd_fm801_codec_write(ac97_t *ac97,
233                                   unsigned short reg,
234                                   unsigned short val)
235 {
236         fm801_t *chip = snd_magic_cast(fm801_t, ac97->private_data, return);
237         int idx;
238
239         /*
240          *  Wait until the codec interface is not ready..
241          */
242         for (idx = 0; idx < 100; idx++) {
243                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
244                         goto ok1;
245                 udelay(10);
246         }
247         snd_printk("AC'97 interface is busy (1)\n");
248         return;
249
250  ok1:
251         /* write data and address */
252         outw(val, FM801_REG(chip, AC97_DATA));
253         outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
254         /*
255          *  Wait until the write command is not completed..
256          */
257         for (idx = 0; idx < 1000; idx++) {
258                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
259                         return;
260                 udelay(10);
261         }
262         snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
263 }
264
265 static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg)
266 {
267         fm801_t *chip = snd_magic_cast(fm801_t, ac97->private_data, return -ENXIO);
268         int idx;
269
270         /*
271          *  Wait until the codec interface is not ready..
272          */
273         for (idx = 0; idx < 100; idx++) {
274                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
275                         goto ok1;
276                 udelay(10);
277         }
278         snd_printk("AC'97 interface is busy (1)\n");
279         return 0;
280
281  ok1:
282         /* read command */
283         outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD));
284         for (idx = 0; idx < 100; idx++) {
285                 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
286                         goto ok2;
287                 udelay(10);
288         }
289         snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
290         return 0;
291
292  ok2:
293         for (idx = 0; idx < 1000; idx++) {
294                 if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8))
295                         goto ok3;
296                 udelay(10);
297         }
298         snd_printk("AC'97 interface #%d is not valid (2)\n", ac97->num);
299         return 0;
300
301  ok3:
302         return inw(FM801_REG(chip, AC97_DATA));
303 }
304
305 static unsigned int rates[] = {
306   5500,  8000,  9600, 11025,
307   16000, 19200, 22050, 32000,
308   38400, 44100, 48000
309 };
310
311 #define RATES sizeof(rates) / sizeof(rates[0])
312
313 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
314         .count = RATES,
315         .list = rates,
316         .mask = 0,
317 };
318
319 static unsigned int channels[] = {
320   2, 4, 6
321 };
322
323 #define CHANNELS sizeof(channels) / sizeof(channels[0])
324
325 static snd_pcm_hw_constraint_list_t hw_constraints_channels = {
326         .count = CHANNELS,
327         .list = channels,
328         .mask = 0,
329 };
330
331 /*
332  *  Sample rate routines
333  */
334
335 static unsigned short snd_fm801_rate_bits(unsigned int rate)
336 {
337         unsigned int idx;
338
339         for (idx = 0; idx < 11; idx++)
340                 if (rates[idx] == rate)
341                         return idx;
342         snd_BUG();
343         return RATES - 1;
344 }
345
346 /*
347  *  PCM part
348  */
349
350 static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream,
351                                       int cmd)
352 {
353         fm801_t *chip = snd_pcm_substream_chip(substream);
354
355         spin_lock(&chip->reg_lock);
356         switch (cmd) {
357         case SNDRV_PCM_TRIGGER_START:
358                 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
359                                      FM801_BUF2_LAST |
360                                      FM801_PAUSE);
361                 chip->ply_ctrl |= FM801_START |
362                                    FM801_IMMED_STOP;
363                 break;
364         case SNDRV_PCM_TRIGGER_STOP:
365                 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
366                 break;
367         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
368                 chip->ply_ctrl |= FM801_PAUSE;
369                 break;
370         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
371                 chip->ply_ctrl &= ~FM801_PAUSE;
372                 break;
373         default:
374                 spin_unlock(&chip->reg_lock);
375                 snd_BUG();
376                 return -EINVAL;
377         }
378         outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
379         spin_unlock(&chip->reg_lock);
380         return 0;
381 }
382
383 static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream,
384                                      int cmd)
385 {
386         fm801_t *chip = snd_pcm_substream_chip(substream);
387
388         spin_lock(&chip->reg_lock);
389         switch (cmd) {
390         case SNDRV_PCM_TRIGGER_START:
391                 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
392                                      FM801_BUF2_LAST |
393                                      FM801_PAUSE);
394                 chip->cap_ctrl |= FM801_START |
395                                    FM801_IMMED_STOP;
396                 break;
397         case SNDRV_PCM_TRIGGER_STOP:
398                 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
399                 break;
400         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
401                 chip->cap_ctrl |= FM801_PAUSE;
402                 break;
403         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
404                 chip->cap_ctrl &= ~FM801_PAUSE;
405                 break;
406         default:
407                 spin_unlock(&chip->reg_lock);
408                 snd_BUG();
409                 return -EINVAL;
410         }
411         outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
412         spin_unlock(&chip->reg_lock);
413         return 0;
414 }
415
416 static int snd_fm801_hw_params(snd_pcm_substream_t * substream,
417                                snd_pcm_hw_params_t * hw_params)
418 {
419         return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
420 }
421
422 static int snd_fm801_hw_free(snd_pcm_substream_t * substream)
423 {
424         return snd_pcm_lib_free_pages(substream);
425 }
426
427 static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream)
428 {
429         unsigned long flags;
430         fm801_t *chip = snd_pcm_substream_chip(substream);
431         snd_pcm_runtime_t *runtime = substream->runtime;
432
433         chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
434         chip->ply_count = snd_pcm_lib_period_bytes(substream);
435         spin_lock_irqsave(&chip->reg_lock, flags);
436         chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
437                              FM801_STEREO | FM801_RATE_MASK |
438                              FM801_CHANNELS_MASK);
439         if (snd_pcm_format_width(runtime->format) == 16)
440                 chip->ply_ctrl |= FM801_16BIT;
441         if (runtime->channels > 1) {
442                 chip->ply_ctrl |= FM801_STEREO;
443                 if (runtime->channels == 4)
444                         chip->ply_ctrl |= FM801_CHANNELS_4;
445                 else if (runtime->channels == 6)
446                         chip->ply_ctrl |= FM801_CHANNELS_6;
447         }
448         chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
449         chip->ply_buf = 0;
450         outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
451         outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
452         chip->ply_buffer = runtime->dma_addr;
453         chip->ply_pos = 0;
454         outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
455         outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
456         spin_unlock_irqrestore(&chip->reg_lock, flags);
457         return 0;
458 }
459
460 static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream)
461 {
462         unsigned long flags;
463         fm801_t *chip = snd_pcm_substream_chip(substream);
464         snd_pcm_runtime_t *runtime = substream->runtime;
465
466         chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
467         chip->cap_count = snd_pcm_lib_period_bytes(substream);
468         spin_lock_irqsave(&chip->reg_lock, flags);
469         chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
470                              FM801_STEREO | FM801_RATE_MASK);
471         if (snd_pcm_format_width(runtime->format) == 16)
472                 chip->cap_ctrl |= FM801_16BIT;
473         if (runtime->channels > 1)
474                 chip->cap_ctrl |= FM801_STEREO;
475         chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
476         chip->cap_buf = 0;
477         outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
478         outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
479         chip->cap_buffer = runtime->dma_addr;
480         chip->cap_pos = 0;
481         outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
482         outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
483         spin_unlock_irqrestore(&chip->reg_lock, flags);
484         return 0;
485 }
486
487 static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream)
488 {
489         fm801_t *chip = snd_pcm_substream_chip(substream);
490         unsigned long flags;
491         size_t ptr;
492
493         if (!(chip->ply_ctrl & FM801_START))
494                 return 0;
495         spin_lock_irqsave(&chip->reg_lock, flags);
496         ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
497         if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
498                 ptr += chip->ply_count;
499                 ptr %= chip->ply_size;
500         }
501         spin_unlock_irqrestore(&chip->reg_lock, flags);
502         return bytes_to_frames(substream->runtime, ptr);
503 }
504
505 static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream)
506 {
507         fm801_t *chip = snd_pcm_substream_chip(substream);
508         unsigned long flags;
509         size_t ptr;
510
511         if (!(chip->cap_ctrl & FM801_START))
512                 return 0;
513         spin_lock_irqsave(&chip->reg_lock, flags);
514         ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
515         if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
516                 ptr += chip->cap_count;
517                 ptr %= chip->cap_size;
518         }
519         spin_unlock_irqrestore(&chip->reg_lock, flags);
520         return bytes_to_frames(substream->runtime, ptr);
521 }
522
523 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
524 {
525         fm801_t *chip = snd_magic_cast(fm801_t, dev_id, return IRQ_NONE);
526         unsigned short status;
527         unsigned int tmp;
528
529         status = inw(FM801_REG(chip, IRQ_STATUS));
530         status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
531         if (! status)
532                 return IRQ_NONE;
533         /* ack first */
534         outw(status, FM801_REG(chip, IRQ_STATUS));
535         if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
536                 spin_lock(&chip->reg_lock);
537                 chip->ply_buf++;
538                 chip->ply_pos += chip->ply_count;
539                 chip->ply_pos %= chip->ply_size;
540                 tmp = chip->ply_pos + chip->ply_count;
541                 tmp %= chip->ply_size;
542                 outl(chip->ply_buffer + tmp,
543                                 (chip->ply_buf & 1) ?
544                                         FM801_REG(chip, PLY_BUF1) :
545                                         FM801_REG(chip, PLY_BUF2));
546                 spin_unlock(&chip->reg_lock);
547                 snd_pcm_period_elapsed(chip->playback_substream);
548         }
549         if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
550                 spin_lock(&chip->reg_lock);
551                 chip->cap_buf++;
552                 chip->cap_pos += chip->cap_count;
553                 chip->cap_pos %= chip->cap_size;
554                 tmp = chip->cap_pos + chip->cap_count;
555                 tmp %= chip->cap_size;
556                 outl(chip->cap_buffer + tmp,
557                                 (chip->cap_buf & 1) ?
558                                         FM801_REG(chip, CAP_BUF1) :
559                                         FM801_REG(chip, CAP_BUF2));
560                 spin_unlock(&chip->reg_lock);
561                 snd_pcm_period_elapsed(chip->capture_substream);
562         }
563         if (chip->rmidi && (status & FM801_IRQ_MPU))
564                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
565         if (status & FM801_IRQ_VOLUME)
566                 ;/* TODO */
567
568         return IRQ_HANDLED;
569 }
570
571 static snd_pcm_hardware_t snd_fm801_playback =
572 {
573         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
574                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
575                                  SNDRV_PCM_INFO_PAUSE |
576                                  SNDRV_PCM_INFO_MMAP_VALID),
577         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
578         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
579         .rate_min =             5500,
580         .rate_max =             48000,
581         .channels_min =         1,
582         .channels_max =         2,
583         .buffer_bytes_max =     (128*1024),
584         .period_bytes_min =     64,
585         .period_bytes_max =     (128*1024),
586         .periods_min =          1,
587         .periods_max =          1024,
588         .fifo_size =            0,
589 };
590
591 static snd_pcm_hardware_t snd_fm801_capture =
592 {
593         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
594                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
595                                  SNDRV_PCM_INFO_PAUSE |
596                                  SNDRV_PCM_INFO_MMAP_VALID),
597         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
598         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
599         .rate_min =             5500,
600         .rate_max =             48000,
601         .channels_min =         1,
602         .channels_max =         2,
603         .buffer_bytes_max =     (128*1024),
604         .period_bytes_min =     64,
605         .period_bytes_max =     (128*1024),
606         .periods_min =          1,
607         .periods_max =          1024,
608         .fifo_size =            0,
609 };
610
611 static int snd_fm801_playback_open(snd_pcm_substream_t * substream)
612 {
613         fm801_t *chip = snd_pcm_substream_chip(substream);
614         snd_pcm_runtime_t *runtime = substream->runtime;
615         int err;
616
617         chip->playback_substream = substream;
618         runtime->hw = snd_fm801_playback;
619         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
620         if (chip->multichannel) {
621                 runtime->hw.channels_max = 6;
622                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
623         }
624         if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
625                 return err;
626         return 0;
627 }
628
629 static int snd_fm801_capture_open(snd_pcm_substream_t * substream)
630 {
631         fm801_t *chip = snd_pcm_substream_chip(substream);
632         snd_pcm_runtime_t *runtime = substream->runtime;
633         int err;
634
635         chip->capture_substream = substream;
636         runtime->hw = snd_fm801_capture;
637         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
638         if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
639                 return err;
640         return 0;
641 }
642
643 static int snd_fm801_playback_close(snd_pcm_substream_t * substream)
644 {
645         fm801_t *chip = snd_pcm_substream_chip(substream);
646
647         chip->playback_substream = NULL;
648         return 0;
649 }
650
651 static int snd_fm801_capture_close(snd_pcm_substream_t * substream)
652 {
653         fm801_t *chip = snd_pcm_substream_chip(substream);
654
655         chip->capture_substream = NULL;
656         return 0;
657 }
658
659 static snd_pcm_ops_t snd_fm801_playback_ops = {
660         .open =         snd_fm801_playback_open,
661         .close =        snd_fm801_playback_close,
662         .ioctl =        snd_pcm_lib_ioctl,
663         .hw_params =    snd_fm801_hw_params,
664         .hw_free =      snd_fm801_hw_free,
665         .prepare =      snd_fm801_playback_prepare,
666         .trigger =      snd_fm801_playback_trigger,
667         .pointer =      snd_fm801_playback_pointer,
668 };
669
670 static snd_pcm_ops_t snd_fm801_capture_ops = {
671         .open =         snd_fm801_capture_open,
672         .close =        snd_fm801_capture_close,
673         .ioctl =        snd_pcm_lib_ioctl,
674         .hw_params =    snd_fm801_hw_params,
675         .hw_free =      snd_fm801_hw_free,
676         .prepare =      snd_fm801_capture_prepare,
677         .trigger =      snd_fm801_capture_trigger,
678         .pointer =      snd_fm801_capture_pointer,
679 };
680
681 static void snd_fm801_pcm_free(snd_pcm_t *pcm)
682 {
683         fm801_t *chip = snd_magic_cast(fm801_t, pcm->private_data, return);
684         chip->pcm = NULL;
685         snd_pcm_lib_preallocate_free_for_all(pcm);
686 }
687
688 static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm)
689 {
690         snd_pcm_t *pcm;
691         int err;
692
693         if (rpcm)
694                 *rpcm = NULL;
695         if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
696                 return err;
697
698         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
699         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
700
701         pcm->private_data = chip;
702         pcm->private_free = snd_fm801_pcm_free;
703         pcm->info_flags = 0;
704         strcpy(pcm->name, "FM801");
705         chip->pcm = pcm;
706
707         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
708                                               snd_dma_pci_data(chip->pci),
709                                               chip->multichannel ? 128*1024 : 64*1024, 128*1024);
710
711         if (rpcm)
712                 *rpcm = pcm;
713         return 0;
714 }
715
716 /*
717  *  TEA5757 radio
718  */
719
720 #ifdef TEA575X_RADIO
721
722 /* 256PCS GPIO numbers */
723 #define TEA_256PCS_DATA                 1
724 #define TEA_256PCS_WRITE_ENABLE         2       /* inverted */
725 #define TEA_256PCS_BUS_CLOCK            3
726
727 static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val)
728 {
729         fm801_t *chip = tea->private_data;
730         unsigned short reg;
731         int i = 25;
732
733         spin_lock_irq(&chip->reg_lock);
734         reg = inw(FM801_REG(chip, GPIO_CTRL));
735         /* use GPIO lines and set write enable bit */
736         reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
737                FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
738                FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
739         /* all of lines are in the write direction */
740         /* clear data and clock lines */
741         reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
742                  FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
743                  FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
744                  FM801_GPIO_GP(TEA_256PCS_DATA) |
745                  FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
746                  FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
747         outw(reg, FM801_REG(chip, GPIO_CTRL));
748         udelay(1);
749
750         while (i--) {
751                 if (val & (1 << i))
752                         reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
753                 else
754                         reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
755                 outw(reg, FM801_REG(chip, GPIO_CTRL));
756                 udelay(1);
757                 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
758                 outw(reg, FM801_REG(chip, GPIO_CTRL));
759                 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
760                 outw(reg, FM801_REG(chip, GPIO_CTRL));
761                 udelay(1);
762         }
763
764         /* and reset the write enable bit */
765         reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
766                FM801_GPIO_GP(TEA_256PCS_DATA);
767         outw(reg, FM801_REG(chip, GPIO_CTRL));
768         spin_unlock_irq(&chip->reg_lock);
769 }
770
771 static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea)
772 {
773         fm801_t *chip = tea->private_data;
774         unsigned short reg;
775         unsigned int val = 0;
776         int i;
777         
778         spin_lock_irq(&chip->reg_lock);
779         reg = inw(FM801_REG(chip, GPIO_CTRL));
780         /* use GPIO lines, set data direction to input */
781         reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
782                FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
783                FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
784                FM801_GPIO_GD(TEA_256PCS_DATA) |
785                FM801_GPIO_GP(TEA_256PCS_DATA) |
786                FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
787         /* all of lines are in the write direction, except data */
788         /* clear data, write enable and clock lines */
789         reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
790                  FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
791                  FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
792
793         for (i = 0; i < 24; i++) {
794                 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
795                 outw(reg, FM801_REG(chip, GPIO_CTRL));
796                 udelay(1);
797                 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
798                 outw(reg, FM801_REG(chip, GPIO_CTRL));
799                 udelay(1);
800                 val <<= 1;
801                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
802                         val |= 1;
803         }
804
805         spin_unlock_irq(&chip->reg_lock);
806
807         return val;
808 }
809
810 /* 256PCPR GPIO numbers */
811 #define TEA_256PCPR_BUS_CLOCK           0
812 #define TEA_256PCPR_DATA                1
813 #define TEA_256PCPR_WRITE_ENABLE        2       /* inverted */
814
815 static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val)
816 {
817         fm801_t *chip = tea->private_data;
818         unsigned short reg;
819         int i = 25;
820
821         spin_lock_irq(&chip->reg_lock);
822         reg = inw(FM801_REG(chip, GPIO_CTRL));
823         /* use GPIO lines and set write enable bit */
824         reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
825                FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
826                FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
827         /* all of lines are in the write direction */
828         /* clear data and clock lines */
829         reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
830                  FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
831                  FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
832                  FM801_GPIO_GP(TEA_256PCPR_DATA) |
833                  FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
834                  FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
835         outw(reg, FM801_REG(chip, GPIO_CTRL));
836         udelay(1);
837
838         while (i--) {
839                 if (val & (1 << i))
840                         reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
841                 else
842                         reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
843                 outw(reg, FM801_REG(chip, GPIO_CTRL));
844                 udelay(1);
845                 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
846                 outw(reg, FM801_REG(chip, GPIO_CTRL));
847                 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
848                 outw(reg, FM801_REG(chip, GPIO_CTRL));
849                 udelay(1);
850         }
851
852         /* and reset the write enable bit */
853         reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
854                FM801_GPIO_GP(TEA_256PCPR_DATA);
855         outw(reg, FM801_REG(chip, GPIO_CTRL));
856         spin_unlock_irq(&chip->reg_lock);
857 }
858
859 static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea)
860 {
861         fm801_t *chip = tea->private_data;
862         unsigned short reg;
863         unsigned int val = 0;
864         int i;
865         
866         spin_lock_irq(&chip->reg_lock);
867         reg = inw(FM801_REG(chip, GPIO_CTRL));
868         /* use GPIO lines, set data direction to input */
869         reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
870                FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
871                FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
872                FM801_GPIO_GD(TEA_256PCPR_DATA) |
873                FM801_GPIO_GP(TEA_256PCPR_DATA) |
874                FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
875         /* all of lines are in the write direction, except data */
876         /* clear data, write enable and clock lines */
877         reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
878                  FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
879                  FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
880
881         for (i = 0; i < 24; i++) {
882                 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
883                 outw(reg, FM801_REG(chip, GPIO_CTRL));
884                 udelay(1);
885                 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
886                 outw(reg, FM801_REG(chip, GPIO_CTRL));
887                 udelay(1);
888                 val <<= 1;
889                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
890                         val |= 1;
891         }
892
893         spin_unlock_irq(&chip->reg_lock);
894
895         return val;
896 }
897
898 /* 64PCR GPIO numbers */
899 #define TEA_64PCR_BUS_CLOCK             0
900 #define TEA_64PCR_WRITE_ENABLE          1       /* inverted */
901 #define TEA_64PCR_DATA                  2
902
903 static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val)
904 {
905         fm801_t *chip = tea->private_data;
906         unsigned short reg;
907         int i = 25;
908
909         spin_lock_irq(&chip->reg_lock);
910         reg = inw(FM801_REG(chip, GPIO_CTRL));
911         /* use GPIO lines and set write enable bit */
912         reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
913                FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
914                FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
915         /* all of lines are in the write direction */
916         /* clear data and clock lines */
917         reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
918                  FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
919                  FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
920                  FM801_GPIO_GP(TEA_64PCR_DATA) |
921                  FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
922                  FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
923         outw(reg, FM801_REG(chip, GPIO_CTRL));
924         udelay(1);
925
926         while (i--) {
927                 if (val & (1 << i))
928                         reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
929                 else
930                         reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
931                 outw(reg, FM801_REG(chip, GPIO_CTRL));
932                 udelay(1);
933                 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
934                 outw(reg, FM801_REG(chip, GPIO_CTRL));
935                 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
936                 outw(reg, FM801_REG(chip, GPIO_CTRL));
937                 udelay(1);
938         }
939
940         /* and reset the write enable bit */
941         reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
942                FM801_GPIO_GP(TEA_64PCR_DATA);
943         outw(reg, FM801_REG(chip, GPIO_CTRL));
944         spin_unlock_irq(&chip->reg_lock);
945 }
946
947 static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea)
948 {
949         fm801_t *chip = tea->private_data;
950         unsigned short reg;
951         unsigned int val = 0;
952         int i;
953         
954         spin_lock_irq(&chip->reg_lock);
955         reg = inw(FM801_REG(chip, GPIO_CTRL));
956         /* use GPIO lines, set data direction to input */
957         reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
958                FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
959                FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
960                FM801_GPIO_GD(TEA_64PCR_DATA) |
961                FM801_GPIO_GP(TEA_64PCR_DATA) |
962                FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
963         /* all of lines are in the write direction, except data */
964         /* clear data, write enable and clock lines */
965         reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
966                  FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
967                  FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
968
969         for (i = 0; i < 24; i++) {
970                 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
971                 outw(reg, FM801_REG(chip, GPIO_CTRL));
972                 udelay(1);
973                 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
974                 outw(reg, FM801_REG(chip, GPIO_CTRL));
975                 udelay(1);
976                 val <<= 1;
977                 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
978                         val |= 1;
979         }
980
981         spin_unlock_irq(&chip->reg_lock);
982
983         return val;
984 }
985
986 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
987         {
988                 /* 1 = MediaForte 256-PCS */
989                 .write = snd_fm801_tea575x_256pcs_write,
990                 .read = snd_fm801_tea575x_256pcs_read,
991         },
992         {
993                 /* 2 = MediaForte 256-PCPR */
994                 .write = snd_fm801_tea575x_256pcpr_write,
995                 .read = snd_fm801_tea575x_256pcpr_read,
996         },
997         {
998                 /* 3 = MediaForte 64-PCR */
999                 .write = snd_fm801_tea575x_64pcr_write,
1000                 .read = snd_fm801_tea575x_64pcr_read,
1001         }
1002 };
1003 #endif
1004
1005 /*
1006  *  Mixer routines
1007  */
1008
1009 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
1010 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
1011   .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
1012   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1013
1014 static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1015 {
1016         int mask = (kcontrol->private_value >> 16) & 0xff;
1017
1018         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1019         uinfo->count = 1;
1020         uinfo->value.integer.min = 0;
1021         uinfo->value.integer.max = mask;
1022         return 0;
1023 }
1024
1025 static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1026 {
1027         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1028         int reg = kcontrol->private_value & 0xff;
1029         int shift = (kcontrol->private_value >> 8) & 0xff;
1030         int mask = (kcontrol->private_value >> 16) & 0xff;
1031         int invert = (kcontrol->private_value >> 24) & 0xff;
1032
1033         ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1034         if (invert)
1035                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1036         return 0;
1037 }
1038
1039 static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1040 {
1041         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1042         int reg = kcontrol->private_value & 0xff;
1043         int shift = (kcontrol->private_value >> 8) & 0xff;
1044         int mask = (kcontrol->private_value >> 16) & 0xff;
1045         int invert = (kcontrol->private_value >> 24) & 0xff;
1046         unsigned short val;
1047
1048         val = (ucontrol->value.integer.value[0] & mask);
1049         if (invert)
1050                 val = mask - val;
1051         return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1052 }
1053
1054 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1055 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
1056   .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1057   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1058
1059 static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1060 {
1061         int mask = (kcontrol->private_value >> 16) & 0xff;
1062
1063         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1064         uinfo->count = 2;
1065         uinfo->value.integer.min = 0;
1066         uinfo->value.integer.max = mask;
1067         return 0;
1068 }
1069
1070 static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1071 {
1072         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1073         int reg = kcontrol->private_value & 0xff;
1074         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1075         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1076         int mask = (kcontrol->private_value >> 16) & 0xff;
1077         int invert = (kcontrol->private_value >> 24) & 0xff;
1078
1079         spin_lock(&chip->reg_lock);
1080         ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1081         ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1082         spin_unlock(&chip->reg_lock);
1083         if (invert) {
1084                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1085                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1086         }
1087         return 0;
1088 }
1089
1090 static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1091 {
1092         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1093         int reg = kcontrol->private_value & 0xff;
1094         int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1095         int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1096         int mask = (kcontrol->private_value >> 16) & 0xff;
1097         int invert = (kcontrol->private_value >> 24) & 0xff;
1098         unsigned short val1, val2;
1099  
1100         val1 = ucontrol->value.integer.value[0] & mask;
1101         val2 = ucontrol->value.integer.value[1] & mask;
1102         if (invert) {
1103                 val1 = mask - val1;
1104                 val2 = mask - val2;
1105         }
1106         return snd_fm801_update_bits(chip, reg,
1107                                      (mask << shift_left) | (mask << shift_right),
1108                                      (val1 << shift_left ) | (val2 << shift_right));
1109 }
1110
1111 static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1112 {
1113         static char *texts[5] = {
1114                 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1115         };
1116  
1117         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1118         uinfo->count = 1;
1119         uinfo->value.enumerated.items = 5;
1120         if (uinfo->value.enumerated.item > 4)
1121                 uinfo->value.enumerated.item = 4;
1122         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1123         return 0;
1124 }
1125
1126 static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1127 {
1128         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1129         unsigned short val;
1130  
1131         val = inw(FM801_REG(chip, REC_SRC)) & 7;
1132         if (val > 4)
1133                 val = 4;
1134         ucontrol->value.enumerated.item[0] = val;
1135         return 0;
1136 }
1137
1138 static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1139 {
1140         fm801_t *chip = snd_kcontrol_chip(kcontrol);
1141         unsigned short val;
1142  
1143         if ((val = ucontrol->value.enumerated.item[0]) > 4)
1144                 return -EINVAL;
1145         return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1146 }
1147
1148 #define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t))
1149
1150 static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = {
1151 FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
1152 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1153 FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
1154 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1155 FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
1156 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1157 {
1158         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1159         .name = "Digital Capture Source",
1160         .info = snd_fm801_info_mux,
1161         .get = snd_fm801_get_mux,
1162         .put = snd_fm801_put_mux,
1163 }
1164 };
1165
1166 #define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t))
1167
1168 static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = {
1169 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1170 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1171 FM801_SINGLE("IEC958 Capture Switch", FM801_I2S_MODE, 8, 1, 0),
1172 FM801_SINGLE("IEC958 Raw Data Playback Switch", FM801_I2S_MODE, 9, 1, 0),
1173 FM801_SINGLE("IEC958 Raw Data Capture Switch", FM801_I2S_MODE, 10, 1, 0),
1174 FM801_SINGLE("IEC958 Playback Switch", FM801_GEN_CTRL, 2, 1, 0),
1175 };
1176
1177 static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus)
1178 {
1179         fm801_t *chip = snd_magic_cast(fm801_t, bus->private_data, return);
1180         chip->ac97_bus = NULL;
1181 }
1182
1183 static void snd_fm801_mixer_free_ac97(ac97_t *ac97)
1184 {
1185         fm801_t *chip = snd_magic_cast(fm801_t, ac97->private_data, return);
1186         if (ac97->num == 0) {
1187                 chip->ac97 = NULL;
1188         } else {
1189                 chip->ac97_sec = NULL;
1190         }
1191 }
1192
1193 static int __devinit snd_fm801_mixer(fm801_t *chip)
1194 {
1195         ac97_bus_t bus;
1196         ac97_t ac97;
1197         unsigned int i;
1198         int err;
1199
1200         memset(&bus, 0, sizeof(bus));
1201         bus.write = snd_fm801_codec_write;
1202         bus.read = snd_fm801_codec_read;
1203         bus.private_data = chip;
1204         bus.private_free = snd_fm801_mixer_free_ac97_bus;
1205         if ((err = snd_ac97_bus(chip->card, &bus, &chip->ac97_bus)) < 0)
1206                 return err;
1207
1208         memset(&ac97, 0, sizeof(ac97));
1209         ac97.private_data = chip;
1210         ac97.private_free = snd_fm801_mixer_free_ac97;
1211         if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1212                 return err;
1213         if (chip->secondary) {
1214                 ac97.num = 1;
1215                 ac97.addr = chip->secondary_addr;
1216                 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1217                         return err;
1218         }
1219         for (i = 0; i < FM801_CONTROLS; i++)
1220                 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1221         if (chip->multichannel) {
1222                 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1223                         snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1224         }
1225         return 0;
1226 }
1227
1228 /*
1229  *  initialization routines
1230  */
1231
1232 static int snd_fm801_free(fm801_t *chip)
1233 {
1234         unsigned short cmdw;
1235
1236         if (chip->irq < 0)
1237                 goto __end_hw;
1238
1239         /* interrupt setup - mask everything */
1240         cmdw = inw(FM801_REG(chip, IRQ_MASK));
1241         cmdw |= 0x00c3;
1242         outw(cmdw, FM801_REG(chip, IRQ_MASK));
1243
1244       __end_hw:
1245 #ifdef TEA575X_RADIO
1246         snd_tea575x_exit(&chip->tea);
1247 #endif
1248         if (chip->res_port) {
1249                 release_resource(chip->res_port);
1250                 kfree_nocheck(chip->res_port);
1251         }
1252         if (chip->irq >= 0)
1253                 free_irq(chip->irq, (void *)chip);
1254
1255         snd_magic_kfree(chip);
1256         return 0;
1257 }
1258
1259 static int snd_fm801_dev_free(snd_device_t *device)
1260 {
1261         fm801_t *chip = snd_magic_cast(fm801_t, device->device_data, return -ENXIO);
1262         return snd_fm801_free(chip);
1263 }
1264
1265 static int __devinit snd_fm801_create(snd_card_t * card,
1266                                       struct pci_dev * pci,
1267                                       int tea575x_tuner,
1268                                       fm801_t ** rchip)
1269 {
1270         fm801_t *chip;
1271         unsigned char rev, id;
1272         unsigned short cmdw;
1273         unsigned long timeout;
1274         int err;
1275         static snd_device_ops_t ops = {
1276                 .dev_free =     snd_fm801_dev_free,
1277         };
1278
1279         *rchip = NULL;
1280         if ((err = pci_enable_device(pci)) < 0)
1281                 return err;
1282         chip = snd_magic_kcalloc(fm801_t, 0, GFP_KERNEL);
1283         if (chip == NULL)
1284                 return -ENOMEM;
1285         spin_lock_init(&chip->reg_lock);
1286         chip->card = card;
1287         chip->pci = pci;
1288         chip->irq = -1;
1289         chip->port = pci_resource_start(pci, 0);
1290         if ((chip->res_port = request_region(chip->port, 0x80, "FM801")) == NULL) {
1291                 snd_printk("unable to grab region 0x%lx-0x%lx\n", chip->port, chip->port + 0x80 - 1);
1292                 snd_fm801_free(chip);
1293                 return -EBUSY;
1294         }
1295         if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) {
1296                 snd_printk("unable to grab IRQ %d\n", chip->irq);
1297                 snd_fm801_free(chip);
1298                 return -EBUSY;
1299         }
1300         chip->irq = pci->irq;
1301         pci_set_master(pci);
1302
1303         pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
1304         if (rev >= 0xb1)        /* FM801-AU */
1305                 chip->multichannel = 1;
1306
1307         /* codec cold reset + AC'97 warm reset */
1308         outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL));
1309         inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
1310         udelay(100);
1311         outw(0, FM801_REG(chip, CODEC_CTRL));
1312
1313         timeout = (jiffies + (3 * HZ) / 4) + 1;         /* min 750ms */
1314
1315         outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1316         udelay(5);
1317         do {
1318                 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1319                         goto __ac97_secondary;
1320                 set_current_state(TASK_UNINTERRUPTIBLE);
1321                 schedule_timeout(1);
1322         } while (time_after(timeout, jiffies));
1323         snd_printk("Primary AC'97 codec not found\n");
1324         snd_fm801_free(chip);
1325         return -EIO;
1326
1327       __ac97_secondary:
1328         if (!chip->multichannel)        /* lookup is not required */
1329                 goto __ac97_ok;
1330         for (id = 3; id > 0; id--) {    /* my card has the secondary codec */
1331                                         /* at address #3, so the loop is inverted */
1332
1333                 timeout = jiffies + HZ / 20;
1334
1335                 outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD));
1336                 udelay(5);
1337                 do {
1338                         if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) {
1339                                 cmdw = inw(FM801_REG(chip, AC97_DATA));
1340                                 if (cmdw != 0xffff && cmdw != 0) {
1341                                         chip->secondary = 1;
1342                                         chip->secondary_addr = id;
1343                                         goto __ac97_ok;
1344                                 }
1345                         }
1346                         set_current_state(TASK_UNINTERRUPTIBLE);
1347                         schedule_timeout(1);
1348                 } while (time_after(timeout, jiffies));
1349         }
1350
1351         /* the recovery phase, it seems that probing for non-existing codec might */
1352         /* cause timeout problems */
1353         timeout = (jiffies + (3 * HZ) / 4) + 1;         /* min 750ms */
1354
1355         outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1356         udelay(5);
1357         do {
1358                 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1359                         goto __ac97_ok;
1360                 set_current_state(TASK_UNINTERRUPTIBLE);
1361                 schedule_timeout(1);
1362         } while (time_after(timeout, jiffies));
1363         snd_printk("Primary AC'97 codec not responding\n");
1364         snd_fm801_free(chip);
1365         return -EIO;
1366
1367       __ac97_ok:
1368
1369         /* init volume */
1370         outw(0x0808, FM801_REG(chip, PCM_VOL));
1371         outw(0x9f1f, FM801_REG(chip, FM_VOL));
1372         outw(0x8808, FM801_REG(chip, I2S_VOL));
1373
1374         /* I2S control - I2S mode */
1375         outw(0x0003, FM801_REG(chip, I2S_MODE));
1376
1377         /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
1378         cmdw = inw(FM801_REG(chip, IRQ_MASK));
1379         cmdw &= ~0x0083;
1380         outw(cmdw, FM801_REG(chip, IRQ_MASK));
1381
1382         /* interrupt clear */
1383         outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1384
1385         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1386                 snd_fm801_free(chip);
1387                 return err;
1388         }
1389
1390         snd_card_set_dev(card, &pci->dev);
1391
1392 #ifdef TEA575X_RADIO
1393         if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
1394                 chip->tea.dev_nr = tea575x_tuner >> 16;
1395                 chip->tea.card = card;
1396                 chip->tea.freq_fixup = 10700;
1397                 chip->tea.private_data = chip;
1398                 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
1399                 snd_tea575x_init(&chip->tea);
1400         }
1401 #endif
1402
1403         *rchip = chip;
1404         return 0;
1405 }
1406
1407 static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1408                                           const struct pci_device_id *pci_id)
1409 {
1410         static int dev;
1411         snd_card_t *card;
1412         fm801_t *chip;
1413         opl3_t *opl3;
1414         int err;
1415
1416         if (dev >= SNDRV_CARDS)
1417                 return -ENODEV;
1418         if (!enable[dev]) {
1419                 dev++;
1420                 return -ENOENT;
1421         }
1422
1423         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1424         if (card == NULL)
1425                 return -ENOMEM;
1426         if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1427                 snd_card_free(card);
1428                 return err;
1429         }
1430
1431         strcpy(card->driver, "FM801");
1432         strcpy(card->shortname, "ForteMedia FM801-");
1433         strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1434         sprintf(card->longname, "%s at 0x%lx, irq %i",
1435                 card->shortname, chip->port, chip->irq);
1436
1437         if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1438                 snd_card_free(card);
1439                 return err;
1440         }
1441         if ((err = snd_fm801_mixer(chip)) < 0) {
1442                 snd_card_free(card);
1443                 return err;
1444         }
1445         if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1446                                        FM801_REG(chip, MPU401_DATA), 1,
1447                                        chip->irq, 0, &chip->rmidi)) < 0) {
1448                 snd_card_free(card);
1449                 return err;
1450         }
1451         if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1452                                    FM801_REG(chip, OPL3_BANK1),
1453                                    OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1454                 snd_card_free(card);
1455                 return err;
1456         }
1457         if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1458                 snd_card_free(card);
1459                 return err;
1460         }
1461
1462         if ((err = snd_card_register(card)) < 0) {
1463                 snd_card_free(card);
1464                 return err;
1465         }
1466         pci_set_drvdata(pci, card);
1467         dev++;
1468         return 0;
1469 }
1470
1471 static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1472 {
1473         snd_card_free(pci_get_drvdata(pci));
1474         pci_set_drvdata(pci, NULL);
1475 }
1476
1477 static struct pci_driver driver = {
1478         .name = "FM801",
1479         .id_table = snd_fm801_ids,
1480         .probe = snd_card_fm801_probe,
1481         .remove = __devexit_p(snd_card_fm801_remove),
1482 };
1483
1484 static int __init alsa_card_fm801_init(void)
1485 {
1486         return pci_module_init(&driver);
1487 }
1488
1489 static void __exit alsa_card_fm801_exit(void)
1490 {
1491         pci_unregister_driver(&driver);
1492 }
1493
1494 module_init(alsa_card_fm801_init)
1495 module_exit(alsa_card_fm801_exit)