sound/pci/rme32.c

   1 /*
   2  *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   3  *
   4  *      Copyright (c) 2002, 2003 Martin Langer <martin-langer@gmx.de>
   5  *
   6  *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   7  *                         Henk Hesselink <henk@anda.nl>
   8  *                         for writing the digi96-driver
   9  *                         and RME for all informations.
  10  *
  11  *   This program is free software; you can redistribute it and/or modify
  12  *   it under the terms of the GNU General Public License as published by
  13  *   the Free Software Foundation; either version 2 of the License, or
  14  *   (at your option) any later version.
  15  *
  16  *   This program is distributed in the hope that it will be useful,
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *   GNU General Public License for more details.
  20  *
  21  *   You should have received a copy of the GNU General Public License
  22  *   along with this program; if not, write to the Free Software
  23  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  *
  26  * ****************************************************************************
  27  *
  28  * Note #1 "Sek'd models" ................................... martin 2002-12-07
  29  *
  30  * Identical soundcards by Sek'd were labeled:
  31  * RME Digi 32     = Sek'd Prodif 32
  32  * RME Digi 32 Pro = Sek'd Prodif 96
  33  * RME Digi 32/8   = Sek'd Prodif Gold
  34  *
  35  * ****************************************************************************
  36  *
  37  * Note #2 "full duplex mode" ............................... martin 2002-12-07
  38  *
  39  * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  40  * in this mode. Rec data and play data are using the same buffer therefore. At
  41  * first you have got the playing bits in the buffer and then (after playing
  42  * them) they were overwitten by the captured sound of the CS8412/14. Both
  43  * modes (play/record) are running harmonically hand in hand in the same buffer
  44  * and you have only one start bit plus one interrupt bit to control this
  45  * paired action.
  46  * This is opposite to the latter rme96 where playing and capturing is totally
  47  * separated and so their full duplex mode is supported by alsa (using two
  48  * start bits and two interrupts for two different buffers).
  49  * But due to the wrong sequence of playing and capturing ALSA shows no solved
  50  * full duplex support for the rme32 at the moment. That's bad, but I'm not
  51  * able to solve it. Are you motivated enough to solve this problem now? Your
  52  * patch would be welcome!
  53  *
  54  * ****************************************************************************
  55  */
  56
  57
  58 #include <sound/driver.h>
  59 #include <linux/delay.h>
  60 #include <linux/init.h>
  61 #include <linux/interrupt.h>
  62 #include <linux/pci.h>
  63 #include <linux/slab.h>
  64 #include <linux/moduleparam.h>
  65
  66 #include <sound/core.h>
  67 #include <sound/info.h>
  68 #include <sound/control.h>
  69 #include <sound/pcm.h>
  70 #include <sound/pcm_params.h>
  71 #include <sound/asoundef.h>
  72 #include <sound/initval.h>
  73
  74 #include <asm/io.h>
  75
  76 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  77 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  78 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  79 static int boot_devs;
  80
  81 module_param_array(index, int, boot_devs, 0444);
  82 MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  83 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
  84 module_param_array(id, charp, boot_devs, 0444);
  85 MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
  86 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
  87 module_param_array(enable, bool, boot_devs, 0444);
  88 MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
  89 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
  90 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>");
  91 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
  92 MODULE_LICENSE("GPL");
  93 MODULE_CLASSES("{sound}");
  94 MODULE_DEVICES("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
  95
  96 /* Defines for RME Digi32 series */
  97 #define RME32_SPDIF_NCHANNELS 2
  98
  99 /* Playback and capture buffer size */
 100 #define RME32_BUFFER_SIZE 0x20000
 101
 102 /* IO area size */
 103 #define RME32_IO_SIZE 0x30000
 104
 105 /* IO area offsets */
 106 #define RME32_IO_DATA_BUFFER        0x0
 107 #define RME32_IO_CONTROL_REGISTER   0x20000
 108 #define RME32_IO_GET_POS            0x20000
 109 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 110 #define RME32_IO_RESET_POS          0x20100
 111
 112 /* Write control register bits */
 113 #define RME32_WCR_START     (1 << 0)    /* startbit */
 114 #define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 115                                            Setting the whole card to mono
 116                                            doesn't seem to be very useful.
 117                                            A software-solution can handle
 118                                            full-duplex with one direction in
 119                                            stereo and the other way in mono.
 120                                            So, the hardware should work all
 121                                            the time in stereo! */
 122 #define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 123 #define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 124 #define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 125 #define RME32_WCR_FREQ_1    (1 << 5)
 126 #define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 127 #define RME32_WCR_INP_1     (1 << 7)
 128 #define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 129 #define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 130 #define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 131 #define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 132 #define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 133 #define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 134 #define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 135 #define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 136
 137 #define RME32_WCR_BITPOS_FREQ_0 4
 138 #define RME32_WCR_BITPOS_FREQ_1 5
 139 #define RME32_WCR_BITPOS_INP_0 6
 140 #define RME32_WCR_BITPOS_INP_1 7
 141
 142 /* Read control register bits */
 143 #define RME32_RCR_AUDIO_ADDR_MASK 0x10001
 144 #define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 145 #define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 146 #define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 147 #define RME32_RCR_FREQ_1    (1 << 28)
 148 #define RME32_RCR_FREQ_2    (1 << 29)
 149 #define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 150 #define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 151
 152 #define RME32_RCR_BITPOS_F0 27
 153 #define RME32_RCR_BITPOS_F1 28
 154 #define RME32_RCR_BITPOS_F2 29
 155
 156 /* Input types */
 157 #define RME32_INPUT_OPTICAL 0
 158 #define RME32_INPUT_COAXIAL 1
 159 #define RME32_INPUT_INTERNAL 2
 160 #define RME32_INPUT_XLR 3
 161
 162 /* Clock modes */
 163 #define RME32_CLOCKMODE_SLAVE 0
 164 #define RME32_CLOCKMODE_MASTER_32 1
 165 #define RME32_CLOCKMODE_MASTER_44 2
 166 #define RME32_CLOCKMODE_MASTER_48 3
 167
 168 /* Block sizes in bytes */
 169 #define RME32_BLOCK_SIZE 8192
 170
 171 /* Hardware revisions */
 172 #define RME32_32_REVISION 192
 173 #define RME32_328_REVISION_OLD 100
 174 #define RME32_328_REVISION_NEW 101
 175 #define RME32_PRO_REVISION_WITH_8412 192
 176 #define RME32_PRO_REVISION_WITH_8414 150
 177
 178
 179 /* PCI vendor/device ID's */
 180 #ifndef PCI_VENDOR_ID_XILINX_RME
 181 # define PCI_VENDOR_ID_XILINX_RME 0xea60
 182 #endif
 183 #ifndef PCI_DEVICE_ID_DIGI32
 184 # define PCI_DEVICE_ID_DIGI32 0x9896
 185 #endif
 186 #ifndef PCI_DEVICE_ID_DIGI32_PRO
 187 # define PCI_DEVICE_ID_DIGI32_PRO 0x9897
 188 #endif
 189 #ifndef PCI_DEVICE_ID_DIGI32_8
 190 # define PCI_DEVICE_ID_DIGI32_8 0x9898
 191 #endif
 192
 193 typedef struct snd_rme32 {
 194         spinlock_t lock;
 195         int irq;
 196         unsigned long port;
 197         struct resource *res_port;
 198         unsigned long iobase;
 199
 200         u32 wcreg;              /* cached write control register value */
 201         u32 wcreg_spdif;        /* S/PDIF setup */
 202         u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 203         u32 rcreg;              /* cached read control register value */
 204
 205         u8 rev;                 /* card revision number */
 206
 207         snd_pcm_substream_t *playback_substream;
 208         snd_pcm_substream_t *capture_substream;
 209
 210         int playback_frlog;     /* log2 of framesize */
 211         int capture_frlog;
 212
 213         size_t playback_periodsize;     /* in bytes, zero if not used */
 214         size_t capture_periodsize;      /* in bytes, zero if not used */
 215
 216         snd_pcm_uframes_t playback_last_appl_ptr;
 217         size_t playback_ptr;
 218         size_t capture_ptr;
 219
 220         snd_card_t *card;
 221         snd_pcm_t *spdif_pcm;
 222         snd_pcm_t *adat_pcm;
 223         struct pci_dev *pci;
 224         snd_kcontrol_t *spdif_ctl;
 225 } rme32_t;
 226
 227 static struct pci_device_id snd_rme32_ids[] = {
 228         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32,
 229          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 230         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32_8,
 231          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 232         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32_PRO,
 233          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 234         {0,}
 235 };
 236
 237 MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 238
 239 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 240 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 241
 242 static int snd_rme32_playback_prepare(snd_pcm_substream_t * substream);
 243
 244 static int snd_rme32_capture_prepare(snd_pcm_substream_t * substream);
 245
 246 static int
 247 snd_rme32_playback_trigger(snd_pcm_substream_t * substream, int cmd);
 248
 249 static int
 250 snd_rme32_capture_trigger(snd_pcm_substream_t * substream, int cmd);
 251
 252 static snd_pcm_uframes_t
 253 snd_rme32_playback_pointer(snd_pcm_substream_t * substream);
 254
 255 static snd_pcm_uframes_t
 256 snd_rme32_capture_pointer(snd_pcm_substream_t * substream);
 257
 258 static void snd_rme32_proc_init(rme32_t * rme32);
 259
 260 static int snd_rme32_create_switches(snd_card_t * card, rme32_t * rme32);
 261
 262 static inline unsigned int snd_rme32_playback_ptr(rme32_t * rme32)
 263 {
 264
 265         return (readl(rme32->iobase + RME32_IO_GET_POS)
 266                 & RME32_RCR_AUDIO_ADDR_MASK) >> rme32->playback_frlog;
 267 }
 268
 269 static inline unsigned int snd_rme32_capture_ptr(rme32_t * rme32)
 270 {
 271         return (readl(rme32->iobase + RME32_IO_GET_POS)
 272                 & RME32_RCR_AUDIO_ADDR_MASK) >> rme32->capture_frlog;
 273 }
 274
 275 static int snd_rme32_ratecode(int rate)
 276 {
 277         switch (rate) {
 278         case 32000: return SNDRV_PCM_RATE_32000;
 279         case 44100: return SNDRV_PCM_RATE_44100;
 280         case 48000: return SNDRV_PCM_RATE_48000;
 281         case 64000: return SNDRV_PCM_RATE_64000;
 282         case 88200: return SNDRV_PCM_RATE_88200;
 283         case 96000: return SNDRV_PCM_RATE_96000;
 284         }
 285         return 0;
 286 }
 287
 288 static int snd_rme32_playback_silence(snd_pcm_substream_t * substream, int channel,     /* not used (interleaved data) */
 289                                       snd_pcm_uframes_t pos,
 290                                       snd_pcm_uframes_t count)
 291 {
 292         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 293         count <<= rme32->playback_frlog;
 294         pos <<= rme32->playback_frlog;
 295         memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 296         return 0;
 297 }
 298
 299 static int snd_rme32_playback_copy(snd_pcm_substream_t * substream, int channel,        /* not used (interleaved data) */
 300                                    snd_pcm_uframes_t pos,
 301                                    void __user *src, snd_pcm_uframes_t count)
 302 {
 303         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 304         count <<= rme32->playback_frlog;
 305         pos <<= rme32->playback_frlog;
 306         if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 307                             src, count))
 308                 return -EFAULT;
 309         return 0;
 310 }
 311
 312 static int snd_rme32_capture_copy(snd_pcm_substream_t * substream, int channel, /* not used (interleaved data) */
 313                                   snd_pcm_uframes_t pos,
 314                                   void __user *dst, snd_pcm_uframes_t count)
 315 {
 316         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 317         count <<= rme32->capture_frlog;
 318         pos <<= rme32->capture_frlog;
 319         if (copy_to_user_fromio(dst,
 320                             rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 321                             count))
 322                 return -EFAULT;
 323         return 0;
 324 }
 325
 326 /*
 327  * Digital output capabilites (S/PDIF)
 328  */
 329 static snd_pcm_hardware_t snd_rme32_playback_spdif_info = {
 330         .info =         (SNDRV_PCM_INFO_MMAP |
 331                          SNDRV_PCM_INFO_MMAP_VALID |
 332                          SNDRV_PCM_INFO_INTERLEAVED |
 333                          SNDRV_PCM_INFO_PAUSE),
 334         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 335                          SNDRV_PCM_FMTBIT_S32_LE),
 336         .rates =        (SNDRV_PCM_RATE_32000 |
 337                          SNDRV_PCM_RATE_44100 |
 338                          SNDRV_PCM_RATE_48000),
 339         .rate_min =     32000,
 340         .rate_max =     48000,
 341         .channels_min = 2,
 342         .channels_max = 2,
 343         .buffer_bytes_max = RME32_BUFFER_SIZE,
 344         .period_bytes_min = RME32_BLOCK_SIZE,
 345         .period_bytes_max = RME32_BLOCK_SIZE,
 346         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 347         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 348         .fifo_size =    0,
 349 };
 350
 351 /*
 352  * Digital input capabilites (S/PDIF)
 353  */
 354 static snd_pcm_hardware_t snd_rme32_capture_spdif_info = {
 355         .info =         (SNDRV_PCM_INFO_MMAP |
 356                          SNDRV_PCM_INFO_MMAP_VALID |
 357                          SNDRV_PCM_INFO_INTERLEAVED |
 358                          SNDRV_PCM_INFO_PAUSE),
 359         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 360                          SNDRV_PCM_FMTBIT_S32_LE),
 361         .rates =        (SNDRV_PCM_RATE_32000 |
 362                          SNDRV_PCM_RATE_44100 |
 363                          SNDRV_PCM_RATE_48000),
 364         .rate_min =     32000,
 365         .rate_max =     48000,
 366         .channels_min = 2,
 367         .channels_max = 2,
 368         .buffer_bytes_max = RME32_BUFFER_SIZE,
 369         .period_bytes_min = RME32_BLOCK_SIZE,
 370         .period_bytes_max = RME32_BLOCK_SIZE,
 371         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 372         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 373         .fifo_size =    0,
 374 };
 375
 376 /*
 377  * Digital output capabilites (ADAT)
 378  */
 379 static snd_pcm_hardware_t snd_rme32_playback_adat_info =
 380 {
 381         .info =              (SNDRV_PCM_INFO_MMAP |
 382                               SNDRV_PCM_INFO_MMAP_VALID |
 383                               SNDRV_PCM_INFO_INTERLEAVED |
 384                               SNDRV_PCM_INFO_PAUSE),
 385         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 386         .rates =             (SNDRV_PCM_RATE_44100 |
 387                               SNDRV_PCM_RATE_48000),
 388         .rate_min =          44100,
 389         .rate_max =          48000,
 390         .channels_min =      8,
 391         .channels_max =      8,
 392         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 393         .period_bytes_min =  RME32_BLOCK_SIZE,
 394         .period_bytes_max =  RME32_BLOCK_SIZE,
 395         .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 396         .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 397         .fifo_size =        0,
 398 };
 399
 400 /*
 401  * Digital input capabilites (ADAT)
 402  */
 403 static snd_pcm_hardware_t snd_rme32_capture_adat_info =
 404 {
 405         .info =              (SNDRV_PCM_INFO_MMAP |
 406                               SNDRV_PCM_INFO_MMAP_VALID |
 407                               SNDRV_PCM_INFO_INTERLEAVED |
 408                               SNDRV_PCM_INFO_PAUSE),
 409         .formats =           SNDRV_PCM_FMTBIT_S16_LE,
 410         .rates =             (SNDRV_PCM_RATE_44100 |
 411                               SNDRV_PCM_RATE_48000),
 412         .rate_min =          44100,
 413         .rate_max =          48000,
 414         .channels_min =      8,
 415         .channels_max =      8,
 416         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 417         .period_bytes_min =  RME32_BLOCK_SIZE,
 418         .period_bytes_max =  RME32_BLOCK_SIZE,
 419         .periods_min =       RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 420         .periods_max =       RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 421         .fifo_size =         0,
 422 };
 423
 424 static void snd_rme32_reset_dac(rme32_t *rme32)
 425 {
 426         writel(rme32->wcreg | RME32_WCR_PD,
 427                rme32->iobase + RME32_IO_CONTROL_REGISTER);
 428         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 429 }
 430
 431 static int snd_rme32_playback_getrate(rme32_t * rme32)
 432 {
 433         int rate;
 434
 435         rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 436                (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 437         switch (rate) {
 438         case 1:
 439                 rate = 32000;
 440                 break;
 441         case 2:
 442                 rate = 44100;
 443                 break;
 444         case 3:
 445                 rate = 48000;
 446                 break;
 447         default:
 448                 return -1;
 449         }
 450         return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 451 }
 452
 453 static int snd_rme32_capture_getrate(rme32_t * rme32, int *is_adat)
 454 {
 455         int n;
 456
 457         *is_adat = 0;
 458         if (rme32->rcreg & RME32_RCR_LOCK) {
 459                 /* ADAT rate */
 460                 *is_adat = 1;
 461         }
 462         if (rme32->rcreg & RME32_RCR_ERF) {
 463                 return -1;
 464         }
 465
 466         /* S/PDIF rate */
 467         n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 468                 (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 469                 (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 470
 471         if (RME32_PRO_WITH_8414(rme32))
 472                 switch (n) {    /* supporting the CS8414 */
 473                 case 0:
 474                 case 1:
 475                 case 2:
 476                         return -1;
 477                 case 3:
 478                         return 96000;
 479                 case 4:
 480                         return 88200;
 481                 case 5:
 482                         return 48000;
 483                 case 6:
 484                         return 44100;
 485                 case 7:
 486                         return 32000;
 487                 default:
 488                         return -1;
 489                         break;
 490                 }
 491         else
 492                 switch (n) {    /* supporting the CS8412 */
 493                 case 0:
 494                         return -1;
 495                 case 1:
 496                         return 48000;
 497                 case 2:
 498                         return 44100;
 499                 case 3:
 500                         return 32000;
 501                 case 4:
 502                         return 48000;
 503                 case 5:
 504                         return 44100;
 505                 case 6:
 506                         return 44056;
 507                 case 7:
 508                         return 32000;
 509                 default:
 510                         break;
 511                 }
 512         return -1;
 513 }
 514
 515 static int snd_rme32_playback_setrate(rme32_t * rme32, int rate)
 516 {
 517         int ds;
 518
 519         ds = rme32->wcreg & RME32_WCR_DS_BM;
 520         switch (rate) {
 521         case 32000:
 522                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 523                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 524                         ~RME32_WCR_FREQ_1;
 525                 break;
 526         case 44100:
 527                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 528                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 529                         ~RME32_WCR_FREQ_0;
 530                 break;
 531         case 48000:
 532                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 533                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 534                         RME32_WCR_FREQ_1;
 535                 break;
 536         case 64000:
 537                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 538                         return -EINVAL;
 539                 rme32->wcreg |= RME32_WCR_DS_BM;
 540                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 541                         ~RME32_WCR_FREQ_1;
 542                 break;
 543         case 88200:
 544                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 545                         return -EINVAL;
 546                 rme32->wcreg |= RME32_WCR_DS_BM;
 547                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 548                         ~RME32_WCR_FREQ_0;
 549                 break;
 550         case 96000:
 551                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 552                         return -EINVAL;
 553                 rme32->wcreg |= RME32_WCR_DS_BM;
 554                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 555                         RME32_WCR_FREQ_1;
 556                 break;
 557         default:
 558                 return -EINVAL;
 559         }
 560         if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 561             (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 562         {
 563                 /* change to/from double-speed: reset the DAC (if available) */
 564                 snd_rme32_reset_dac(rme32);
 565         } else {
 566                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 567         }
 568         return 0;
 569 }
 570
 571 static int snd_rme32_setclockmode(rme32_t * rme32, int mode)
 572 {
 573         switch (mode) {
 574         case RME32_CLOCKMODE_SLAVE:
 575                 /* AutoSync */
 576                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
 577                         ~RME32_WCR_FREQ_1;
 578                 break;
 579         case RME32_CLOCKMODE_MASTER_32:
 580                 /* Internal 32.0kHz */
 581                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 582                         ~RME32_WCR_FREQ_1;
 583                 break;
 584         case RME32_CLOCKMODE_MASTER_44:
 585                 /* Internal 44.1kHz */
 586                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
 587                         RME32_WCR_FREQ_1;
 588                 break;
 589         case RME32_CLOCKMODE_MASTER_48:
 590                 /* Internal 48.0kHz */
 591                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 592                         RME32_WCR_FREQ_1;
 593                 break;
 594         default:
 595                 return -EINVAL;
 596         }
 597         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 598         return 0;
 599 }
 600
 601 static int snd_rme32_getclockmode(rme32_t * rme32)
 602 {
 603         return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 604             (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 605 }
 606
 607 static int snd_rme32_setinputtype(rme32_t * rme32, int type)
 608 {
 609         switch (type) {
 610         case RME32_INPUT_OPTICAL:
 611                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
 612                         ~RME32_WCR_INP_1;
 613                 break;
 614         case RME32_INPUT_COAXIAL:
 615                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
 616                         ~RME32_WCR_INP_1;
 617                 break;
 618         case RME32_INPUT_INTERNAL:
 619                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
 620                         RME32_WCR_INP_1;
 621                 break;
 622         case RME32_INPUT_XLR:
 623                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
 624                         RME32_WCR_INP_1;
 625                 break;
 626         default:
 627                 return -EINVAL;
 628         }
 629         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 630         return 0;
 631 }
 632
 633 static int snd_rme32_getinputtype(rme32_t * rme32)
 634 {
 635         return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 636             (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 637 }
 638
 639 static void
 640 snd_rme32_setframelog(rme32_t * rme32, int n_channels, int is_playback)
 641 {
 642         int frlog;
 643
 644         if (n_channels == 2) {
 645                 frlog = 1;
 646         } else {
 647                 /* assume 8 channels */
 648                 frlog = 3;
 649         }
 650         if (is_playback) {
 651                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 652                 rme32->playback_frlog = frlog;
 653         } else {
 654                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 655                 rme32->capture_frlog = frlog;
 656         }
 657 }
 658
 659 static int snd_rme32_setformat(rme32_t * rme32, int format)
 660 {
 661         switch (format) {
 662         case SNDRV_PCM_FORMAT_S16_LE:
 663                 rme32->wcreg &= ~RME32_WCR_MODE24;
 664                 break;
 665         case SNDRV_PCM_FORMAT_S32_LE:
 666                 rme32->wcreg |= RME32_WCR_MODE24;
 667                 break;
 668         default:
 669                 return -EINVAL;
 670         }
 671         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 672         return 0;
 673 }
 674
 675 static int
 676 snd_rme32_playback_hw_params(snd_pcm_substream_t * substream,
 677                              snd_pcm_hw_params_t * params)
 678 {
 679         int err, rate, dummy;
 680         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 681
 682         if ((err = snd_pcm_lib_malloc_pages(substream,
 683                                       params_buffer_bytes(params))) < 0)
 684                 return err;
 685         spin_lock_irq(&rme32->lock);
 686         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 687             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 688                 /* AutoSync */
 689                 if ((int)params_rate(params) != rate) {
 690                         spin_unlock_irq(&rme32->lock);
 691                         return -EIO;
 692                 }
 693         } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 694                 spin_unlock_irq(&rme32->lock);
 695                 return err;
 696         }
 697         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 698                 spin_unlock_irq(&rme32->lock);
 699                 return err;
 700         }
 701
 702         snd_rme32_setframelog(rme32, params_channels(params), 1);
 703         if (rme32->capture_periodsize != 0) {
 704                 if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 705                         spin_unlock_irq(&rme32->lock);
 706                         return -EBUSY;
 707                 }
 708         }
 709         rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 710         /* S/PDIF setup */
 711         if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 712                 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 713                 writel(rme32->wcreg |=
 714                        rme32->wcreg_spdif_stream,
 715                        rme32->iobase + RME32_IO_CONTROL_REGISTER);
 716         }
 717         spin_unlock_irq(&rme32->lock);
 718
 719         return 0;
 720 }
 721
 722 static int snd_rme32_playback_hw_free(snd_pcm_substream_t * substream)
 723 {
 724         snd_pcm_lib_free_pages(substream);
 725         return 0;
 726 }
 727
 728 static int
 729 snd_rme32_capture_hw_params(snd_pcm_substream_t * substream,
 730                             snd_pcm_hw_params_t * params)
 731 {
 732         unsigned long flags;
 733         int err, isadat, rate;
 734         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 735         snd_pcm_runtime_t *runtime = substream->runtime;
 736
 737         if ((err = snd_pcm_lib_malloc_pages(substream,
 738                                       params_buffer_bytes(params))) < 0)
 739                 return err;
 740         spin_lock_irqsave(&rme32->lock, flags);
 741         /* enable AutoSync for record-preparing */
 742         rme32->wcreg |= RME32_WCR_AUTOSYNC;
 743         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 744
 745         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 746                 spin_unlock_irqrestore(&rme32->lock, flags);
 747                 return err;
 748         }
 749         if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 750                 spin_unlock_irqrestore(&rme32->lock, flags);
 751                 return err;
 752         }
 753         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 754                 if ((int)params_rate(params) != rate) {
 755                         spin_unlock_irqrestore(&rme32->lock, flags);
 756                         return -EIO;
 757                 }
 758                 if ((isadat && runtime->hw.channels_min == 2) ||
 759                     (!isadat && runtime->hw.channels_min == 8)) {
 760                         spin_unlock_irqrestore(&rme32->lock, flags);
 761                         return -EIO;
 762                 }
 763         }
 764         /* AutoSync off for recording */
 765         rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 766         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 767
 768         snd_rme32_setframelog(rme32, params_channels(params), 0);
 769         if (rme32->playback_periodsize != 0) {
 770                 if (params_period_size(params) << rme32->capture_frlog !=
 771                     rme32->playback_periodsize) {
 772                         spin_unlock_irqrestore(&rme32->lock, flags);
 773                         return -EBUSY;
 774                 }
 775         }
 776         rme32->capture_periodsize =
 777             params_period_size(params) << rme32->capture_frlog;
 778         spin_unlock_irqrestore(&rme32->lock, flags);
 779
 780         return 0;
 781 }
 782
 783 static int snd_rme32_capture_hw_free(snd_pcm_substream_t * substream)
 784 {
 785         snd_pcm_lib_free_pages(substream);
 786         return 0;
 787 }
 788
 789 static void snd_rme32_playback_start(rme32_t * rme32, int from_pause)
 790 {
 791         if (!from_pause) {
 792                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 793                 rme32->playback_last_appl_ptr = 0;
 794                 rme32->playback_ptr = 0;
 795         }
 796
 797         rme32->wcreg |= RME32_WCR_START;
 798         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 799 }
 800
 801 static void snd_rme32_capture_start(rme32_t * rme32, int from_pause)
 802 {
 803         if (!from_pause) {
 804                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 805         }
 806
 807         rme32->wcreg |= RME32_WCR_START;
 808         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 809 }
 810
 811 static void snd_rme32_playback_stop(rme32_t * rme32)
 812 {
 813         /*
 814          * Check if there is an unconfirmed IRQ, if so confirm it, or else
 815          * the hardware will not stop generating interrupts
 816          */
 817         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 818         if (rme32->rcreg & RME32_RCR_IRQ) {
 819                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 820         }
 821         rme32->wcreg &= ~RME32_WCR_START;
 822         if (rme32->wcreg & RME32_WCR_SEL)
 823                 rme32->wcreg |= RME32_WCR_MUTE;
 824         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 825 }
 826
 827 static void snd_rme32_capture_stop(rme32_t * rme32)
 828 {
 829         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 830         if (rme32->rcreg & RME32_RCR_IRQ) {
 831                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 832         }
 833         rme32->wcreg &= ~RME32_WCR_START;
 834         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 835 }
 836
 837 static irqreturn_t
 838 snd_rme32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 839 {
 840         rme32_t *rme32 = (rme32_t *) dev_id;
 841
 842         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 843         if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 844                 return IRQ_NONE;
 845         } else {
 846                 if (rme32->capture_substream) {
 847                         snd_pcm_period_elapsed(rme32->capture_substream);
 848                 }
 849                 if (rme32->playback_substream) {
 850                         snd_pcm_period_elapsed(rme32->playback_substream);
 851                 }
 852                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 853         }
 854         return IRQ_HANDLED;
 855 }
 856
 857 static unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 858
 859
 860 #define PERIOD_BYTES sizeof(period_bytes) / sizeof(period_bytes[0])
 861
 862 static snd_pcm_hw_constraint_list_t hw_constraints_period_bytes = {
 863         .count = PERIOD_BYTES,
 864         .list = period_bytes,
 865         .mask = 0
 866 };
 867
 868 static int snd_rme32_playback_spdif_open(snd_pcm_substream_t * substream)
 869 {
 870         unsigned long flags;
 871         int rate, dummy;
 872         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 873         snd_pcm_runtime_t *runtime = substream->runtime;
 874
 875         snd_pcm_set_sync(substream);
 876
 877         spin_lock_irqsave(&rme32->lock, flags);
 878         if (rme32->playback_substream != NULL) {
 879                 spin_unlock_irqrestore(&rme32->lock, flags);
 880                 return -EBUSY;
 881         }
 882         rme32->wcreg &= ~RME32_WCR_ADAT;
 883         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 884         rme32->playback_substream = substream;
 885         rme32->playback_last_appl_ptr = 0;
 886         rme32->playback_ptr = 0;
 887         spin_unlock_irqrestore(&rme32->lock, flags);
 888
 889         runtime->hw = snd_rme32_playback_spdif_info;
 890         if (rme32->pci->device == PCI_DEVICE_ID_DIGI32_PRO) {
 891                 runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 892                 runtime->hw.rate_max = 96000;
 893         }
 894         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 895             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 896                 /* AutoSync */
 897                 runtime->hw.rates = snd_rme32_ratecode(rate);
 898                 runtime->hw.rate_min = rate;
 899                 runtime->hw.rate_max = rate;
 900         }
 901         snd_pcm_hw_constraint_minmax(runtime,
 902                                      SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 903                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 904         snd_pcm_hw_constraint_list(runtime, 0,
 905                                    SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 906                                    &hw_constraints_period_bytes);
 907
 908         rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 909         rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 910         snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 911                        SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 912         return 0;
 913 }
 914
 915 static int snd_rme32_capture_spdif_open(snd_pcm_substream_t * substream)
 916 {
 917         unsigned long flags;
 918         int isadat, rate;
 919         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 920         snd_pcm_runtime_t *runtime = substream->runtime;
 921
 922         snd_pcm_set_sync(substream);
 923
 924         spin_lock_irqsave(&rme32->lock, flags);
 925         if (rme32->capture_substream != NULL) {
 926                 spin_unlock_irqrestore(&rme32->lock, flags);
 927                 return -EBUSY;
 928         }
 929         rme32->capture_substream = substream;
 930         rme32->capture_ptr = 0;
 931         spin_unlock_irqrestore(&rme32->lock, flags);
 932
 933         runtime->hw = snd_rme32_capture_spdif_info;
 934         if (RME32_PRO_WITH_8414(rme32)) {
 935                 runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 936                 runtime->hw.rate_max = 96000;
 937         }
 938         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 939                 if (isadat) {
 940                         return -EIO;
 941                 }
 942                 runtime->hw.rates = snd_rme32_ratecode(rate);
 943                 runtime->hw.rate_min = rate;
 944                 runtime->hw.rate_max = rate;
 945         }
 946
 947         snd_pcm_hw_constraint_minmax(runtime,
 948                                      SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 949                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 950         snd_pcm_hw_constraint_list(runtime, 0,
 951                                    SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 952                                    &hw_constraints_period_bytes);
 953
 954         return 0;
 955 }
 956
 957 static int
 958 snd_rme32_playback_adat_open(snd_pcm_substream_t *substream)
 959 {
 960         unsigned long flags;
 961         int rate, dummy;
 962         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 963         snd_pcm_runtime_t *runtime = substream->runtime;
 964
 965         snd_pcm_set_sync(substream);
 966
 967         spin_lock_irqsave(&rme32->lock, flags);
 968         if (rme32->playback_substream != NULL) {
 969                 spin_unlock_irqrestore(&rme32->lock, flags);
 970                 return -EBUSY;
 971         }
 972         rme32->wcreg |= RME32_WCR_ADAT;
 973         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 974         rme32->playback_substream = substream;
 975         rme32->playback_last_appl_ptr = 0;
 976         rme32->playback_ptr = 0;
 977         spin_unlock_irqrestore(&rme32->lock, flags);
 978
 979         runtime->hw = snd_rme32_playback_adat_info;
 980         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 981             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 982                 /* AutoSync */
 983                 runtime->hw.rates = snd_rme32_ratecode(rate);
 984                 runtime->hw.rate_min = rate;
 985                 runtime->hw.rate_max = rate;
 986         }
 987         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 988                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 989         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 990                                    &hw_constraints_period_bytes);
 991         return 0;
 992 }
 993
 994 static int
 995 snd_rme32_capture_adat_open(snd_pcm_substream_t *substream)
 996 {
 997         unsigned long flags;
 998         int isadat, rate;
 999         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1000         snd_pcm_runtime_t *runtime = substream->runtime;
1001
1002         runtime->hw = snd_rme32_capture_adat_info;
1003         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
1004                 if (!isadat) {
1005                         return -EIO;
1006                 }
1007                 runtime->hw.rates = snd_rme32_ratecode(rate);
1008                 runtime->hw.rate_min = rate;
1009                 runtime->hw.rate_max = rate;
1010         }
1011
1012         snd_pcm_set_sync(substream);
1013
1014         spin_lock_irqsave(&rme32->lock, flags);
1015         if (rme32->capture_substream != NULL) {
1016                 spin_unlock_irqrestore(&rme32->lock, flags);
1017                 return -EBUSY;
1018         }
1019         rme32->capture_substream = substream;
1020         rme32->capture_ptr = 0;
1021         spin_unlock_irqrestore(&rme32->lock, flags);
1022
1023         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1024                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
1025         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1026                                    &hw_constraints_period_bytes);
1027         return 0;
1028 }
1029
1030 static int snd_rme32_playback_close(snd_pcm_substream_t * substream)
1031 {
1032         unsigned long flags;
1033         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1034         int spdif = 0;
1035
1036         spin_lock_irqsave(&rme32->lock, flags);
1037         rme32->playback_substream = NULL;
1038         rme32->playback_periodsize = 0;
1039         spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1040         spin_unlock_irqrestore(&rme32->lock, flags);
1041         if (spdif) {
1042                 rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1043                 snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1044                                SNDRV_CTL_EVENT_MASK_INFO,
1045                                &rme32->spdif_ctl->id);
1046         }
1047         return 0;
1048 }
1049
1050 static int snd_rme32_capture_close(snd_pcm_substream_t * substream)
1051 {
1052         unsigned long flags;
1053         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1054
1055         spin_lock_irqsave(&rme32->lock, flags);
1056         rme32->capture_substream = NULL;
1057         rme32->capture_periodsize = 0;
1058         spin_unlock_irqrestore(&rme32->lock, flags);
1059         return 0;
1060 }
1061
1062 static int snd_rme32_playback_prepare(snd_pcm_substream_t * substream)
1063 {
1064         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1065         unsigned long flags;
1066
1067         spin_lock_irqsave(&rme32->lock, flags);
1068         if (RME32_ISWORKING(rme32)) {
1069                 snd_rme32_playback_stop(rme32);
1070         }
1071         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1072         if (rme32->wcreg & RME32_WCR_SEL)
1073                 rme32->wcreg &= ~RME32_WCR_MUTE;
1074         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1075         spin_unlock_irqrestore(&rme32->lock, flags);
1076         return 0;
1077 }
1078
1079 static int snd_rme32_capture_prepare(snd_pcm_substream_t * substream)
1080 {
1081         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1082         unsigned long flags;
1083
1084         spin_lock_irqsave(&rme32->lock, flags);
1085         if (RME32_ISWORKING(rme32)) {
1086                 snd_rme32_capture_stop(rme32);
1087         }
1088         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1089         spin_unlock_irqrestore(&rme32->lock, flags);
1090         return 0;
1091 }
1092
1093 static int
1094 snd_rme32_playback_trigger(snd_pcm_substream_t * substream, int cmd)
1095 {
1096         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1097         switch (cmd) {
1098         case SNDRV_PCM_TRIGGER_START:
1099                 if (!RME32_ISWORKING(rme32)) {
1100                         if (substream != rme32->playback_substream) {
1101                                 return -EBUSY;
1102                         }
1103                         snd_rme32_playback_start(rme32, 0);
1104                 }
1105                 break;
1106
1107         case SNDRV_PCM_TRIGGER_STOP:
1108                 if (RME32_ISWORKING(rme32)) {
1109                         if (substream != rme32->playback_substream) {
1110                                 return -EBUSY;
1111                         }
1112                         snd_rme32_playback_stop(rme32);
1113                 }
1114                 break;
1115
1116         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1117                 if (RME32_ISWORKING(rme32)) {
1118                         snd_rme32_playback_stop(rme32);
1119                 }
1120                 break;
1121
1122         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1123                 if (!RME32_ISWORKING(rme32)) {
1124                         snd_rme32_playback_start(rme32, 1);
1125                 }
1126                 break;
1127
1128         default:
1129                 return -EINVAL;
1130         }
1131         return 0;
1132 }
1133
1134 static int
1135 snd_rme32_capture_trigger(snd_pcm_substream_t * substream, int cmd)
1136 {
1137         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1138
1139         switch (cmd) {
1140         case SNDRV_PCM_TRIGGER_START:
1141                 if (!RME32_ISWORKING(rme32)) {
1142                         if (substream != rme32->capture_substream) {
1143                                 return -EBUSY;
1144                         }
1145                         snd_rme32_capture_start(rme32, 0);
1146                 }
1147                 break;
1148
1149         case SNDRV_PCM_TRIGGER_STOP:
1150                 if (RME32_ISWORKING(rme32)) {
1151                         if (substream != rme32->capture_substream) {
1152                                 return -EBUSY;
1153                         }
1154                         snd_rme32_capture_stop(rme32);
1155                 }
1156                 break;
1157
1158         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1159                 if (RME32_ISWORKING(rme32)) {
1160                         snd_rme32_capture_stop(rme32);
1161                 }
1162                 break;
1163
1164         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1165                 if (!RME32_ISWORKING(rme32)) {
1166                         snd_rme32_capture_start(rme32, 1);
1167                 }
1168                 break;
1169
1170         default:
1171                 return -EINVAL;
1172         }
1173
1174         return 0;
1175 }
1176
1177 static snd_pcm_uframes_t
1178 snd_rme32_playback_pointer(snd_pcm_substream_t * substream)
1179 {
1180         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1181         snd_pcm_runtime_t *runtime = substream->runtime;
1182         snd_pcm_sframes_t diff;
1183         size_t bytes;
1184
1185
1186         if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) {
1187                 diff = runtime->control->appl_ptr -
1188                        rme32->playback_last_appl_ptr;
1189                 rme32->playback_last_appl_ptr = runtime->control->appl_ptr;
1190                 if (diff != 0 && diff < -(snd_pcm_sframes_t) (runtime->boundary >> 1)) {
1191                         diff += runtime->boundary;
1192                 }
1193                 bytes = diff << rme32->playback_frlog;
1194                 if (bytes > RME32_BUFFER_SIZE - rme32->playback_ptr) {
1195                         memcpy_toio((void *)(rme32->iobase + RME32_IO_DATA_BUFFER + rme32->playback_ptr),
1196                                     runtime->dma_area + rme32->playback_ptr,
1197                                     RME32_BUFFER_SIZE - rme32->playback_ptr);
1198                         bytes -= RME32_BUFFER_SIZE - rme32->playback_ptr;
1199                         if (bytes > RME32_BUFFER_SIZE) {
1200                                 bytes = RME32_BUFFER_SIZE;
1201                         }
1202                         memcpy_toio((void *)(rme32->iobase + RME32_IO_DATA_BUFFER),
1203                                     runtime->dma_area, bytes);
1204                         rme32->playback_ptr = bytes;
1205                 } else if (bytes != 0) {
1206                         memcpy_toio((void *)(rme32->iobase + RME32_IO_DATA_BUFFER + rme32->playback_ptr),
1207                                     runtime->dma_area + rme32->playback_ptr, bytes);
1208                         rme32->playback_ptr += bytes;
1209                 }
1210         }
1211         return snd_rme32_playback_ptr(rme32);
1212 }
1213
1214 static snd_pcm_uframes_t
1215 snd_rme32_capture_pointer(snd_pcm_substream_t * substream)
1216 {
1217         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1218         snd_pcm_runtime_t *runtime = substream->runtime;
1219         snd_pcm_uframes_t frameptr;
1220         size_t ptr;
1221
1222         frameptr = snd_rme32_capture_ptr(rme32);
1223         if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) {
1224                 ptr = frameptr << rme32->capture_frlog;
1225                 if (ptr > rme32->capture_ptr) {
1226                         memcpy_fromio(runtime->dma_area + rme32->capture_ptr,
1227                                       (void *)(rme32->iobase + RME32_IO_DATA_BUFFER +
1228                                                rme32->capture_ptr),
1229                                       ptr - rme32->capture_ptr);
1230                         rme32->capture_ptr += ptr - rme32->capture_ptr;
1231                 } else if (ptr < rme32->capture_ptr) {
1232                         memcpy_fromio(runtime->dma_area + rme32->capture_ptr,
1233                                       (void *)(rme32->iobase + RME32_IO_DATA_BUFFER +
1234                                                rme32->capture_ptr),
1235                                       RME32_BUFFER_SIZE - rme32->capture_ptr);
1236                         memcpy_fromio(runtime->dma_area,
1237                                       (void *)(rme32->iobase + RME32_IO_DATA_BUFFER),
1238                                       ptr);
1239                         rme32->capture_ptr = ptr;
1240                 }
1241         }
1242         return frameptr;
1243 }
1244
1245 static snd_pcm_ops_t snd_rme32_playback_spdif_ops = {
1246         .open =         snd_rme32_playback_spdif_open,
1247         .close =        snd_rme32_playback_close,
1248         .ioctl =        snd_pcm_lib_ioctl,
1249         .hw_params =    snd_rme32_playback_hw_params,
1250         .hw_free =      snd_rme32_playback_hw_free,
1251         .prepare =      snd_rme32_playback_prepare,
1252         .trigger =      snd_rme32_playback_trigger,
1253         .pointer =      snd_rme32_playback_pointer,
1254         .copy =         snd_rme32_playback_copy,
1255         .silence =      snd_rme32_playback_silence,
1256 };
1257
1258 static snd_pcm_ops_t snd_rme32_capture_spdif_ops = {
1259         .open =         snd_rme32_capture_spdif_open,
1260         .close =        snd_rme32_capture_close,
1261         .ioctl =        snd_pcm_lib_ioctl,
1262         .hw_params =    snd_rme32_capture_hw_params,
1263         .hw_free =      snd_rme32_capture_hw_free,
1264         .prepare =      snd_rme32_capture_prepare,
1265         .trigger =      snd_rme32_capture_trigger,
1266         .pointer =      snd_rme32_capture_pointer,
1267         .copy =         snd_rme32_capture_copy,
1268 };
1269
1270 static snd_pcm_ops_t snd_rme32_playback_adat_ops = {
1271         .open =         snd_rme32_playback_adat_open,
1272         .close =        snd_rme32_playback_close,
1273         .ioctl =        snd_pcm_lib_ioctl,
1274         .hw_params =    snd_rme32_playback_hw_params,
1275         .hw_free =      snd_rme32_playback_hw_free,
1276         .prepare =      snd_rme32_playback_prepare,
1277         .trigger =      snd_rme32_playback_trigger,
1278         .pointer =      snd_rme32_playback_pointer,
1279         .copy =         snd_rme32_playback_copy,
1280         .silence =      snd_rme32_playback_silence,
1281 };
1282
1283 static snd_pcm_ops_t snd_rme32_capture_adat_ops = {
1284         .open =         snd_rme32_capture_adat_open,
1285         .close =        snd_rme32_capture_close,
1286         .ioctl =        snd_pcm_lib_ioctl,
1287         .hw_params =    snd_rme32_capture_hw_params,
1288         .hw_free =      snd_rme32_capture_hw_free,
1289         .prepare =      snd_rme32_capture_prepare,
1290         .trigger =      snd_rme32_capture_trigger,
1291         .pointer =      snd_rme32_capture_pointer,
1292         .copy =         snd_rme32_capture_copy,
1293 };
1294
1295 static void snd_rme32_free(void *private_data)
1296 {
1297         rme32_t *rme32 = (rme32_t *) private_data;
1298
1299         if (rme32 == NULL) {
1300                 return;
1301         }
1302         if (rme32->irq >= 0) {
1303                 snd_rme32_playback_stop(rme32);
1304                 snd_rme32_capture_stop(rme32);
1305                 free_irq(rme32->irq, (void *) rme32);
1306                 rme32->irq = -1;
1307         }
1308         if (rme32->iobase) {
1309                 iounmap((void *) rme32->iobase);
1310                 rme32->iobase = 0;
1311         }
1312         if (rme32->res_port != NULL) {
1313                 release_resource(rme32->res_port);
1314                 rme32->res_port = NULL;
1315         }
1316 }
1317
1318 static void snd_rme32_free_spdif_pcm(snd_pcm_t * pcm)
1319 {
1320         rme32_t *rme32 = (rme32_t *) pcm->private_data;
1321         rme32->spdif_pcm = NULL;
1322         snd_pcm_lib_preallocate_free_for_all(pcm);
1323 }
1324
1325 static void
1326 snd_rme32_free_adat_pcm(snd_pcm_t *pcm)
1327 {
1328         rme32_t *rme32 = (rme32_t *) pcm->private_data;
1329         rme32->adat_pcm = NULL;
1330         snd_pcm_lib_preallocate_free_for_all(pcm);
1331 }
1332
1333 static int __devinit snd_rme32_create(rme32_t * rme32)
1334 {
1335         struct pci_dev *pci = rme32->pci;
1336         int err;
1337
1338         rme32->irq = -1;
1339
1340         if ((err = pci_enable_device(pci)) < 0)
1341                 return err;
1342
1343         rme32->port = pci_resource_start(rme32->pci, 0);
1344
1345         if ((rme32->res_port = request_mem_region(rme32->port, RME32_IO_SIZE, "RME32")) == NULL) {
1346                 snd_printk("unable to grab memory region 0x%lx-0x%lx\n",
1347                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1348                 return -EBUSY;
1349         }
1350
1351         if (request_irq(pci->irq, snd_rme32_interrupt, SA_INTERRUPT | SA_SHIRQ, "RME32", (void *) rme32)) {
1352                 snd_printk("unable to grab IRQ %d\n", pci->irq);
1353                 return -EBUSY;
1354         }
1355         rme32->irq = pci->irq;
1356
1357         spin_lock_init(&rme32->lock);
1358         if ((rme32->iobase = (unsigned long) ioremap_nocache(rme32->port, RME32_IO_SIZE)) == 0) {
1359                 snd_printk("unable to remap memory region 0x%lx-0x%lx\n",
1360                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1361                 return -ENOMEM;
1362         }
1363
1364         /* read the card's revision number */
1365         pci_read_config_byte(pci, 8, &rme32->rev);
1366
1367         /* set up ALSA pcm device for S/PDIF */
1368         if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1369                 return err;
1370         }
1371         rme32->spdif_pcm->private_data = rme32;
1372         rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1373         strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1374         snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1375                         &snd_rme32_playback_spdif_ops);
1376         snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1377                         &snd_rme32_capture_spdif_ops);
1378
1379         rme32->spdif_pcm->info_flags = 0;
1380
1381         snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm,
1382                                               SNDRV_DMA_TYPE_CONTINUOUS,
1383                                               snd_dma_continuous_data(GFP_KERNEL),
1384                                               RME32_BUFFER_SIZE,
1385                                               RME32_BUFFER_SIZE);
1386
1387         /* set up ALSA pcm device for ADAT */
1388         if ((pci->device == PCI_DEVICE_ID_DIGI32) ||
1389             (pci->device == PCI_DEVICE_ID_DIGI32_PRO)) {
1390                 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1391                 rme32->adat_pcm = NULL;
1392         }
1393         else {
1394                 if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1395                                        1, 1, &rme32->adat_pcm)) < 0)
1396                 {
1397                         return err;
1398                 }
1399                 rme32->adat_pcm->private_data = rme32;
1400                 rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1401                 strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1402                 snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1403                                 &snd_rme32_playback_adat_ops);
1404                 snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1405                                 &snd_rme32_capture_adat_ops);
1406
1407                 rme32->adat_pcm->info_flags = 0;
1408
1409                 snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm,
1410                                                       SNDRV_DMA_TYPE_CONTINUOUS,
1411                                                       snd_dma_continuous_data(GFP_KERNEL),
1412                                                       RME32_BUFFER_SIZE,
1413                                                       RME32_BUFFER_SIZE);
1414         }
1415
1416
1417         rme32->playback_periodsize = 0;
1418         rme32->capture_periodsize = 0;
1419
1420         /* make sure playback/capture is stopped, if by some reason active */
1421         snd_rme32_playback_stop(rme32);
1422         snd_rme32_capture_stop(rme32);
1423
1424         /* reset DAC */
1425         snd_rme32_reset_dac(rme32);
1426
1427         /* reset buffer pointer */
1428         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1429
1430         /* set default values in registers */
1431         rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1432                 RME32_WCR_INP_0 | /* input select */
1433                 RME32_WCR_MUTE;  /* muting on */
1434         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1435
1436
1437         /* init switch interface */
1438         if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1439                 return err;
1440         }
1441
1442         /* init proc interface */
1443         snd_rme32_proc_init(rme32);
1444
1445         rme32->capture_substream = NULL;
1446         rme32->playback_substream = NULL;
1447
1448         return 0;
1449 }
1450
1451 /*
1452  * proc interface
1453  */
1454
1455 static void
1456 snd_rme32_proc_read(snd_info_entry_t * entry, snd_info_buffer_t * buffer)
1457 {
1458         int n;
1459         rme32_t *rme32 = (rme32_t *) entry->private_data;
1460
1461         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1462
1463         snd_iprintf(buffer, rme32->card->longname);
1464         snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1465
1466         snd_iprintf(buffer, "\nGeneral settings\n");
1467         if (RME32_PRO_WITH_8414(rme32)) {
1468                 snd_iprintf(buffer, "  receiver: CS8414\n");
1469         } else {
1470                 snd_iprintf(buffer, "  receiver: CS8412\n");
1471         }
1472         if (rme32->wcreg & RME32_WCR_MODE24) {
1473                 snd_iprintf(buffer, "  format: 24 bit");
1474         } else {
1475                 snd_iprintf(buffer, "  format: 16 bit");
1476         }
1477         if (rme32->wcreg & RME32_WCR_MONO) {
1478                 snd_iprintf(buffer, ", Mono\n");
1479         } else {
1480                 snd_iprintf(buffer, ", Stereo\n");
1481         }
1482
1483         snd_iprintf(buffer, "\nInput settings\n");
1484         switch (snd_rme32_getinputtype(rme32)) {
1485         case RME32_INPUT_OPTICAL:
1486                 snd_iprintf(buffer, "  input: optical");
1487                 break;
1488         case RME32_INPUT_COAXIAL:
1489                 snd_iprintf(buffer, "  input: coaxial");
1490                 break;
1491         case RME32_INPUT_INTERNAL:
1492                 snd_iprintf(buffer, "  input: internal");
1493                 break;
1494         case RME32_INPUT_XLR:
1495                 snd_iprintf(buffer, "  input: XLR");
1496                 break;
1497         }
1498         if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1499                 snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1500         } else {
1501                 if (n) {
1502                         snd_iprintf(buffer, " (8 channels)\n");
1503                 } else {
1504                         snd_iprintf(buffer, " (2 channels)\n");
1505                 }
1506                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1507                             snd_rme32_capture_getrate(rme32, &n));
1508         }
1509
1510         snd_iprintf(buffer, "\nOutput settings\n");
1511         if (rme32->wcreg & RME32_WCR_SEL) {
1512                 snd_iprintf(buffer, "  output signal: normal playback");
1513         } else {
1514                 snd_iprintf(buffer, "  output signal: same as input");
1515         }
1516         if (rme32->wcreg & RME32_WCR_MUTE) {
1517                 snd_iprintf(buffer, " (muted)\n");
1518         } else {
1519                 snd_iprintf(buffer, "\n");
1520         }
1521
1522         /* master output frequency */
1523         if (!
1524             ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1525              && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1526                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1527                             snd_rme32_playback_getrate(rme32));
1528         }
1529         if (rme32->rcreg & RME32_RCR_KMODE) {
1530                 snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1531         } else {
1532                 snd_iprintf(buffer, "  sample clock source: Internal\n");
1533         }
1534         if (rme32->wcreg & RME32_WCR_PRO) {
1535                 snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1536         } else {
1537                 snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1538         }
1539         if (rme32->wcreg & RME32_WCR_EMP) {
1540                 snd_iprintf(buffer, "  emphasis: on\n");
1541         } else {
1542                 snd_iprintf(buffer, "  emphasis: off\n");
1543         }
1544 }
1545
1546 static void __devinit snd_rme32_proc_init(rme32_t * rme32)
1547 {
1548         snd_info_entry_t *entry;
1549
1550         if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1551                 snd_info_set_text_ops(entry, rme32, 1024, snd_rme32_proc_read);
1552 }
1553
1554 /*
1555  * control interface
1556  */
1557
1558 static int
1559 snd_rme32_info_loopback_control(snd_kcontrol_t * kcontrol,
1560                                 snd_ctl_elem_info_t * uinfo)
1561 {
1562         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1563         uinfo->count = 1;
1564         uinfo->value.integer.min = 0;
1565         uinfo->value.integer.max = 1;
1566         return 0;
1567 }
1568 static int
1569 snd_rme32_get_loopback_control(snd_kcontrol_t * kcontrol,
1570                                snd_ctl_elem_value_t * ucontrol)
1571 {
1572         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1573         unsigned long flags;
1574
1575         spin_lock_irqsave(&rme32->lock, flags);
1576         ucontrol->value.integer.value[0] =
1577             rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1578         spin_unlock_irqrestore(&rme32->lock, flags);
1579         return 0;
1580 }
1581 static int
1582 snd_rme32_put_loopback_control(snd_kcontrol_t * kcontrol,
1583                                snd_ctl_elem_value_t * ucontrol)
1584 {
1585         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1586         unsigned long flags;
1587         unsigned int val;
1588         int change;
1589
1590         val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1591         spin_lock_irqsave(&rme32->lock, flags);
1592         val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1593         change = val != rme32->wcreg;
1594         if (ucontrol->value.integer.value[0])
1595                 val &= ~RME32_WCR_MUTE;
1596         else
1597                 val |= RME32_WCR_MUTE;
1598         writel(rme32->wcreg =
1599                val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1600         spin_unlock_irqrestore(&rme32->lock, flags);
1601         return change;
1602 }
1603
1604 static int
1605 snd_rme32_info_inputtype_control(snd_kcontrol_t * kcontrol,
1606                                  snd_ctl_elem_info_t * uinfo)
1607 {
1608         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1609         static char *texts[4] = { "Optical", "Coaxial", "Internal", "XLR" };
1610
1611         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1612         uinfo->count = 1;
1613         switch (rme32->pci->device) {
1614         case PCI_DEVICE_ID_DIGI32:
1615         case PCI_DEVICE_ID_DIGI32_8:
1616                 uinfo->value.enumerated.items = 3;
1617                 break;
1618         case PCI_DEVICE_ID_DIGI32_PRO:
1619                 uinfo->value.enumerated.items = 4;
1620                 break;
1621         default:
1622                 snd_BUG();
1623                 break;
1624         }
1625         if (uinfo->value.enumerated.item >
1626             uinfo->value.enumerated.items - 1) {
1627                 uinfo->value.enumerated.item =
1628                     uinfo->value.enumerated.items - 1;
1629         }
1630         strcpy(uinfo->value.enumerated.name,
1631                texts[uinfo->value.enumerated.item]);
1632         return 0;
1633 }
1634 static int
1635 snd_rme32_get_inputtype_control(snd_kcontrol_t * kcontrol,
1636                                 snd_ctl_elem_value_t * ucontrol)
1637 {
1638         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1639         unsigned long flags;
1640         unsigned int items = 3;
1641
1642         spin_lock_irqsave(&rme32->lock, flags);
1643         ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1644
1645         switch (rme32->pci->device) {
1646         case PCI_DEVICE_ID_DIGI32:
1647         case PCI_DEVICE_ID_DIGI32_8:
1648                 items = 3;
1649                 break;
1650         case PCI_DEVICE_ID_DIGI32_PRO:
1651                 items = 4;
1652                 break;
1653         default:
1654                 snd_BUG();
1655                 break;
1656         }
1657         if (ucontrol->value.enumerated.item[0] >= items) {
1658                 ucontrol->value.enumerated.item[0] = items - 1;
1659         }
1660
1661         spin_unlock_irqrestore(&rme32->lock, flags);
1662         return 0;
1663 }
1664 static int
1665 snd_rme32_put_inputtype_control(snd_kcontrol_t * kcontrol,
1666                                 snd_ctl_elem_value_t * ucontrol)
1667 {
1668         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1669         unsigned long flags;
1670         unsigned int val;
1671         int change, items = 3;
1672
1673         switch (rme32->pci->device) {
1674         case PCI_DEVICE_ID_DIGI32:
1675         case PCI_DEVICE_ID_DIGI32_8:
1676                 items = 3;
1677                 break;
1678         case PCI_DEVICE_ID_DIGI32_PRO:
1679                 items = 4;
1680                 break;
1681         default:
1682                 snd_BUG();
1683                 break;
1684         }
1685         val = ucontrol->value.enumerated.item[0] % items;
1686
1687         spin_lock_irqsave(&rme32->lock, flags);
1688         change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1689         snd_rme32_setinputtype(rme32, val);
1690         spin_unlock_irqrestore(&rme32->lock, flags);
1691         return change;
1692 }
1693
1694 static int
1695 snd_rme32_info_clockmode_control(snd_kcontrol_t * kcontrol,
1696                                  snd_ctl_elem_info_t * uinfo)
1697 {
1698         static char *texts[4] = { "AutoSync",
1699                                   "Internal 32.0kHz",
1700                                   "Internal 44.1kHz",
1701                                   "Internal 48.0kHz" };
1702
1703         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1704         uinfo->count = 1;
1705         uinfo->value.enumerated.items = 4;
1706         if (uinfo->value.enumerated.item > 3) {
1707                 uinfo->value.enumerated.item = 3;
1708         }
1709         strcpy(uinfo->value.enumerated.name,
1710                texts[uinfo->value.enumerated.item]);
1711         return 0;
1712 }
1713 static int
1714 snd_rme32_get_clockmode_control(snd_kcontrol_t * kcontrol,
1715                                 snd_ctl_elem_value_t * ucontrol)
1716 {
1717         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1718         unsigned long flags;
1719
1720         spin_lock_irqsave(&rme32->lock, flags);
1721         ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1722         spin_unlock_irqrestore(&rme32->lock, flags);
1723         return 0;
1724 }
1725 static int
1726 snd_rme32_put_clockmode_control(snd_kcontrol_t * kcontrol,
1727                                 snd_ctl_elem_value_t * ucontrol)
1728 {
1729         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1730         unsigned long flags;
1731         unsigned int val;
1732         int change;
1733
1734         val = ucontrol->value.enumerated.item[0] % 3;
1735         spin_lock_irqsave(&rme32->lock, flags);
1736         change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1737         snd_rme32_setclockmode(rme32, val);
1738         spin_unlock_irqrestore(&rme32->lock, flags);
1739         return change;
1740 }
1741
1742 static u32 snd_rme32_convert_from_aes(snd_aes_iec958_t * aes)
1743 {
1744         u32 val = 0;
1745         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1746         if (val & RME32_WCR_PRO)
1747                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1748         else
1749                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1750         return val;
1751 }
1752
1753 static void snd_rme32_convert_to_aes(snd_aes_iec958_t * aes, u32 val)
1754 {
1755         aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1756         if (val & RME32_WCR_PRO)
1757                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1758         else
1759                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1760 }
1761
1762 static int snd_rme32_control_spdif_info(snd_kcontrol_t * kcontrol,
1763                                         snd_ctl_elem_info_t * uinfo)
1764 {
1765         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1766         uinfo->count = 1;
1767         return 0;
1768 }
1769
1770 static int snd_rme32_control_spdif_get(snd_kcontrol_t * kcontrol,
1771                                        snd_ctl_elem_value_t * ucontrol)
1772 {
1773         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1774
1775         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1776                                  rme32->wcreg_spdif);
1777         return 0;
1778 }
1779
1780 static int snd_rme32_control_spdif_put(snd_kcontrol_t * kcontrol,
1781                                        snd_ctl_elem_value_t * ucontrol)
1782 {
1783         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1784         unsigned long flags;
1785         int change;
1786         u32 val;
1787
1788         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1789         spin_lock_irqsave(&rme32->lock, flags);
1790         change = val != rme32->wcreg_spdif;
1791         rme32->wcreg_spdif = val;
1792         spin_unlock_irqrestore(&rme32->lock, flags);
1793         return change;
1794 }
1795
1796 static int snd_rme32_control_spdif_stream_info(snd_kcontrol_t * kcontrol,
1797                                                snd_ctl_elem_info_t * uinfo)
1798 {
1799         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1800         uinfo->count = 1;
1801         return 0;
1802 }
1803
1804 static int snd_rme32_control_spdif_stream_get(snd_kcontrol_t * kcontrol,
1805                                               snd_ctl_elem_value_t *
1806                                               ucontrol)
1807 {
1808         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1809
1810         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1811                                  rme32->wcreg_spdif_stream);
1812         return 0;
1813 }
1814
1815 static int snd_rme32_control_spdif_stream_put(snd_kcontrol_t * kcontrol,
1816                                               snd_ctl_elem_value_t *
1817                                               ucontrol)
1818 {
1819         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1820         unsigned long flags;
1821         int change;
1822         u32 val;
1823
1824         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1825         spin_lock_irqsave(&rme32->lock, flags);
1826         change = val != rme32->wcreg_spdif_stream;
1827         rme32->wcreg_spdif_stream = val;
1828         rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1829         writel(rme32->wcreg |= val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1830         spin_unlock_irqrestore(&rme32->lock, flags);
1831         return change;
1832 }
1833
1834 static int snd_rme32_control_spdif_mask_info(snd_kcontrol_t * kcontrol,
1835                                              snd_ctl_elem_info_t * uinfo)
1836 {
1837         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1838         uinfo->count = 1;
1839         return 0;
1840 }
1841
1842 static int snd_rme32_control_spdif_mask_get(snd_kcontrol_t * kcontrol,
1843                                             snd_ctl_elem_value_t *
1844                                             ucontrol)
1845 {
1846         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1847         return 0;
1848 }
1849
1850 static snd_kcontrol_new_t snd_rme32_controls[] = {
1851         {
1852                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1853                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1854                 .info = snd_rme32_control_spdif_info,
1855                 .get =  snd_rme32_control_spdif_get,
1856                 .put =  snd_rme32_control_spdif_put
1857         },
1858         {
1859                 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1860                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1861                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1862                 .info = snd_rme32_control_spdif_stream_info,
1863                 .get =  snd_rme32_control_spdif_stream_get,
1864                 .put =  snd_rme32_control_spdif_stream_put
1865         },
1866         {
1867                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1868                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1869                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1870                 .info = snd_rme32_control_spdif_mask_info,
1871                 .get =  snd_rme32_control_spdif_mask_get,
1872                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1873         },
1874         {
1875                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1876                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1877                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1878                 .info = snd_rme32_control_spdif_mask_info,
1879                 .get =  snd_rme32_control_spdif_mask_get,
1880                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1881         },
1882         {
1883                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1884                 .name = "Input Connector",
1885                 .info = snd_rme32_info_inputtype_control,
1886                 .get =  snd_rme32_get_inputtype_control,
1887                 .put =  snd_rme32_put_inputtype_control
1888         },
1889         {
1890                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1891                 .name = "Loopback Input",
1892                 .info = snd_rme32_info_loopback_control,
1893                 .get =  snd_rme32_get_loopback_control,
1894                 .put =  snd_rme32_put_loopback_control
1895         },
1896         {
1897                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1898                 .name = "Sample Clock Source",
1899                 .info = snd_rme32_info_clockmode_control,
1900                 .get =  snd_rme32_get_clockmode_control,
1901                 .put =  snd_rme32_put_clockmode_control
1902         }
1903 };
1904
1905 static int snd_rme32_create_switches(snd_card_t * card, rme32_t * rme32)
1906 {
1907         int idx, err;
1908         snd_kcontrol_t *kctl;
1909
1910         for (idx = 0; idx < 7; idx++) {
1911                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1912                         return err;
1913                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1914                         rme32->spdif_ctl = kctl;
1915         }
1916
1917         return 0;
1918 }
1919
1920 /*
1921  * Card initialisation
1922  */
1923
1924 static void snd_rme32_card_free(snd_card_t * card)
1925 {
1926         snd_rme32_free(card->private_data);
1927 }
1928
1929 static int __devinit
1930 snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1931 {
1932         static int dev;
1933         rme32_t *rme32;
1934         snd_card_t *card;
1935         int err;
1936
1937         for (; dev < SNDRV_CARDS; dev++) {
1938                 if (!enable[dev]) {
1939                         dev++;
1940                         return -ENOENT;
1941                 }
1942                 break;
1943         }
1944         if (dev >= SNDRV_CARDS) {
1945                 return -ENODEV;
1946         }
1947         if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1948                                  sizeof(rme32_t))) == NULL)
1949                 return -ENOMEM;
1950         card->private_free = snd_rme32_card_free;
1951         rme32 = (rme32_t *) card->private_data;
1952         rme32->card = card;
1953         rme32->pci = pci;
1954         snd_card_set_dev(card, &pci->dev);
1955         if ((err = snd_rme32_create(rme32)) < 0) {
1956                 snd_card_free(card);
1957                 return err;
1958         }
1959
1960         strcpy(card->driver, "Digi32");
1961         switch (rme32->pci->device) {
1962         case PCI_DEVICE_ID_DIGI32:
1963                 strcpy(card->shortname, "RME Digi32");
1964                 break;
1965         case PCI_DEVICE_ID_DIGI32_8:
1966                 strcpy(card->shortname, "RME Digi32/8");
1967                 break;
1968         case PCI_DEVICE_ID_DIGI32_PRO:
1969                 strcpy(card->shortname, "RME Digi32 PRO");
1970                 break;
1971         }
1972         sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1973                 card->shortname, rme32->rev, rme32->port, rme32->irq);
1974
1975         if ((err = snd_card_register(card)) < 0) {
1976                 snd_card_free(card);
1977                 return err;
1978         }
1979         pci_set_drvdata(pci, card);
1980         dev++;
1981         return 0;
1982 }
1983
1984 static void __devexit snd_rme32_remove(struct pci_dev *pci)
1985 {
1986         snd_card_free(pci_get_drvdata(pci));
1987         pci_set_drvdata(pci, NULL);
1988 }
1989
1990 static struct pci_driver driver = {
1991         .name =         "RME Digi32",
1992         .id_table =     snd_rme32_ids,
1993         .probe =        snd_rme32_probe,
1994         .remove =       __devexit_p(snd_rme32_remove),
1995 };
1996
1997 static int __init alsa_card_rme32_init(void)
1998 {
1999         return pci_module_init(&driver);
2000 }
2001
2002 static void __exit alsa_card_rme32_exit(void)
2003 {
2004         pci_unregister_driver(&driver);
2005 }
2006
2007 module_init(alsa_card_rme32_init)
2008 module_exit(alsa_card_rme32_exit)