sound/pci/rme32.c

   1 /*
   2  *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   3  *
   4  *      Copyright (c) 2002, 2003 Martin Langer <martin-langer@gmx.de>
   5  *
   6  *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   7  *                         Henk Hesselink <henk@anda.nl>
   8  *                         for writing the digi96-driver
   9  *                         and RME for all informations.
  10  *
  11  *   This program is free software; you can redistribute it and/or modify
  12  *   it under the terms of the GNU General Public License as published by
  13  *   the Free Software Foundation; either version 2 of the License, or
  14  *   (at your option) any later version.
  15  *
  16  *   This program is distributed in the hope that it will be useful,
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *   GNU General Public License for more details.
  20  *
  21  *   You should have received a copy of the GNU General Public License
  22  *   along with this program; if not, write to the Free Software
  23  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  *
  26  * ****************************************************************************
  27  *
  28  * Note #1 "Sek'd models" ................................... martin 2002-12-07
  29  *
  30  * Identical soundcards by Sek'd were labeled:
  31  * RME Digi 32     = Sek'd Prodif 32
  32  * RME Digi 32 Pro = Sek'd Prodif 96
  33  * RME Digi 32/8   = Sek'd Prodif Gold
  34  *
  35  * ****************************************************************************
  36  *
  37  * Note #2 "full duplex mode" ............................... martin 2002-12-07
  38  *
  39  * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  40  * in this mode. Rec data and play data are using the same buffer therefore. At
  41  * first you have got the playing bits in the buffer and then (after playing
  42  * them) they were overwitten by the captured sound of the CS8412/14. Both
  43  * modes (play/record) are running harmonically hand in hand in the same buffer
  44  * and you have only one start bit plus one interrupt bit to control this
  45  * paired action.
  46  * This is opposite to the latter rme96 where playing and capturing is totally
  47  * separated and so their full duplex mode is supported by alsa (using two
  48  * start bits and two interrupts for two different buffers).
  49  * But due to the wrong sequence of playing and capturing ALSA shows no solved
  50  * full duplex support for the rme32 at the moment. That's bad, but I'm not
  51  * able to solve it. Are you motivated enough to solve this problem now? Your
  52  * patch would be welcome!
  53  *
  54  * ****************************************************************************
  55  */
  56
  57
  58 #include <sound/driver.h>
  59 #include <linux/delay.h>
  60 #include <linux/init.h>
  61 #include <linux/interrupt.h>
  62 #include <linux/pci.h>
  63 #include <linux/slab.h>
  64
  65 #include <sound/core.h>
  66 #include <sound/info.h>
  67 #include <sound/control.h>
  68 #include <sound/pcm.h>
  69 #include <sound/pcm_params.h>
  70 #include <sound/asoundef.h>
  71 #define SNDRV_GET_ID
  72 #include <sound/initval.h>
  73
  74 #include <asm/io.h>
  75
  76 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  77 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  78 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  79
  80 MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
  81 MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  82 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
  83 MODULE_PARM(id, "1-" __MODULE_STRING(SNDRV_CARDS) "s");
  84 MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
  85 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
  86 MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
  87 MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
  88 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
  89 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>");
  90 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
  91 MODULE_LICENSE("GPL");
  92 MODULE_CLASSES("{sound}");
  93 MODULE_DEVICES("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
  94
  95 /* Defines for RME Digi32 series */
  96 #define RME32_SPDIF_NCHANNELS 2
  97
  98 /* Playback and capture buffer size */
  99 #define RME32_BUFFER_SIZE 0x20000
 100
 101 /* IO area size */
 102 #define RME32_IO_SIZE 0x30000
 103
 104 /* IO area offsets */
 105 #define RME32_IO_DATA_BUFFER        0x0
 106 #define RME32_IO_CONTROL_REGISTER   0x20000
 107 #define RME32_IO_GET_POS            0x20000
 108 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 109 #define RME32_IO_RESET_POS          0x20100
 110
 111 /* Write control register bits */
 112 #define RME32_WCR_START     (1 << 0)    /* startbit */
 113 #define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 114                                            Setting the whole card to mono
 115                                            doesn't seem to be very useful.
 116                                            A software-solution can handle
 117                                            full-duplex with one direction in
 118                                            stereo and the other way in mono.
 119                                            So, the hardware should work all
 120                                            the time in stereo! */
 121 #define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 122 #define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 123 #define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 124 #define RME32_WCR_FREQ_1    (1 << 5)
 125 #define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 126 #define RME32_WCR_INP_1     (1 << 7)
 127 #define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 128 #define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 129 #define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 130 #define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 131 #define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 132 #define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 133 #define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 134 #define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 135
 136 #define RME32_WCR_BITPOS_FREQ_0 4
 137 #define RME32_WCR_BITPOS_FREQ_1 5
 138 #define RME32_WCR_BITPOS_INP_0 6
 139 #define RME32_WCR_BITPOS_INP_1 7
 140
 141 /* Read control register bits */
 142 #define RME32_RCR_AUDIO_ADDR_MASK 0x10001
 143 #define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 144 #define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 145 #define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 146 #define RME32_RCR_FREQ_1    (1 << 28)
 147 #define RME32_RCR_FREQ_2    (1 << 29)
 148 #define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 149 #define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 150
 151 #define RME32_RCR_BITPOS_F0 27
 152 #define RME32_RCR_BITPOS_F1 28
 153 #define RME32_RCR_BITPOS_F2 29
 154
 155 /* Input types */
 156 #define RME32_INPUT_OPTICAL 0
 157 #define RME32_INPUT_COAXIAL 1
 158 #define RME32_INPUT_INTERNAL 2
 159 #define RME32_INPUT_XLR 3
 160
 161 /* Clock modes */
 162 #define RME32_CLOCKMODE_SLAVE 0
 163 #define RME32_CLOCKMODE_MASTER_32 1
 164 #define RME32_CLOCKMODE_MASTER_44 2
 165 #define RME32_CLOCKMODE_MASTER_48 3
 166
 167 /* Block sizes in bytes */
 168 #define RME32_BLOCK_SIZE 8192
 169
 170 /* Hardware revisions */
 171 #define RME32_32_REVISION 192
 172 #define RME32_328_REVISION_OLD 100
 173 #define RME32_328_REVISION_NEW 101
 174 #define RME32_PRO_REVISION_WITH_8412 192
 175 #define RME32_PRO_REVISION_WITH_8414 150
 176
 177
 178 /* PCI vendor/device ID's */
 179 #ifndef PCI_VENDOR_ID_XILINX_RME
 180 # define PCI_VENDOR_ID_XILINX_RME 0xea60
 181 #endif
 182 #ifndef PCI_DEVICE_ID_DIGI32
 183 # define PCI_DEVICE_ID_DIGI32 0x9896
 184 #endif
 185 #ifndef PCI_DEVICE_ID_DIGI32_PRO
 186 # define PCI_DEVICE_ID_DIGI32_PRO 0x9897
 187 #endif
 188 #ifndef PCI_DEVICE_ID_DIGI32_8
 189 # define PCI_DEVICE_ID_DIGI32_8 0x9898
 190 #endif
 191
 192 typedef struct snd_rme32 {
 193         spinlock_t lock;
 194         int irq;
 195         unsigned long port;
 196         struct resource *res_port;
 197         unsigned long iobase;
 198
 199         u32 wcreg;              /* cached write control register value */
 200         u32 wcreg_spdif;        /* S/PDIF setup */
 201         u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 202         u32 rcreg;              /* cached read control register value */
 203
 204         u8 rev;                 /* card revision number */
 205
 206         snd_pcm_substream_t *playback_substream;
 207         snd_pcm_substream_t *capture_substream;
 208
 209         int playback_frlog;     /* log2 of framesize */
 210         int capture_frlog;
 211
 212         size_t playback_periodsize;     /* in bytes, zero if not used */
 213         size_t capture_periodsize;      /* in bytes, zero if not used */
 214
 215         snd_pcm_uframes_t playback_last_appl_ptr;
 216         size_t playback_ptr;
 217         size_t capture_ptr;
 218
 219         snd_card_t *card;
 220         snd_pcm_t *spdif_pcm;
 221         snd_pcm_t *adat_pcm;
 222         struct pci_dev *pci;
 223         snd_kcontrol_t *spdif_ctl;
 224 } rme32_t;
 225
 226 static struct pci_device_id snd_rme32_ids[] = {
 227         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32,
 228          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 229         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32_8,
 230          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 231         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32_PRO,
 232          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 233         {0,}
 234 };
 235
 236 MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 237
 238 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 239 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 240
 241 static int snd_rme32_playback_prepare(snd_pcm_substream_t * substream);
 242
 243 static int snd_rme32_capture_prepare(snd_pcm_substream_t * substream);
 244
 245 static int
 246 snd_rme32_playback_trigger(snd_pcm_substream_t * substream, int cmd);
 247
 248 static int
 249 snd_rme32_capture_trigger(snd_pcm_substream_t * substream, int cmd);
 250
 251 static snd_pcm_uframes_t
 252 snd_rme32_playback_pointer(snd_pcm_substream_t * substream);
 253
 254 static snd_pcm_uframes_t
 255 snd_rme32_capture_pointer(snd_pcm_substream_t * substream);
 256
 257 static void snd_rme32_proc_init(rme32_t * rme32);
 258
 259 static int snd_rme32_create_switches(snd_card_t * card, rme32_t * rme32);
 260
 261 static inline unsigned int snd_rme32_playback_ptr(rme32_t * rme32)
 262 {
 263
 264         return (readl(rme32->iobase + RME32_IO_GET_POS)
 265                 & RME32_RCR_AUDIO_ADDR_MASK) >> rme32->playback_frlog;
 266 }
 267
 268 static inline unsigned int snd_rme32_capture_ptr(rme32_t * rme32)
 269 {
 270         return (readl(rme32->iobase + RME32_IO_GET_POS)
 271                 & RME32_RCR_AUDIO_ADDR_MASK) >> rme32->capture_frlog;
 272 }
 273
 274 static int snd_rme32_ratecode(int rate)
 275 {
 276         switch (rate) {
 277         case 32000: return SNDRV_PCM_RATE_32000;
 278         case 44100: return SNDRV_PCM_RATE_44100;
 279         case 48000: return SNDRV_PCM_RATE_48000;
 280         case 64000: return SNDRV_PCM_RATE_64000;
 281         case 88200: return SNDRV_PCM_RATE_88200;
 282         case 96000: return SNDRV_PCM_RATE_96000;
 283         }
 284         return 0;
 285 }
 286
 287 static int snd_rme32_playback_silence(snd_pcm_substream_t * substream, int channel,     /* not used (interleaved data) */
 288                                       snd_pcm_uframes_t pos,
 289                                       snd_pcm_uframes_t count)
 290 {
 291         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 292         count <<= rme32->playback_frlog;
 293         pos <<= rme32->playback_frlog;
 294         memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 295         return 0;
 296 }
 297
 298 static int snd_rme32_playback_copy(snd_pcm_substream_t * substream, int channel,        /* not used (interleaved data) */
 299                                    snd_pcm_uframes_t pos,
 300                                    void *src, snd_pcm_uframes_t count)
 301 {
 302         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 303         count <<= rme32->playback_frlog;
 304         pos <<= rme32->playback_frlog;
 305         if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 306                             src, count))
 307                 return -EFAULT;
 308         return 0;
 309 }
 310
 311 static int snd_rme32_capture_copy(snd_pcm_substream_t * substream, int channel, /* not used (interleaved data) */
 312                                   snd_pcm_uframes_t pos,
 313                                   void *dst, snd_pcm_uframes_t count)
 314 {
 315         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 316         count <<= rme32->capture_frlog;
 317         pos <<= rme32->capture_frlog;
 318         if (copy_to_user_fromio(dst,
 319                             rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 320                             count))
 321                 return -EFAULT;
 322         return 0;
 323 }
 324
 325 /*
 326  * Digital output capabilites (S/PDIF)
 327  */
 328 static snd_pcm_hardware_t snd_rme32_playback_spdif_info = {
 329         .info =         (SNDRV_PCM_INFO_MMAP |
 330                          SNDRV_PCM_INFO_MMAP_VALID |
 331                          SNDRV_PCM_INFO_INTERLEAVED |
 332                          SNDRV_PCM_INFO_PAUSE),
 333         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 334                          SNDRV_PCM_FMTBIT_S32_LE),
 335         .rates =        (SNDRV_PCM_RATE_32000 |
 336                          SNDRV_PCM_RATE_44100 |
 337                          SNDRV_PCM_RATE_48000),
 338         .rate_min =     32000,
 339         .rate_max =     48000,
 340         .channels_min = 2,
 341         .channels_max = 2,
 342         .buffer_bytes_max = RME32_BUFFER_SIZE,
 343         .period_bytes_min = RME32_BLOCK_SIZE,
 344         .period_bytes_max = RME32_BLOCK_SIZE,
 345         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 346         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 347         .fifo_size =    0,
 348 };
 349
 350 /*
 351  * Digital input capabilites (S/PDIF)
 352  */
 353 static snd_pcm_hardware_t snd_rme32_capture_spdif_info = {
 354         .info =         (SNDRV_PCM_INFO_MMAP |
 355                          SNDRV_PCM_INFO_MMAP_VALID |
 356                          SNDRV_PCM_INFO_INTERLEAVED |
 357                          SNDRV_PCM_INFO_PAUSE),
 358         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 359                          SNDRV_PCM_FMTBIT_S32_LE),
 360         .rates =        (SNDRV_PCM_RATE_32000 |
 361                          SNDRV_PCM_RATE_44100 |
 362                          SNDRV_PCM_RATE_48000),
 363         .rate_min =     32000,
 364         .rate_max =     48000,
 365         .channels_min = 2,
 366         .channels_max = 2,
 367         .buffer_bytes_max = RME32_BUFFER_SIZE,
 368         .period_bytes_min = RME32_BLOCK_SIZE,
 369         .period_bytes_max = RME32_BLOCK_SIZE,
 370         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 371         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 372         .fifo_size =    0,
 373 };
 374
 375 /*
 376  * Digital output capabilites (ADAT)
 377  */
 378 static snd_pcm_hardware_t snd_rme32_playback_adat_info =
 379 {
 380         .info =              (SNDRV_PCM_INFO_MMAP |
 381                               SNDRV_PCM_INFO_MMAP_VALID |
 382                               SNDRV_PCM_INFO_INTERLEAVED |
 383                               SNDRV_PCM_INFO_PAUSE),
 384         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 385         .rates =             (SNDRV_PCM_RATE_44100 |
 386                               SNDRV_PCM_RATE_48000),
 387         .rate_min =          44100,
 388         .rate_max =          48000,
 389         .channels_min =      8,
 390         .channels_max =      8,
 391         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 392         .period_bytes_min =  RME32_BLOCK_SIZE,
 393         .period_bytes_max =  RME32_BLOCK_SIZE,
 394         .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 395         .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 396         .fifo_size =        0,
 397 };
 398
 399 /*
 400  * Digital input capabilites (ADAT)
 401  */
 402 static snd_pcm_hardware_t snd_rme32_capture_adat_info =
 403 {
 404         .info =              (SNDRV_PCM_INFO_MMAP |
 405                               SNDRV_PCM_INFO_MMAP_VALID |
 406                               SNDRV_PCM_INFO_INTERLEAVED |
 407                               SNDRV_PCM_INFO_PAUSE),
 408         .formats =           SNDRV_PCM_FMTBIT_S16_LE,
 409         .rates =             (SNDRV_PCM_RATE_44100 |
 410                               SNDRV_PCM_RATE_48000),
 411         .rate_min =          44100,
 412         .rate_max =          48000,
 413         .channels_min =      8,
 414         .channels_max =      8,
 415         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 416         .period_bytes_min =  RME32_BLOCK_SIZE,
 417         .period_bytes_max =  RME32_BLOCK_SIZE,
 418         .periods_min =       RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 419         .periods_max =       RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 420         .fifo_size =         0,
 421 };
 422
 423 static void snd_rme32_reset_dac(rme32_t *rme32)
 424 {
 425         writel(rme32->wcreg | RME32_WCR_PD,
 426                rme32->iobase + RME32_IO_CONTROL_REGISTER);
 427         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 428 }
 429
 430 static int snd_rme32_playback_getrate(rme32_t * rme32)
 431 {
 432         int rate;
 433
 434         rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 435                (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 436         switch (rate) {
 437         case 1:
 438                 rate = 32000;
 439                 break;
 440         case 2:
 441                 rate = 44100;
 442                 break;
 443         case 3:
 444                 rate = 48000;
 445                 break;
 446         default:
 447                 return -1;
 448         }
 449         return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 450 }
 451
 452 static int snd_rme32_capture_getrate(rme32_t * rme32, int *is_adat)
 453 {
 454         int n;
 455
 456         *is_adat = 0;
 457         if (rme32->rcreg & RME32_RCR_LOCK) {
 458                 /* ADAT rate */
 459                 *is_adat = 1;
 460         }
 461         if (rme32->rcreg & RME32_RCR_ERF) {
 462                 return -1;
 463         }
 464
 465         /* S/PDIF rate */
 466         n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 467                 (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 468                 (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 469
 470         if (RME32_PRO_WITH_8414(rme32))
 471                 switch (n) {    /* supporting the CS8414 */
 472                 case 0:
 473                 case 1:
 474                 case 2:
 475                         return -1;
 476                 case 3:
 477                         return 96000;
 478                 case 4:
 479                         return 88200;
 480                 case 5:
 481                         return 48000;
 482                 case 6:
 483                         return 44100;
 484                 case 7:
 485                         return 32000;
 486                 default:
 487                         return -1;
 488                         break;
 489                 }
 490         else
 491                 switch (n) {    /* supporting the CS8412 */
 492                 case 0:
 493                         return -1;
 494                 case 1:
 495                         return 48000;
 496                 case 2:
 497                         return 44100;
 498                 case 3:
 499                         return 32000;
 500                 case 4:
 501                         return 48000;
 502                 case 5:
 503                         return 44100;
 504                 case 6:
 505                         return 44056;
 506                 case 7:
 507                         return 32000;
 508                 default:
 509                         break;
 510                 }
 511         return -1;
 512 }
 513
 514 static int snd_rme32_playback_setrate(rme32_t * rme32, int rate)
 515 {
 516         int ds;
 517
 518         ds = rme32->wcreg & RME32_WCR_DS_BM;
 519         switch (rate) {
 520         case 32000:
 521                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 522                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 523                         ~RME32_WCR_FREQ_1;
 524                 break;
 525         case 44100:
 526                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 527                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 528                         ~RME32_WCR_FREQ_0;
 529                 break;
 530         case 48000:
 531                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 532                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 533                         RME32_WCR_FREQ_1;
 534                 break;
 535         case 64000:
 536                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 537                         return -EINVAL;
 538                 rme32->wcreg |= RME32_WCR_DS_BM;
 539                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 540                         ~RME32_WCR_FREQ_1;
 541                 break;
 542         case 88200:
 543                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 544                         return -EINVAL;
 545                 rme32->wcreg |= RME32_WCR_DS_BM;
 546                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 547                         ~RME32_WCR_FREQ_0;
 548                 break;
 549         case 96000:
 550                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 551                         return -EINVAL;
 552                 rme32->wcreg |= RME32_WCR_DS_BM;
 553                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 554                         RME32_WCR_FREQ_1;
 555                 break;
 556         default:
 557                 return -EINVAL;
 558         }
 559         if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 560             (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 561         {
 562                 /* change to/from double-speed: reset the DAC (if available) */
 563                 snd_rme32_reset_dac(rme32);
 564         } else {
 565                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 566         }
 567         return 0;
 568 }
 569
 570 static int snd_rme32_setclockmode(rme32_t * rme32, int mode)
 571 {
 572         switch (mode) {
 573         case RME32_CLOCKMODE_SLAVE:
 574                 /* AutoSync */
 575                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
 576                         ~RME32_WCR_FREQ_1;
 577                 break;
 578         case RME32_CLOCKMODE_MASTER_32:
 579                 /* Internal 32.0kHz */
 580                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 581                         ~RME32_WCR_FREQ_1;
 582                 break;
 583         case RME32_CLOCKMODE_MASTER_44:
 584                 /* Internal 44.1kHz */
 585                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
 586                         RME32_WCR_FREQ_1;
 587                 break;
 588         case RME32_CLOCKMODE_MASTER_48:
 589                 /* Internal 48.0kHz */
 590                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 591                         RME32_WCR_FREQ_1;
 592                 break;
 593         default:
 594                 return -EINVAL;
 595         }
 596         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 597         return 0;
 598 }
 599
 600 static int snd_rme32_getclockmode(rme32_t * rme32)
 601 {
 602         return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 603             (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 604 }
 605
 606 static int snd_rme32_setinputtype(rme32_t * rme32, int type)
 607 {
 608         switch (type) {
 609         case RME32_INPUT_OPTICAL:
 610                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
 611                         ~RME32_WCR_INP_1;
 612                 break;
 613         case RME32_INPUT_COAXIAL:
 614                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
 615                         ~RME32_WCR_INP_1;
 616                 break;
 617         case RME32_INPUT_INTERNAL:
 618                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
 619                         RME32_WCR_INP_1;
 620                 break;
 621         case RME32_INPUT_XLR:
 622                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
 623                         RME32_WCR_INP_1;
 624                 break;
 625         default:
 626                 return -EINVAL;
 627         }
 628         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 629         return 0;
 630 }
 631
 632 static int snd_rme32_getinputtype(rme32_t * rme32)
 633 {
 634         return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 635             (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 636 }
 637
 638 static void
 639 snd_rme32_setframelog(rme32_t * rme32, int n_channels, int is_playback)
 640 {
 641         int frlog;
 642
 643         if (n_channels == 2) {
 644                 frlog = 1;
 645         } else {
 646                 /* assume 8 channels */
 647                 frlog = 3;
 648         }
 649         if (is_playback) {
 650                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 651                 rme32->playback_frlog = frlog;
 652         } else {
 653                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 654                 rme32->capture_frlog = frlog;
 655         }
 656 }
 657
 658 static int snd_rme32_setformat(rme32_t * rme32, int format)
 659 {
 660         switch (format) {
 661         case SNDRV_PCM_FORMAT_S16_LE:
 662                 rme32->wcreg &= ~RME32_WCR_MODE24;
 663                 break;
 664         case SNDRV_PCM_FORMAT_S32_LE:
 665                 rme32->wcreg |= RME32_WCR_MODE24;
 666                 break;
 667         default:
 668                 return -EINVAL;
 669         }
 670         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 671         return 0;
 672 }
 673
 674 static int
 675 snd_rme32_playback_hw_params(snd_pcm_substream_t * substream,
 676                              snd_pcm_hw_params_t * params)
 677 {
 678         int err, rate, dummy;
 679         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 680
 681         if ((err = snd_pcm_lib_malloc_pages(substream,
 682                                       params_buffer_bytes(params))) < 0)
 683                 return err;
 684         spin_lock_irq(&rme32->lock);
 685         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 686             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 687                 /* AutoSync */
 688                 if ((int)params_rate(params) != rate) {
 689                         spin_unlock_irq(&rme32->lock);
 690                         return -EIO;
 691                 }
 692         } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 693                 spin_unlock_irq(&rme32->lock);
 694                 return err;
 695         }
 696         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 697                 spin_unlock_irq(&rme32->lock);
 698                 return err;
 699         }
 700
 701         snd_rme32_setframelog(rme32, params_channels(params), 1);
 702         if (rme32->capture_periodsize != 0) {
 703                 if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 704                         spin_unlock_irq(&rme32->lock);
 705                         return -EBUSY;
 706                 }
 707         }
 708         rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 709         /* S/PDIF setup */
 710         if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 711                 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 712                 writel(rme32->wcreg |=
 713                        rme32->wcreg_spdif_stream,
 714                        rme32->iobase + RME32_IO_CONTROL_REGISTER);
 715         }
 716         spin_unlock_irq(&rme32->lock);
 717
 718         return 0;
 719 }
 720
 721 static int snd_rme32_playback_hw_free(snd_pcm_substream_t * substream)
 722 {
 723         snd_pcm_lib_free_pages(substream);
 724         return 0;
 725 }
 726
 727 static int
 728 snd_rme32_capture_hw_params(snd_pcm_substream_t * substream,
 729                             snd_pcm_hw_params_t * params)
 730 {
 731         unsigned long flags;
 732         int err, isadat, rate;
 733         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 734         snd_pcm_runtime_t *runtime = substream->runtime;
 735
 736         if ((err = snd_pcm_lib_malloc_pages(substream,
 737                                       params_buffer_bytes(params))) < 0)
 738                 return err;
 739         spin_lock_irqsave(&rme32->lock, flags);
 740         /* enable AutoSync for record-preparing */
 741         rme32->wcreg |= RME32_WCR_AUTOSYNC;
 742         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 743
 744         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 745                 spin_unlock_irqrestore(&rme32->lock, flags);
 746                 return err;
 747         }
 748         if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 749                 spin_unlock_irqrestore(&rme32->lock, flags);
 750                 return err;
 751         }
 752         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 753                 if ((int)params_rate(params) != rate) {
 754                         spin_unlock_irqrestore(&rme32->lock, flags);
 755                         return -EIO;
 756                 }
 757                 if ((isadat && runtime->hw.channels_min == 2) ||
 758                     (!isadat && runtime->hw.channels_min == 8)) {
 759                         spin_unlock_irqrestore(&rme32->lock, flags);
 760                         return -EIO;
 761                 }
 762         }
 763         /* AutoSync off for recording */
 764         rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 765         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 766
 767         snd_rme32_setframelog(rme32, params_channels(params), 0);
 768         if (rme32->playback_periodsize != 0) {
 769                 if (params_period_size(params) << rme32->capture_frlog !=
 770                     rme32->playback_periodsize) {
 771                         spin_unlock_irqrestore(&rme32->lock, flags);
 772                         return -EBUSY;
 773                 }
 774         }
 775         rme32->capture_periodsize =
 776             params_period_size(params) << rme32->capture_frlog;
 777         spin_unlock_irqrestore(&rme32->lock, flags);
 778
 779         return 0;
 780 }
 781
 782 static int snd_rme32_capture_hw_free(snd_pcm_substream_t * substream)
 783 {
 784         snd_pcm_lib_free_pages(substream);
 785         return 0;
 786 }
 787
 788 static void snd_rme32_playback_start(rme32_t * rme32, int from_pause)
 789 {
 790         if (!from_pause) {
 791                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 792                 rme32->playback_last_appl_ptr = 0;
 793                 rme32->playback_ptr = 0;
 794         }
 795
 796         rme32->wcreg |= RME32_WCR_START;
 797         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 798 }
 799
 800 static void snd_rme32_capture_start(rme32_t * rme32, int from_pause)
 801 {
 802         if (!from_pause) {
 803                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 804         }
 805
 806         rme32->wcreg |= RME32_WCR_START;
 807         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 808 }
 809
 810 static void snd_rme32_playback_stop(rme32_t * rme32)
 811 {
 812         /*
 813          * Check if there is an unconfirmed IRQ, if so confirm it, or else
 814          * the hardware will not stop generating interrupts
 815          */
 816         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 817         if (rme32->rcreg & RME32_RCR_IRQ) {
 818                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 819         }
 820         rme32->wcreg &= ~RME32_WCR_START;
 821         if (rme32->wcreg & RME32_WCR_SEL)
 822                 rme32->wcreg |= RME32_WCR_MUTE;
 823         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 824 }
 825
 826 static void snd_rme32_capture_stop(rme32_t * rme32)
 827 {
 828         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 829         if (rme32->rcreg & RME32_RCR_IRQ) {
 830                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 831         }
 832         rme32->wcreg &= ~RME32_WCR_START;
 833         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 834 }
 835
 836 static irqreturn_t
 837 snd_rme32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 838 {
 839         rme32_t *rme32 = (rme32_t *) dev_id;
 840
 841         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 842         if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 843                 return IRQ_NONE;
 844         } else {
 845                 if (rme32->capture_substream) {
 846                         snd_pcm_period_elapsed(rme32->capture_substream);
 847                 }
 848                 if (rme32->playback_substream) {
 849                         snd_pcm_period_elapsed(rme32->playback_substream);
 850                 }
 851                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 852         }
 853         return IRQ_HANDLED;
 854 }
 855
 856 static unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 857
 858
 859 #define PERIOD_BYTES sizeof(period_bytes) / sizeof(period_bytes[0])
 860
 861 static snd_pcm_hw_constraint_list_t hw_constraints_period_bytes = {
 862         .count = PERIOD_BYTES,
 863         .list = period_bytes,
 864         .mask = 0
 865 };
 866
 867 static int snd_rme32_playback_spdif_open(snd_pcm_substream_t * substream)
 868 {
 869         unsigned long flags;
 870         int rate, dummy;
 871         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 872         snd_pcm_runtime_t *runtime = substream->runtime;
 873
 874         snd_pcm_set_sync(substream);
 875
 876         spin_lock_irqsave(&rme32->lock, flags);
 877         if (rme32->playback_substream != NULL) {
 878                 spin_unlock_irqrestore(&rme32->lock, flags);
 879                 return -EBUSY;
 880         }
 881         rme32->wcreg &= ~RME32_WCR_ADAT;
 882         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 883         rme32->playback_substream = substream;
 884         rme32->playback_last_appl_ptr = 0;
 885         rme32->playback_ptr = 0;
 886         spin_unlock_irqrestore(&rme32->lock, flags);
 887
 888         runtime->hw = snd_rme32_playback_spdif_info;
 889         if (rme32->pci->device == PCI_DEVICE_ID_DIGI32_PRO) {
 890                 runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 891                 runtime->hw.rate_max = 96000;
 892         }
 893         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 894             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 895                 /* AutoSync */
 896                 runtime->hw.rates = snd_rme32_ratecode(rate);
 897                 runtime->hw.rate_min = rate;
 898                 runtime->hw.rate_max = rate;
 899         }
 900         snd_pcm_hw_constraint_minmax(runtime,
 901                                      SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 902                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 903         snd_pcm_hw_constraint_list(runtime, 0,
 904                                    SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 905                                    &hw_constraints_period_bytes);
 906
 907         rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 908         rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 909         snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 910                        SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 911         return 0;
 912 }
 913
 914 static int snd_rme32_capture_spdif_open(snd_pcm_substream_t * substream)
 915 {
 916         unsigned long flags;
 917         int isadat, rate;
 918         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 919         snd_pcm_runtime_t *runtime = substream->runtime;
 920
 921         snd_pcm_set_sync(substream);
 922
 923         spin_lock_irqsave(&rme32->lock, flags);
 924         if (rme32->capture_substream != NULL) {
 925                 spin_unlock_irqrestore(&rme32->lock, flags);
 926                 return -EBUSY;
 927         }
 928         rme32->capture_substream = substream;
 929         rme32->capture_ptr = 0;
 930         spin_unlock_irqrestore(&rme32->lock, flags);
 931
 932         runtime->hw = snd_rme32_capture_spdif_info;
 933         if (RME32_PRO_WITH_8414(rme32)) {
 934                 runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 935                 runtime->hw.rate_max = 96000;
 936         }
 937         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 938                 if (isadat) {
 939                         return -EIO;
 940                 }
 941                 runtime->hw.rates = snd_rme32_ratecode(rate);
 942                 runtime->hw.rate_min = rate;
 943                 runtime->hw.rate_max = rate;
 944         }
 945
 946         snd_pcm_hw_constraint_minmax(runtime,
 947                                      SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 948                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 949         snd_pcm_hw_constraint_list(runtime, 0,
 950                                    SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 951                                    &hw_constraints_period_bytes);
 952
 953         return 0;
 954 }
 955
 956 static int
 957 snd_rme32_playback_adat_open(snd_pcm_substream_t *substream)
 958 {
 959         unsigned long flags;
 960         int rate, dummy;
 961         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 962         snd_pcm_runtime_t *runtime = substream->runtime;
 963
 964         snd_pcm_set_sync(substream);
 965
 966         spin_lock_irqsave(&rme32->lock, flags);
 967         if (rme32->playback_substream != NULL) {
 968                 spin_unlock_irqrestore(&rme32->lock, flags);
 969                 return -EBUSY;
 970         }
 971         rme32->wcreg |= RME32_WCR_ADAT;
 972         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 973         rme32->playback_substream = substream;
 974         rme32->playback_last_appl_ptr = 0;
 975         rme32->playback_ptr = 0;
 976         spin_unlock_irqrestore(&rme32->lock, flags);
 977
 978         runtime->hw = snd_rme32_playback_adat_info;
 979         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 980             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 981                 /* AutoSync */
 982                 runtime->hw.rates = snd_rme32_ratecode(rate);
 983                 runtime->hw.rate_min = rate;
 984                 runtime->hw.rate_max = rate;
 985         }
 986         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 987                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 988         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 989                                    &hw_constraints_period_bytes);
 990         return 0;
 991 }
 992
 993 static int
 994 snd_rme32_capture_adat_open(snd_pcm_substream_t *substream)
 995 {
 996         unsigned long flags;
 997         int isadat, rate;
 998         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
 999         snd_pcm_runtime_t *runtime = substream->runtime;
1000
1001         runtime->hw = snd_rme32_capture_adat_info;
1002         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
1003                 if (!isadat) {
1004                         return -EIO;
1005                 }
1006                 runtime->hw.rates = snd_rme32_ratecode(rate);
1007                 runtime->hw.rate_min = rate;
1008                 runtime->hw.rate_max = rate;
1009         }
1010
1011         snd_pcm_set_sync(substream);
1012
1013         spin_lock_irqsave(&rme32->lock, flags);
1014         if (rme32->capture_substream != NULL) {
1015                 spin_unlock_irqrestore(&rme32->lock, flags);
1016                 return -EBUSY;
1017         }
1018         rme32->capture_substream = substream;
1019         rme32->capture_ptr = 0;
1020         spin_unlock_irqrestore(&rme32->lock, flags);
1021
1022         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1023                                      RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
1024         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1025                                    &hw_constraints_period_bytes);
1026         return 0;
1027 }
1028
1029 static int snd_rme32_playback_close(snd_pcm_substream_t * substream)
1030 {
1031         unsigned long flags;
1032         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1033         int spdif = 0;
1034
1035         spin_lock_irqsave(&rme32->lock, flags);
1036         rme32->playback_substream = NULL;
1037         rme32->playback_periodsize = 0;
1038         spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1039         spin_unlock_irqrestore(&rme32->lock, flags);
1040         if (spdif) {
1041                 rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1042                 snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1043                                SNDRV_CTL_EVENT_MASK_INFO,
1044                                &rme32->spdif_ctl->id);
1045         }
1046         return 0;
1047 }
1048
1049 static int snd_rme32_capture_close(snd_pcm_substream_t * substream)
1050 {
1051         unsigned long flags;
1052         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1053
1054         spin_lock_irqsave(&rme32->lock, flags);
1055         rme32->capture_substream = NULL;
1056         rme32->capture_periodsize = 0;
1057         spin_unlock_irqrestore(&rme32->lock, flags);
1058         return 0;
1059 }
1060
1061 static int snd_rme32_playback_prepare(snd_pcm_substream_t * substream)
1062 {
1063         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1064         unsigned long flags;
1065
1066         spin_lock_irqsave(&rme32->lock, flags);
1067         if (RME32_ISWORKING(rme32)) {
1068                 snd_rme32_playback_stop(rme32);
1069         }
1070         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1071         if (rme32->wcreg & RME32_WCR_SEL)
1072                 rme32->wcreg &= ~RME32_WCR_MUTE;
1073         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1074         spin_unlock_irqrestore(&rme32->lock, flags);
1075         return 0;
1076 }
1077
1078 static int snd_rme32_capture_prepare(snd_pcm_substream_t * substream)
1079 {
1080         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1081         unsigned long flags;
1082
1083         spin_lock_irqsave(&rme32->lock, flags);
1084         if (RME32_ISWORKING(rme32)) {
1085                 snd_rme32_capture_stop(rme32);
1086         }
1087         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1088         spin_unlock_irqrestore(&rme32->lock, flags);
1089         return 0;
1090 }
1091
1092 static int
1093 snd_rme32_playback_trigger(snd_pcm_substream_t * substream, int cmd)
1094 {
1095         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1096         switch (cmd) {
1097         case SNDRV_PCM_TRIGGER_START:
1098                 if (!RME32_ISWORKING(rme32)) {
1099                         if (substream != rme32->playback_substream) {
1100                                 return -EBUSY;
1101                         }
1102                         snd_rme32_playback_start(rme32, 0);
1103                 }
1104                 break;
1105
1106         case SNDRV_PCM_TRIGGER_STOP:
1107                 if (RME32_ISWORKING(rme32)) {
1108                         if (substream != rme32->playback_substream) {
1109                                 return -EBUSY;
1110                         }
1111                         snd_rme32_playback_stop(rme32);
1112                 }
1113                 break;
1114
1115         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1116                 if (RME32_ISWORKING(rme32)) {
1117                         snd_rme32_playback_stop(rme32);
1118                 }
1119                 break;
1120
1121         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1122                 if (!RME32_ISWORKING(rme32)) {
1123                         snd_rme32_playback_start(rme32, 1);
1124                 }
1125                 break;
1126
1127         default:
1128                 return -EINVAL;
1129         }
1130         return 0;
1131 }
1132
1133 static int
1134 snd_rme32_capture_trigger(snd_pcm_substream_t * substream, int cmd)
1135 {
1136         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1137
1138         switch (cmd) {
1139         case SNDRV_PCM_TRIGGER_START:
1140                 if (!RME32_ISWORKING(rme32)) {
1141                         if (substream != rme32->capture_substream) {
1142                                 return -EBUSY;
1143                         }
1144                         snd_rme32_capture_start(rme32, 0);
1145                 }
1146                 break;
1147
1148         case SNDRV_PCM_TRIGGER_STOP:
1149                 if (RME32_ISWORKING(rme32)) {
1150                         if (substream != rme32->capture_substream) {
1151                                 return -EBUSY;
1152                         }
1153                         snd_rme32_capture_stop(rme32);
1154                 }
1155                 break;
1156
1157         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1158                 if (RME32_ISWORKING(rme32)) {
1159                         snd_rme32_capture_stop(rme32);
1160                 }
1161                 break;
1162
1163         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1164                 if (!RME32_ISWORKING(rme32)) {
1165                         snd_rme32_capture_start(rme32, 1);
1166                 }
1167                 break;
1168
1169         default:
1170                 return -EINVAL;
1171         }
1172
1173         return 0;
1174 }
1175
1176 static snd_pcm_uframes_t
1177 snd_rme32_playback_pointer(snd_pcm_substream_t * substream)
1178 {
1179         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1180         snd_pcm_runtime_t *runtime = substream->runtime;
1181         snd_pcm_sframes_t diff;
1182         size_t bytes;
1183
1184
1185         if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) {
1186                 diff = runtime->control->appl_ptr -
1187                        rme32->playback_last_appl_ptr;
1188                 rme32->playback_last_appl_ptr = runtime->control->appl_ptr;
1189                 if (diff != 0 && diff < -(snd_pcm_sframes_t) (runtime->boundary >> 1)) {
1190                         diff += runtime->boundary;
1191                 }
1192                 bytes = diff << rme32->playback_frlog;
1193                 if (bytes > RME32_BUFFER_SIZE - rme32->playback_ptr) {
1194                         memcpy_toio((void *)(rme32->iobase + RME32_IO_DATA_BUFFER + rme32->playback_ptr),
1195                                     runtime->dma_area + rme32->playback_ptr,
1196                                     RME32_BUFFER_SIZE - rme32->playback_ptr);
1197                         bytes -= RME32_BUFFER_SIZE - rme32->playback_ptr;
1198                         if (bytes > RME32_BUFFER_SIZE) {
1199                                 bytes = RME32_BUFFER_SIZE;
1200                         }
1201                         memcpy_toio((void *)(rme32->iobase + RME32_IO_DATA_BUFFER),
1202                                     runtime->dma_area, bytes);
1203                         rme32->playback_ptr = bytes;
1204                 } else if (bytes != 0) {
1205                         memcpy_toio((void *)(rme32->iobase + RME32_IO_DATA_BUFFER + rme32->playback_ptr),
1206                                     runtime->dma_area + rme32->playback_ptr, bytes);
1207                         rme32->playback_ptr += bytes;
1208                 }
1209         }
1210         return snd_rme32_playback_ptr(rme32);
1211 }
1212
1213 static snd_pcm_uframes_t
1214 snd_rme32_capture_pointer(snd_pcm_substream_t * substream)
1215 {
1216         rme32_t *rme32 = _snd_pcm_substream_chip(substream);
1217         snd_pcm_runtime_t *runtime = substream->runtime;
1218         snd_pcm_uframes_t frameptr;
1219         size_t ptr;
1220
1221         frameptr = snd_rme32_capture_ptr(rme32);
1222         if (runtime->access == SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) {
1223                 ptr = frameptr << rme32->capture_frlog;
1224                 if (ptr > rme32->capture_ptr) {
1225                         memcpy_fromio(runtime->dma_area + rme32->capture_ptr,
1226                                       (void *)(rme32->iobase + RME32_IO_DATA_BUFFER +
1227                                                rme32->capture_ptr),
1228                                       ptr - rme32->capture_ptr);
1229                         rme32->capture_ptr += ptr - rme32->capture_ptr;
1230                 } else if (ptr < rme32->capture_ptr) {
1231                         memcpy_fromio(runtime->dma_area + rme32->capture_ptr,
1232                                       (void *)(rme32->iobase + RME32_IO_DATA_BUFFER +
1233                                                rme32->capture_ptr),
1234                                       RME32_BUFFER_SIZE - rme32->capture_ptr);
1235                         memcpy_fromio(runtime->dma_area,
1236                                       (void *)(rme32->iobase + RME32_IO_DATA_BUFFER),
1237                                       ptr);
1238                         rme32->capture_ptr = ptr;
1239                 }
1240         }
1241         return frameptr;
1242 }
1243
1244 static snd_pcm_ops_t snd_rme32_playback_spdif_ops = {
1245         .open =         snd_rme32_playback_spdif_open,
1246         .close =        snd_rme32_playback_close,
1247         .ioctl =        snd_pcm_lib_ioctl,
1248         .hw_params =    snd_rme32_playback_hw_params,
1249         .hw_free =      snd_rme32_playback_hw_free,
1250         .prepare =      snd_rme32_playback_prepare,
1251         .trigger =      snd_rme32_playback_trigger,
1252         .pointer =      snd_rme32_playback_pointer,
1253         .copy =         snd_rme32_playback_copy,
1254         .silence =      snd_rme32_playback_silence,
1255 };
1256
1257 static snd_pcm_ops_t snd_rme32_capture_spdif_ops = {
1258         .open =         snd_rme32_capture_spdif_open,
1259         .close =        snd_rme32_capture_close,
1260         .ioctl =        snd_pcm_lib_ioctl,
1261         .hw_params =    snd_rme32_capture_hw_params,
1262         .hw_free =      snd_rme32_capture_hw_free,
1263         .prepare =      snd_rme32_capture_prepare,
1264         .trigger =      snd_rme32_capture_trigger,
1265         .pointer =      snd_rme32_capture_pointer,
1266         .copy =         snd_rme32_capture_copy,
1267 };
1268
1269 static snd_pcm_ops_t snd_rme32_playback_adat_ops = {
1270         .open =         snd_rme32_playback_adat_open,
1271         .close =        snd_rme32_playback_close,
1272         .ioctl =        snd_pcm_lib_ioctl,
1273         .hw_params =    snd_rme32_playback_hw_params,
1274         .hw_free =      snd_rme32_playback_hw_free,
1275         .prepare =      snd_rme32_playback_prepare,
1276         .trigger =      snd_rme32_playback_trigger,
1277         .pointer =      snd_rme32_playback_pointer,
1278         .copy =         snd_rme32_playback_copy,
1279         .silence =      snd_rme32_playback_silence,
1280 };
1281
1282 static snd_pcm_ops_t snd_rme32_capture_adat_ops = {
1283         .open =         snd_rme32_capture_adat_open,
1284         .close =        snd_rme32_capture_close,
1285         .ioctl =        snd_pcm_lib_ioctl,
1286         .hw_params =    snd_rme32_capture_hw_params,
1287         .hw_free =      snd_rme32_capture_hw_free,
1288         .prepare =      snd_rme32_capture_prepare,
1289         .trigger =      snd_rme32_capture_trigger,
1290         .pointer =      snd_rme32_capture_pointer,
1291         .copy =         snd_rme32_capture_copy,
1292 };
1293
1294 static void snd_rme32_free(void *private_data)
1295 {
1296         rme32_t *rme32 = (rme32_t *) private_data;
1297
1298         if (rme32 == NULL) {
1299                 return;
1300         }
1301         if (rme32->irq >= 0) {
1302                 snd_rme32_playback_stop(rme32);
1303                 snd_rme32_capture_stop(rme32);
1304                 free_irq(rme32->irq, (void *) rme32);
1305                 rme32->irq = -1;
1306         }
1307         if (rme32->iobase) {
1308                 iounmap((void *) rme32->iobase);
1309                 rme32->iobase = 0;
1310         }
1311         if (rme32->res_port != NULL) {
1312                 release_resource(rme32->res_port);
1313                 rme32->res_port = NULL;
1314         }
1315 }
1316
1317 static void snd_rme32_free_spdif_pcm(snd_pcm_t * pcm)
1318 {
1319         rme32_t *rme32 = (rme32_t *) pcm->private_data;
1320         rme32->spdif_pcm = NULL;
1321         snd_pcm_lib_preallocate_free_for_all(pcm);
1322 }
1323
1324 static void
1325 snd_rme32_free_adat_pcm(snd_pcm_t *pcm)
1326 {
1327         rme32_t *rme32 = (rme32_t *) pcm->private_data;
1328         rme32->adat_pcm = NULL;
1329         snd_pcm_lib_preallocate_free_for_all(pcm);
1330 }
1331
1332 static int __devinit snd_rme32_create(rme32_t * rme32)
1333 {
1334         struct pci_dev *pci = rme32->pci;
1335         int err;
1336
1337         rme32->irq = -1;
1338
1339         if ((err = pci_enable_device(pci)) < 0)
1340                 return err;
1341
1342         rme32->port = pci_resource_start(rme32->pci, 0);
1343
1344         if ((rme32->res_port = request_mem_region(rme32->port, RME32_IO_SIZE, "RME32")) == NULL) {
1345                 snd_printk("unable to grab memory region 0x%lx-0x%lx\n",
1346                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1347                 return -EBUSY;
1348         }
1349
1350         if (request_irq(pci->irq, snd_rme32_interrupt, SA_INTERRUPT | SA_SHIRQ, "RME32", (void *) rme32)) {
1351                 snd_printk("unable to grab IRQ %d\n", pci->irq);
1352                 return -EBUSY;
1353         }
1354         rme32->irq = pci->irq;
1355
1356         spin_lock_init(&rme32->lock);
1357         if ((rme32->iobase = (unsigned long) ioremap_nocache(rme32->port, RME32_IO_SIZE)) == 0) {
1358                 snd_printk("unable to remap memory region 0x%lx-0x%lx\n",
1359                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1360                 return -ENOMEM;
1361         }
1362
1363         /* read the card's revision number */
1364         pci_read_config_byte(pci, 8, &rme32->rev);
1365
1366         /* set up ALSA pcm device for S/PDIF */
1367         if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1368                 return err;
1369         }
1370         rme32->spdif_pcm->private_data = rme32;
1371         rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1372         strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1373         snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1374                         &snd_rme32_playback_spdif_ops);
1375         snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1376                         &snd_rme32_capture_spdif_ops);
1377
1378         rme32->spdif_pcm->info_flags = 0;
1379
1380         snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm,
1381                                               SNDRV_DMA_TYPE_CONTINUOUS,
1382                                               snd_dma_continuous_data(GFP_KERNEL),
1383                                               RME32_BUFFER_SIZE,
1384                                               RME32_BUFFER_SIZE);
1385
1386         /* set up ALSA pcm device for ADAT */
1387         if ((pci->device == PCI_DEVICE_ID_DIGI32) ||
1388             (pci->device == PCI_DEVICE_ID_DIGI32_PRO)) {
1389                 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1390                 rme32->adat_pcm = NULL;
1391         }
1392         else {
1393                 if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1394                                        1, 1, &rme32->adat_pcm)) < 0)
1395                 {
1396                         return err;
1397                 }
1398                 rme32->adat_pcm->private_data = rme32;
1399                 rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1400                 strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1401                 snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1402                                 &snd_rme32_playback_adat_ops);
1403                 snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1404                                 &snd_rme32_capture_adat_ops);
1405
1406                 rme32->adat_pcm->info_flags = 0;
1407
1408                 snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm,
1409                                                       SNDRV_DMA_TYPE_CONTINUOUS,
1410                                                       snd_dma_continuous_data(GFP_KERNEL),
1411                                                       RME32_BUFFER_SIZE,
1412                                                       RME32_BUFFER_SIZE);
1413         }
1414
1415
1416         rme32->playback_periodsize = 0;
1417         rme32->capture_periodsize = 0;
1418
1419         /* make sure playback/capture is stopped, if by some reason active */
1420         snd_rme32_playback_stop(rme32);
1421         snd_rme32_capture_stop(rme32);
1422
1423         /* reset DAC */
1424         snd_rme32_reset_dac(rme32);
1425
1426         /* reset buffer pointer */
1427         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1428
1429         /* set default values in registers */
1430         rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1431                 RME32_WCR_INP_0 | /* input select */
1432                 RME32_WCR_MUTE;  /* muting on */
1433         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1434
1435
1436         /* init switch interface */
1437         if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1438                 return err;
1439         }
1440
1441         /* init proc interface */
1442         snd_rme32_proc_init(rme32);
1443
1444         rme32->capture_substream = NULL;
1445         rme32->playback_substream = NULL;
1446
1447         return 0;
1448 }
1449
1450 /*
1451  * proc interface
1452  */
1453
1454 static void
1455 snd_rme32_proc_read(snd_info_entry_t * entry, snd_info_buffer_t * buffer)
1456 {
1457         int n;
1458         rme32_t *rme32 = (rme32_t *) entry->private_data;
1459
1460         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1461
1462         snd_iprintf(buffer, rme32->card->longname);
1463         snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1464
1465         snd_iprintf(buffer, "\nGeneral settings\n");
1466         if (RME32_PRO_WITH_8414(rme32)) {
1467                 snd_iprintf(buffer, "  receiver: CS8414\n");
1468         } else {
1469                 snd_iprintf(buffer, "  receiver: CS8412\n");
1470         }
1471         if (rme32->wcreg & RME32_WCR_MODE24) {
1472                 snd_iprintf(buffer, "  format: 24 bit");
1473         } else {
1474                 snd_iprintf(buffer, "  format: 16 bit");
1475         }
1476         if (rme32->wcreg & RME32_WCR_MONO) {
1477                 snd_iprintf(buffer, ", Mono\n");
1478         } else {
1479                 snd_iprintf(buffer, ", Stereo\n");
1480         }
1481
1482         snd_iprintf(buffer, "\nInput settings\n");
1483         switch (snd_rme32_getinputtype(rme32)) {
1484         case RME32_INPUT_OPTICAL:
1485                 snd_iprintf(buffer, "  input: optical");
1486                 break;
1487         case RME32_INPUT_COAXIAL:
1488                 snd_iprintf(buffer, "  input: coaxial");
1489                 break;
1490         case RME32_INPUT_INTERNAL:
1491                 snd_iprintf(buffer, "  input: internal");
1492                 break;
1493         case RME32_INPUT_XLR:
1494                 snd_iprintf(buffer, "  input: XLR");
1495                 break;
1496         }
1497         if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1498                 snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1499         } else {
1500                 if (n) {
1501                         snd_iprintf(buffer, " (8 channels)\n");
1502                 } else {
1503                         snd_iprintf(buffer, " (2 channels)\n");
1504                 }
1505                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1506                             snd_rme32_capture_getrate(rme32, &n));
1507         }
1508
1509         snd_iprintf(buffer, "\nOutput settings\n");
1510         if (rme32->wcreg & RME32_WCR_SEL) {
1511                 snd_iprintf(buffer, "  output signal: normal playback");
1512         } else {
1513                 snd_iprintf(buffer, "  output signal: same as input");
1514         }
1515         if (rme32->wcreg & RME32_WCR_MUTE) {
1516                 snd_iprintf(buffer, " (muted)\n");
1517         } else {
1518                 snd_iprintf(buffer, "\n");
1519         }
1520
1521         /* master output frequency */
1522         if (!
1523             ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1524              && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1525                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1526                             snd_rme32_playback_getrate(rme32));
1527         }
1528         if (rme32->rcreg & RME32_RCR_KMODE) {
1529                 snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1530         } else {
1531                 snd_iprintf(buffer, "  sample clock source: Internal\n");
1532         }
1533         if (rme32->wcreg & RME32_WCR_PRO) {
1534                 snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1535         } else {
1536                 snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1537         }
1538         if (rme32->wcreg & RME32_WCR_EMP) {
1539                 snd_iprintf(buffer, "  emphasis: on\n");
1540         } else {
1541                 snd_iprintf(buffer, "  emphasis: off\n");
1542         }
1543 }
1544
1545 static void __devinit snd_rme32_proc_init(rme32_t * rme32)
1546 {
1547         snd_info_entry_t *entry;
1548
1549         if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1550                 snd_info_set_text_ops(entry, rme32, 1024, snd_rme32_proc_read);
1551 }
1552
1553 /*
1554  * control interface
1555  */
1556
1557 static int
1558 snd_rme32_info_loopback_control(snd_kcontrol_t * kcontrol,
1559                                 snd_ctl_elem_info_t * uinfo)
1560 {
1561         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1562         uinfo->count = 1;
1563         uinfo->value.integer.min = 0;
1564         uinfo->value.integer.max = 1;
1565         return 0;
1566 }
1567 static int
1568 snd_rme32_get_loopback_control(snd_kcontrol_t * kcontrol,
1569                                snd_ctl_elem_value_t * ucontrol)
1570 {
1571         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1572         unsigned long flags;
1573
1574         spin_lock_irqsave(&rme32->lock, flags);
1575         ucontrol->value.integer.value[0] =
1576             rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1577         spin_unlock_irqrestore(&rme32->lock, flags);
1578         return 0;
1579 }
1580 static int
1581 snd_rme32_put_loopback_control(snd_kcontrol_t * kcontrol,
1582                                snd_ctl_elem_value_t * ucontrol)
1583 {
1584         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1585         unsigned long flags;
1586         unsigned int val;
1587         int change;
1588
1589         val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1590         spin_lock_irqsave(&rme32->lock, flags);
1591         val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1592         change = val != rme32->wcreg;
1593         if (ucontrol->value.integer.value[0])
1594                 val &= ~RME32_WCR_MUTE;
1595         else
1596                 val |= RME32_WCR_MUTE;
1597         writel(rme32->wcreg =
1598                val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1599         spin_unlock_irqrestore(&rme32->lock, flags);
1600         return change;
1601 }
1602
1603 static int
1604 snd_rme32_info_inputtype_control(snd_kcontrol_t * kcontrol,
1605                                  snd_ctl_elem_info_t * uinfo)
1606 {
1607         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1608         static char *texts[4] = { "Optical", "Coaxial", "Internal", "XLR" };
1609
1610         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1611         uinfo->count = 1;
1612         switch (rme32->pci->device) {
1613         case PCI_DEVICE_ID_DIGI32:
1614         case PCI_DEVICE_ID_DIGI32_8:
1615                 uinfo->value.enumerated.items = 3;
1616                 break;
1617         case PCI_DEVICE_ID_DIGI32_PRO:
1618                 uinfo->value.enumerated.items = 4;
1619                 break;
1620         default:
1621                 snd_BUG();
1622                 break;
1623         }
1624         if (uinfo->value.enumerated.item >
1625             uinfo->value.enumerated.items - 1) {
1626                 uinfo->value.enumerated.item =
1627                     uinfo->value.enumerated.items - 1;
1628         }
1629         strcpy(uinfo->value.enumerated.name,
1630                texts[uinfo->value.enumerated.item]);
1631         return 0;
1632 }
1633 static int
1634 snd_rme32_get_inputtype_control(snd_kcontrol_t * kcontrol,
1635                                 snd_ctl_elem_value_t * ucontrol)
1636 {
1637         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1638         unsigned long flags;
1639         unsigned int items = 3;
1640
1641         spin_lock_irqsave(&rme32->lock, flags);
1642         ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1643
1644         switch (rme32->pci->device) {
1645         case PCI_DEVICE_ID_DIGI32:
1646         case PCI_DEVICE_ID_DIGI32_8:
1647                 items = 3;
1648                 break;
1649         case PCI_DEVICE_ID_DIGI32_PRO:
1650                 items = 4;
1651                 break;
1652         default:
1653                 snd_BUG();
1654                 break;
1655         }
1656         if (ucontrol->value.enumerated.item[0] >= items) {
1657                 ucontrol->value.enumerated.item[0] = items - 1;
1658         }
1659
1660         spin_unlock_irqrestore(&rme32->lock, flags);
1661         return 0;
1662 }
1663 static int
1664 snd_rme32_put_inputtype_control(snd_kcontrol_t * kcontrol,
1665                                 snd_ctl_elem_value_t * ucontrol)
1666 {
1667         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1668         unsigned long flags;
1669         unsigned int val;
1670         int change, items = 3;
1671
1672         switch (rme32->pci->device) {
1673         case PCI_DEVICE_ID_DIGI32:
1674         case PCI_DEVICE_ID_DIGI32_8:
1675                 items = 3;
1676                 break;
1677         case PCI_DEVICE_ID_DIGI32_PRO:
1678                 items = 4;
1679                 break;
1680         default:
1681                 snd_BUG();
1682                 break;
1683         }
1684         val = ucontrol->value.enumerated.item[0] % items;
1685
1686         spin_lock_irqsave(&rme32->lock, flags);
1687         change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1688         snd_rme32_setinputtype(rme32, val);
1689         spin_unlock_irqrestore(&rme32->lock, flags);
1690         return change;
1691 }
1692
1693 static int
1694 snd_rme32_info_clockmode_control(snd_kcontrol_t * kcontrol,
1695                                  snd_ctl_elem_info_t * uinfo)
1696 {
1697         static char *texts[4] = { "AutoSync",
1698                                   "Internal 32.0kHz",
1699                                   "Internal 44.1kHz",
1700                                   "Internal 48.0kHz" };
1701
1702         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1703         uinfo->count = 1;
1704         uinfo->value.enumerated.items = 4;
1705         if (uinfo->value.enumerated.item > 3) {
1706                 uinfo->value.enumerated.item = 3;
1707         }
1708         strcpy(uinfo->value.enumerated.name,
1709                texts[uinfo->value.enumerated.item]);
1710         return 0;
1711 }
1712 static int
1713 snd_rme32_get_clockmode_control(snd_kcontrol_t * kcontrol,
1714                                 snd_ctl_elem_value_t * ucontrol)
1715 {
1716         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1717         unsigned long flags;
1718
1719         spin_lock_irqsave(&rme32->lock, flags);
1720         ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1721         spin_unlock_irqrestore(&rme32->lock, flags);
1722         return 0;
1723 }
1724 static int
1725 snd_rme32_put_clockmode_control(snd_kcontrol_t * kcontrol,
1726                                 snd_ctl_elem_value_t * ucontrol)
1727 {
1728         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1729         unsigned long flags;
1730         unsigned int val;
1731         int change;
1732
1733         val = ucontrol->value.enumerated.item[0] % 3;
1734         spin_lock_irqsave(&rme32->lock, flags);
1735         change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1736         snd_rme32_setclockmode(rme32, val);
1737         spin_unlock_irqrestore(&rme32->lock, flags);
1738         return change;
1739 }
1740
1741 static u32 snd_rme32_convert_from_aes(snd_aes_iec958_t * aes)
1742 {
1743         u32 val = 0;
1744         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1745         if (val & RME32_WCR_PRO)
1746                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1747         else
1748                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1749         return val;
1750 }
1751
1752 static void snd_rme32_convert_to_aes(snd_aes_iec958_t * aes, u32 val)
1753 {
1754         aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1755         if (val & RME32_WCR_PRO)
1756                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1757         else
1758                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1759 }
1760
1761 static int snd_rme32_control_spdif_info(snd_kcontrol_t * kcontrol,
1762                                         snd_ctl_elem_info_t * uinfo)
1763 {
1764         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1765         uinfo->count = 1;
1766         return 0;
1767 }
1768
1769 static int snd_rme32_control_spdif_get(snd_kcontrol_t * kcontrol,
1770                                        snd_ctl_elem_value_t * ucontrol)
1771 {
1772         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1773
1774         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1775                                  rme32->wcreg_spdif);
1776         return 0;
1777 }
1778
1779 static int snd_rme32_control_spdif_put(snd_kcontrol_t * kcontrol,
1780                                        snd_ctl_elem_value_t * ucontrol)
1781 {
1782         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1783         unsigned long flags;
1784         int change;
1785         u32 val;
1786
1787         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1788         spin_lock_irqsave(&rme32->lock, flags);
1789         change = val != rme32->wcreg_spdif;
1790         rme32->wcreg_spdif = val;
1791         spin_unlock_irqrestore(&rme32->lock, flags);
1792         return change;
1793 }
1794
1795 static int snd_rme32_control_spdif_stream_info(snd_kcontrol_t * kcontrol,
1796                                                snd_ctl_elem_info_t * uinfo)
1797 {
1798         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1799         uinfo->count = 1;
1800         return 0;
1801 }
1802
1803 static int snd_rme32_control_spdif_stream_get(snd_kcontrol_t * kcontrol,
1804                                               snd_ctl_elem_value_t *
1805                                               ucontrol)
1806 {
1807         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1808
1809         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1810                                  rme32->wcreg_spdif_stream);
1811         return 0;
1812 }
1813
1814 static int snd_rme32_control_spdif_stream_put(snd_kcontrol_t * kcontrol,
1815                                               snd_ctl_elem_value_t *
1816                                               ucontrol)
1817 {
1818         rme32_t *rme32 = _snd_kcontrol_chip(kcontrol);
1819         unsigned long flags;
1820         int change;
1821         u32 val;
1822
1823         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1824         spin_lock_irqsave(&rme32->lock, flags);
1825         change = val != rme32->wcreg_spdif_stream;
1826         rme32->wcreg_spdif_stream = val;
1827         rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1828         writel(rme32->wcreg |= val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1829         spin_unlock_irqrestore(&rme32->lock, flags);
1830         return change;
1831 }
1832
1833 static int snd_rme32_control_spdif_mask_info(snd_kcontrol_t * kcontrol,
1834                                              snd_ctl_elem_info_t * uinfo)
1835 {
1836         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1837         uinfo->count = 1;
1838         return 0;
1839 }
1840
1841 static int snd_rme32_control_spdif_mask_get(snd_kcontrol_t * kcontrol,
1842                                             snd_ctl_elem_value_t *
1843                                             ucontrol)
1844 {
1845         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1846         return 0;
1847 }
1848
1849 static snd_kcontrol_new_t snd_rme32_controls[] = {
1850         {
1851                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1852                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1853                 .info = snd_rme32_control_spdif_info,
1854                 .get =  snd_rme32_control_spdif_get,
1855                 .put =  snd_rme32_control_spdif_put
1856         },
1857         {
1858                 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1859                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1860                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1861                 .info = snd_rme32_control_spdif_stream_info,
1862                 .get =  snd_rme32_control_spdif_stream_get,
1863                 .put =  snd_rme32_control_spdif_stream_put
1864         },
1865         {
1866                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1867                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1868                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1869                 .info = snd_rme32_control_spdif_mask_info,
1870                 .get =  snd_rme32_control_spdif_mask_get,
1871                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1872         },
1873         {
1874                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1875                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1876                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1877                 .info = snd_rme32_control_spdif_mask_info,
1878                 .get =  snd_rme32_control_spdif_mask_get,
1879                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1880         },
1881         {
1882                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1883                 .name = "Input Connector",
1884                 .info = snd_rme32_info_inputtype_control,
1885                 .get =  snd_rme32_get_inputtype_control,
1886                 .put =  snd_rme32_put_inputtype_control
1887         },
1888         {
1889                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1890                 .name = "Loopback Input",
1891                 .info = snd_rme32_info_loopback_control,
1892                 .get =  snd_rme32_get_loopback_control,
1893                 .put =  snd_rme32_put_loopback_control
1894         },
1895         {
1896                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1897                 .name = "Sample Clock Source",
1898                 .info = snd_rme32_info_clockmode_control,
1899                 .get =  snd_rme32_get_clockmode_control,
1900                 .put =  snd_rme32_put_clockmode_control
1901         }
1902 };
1903
1904 static int snd_rme32_create_switches(snd_card_t * card, rme32_t * rme32)
1905 {
1906         int idx, err;
1907         snd_kcontrol_t *kctl;
1908
1909         for (idx = 0; idx < 7; idx++) {
1910                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1911                         return err;
1912                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1913                         rme32->spdif_ctl = kctl;
1914         }
1915
1916         return 0;
1917 }
1918
1919 /*
1920  * Card initialisation
1921  */
1922
1923 static void snd_rme32_card_free(snd_card_t * card)
1924 {
1925         snd_rme32_free(card->private_data);
1926 }
1927
1928 static int __devinit
1929 snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1930 {
1931         static int dev;
1932         rme32_t *rme32;
1933         snd_card_t *card;
1934         int err;
1935
1936         for (; dev < SNDRV_CARDS; dev++) {
1937                 if (!enable[dev]) {
1938                         dev++;
1939                         return -ENOENT;
1940                 }
1941                 break;
1942         }
1943         if (dev >= SNDRV_CARDS) {
1944                 return -ENODEV;
1945         }
1946         if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1947                                  sizeof(rme32_t))) == NULL)
1948                 return -ENOMEM;
1949         card->private_free = snd_rme32_card_free;
1950         rme32 = (rme32_t *) card->private_data;
1951         rme32->card = card;
1952         rme32->pci = pci;
1953         snd_card_set_dev(card, &pci->dev);
1954         if ((err = snd_rme32_create(rme32)) < 0) {
1955                 snd_card_free(card);
1956                 return err;
1957         }
1958
1959         strcpy(card->driver, "Digi32");
1960         switch (rme32->pci->device) {
1961         case PCI_DEVICE_ID_DIGI32:
1962                 strcpy(card->shortname, "RME Digi32");
1963                 break;
1964         case PCI_DEVICE_ID_DIGI32_8:
1965                 strcpy(card->shortname, "RME Digi32/8");
1966                 break;
1967         case PCI_DEVICE_ID_DIGI32_PRO:
1968                 strcpy(card->shortname, "RME Digi32 PRO");
1969                 break;
1970         }
1971         sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1972                 card->shortname, rme32->rev, rme32->port, rme32->irq);
1973
1974         if ((err = snd_card_register(card)) < 0) {
1975                 snd_card_free(card);
1976                 return err;
1977         }
1978         pci_set_drvdata(pci, card);
1979         dev++;
1980         return 0;
1981 }
1982
1983 static void __devexit snd_rme32_remove(struct pci_dev *pci)
1984 {
1985         snd_card_free(pci_get_drvdata(pci));
1986         pci_set_drvdata(pci, NULL);
1987 }
1988
1989 static struct pci_driver driver = {
1990         .name =         "RME Digi32",
1991         .id_table =     snd_rme32_ids,
1992         .probe =        snd_rme32_probe,
1993         .remove =       __devexit_p(snd_rme32_remove),
1994 };
1995
1996 static int __init alsa_card_rme32_init(void)
1997 {
1998         int err;
1999
2000         if ((err = pci_module_init(&driver)) < 0) {
2001 #ifdef MODULE
2002                 snd_printk("No RME Digi32 cards found\n");
2003 #endif
2004                 return err;
2005         }
2006         return 0;
2007 }
2008
2009 static void __exit alsa_card_rme32_exit(void)
2010 {
2011         pci_unregister_driver(&driver);
2012 }
2013
2014 module_init(alsa_card_rme32_init)
2015 module_exit(alsa_card_rme32_exit)
2016
2017 #ifndef MODULE
2018
2019 static int __init alsa_card_rme32_setup(char *str)
2020 {
2021         static unsigned __initdata nr_dev = 0;
2022
2023         if (nr_dev >= SNDRV_CARDS)
2024                 return 0;
2025         (void) (get_option(&str, &enable[nr_dev]) == 2 &&
2026                 get_option(&str, &index[nr_dev]) == 2 &&
2027                 get_id(&str, &id[nr_dev]) == 2);
2028         nr_dev++;
2029         return 1;
2030 }
2031
2032 __setup("snd-rme32=", alsa_card_rme32_setup);
2033
2034 #endif                          /* ifndef MODULE */