sound/pci/rme32.c

   1 /*
   2  *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   3  *
   4  *      Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
   5  *                              Pilo Chambert <pilo.c@wanadoo.fr>
   6  *
   7  *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   8  *                         Henk Hesselink <henk@anda.nl>
   9  *                         for writing the digi96-driver
  10  *                         and RME for all informations.
  11  *
  12  *   This program is free software; you can redistribute it and/or modify
  13  *   it under the terms of the GNU General Public License as published by
  14  *   the Free Software Foundation; either version 2 of the License, or
  15  *   (at your option) any later version.
  16  *
  17  *   This program is distributed in the hope that it will be useful,
  18  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *   GNU General Public License for more details.
  21  *
  22  *   You should have received a copy of the GNU General Public License
  23  *   along with this program; if not, write to the Free Software
  24  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  *
  27  * ****************************************************************************
  28  *
  29  * Note #1 "Sek'd models" ................................... martin 2002-12-07
  30  *
  31  * Identical soundcards by Sek'd were labeled:
  32  * RME Digi 32     = Sek'd Prodif 32
  33  * RME Digi 32 Pro = Sek'd Prodif 96
  34  * RME Digi 32/8   = Sek'd Prodif Gold
  35  *
  36  * ****************************************************************************
  37  *
  38  * Note #2 "full duplex mode" ............................... martin 2002-12-07
  39  *
  40  * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  41  * in this mode. Rec data and play data are using the same buffer therefore. At
  42  * first you have got the playing bits in the buffer and then (after playing
  43  * them) they were overwitten by the captured sound of the CS8412/14. Both
  44  * modes (play/record) are running harmonically hand in hand in the same buffer
  45  * and you have only one start bit plus one interrupt bit to control this
  46  * paired action.
  47  * This is opposite to the latter rme96 where playing and capturing is totally
  48  * separated and so their full duplex mode is supported by alsa (using two
  49  * start bits and two interrupts for two different buffers).
  50  * But due to the wrong sequence of playing and capturing ALSA shows no solved
  51  * full duplex support for the rme32 at the moment. That's bad, but I'm not
  52  * able to solve it. Are you motivated enough to solve this problem now? Your
  53  * patch would be welcome!
  54  *
  55  * ****************************************************************************
  56  *
  57  * "The story after the long seeking" -- tiwai
  58  *
  59  * Ok, the situation regarding the full duplex is now improved a bit.
  60  * In the fullduplex mode (given by the module parameter), the hardware buffer
  61  * is split to halves for read and write directions at the DMA pointer.
  62  * That is, the half above the current DMA pointer is used for write, and
  63  * the half below is used for read.  To mangle this strange behavior, an
  64  * software intermediate buffer is introduced.  This is, of course, not good
  65  * from the viewpoint of the data transfer efficiency.  However, this allows
  66  * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
  67  *
  68  * ****************************************************************************
  69  */
  70
  71
  72 #include <sound/driver.h>
  73 #include <linux/delay.h>
  74 #include <linux/init.h>
  75 #include <linux/interrupt.h>
  76 #include <linux/pci.h>
  77 #include <linux/slab.h>
  78 #include <linux/moduleparam.h>
  79
  80 #include <sound/core.h>
  81 #include <sound/info.h>
  82 #include <sound/control.h>
  83 #include <sound/pcm.h>
  84 #include <sound/pcm_params.h>
  85 #include <sound/pcm-indirect.h>
  86 #include <sound/asoundef.h>
  87 #include <sound/initval.h>
  88
  89 #include <asm/io.h>
  90
  91 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  92 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  93 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  94 static int fullduplex[SNDRV_CARDS]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
  95 static int boot_devs;
  96
  97 module_param_array(index, int, boot_devs, 0444);
  98 MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  99 module_param_array(id, charp, boot_devs, 0444);
 100 MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
 101 module_param_array(enable, bool, boot_devs, 0444);
 102 MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
 103 module_param_array(fullduplex, bool, boot_devs, 0444);
 104 MODULE_PARM_DESC(fullduplex, "Support full-duplex mode.");
 105 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
 106 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
 107 MODULE_LICENSE("GPL");
 108 MODULE_SUPPORTED_DEVICE("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
 109
 110 /* Defines for RME Digi32 series */
 111 #define RME32_SPDIF_NCHANNELS 2
 112
 113 /* Playback and capture buffer size */
 114 #define RME32_BUFFER_SIZE 0x20000
 115
 116 /* IO area size */
 117 #define RME32_IO_SIZE 0x30000
 118
 119 /* IO area offsets */
 120 #define RME32_IO_DATA_BUFFER        0x0
 121 #define RME32_IO_CONTROL_REGISTER   0x20000
 122 #define RME32_IO_GET_POS            0x20000
 123 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 124 #define RME32_IO_RESET_POS          0x20100
 125
 126 /* Write control register bits */
 127 #define RME32_WCR_START     (1 << 0)    /* startbit */
 128 #define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 129                                            Setting the whole card to mono
 130                                            doesn't seem to be very useful.
 131                                            A software-solution can handle
 132                                            full-duplex with one direction in
 133                                            stereo and the other way in mono.
 134                                            So, the hardware should work all
 135                                            the time in stereo! */
 136 #define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 137 #define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 138 #define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 139 #define RME32_WCR_FREQ_1    (1 << 5)
 140 #define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 141 #define RME32_WCR_INP_1     (1 << 7)
 142 #define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 143 #define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 144 #define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 145 #define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 146 #define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 147 #define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 148 #define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 149 #define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 150
 151 #define RME32_WCR_BITPOS_FREQ_0 4
 152 #define RME32_WCR_BITPOS_FREQ_1 5
 153 #define RME32_WCR_BITPOS_INP_0 6
 154 #define RME32_WCR_BITPOS_INP_1 7
 155
 156 /* Read control register bits */
 157 #define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
 158 #define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 159 #define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 160 #define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 161 #define RME32_RCR_FREQ_1    (1 << 28)
 162 #define RME32_RCR_FREQ_2    (1 << 29)
 163 #define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 164 #define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 165
 166 #define RME32_RCR_BITPOS_F0 27
 167 #define RME32_RCR_BITPOS_F1 28
 168 #define RME32_RCR_BITPOS_F2 29
 169
 170 /* Input types */
 171 #define RME32_INPUT_OPTICAL 0
 172 #define RME32_INPUT_COAXIAL 1
 173 #define RME32_INPUT_INTERNAL 2
 174 #define RME32_INPUT_XLR 3
 175
 176 /* Clock modes */
 177 #define RME32_CLOCKMODE_SLAVE 0
 178 #define RME32_CLOCKMODE_MASTER_32 1
 179 #define RME32_CLOCKMODE_MASTER_44 2
 180 #define RME32_CLOCKMODE_MASTER_48 3
 181
 182 /* Block sizes in bytes */
 183 #define RME32_BLOCK_SIZE 8192
 184
 185 /* Software intermediate buffer (max) size */
 186 #define RME32_MID_BUFFER_SIZE (1024*1024)
 187
 188 /* Hardware revisions */
 189 #define RME32_32_REVISION 192
 190 #define RME32_328_REVISION_OLD 100
 191 #define RME32_328_REVISION_NEW 101
 192 #define RME32_PRO_REVISION_WITH_8412 192
 193 #define RME32_PRO_REVISION_WITH_8414 150
 194
 195
 196 /* PCI vendor/device ID's */
 197 #ifndef PCI_VENDOR_ID_XILINX_RME
 198 # define PCI_VENDOR_ID_XILINX_RME 0xea60
 199 #endif
 200 #ifndef PCI_DEVICE_ID_DIGI32
 201 # define PCI_DEVICE_ID_DIGI32 0x9896
 202 #endif
 203 #ifndef PCI_DEVICE_ID_DIGI32_PRO
 204 # define PCI_DEVICE_ID_DIGI32_PRO 0x9897
 205 #endif
 206 #ifndef PCI_DEVICE_ID_DIGI32_8
 207 # define PCI_DEVICE_ID_DIGI32_8 0x9898
 208 #endif
 209
 210 typedef struct snd_rme32 {
 211         spinlock_t lock;
 212         int irq;
 213         unsigned long port;
 214         unsigned long iobase;
 215
 216         u32 wcreg;              /* cached write control register value */
 217         u32 wcreg_spdif;        /* S/PDIF setup */
 218         u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 219         u32 rcreg;              /* cached read control register value */
 220
 221         u8 rev;                 /* card revision number */
 222
 223         snd_pcm_substream_t *playback_substream;
 224         snd_pcm_substream_t *capture_substream;
 225
 226         int playback_frlog;     /* log2 of framesize */
 227         int capture_frlog;
 228
 229         size_t playback_periodsize;     /* in bytes, zero if not used */
 230         size_t capture_periodsize;      /* in bytes, zero if not used */
 231
 232         unsigned int fullduplex_mode;
 233         int running;
 234
 235         snd_pcm_indirect_t playback_pcm;
 236         snd_pcm_indirect_t capture_pcm;
 237
 238         snd_card_t *card;
 239         snd_pcm_t *spdif_pcm;
 240         snd_pcm_t *adat_pcm;
 241         struct pci_dev *pci;
 242         snd_kcontrol_t *spdif_ctl;
 243 } rme32_t;
 244
 245 static struct pci_device_id snd_rme32_ids[] = {
 246         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32,
 247          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 248         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32_8,
 249          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 250         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_DIGI32_PRO,
 251          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 252         {0,}
 253 };
 254
 255 MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 256
 257 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 258 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 259
 260 static int snd_rme32_playback_prepare(snd_pcm_substream_t * substream);
 261
 262 static int snd_rme32_capture_prepare(snd_pcm_substream_t * substream);
 263
 264 static int snd_rme32_pcm_trigger(snd_pcm_substream_t * substream, int cmd);
 265
 266 static void snd_rme32_proc_init(rme32_t * rme32);
 267
 268 static int snd_rme32_create_switches(snd_card_t * card, rme32_t * rme32);
 269
 270 static inline unsigned int snd_rme32_pcm_byteptr(rme32_t * rme32)
 271 {
 272         return (readl(rme32->iobase + RME32_IO_GET_POS)
 273                 & RME32_RCR_AUDIO_ADDR_MASK);
 274 }
 275
 276 static int snd_rme32_ratecode(int rate)
 277 {
 278         switch (rate) {
 279         case 32000: return SNDRV_PCM_RATE_32000;
 280         case 44100: return SNDRV_PCM_RATE_44100;
 281         case 48000: return SNDRV_PCM_RATE_48000;
 282         case 64000: return SNDRV_PCM_RATE_64000;
 283         case 88200: return SNDRV_PCM_RATE_88200;
 284         case 96000: return SNDRV_PCM_RATE_96000;
 285         }
 286         return 0;
 287 }
 288
 289 /* silence callback for halfduplex mode */
 290 static int snd_rme32_playback_silence(snd_pcm_substream_t * substream, int channel,     /* not used (interleaved data) */
 291                                       snd_pcm_uframes_t pos,
 292                                       snd_pcm_uframes_t count)
 293 {
 294         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 295         count <<= rme32->playback_frlog;
 296         pos <<= rme32->playback_frlog;
 297         memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 298         return 0;
 299 }
 300
 301 /* copy callback for halfduplex mode */
 302 static int snd_rme32_playback_copy(snd_pcm_substream_t * substream, int channel,        /* not used (interleaved data) */
 303                                    snd_pcm_uframes_t pos,
 304                                    void __user *src, snd_pcm_uframes_t count)
 305 {
 306         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 307         count <<= rme32->playback_frlog;
 308         pos <<= rme32->playback_frlog;
 309         if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 310                             src, count))
 311                 return -EFAULT;
 312         return 0;
 313 }
 314
 315 /* copy callback for halfduplex mode */
 316 static int snd_rme32_capture_copy(snd_pcm_substream_t * substream, int channel, /* not used (interleaved data) */
 317                                   snd_pcm_uframes_t pos,
 318                                   void __user *dst, snd_pcm_uframes_t count)
 319 {
 320         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 321         count <<= rme32->capture_frlog;
 322         pos <<= rme32->capture_frlog;
 323         if (copy_to_user_fromio(dst,
 324                             rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 325                             count))
 326                 return -EFAULT;
 327         return 0;
 328 }
 329
 330 /*
 331  * SPDIF I/O capabilites (half-duplex mode)
 332  */
 333 static snd_pcm_hardware_t snd_rme32_spdif_info = {
 334         .info =         (SNDRV_PCM_INFO_MMAP_IOMEM |
 335                          SNDRV_PCM_INFO_MMAP_VALID |
 336                          SNDRV_PCM_INFO_INTERLEAVED |
 337                          SNDRV_PCM_INFO_PAUSE |
 338                          SNDRV_PCM_INFO_SYNC_START),
 339         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 340                          SNDRV_PCM_FMTBIT_S32_LE),
 341         .rates =        (SNDRV_PCM_RATE_32000 |
 342                          SNDRV_PCM_RATE_44100 |
 343                          SNDRV_PCM_RATE_48000),
 344         .rate_min =     32000,
 345         .rate_max =     48000,
 346         .channels_min = 2,
 347         .channels_max = 2,
 348         .buffer_bytes_max = RME32_BUFFER_SIZE,
 349         .period_bytes_min = RME32_BLOCK_SIZE,
 350         .period_bytes_max = RME32_BLOCK_SIZE,
 351         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 352         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 353         .fifo_size =    0,
 354 };
 355
 356 /*
 357  * ADAT I/O capabilites (half-duplex mode)
 358  */
 359 static snd_pcm_hardware_t snd_rme32_adat_info =
 360 {
 361         .info =              (SNDRV_PCM_INFO_MMAP_IOMEM |
 362                               SNDRV_PCM_INFO_MMAP_VALID |
 363                               SNDRV_PCM_INFO_INTERLEAVED |
 364                               SNDRV_PCM_INFO_PAUSE |
 365                               SNDRV_PCM_INFO_SYNC_START),
 366         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 367         .rates =             (SNDRV_PCM_RATE_44100 |
 368                               SNDRV_PCM_RATE_48000),
 369         .rate_min =          44100,
 370         .rate_max =          48000,
 371         .channels_min =      8,
 372         .channels_max =      8,
 373         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 374         .period_bytes_min =  RME32_BLOCK_SIZE,
 375         .period_bytes_max =  RME32_BLOCK_SIZE,
 376         .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 377         .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 378         .fifo_size =        0,
 379 };
 380
 381 /*
 382  * SPDIF I/O capabilites (full-duplex mode)
 383  */
 384 static snd_pcm_hardware_t snd_rme32_spdif_fd_info = {
 385         .info =         (SNDRV_PCM_INFO_MMAP |
 386                          SNDRV_PCM_INFO_MMAP_VALID |
 387                          SNDRV_PCM_INFO_INTERLEAVED |
 388                          SNDRV_PCM_INFO_PAUSE |
 389                          SNDRV_PCM_INFO_SYNC_START),
 390         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 391                          SNDRV_PCM_FMTBIT_S32_LE),
 392         .rates =        (SNDRV_PCM_RATE_32000 |
 393                          SNDRV_PCM_RATE_44100 |
 394                          SNDRV_PCM_RATE_48000),
 395         .rate_min =     32000,
 396         .rate_max =     48000,
 397         .channels_min = 2,
 398         .channels_max = 2,
 399         .buffer_bytes_max = RME32_MID_BUFFER_SIZE,
 400         .period_bytes_min = RME32_BLOCK_SIZE,
 401         .period_bytes_max = RME32_BLOCK_SIZE,
 402         .periods_min =  2,
 403         .periods_max =  RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 404         .fifo_size =    0,
 405 };
 406
 407 /*
 408  * ADAT I/O capabilites (full-duplex mode)
 409  */
 410 static snd_pcm_hardware_t snd_rme32_adat_fd_info =
 411 {
 412         .info =              (SNDRV_PCM_INFO_MMAP |
 413                               SNDRV_PCM_INFO_MMAP_VALID |
 414                               SNDRV_PCM_INFO_INTERLEAVED |
 415                               SNDRV_PCM_INFO_PAUSE |
 416                               SNDRV_PCM_INFO_SYNC_START),
 417         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 418         .rates =             (SNDRV_PCM_RATE_44100 |
 419                               SNDRV_PCM_RATE_48000),
 420         .rate_min =          44100,
 421         .rate_max =          48000,
 422         .channels_min =      8,
 423         .channels_max =      8,
 424         .buffer_bytes_max =  RME32_MID_BUFFER_SIZE,
 425         .period_bytes_min =  RME32_BLOCK_SIZE,
 426         .period_bytes_max =  RME32_BLOCK_SIZE,
 427         .periods_min =      2,
 428         .periods_max =      RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 429         .fifo_size =        0,
 430 };
 431
 432 static void snd_rme32_reset_dac(rme32_t *rme32)
 433 {
 434         writel(rme32->wcreg | RME32_WCR_PD,
 435                rme32->iobase + RME32_IO_CONTROL_REGISTER);
 436         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 437 }
 438
 439 static int snd_rme32_playback_getrate(rme32_t * rme32)
 440 {
 441         int rate;
 442
 443         rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 444                (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 445         switch (rate) {
 446         case 1:
 447                 rate = 32000;
 448                 break;
 449         case 2:
 450                 rate = 44100;
 451                 break;
 452         case 3:
 453                 rate = 48000;
 454                 break;
 455         default:
 456                 return -1;
 457         }
 458         return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 459 }
 460
 461 static int snd_rme32_capture_getrate(rme32_t * rme32, int *is_adat)
 462 {
 463         int n;
 464
 465         *is_adat = 0;
 466         if (rme32->rcreg & RME32_RCR_LOCK) {
 467                 /* ADAT rate */
 468                 *is_adat = 1;
 469         }
 470         if (rme32->rcreg & RME32_RCR_ERF) {
 471                 return -1;
 472         }
 473
 474         /* S/PDIF rate */
 475         n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 476                 (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 477                 (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 478
 479         if (RME32_PRO_WITH_8414(rme32))
 480                 switch (n) {    /* supporting the CS8414 */
 481                 case 0:
 482                 case 1:
 483                 case 2:
 484                         return -1;
 485                 case 3:
 486                         return 96000;
 487                 case 4:
 488                         return 88200;
 489                 case 5:
 490                         return 48000;
 491                 case 6:
 492                         return 44100;
 493                 case 7:
 494                         return 32000;
 495                 default:
 496                         return -1;
 497                         break;
 498                 }
 499         else
 500                 switch (n) {    /* supporting the CS8412 */
 501                 case 0:
 502                         return -1;
 503                 case 1:
 504                         return 48000;
 505                 case 2:
 506                         return 44100;
 507                 case 3:
 508                         return 32000;
 509                 case 4:
 510                         return 48000;
 511                 case 5:
 512                         return 44100;
 513                 case 6:
 514                         return 44056;
 515                 case 7:
 516                         return 32000;
 517                 default:
 518                         break;
 519                 }
 520         return -1;
 521 }
 522
 523 static int snd_rme32_playback_setrate(rme32_t * rme32, int rate)
 524 {
 525         int ds;
 526
 527         ds = rme32->wcreg & RME32_WCR_DS_BM;
 528         switch (rate) {
 529         case 32000:
 530                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 531                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 532                         ~RME32_WCR_FREQ_1;
 533                 break;
 534         case 44100:
 535                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 536                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 537                         ~RME32_WCR_FREQ_0;
 538                 break;
 539         case 48000:
 540                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 541                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 542                         RME32_WCR_FREQ_1;
 543                 break;
 544         case 64000:
 545                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 546                         return -EINVAL;
 547                 rme32->wcreg |= RME32_WCR_DS_BM;
 548                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 549                         ~RME32_WCR_FREQ_1;
 550                 break;
 551         case 88200:
 552                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 553                         return -EINVAL;
 554                 rme32->wcreg |= RME32_WCR_DS_BM;
 555                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 556                         ~RME32_WCR_FREQ_0;
 557                 break;
 558         case 96000:
 559                 if (rme32->pci->device != PCI_DEVICE_ID_DIGI32_PRO)
 560                         return -EINVAL;
 561                 rme32->wcreg |= RME32_WCR_DS_BM;
 562                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 563                         RME32_WCR_FREQ_1;
 564                 break;
 565         default:
 566                 return -EINVAL;
 567         }
 568         if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 569             (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 570         {
 571                 /* change to/from double-speed: reset the DAC (if available) */
 572                 snd_rme32_reset_dac(rme32);
 573         } else {
 574                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 575         }
 576         return 0;
 577 }
 578
 579 static int snd_rme32_setclockmode(rme32_t * rme32, int mode)
 580 {
 581         switch (mode) {
 582         case RME32_CLOCKMODE_SLAVE:
 583                 /* AutoSync */
 584                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
 585                         ~RME32_WCR_FREQ_1;
 586                 break;
 587         case RME32_CLOCKMODE_MASTER_32:
 588                 /* Internal 32.0kHz */
 589                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 590                         ~RME32_WCR_FREQ_1;
 591                 break;
 592         case RME32_CLOCKMODE_MASTER_44:
 593                 /* Internal 44.1kHz */
 594                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
 595                         RME32_WCR_FREQ_1;
 596                 break;
 597         case RME32_CLOCKMODE_MASTER_48:
 598                 /* Internal 48.0kHz */
 599                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 600                         RME32_WCR_FREQ_1;
 601                 break;
 602         default:
 603                 return -EINVAL;
 604         }
 605         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 606         return 0;
 607 }
 608
 609 static int snd_rme32_getclockmode(rme32_t * rme32)
 610 {
 611         return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 612             (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 613 }
 614
 615 static int snd_rme32_setinputtype(rme32_t * rme32, int type)
 616 {
 617         switch (type) {
 618         case RME32_INPUT_OPTICAL:
 619                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
 620                         ~RME32_WCR_INP_1;
 621                 break;
 622         case RME32_INPUT_COAXIAL:
 623                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
 624                         ~RME32_WCR_INP_1;
 625                 break;
 626         case RME32_INPUT_INTERNAL:
 627                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
 628                         RME32_WCR_INP_1;
 629                 break;
 630         case RME32_INPUT_XLR:
 631                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
 632                         RME32_WCR_INP_1;
 633                 break;
 634         default:
 635                 return -EINVAL;
 636         }
 637         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 638         return 0;
 639 }
 640
 641 static int snd_rme32_getinputtype(rme32_t * rme32)
 642 {
 643         return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 644             (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 645 }
 646
 647 static void
 648 snd_rme32_setframelog(rme32_t * rme32, int n_channels, int is_playback)
 649 {
 650         int frlog;
 651
 652         if (n_channels == 2) {
 653                 frlog = 1;
 654         } else {
 655                 /* assume 8 channels */
 656                 frlog = 3;
 657         }
 658         if (is_playback) {
 659                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 660                 rme32->playback_frlog = frlog;
 661         } else {
 662                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 663                 rme32->capture_frlog = frlog;
 664         }
 665 }
 666
 667 static int snd_rme32_setformat(rme32_t * rme32, int format)
 668 {
 669         switch (format) {
 670         case SNDRV_PCM_FORMAT_S16_LE:
 671                 rme32->wcreg &= ~RME32_WCR_MODE24;
 672                 break;
 673         case SNDRV_PCM_FORMAT_S32_LE:
 674                 rme32->wcreg |= RME32_WCR_MODE24;
 675                 break;
 676         default:
 677                 return -EINVAL;
 678         }
 679         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 680         return 0;
 681 }
 682
 683 static int
 684 snd_rme32_playback_hw_params(snd_pcm_substream_t * substream,
 685                              snd_pcm_hw_params_t * params)
 686 {
 687         int err, rate, dummy;
 688         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 689         snd_pcm_runtime_t *runtime = substream->runtime;
 690
 691         if (rme32->fullduplex_mode) {
 692                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 693                 if (err < 0)
 694                         return err;
 695         } else {
 696                 runtime->dma_area = (void *)(rme32->iobase + RME32_IO_DATA_BUFFER);
 697                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 698                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 699         }
 700
 701         spin_lock_irq(&rme32->lock);
 702         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 703             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 704                 /* AutoSync */
 705                 if ((int)params_rate(params) != rate) {
 706                         spin_unlock_irq(&rme32->lock);
 707                         return -EIO;
 708                 }
 709         } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 710                 spin_unlock_irq(&rme32->lock);
 711                 return err;
 712         }
 713         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 714                 spin_unlock_irq(&rme32->lock);
 715                 return err;
 716         }
 717
 718         snd_rme32_setframelog(rme32, params_channels(params), 1);
 719         if (rme32->capture_periodsize != 0) {
 720                 if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 721                         spin_unlock_irq(&rme32->lock);
 722                         return -EBUSY;
 723                 }
 724         }
 725         rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 726         /* S/PDIF setup */
 727         if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 728                 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 729                 writel(rme32->wcreg |=
 730                        rme32->wcreg_spdif_stream,
 731                        rme32->iobase + RME32_IO_CONTROL_REGISTER);
 732         }
 733         spin_unlock_irq(&rme32->lock);
 734
 735         return 0;
 736 }
 737
 738 static int
 739 snd_rme32_capture_hw_params(snd_pcm_substream_t * substream,
 740                             snd_pcm_hw_params_t * params)
 741 {
 742         int err, isadat, rate;
 743         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 744         snd_pcm_runtime_t *runtime = substream->runtime;
 745
 746         if (rme32->fullduplex_mode) {
 747                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 748                 if (err < 0)
 749                         return err;
 750         } else {
 751                 runtime->dma_area = (void *)rme32->iobase + RME32_IO_DATA_BUFFER;
 752                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 753                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 754         }
 755
 756         spin_lock_irq(&rme32->lock);
 757         /* enable AutoSync for record-preparing */
 758         rme32->wcreg |= RME32_WCR_AUTOSYNC;
 759         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 760
 761         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 762                 spin_unlock_irq(&rme32->lock);
 763                 return err;
 764         }
 765         if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 766                 spin_unlock_irq(&rme32->lock);
 767                 return err;
 768         }
 769         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 770                 if ((int)params_rate(params) != rate) {
 771                         spin_unlock_irq(&rme32->lock);
 772                         return -EIO;
 773                 }
 774                 if ((isadat && runtime->hw.channels_min == 2) ||
 775                     (!isadat && runtime->hw.channels_min == 8)) {
 776                         spin_unlock_irq(&rme32->lock);
 777                         return -EIO;
 778                 }
 779         }
 780         /* AutoSync off for recording */
 781         rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 782         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 783
 784         snd_rme32_setframelog(rme32, params_channels(params), 0);
 785         if (rme32->playback_periodsize != 0) {
 786                 if (params_period_size(params) << rme32->capture_frlog !=
 787                     rme32->playback_periodsize) {
 788                         spin_unlock_irq(&rme32->lock);
 789                         return -EBUSY;
 790                 }
 791         }
 792         rme32->capture_periodsize =
 793             params_period_size(params) << rme32->capture_frlog;
 794         spin_unlock_irq(&rme32->lock);
 795
 796         return 0;
 797 }
 798
 799 static int snd_rme32_pcm_hw_free(snd_pcm_substream_t * substream)
 800 {
 801         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 802         if (! rme32->fullduplex_mode)
 803                 return 0;
 804         return snd_pcm_lib_free_pages(substream);
 805 }
 806
 807 static void snd_rme32_pcm_start(rme32_t * rme32, int from_pause)
 808 {
 809         if (!from_pause) {
 810                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 811         }
 812
 813         rme32->wcreg |= RME32_WCR_START;
 814         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 815 }
 816
 817 static void snd_rme32_pcm_stop(rme32_t * rme32, int to_pause)
 818 {
 819         /*
 820          * Check if there is an unconfirmed IRQ, if so confirm it, or else
 821          * the hardware will not stop generating interrupts
 822          */
 823         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 824         if (rme32->rcreg & RME32_RCR_IRQ) {
 825                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 826         }
 827         rme32->wcreg &= ~RME32_WCR_START;
 828         if (rme32->wcreg & RME32_WCR_SEL)
 829                 rme32->wcreg |= RME32_WCR_MUTE;
 830         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 831         if (! to_pause)
 832                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 833 }
 834
 835 static irqreturn_t
 836 snd_rme32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 837 {
 838         rme32_t *rme32 = (rme32_t *) dev_id;
 839
 840         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 841         if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 842                 return IRQ_NONE;
 843         } else {
 844                 if (rme32->capture_substream) {
 845                         snd_pcm_period_elapsed(rme32->capture_substream);
 846                 }
 847                 if (rme32->playback_substream) {
 848                         snd_pcm_period_elapsed(rme32->playback_substream);
 849                 }
 850                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 851         }
 852         return IRQ_HANDLED;
 853 }
 854
 855 static unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 856
 857
 858 static snd_pcm_hw_constraint_list_t hw_constraints_period_bytes = {
 859         .count = ARRAY_SIZE(period_bytes),
 860         .list = period_bytes,
 861         .mask = 0
 862 };
 863
 864 static void snd_rme32_set_buffer_constraint(rme32_t *rme32, snd_pcm_runtime_t *runtime)
 865 {
 866         if (! rme32->fullduplex_mode) {
 867                 snd_pcm_hw_constraint_minmax(runtime,
 868                                              SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 869                                              RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 870                 snd_pcm_hw_constraint_list(runtime, 0,
 871                                            SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 872                                            &hw_constraints_period_bytes);
 873         }
 874 }
 875
 876 static int snd_rme32_playback_spdif_open(snd_pcm_substream_t * substream)
 877 {
 878         int rate, dummy;
 879         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 880         snd_pcm_runtime_t *runtime = substream->runtime;
 881
 882         snd_pcm_set_sync(substream);
 883
 884         spin_lock_irq(&rme32->lock);
 885         if (rme32->playback_substream != NULL) {
 886                 spin_unlock_irq(&rme32->lock);
 887                 return -EBUSY;
 888         }
 889         rme32->wcreg &= ~RME32_WCR_ADAT;
 890         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 891         rme32->playback_substream = substream;
 892         spin_unlock_irq(&rme32->lock);
 893
 894         if (rme32->fullduplex_mode)
 895                 runtime->hw = snd_rme32_spdif_fd_info;
 896         else
 897                 runtime->hw = snd_rme32_spdif_info;
 898         if (rme32->pci->device == PCI_DEVICE_ID_DIGI32_PRO) {
 899                 runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 900                 runtime->hw.rate_max = 96000;
 901         }
 902         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 903             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 904                 /* AutoSync */
 905                 runtime->hw.rates = snd_rme32_ratecode(rate);
 906                 runtime->hw.rate_min = rate;
 907                 runtime->hw.rate_max = rate;
 908         }
 909
 910         snd_rme32_set_buffer_constraint(rme32, runtime);
 911
 912         rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 913         rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 914         snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 915                        SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 916         return 0;
 917 }
 918
 919 static int snd_rme32_capture_spdif_open(snd_pcm_substream_t * substream)
 920 {
 921         int isadat, rate;
 922         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 923         snd_pcm_runtime_t *runtime = substream->runtime;
 924
 925         snd_pcm_set_sync(substream);
 926
 927         spin_lock_irq(&rme32->lock);
 928         if (rme32->capture_substream != NULL) {
 929                 spin_unlock_irq(&rme32->lock);
 930                 return -EBUSY;
 931         }
 932         rme32->capture_substream = substream;
 933         spin_unlock_irq(&rme32->lock);
 934
 935         if (rme32->fullduplex_mode)
 936                 runtime->hw = snd_rme32_spdif_fd_info;
 937         else
 938                 runtime->hw = snd_rme32_spdif_info;
 939         if (RME32_PRO_WITH_8414(rme32)) {
 940                 runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 941                 runtime->hw.rate_max = 96000;
 942         }
 943         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 944                 if (isadat) {
 945                         return -EIO;
 946                 }
 947                 runtime->hw.rates = snd_rme32_ratecode(rate);
 948                 runtime->hw.rate_min = rate;
 949                 runtime->hw.rate_max = rate;
 950         }
 951
 952         snd_rme32_set_buffer_constraint(rme32, runtime);
 953
 954         return 0;
 955 }
 956
 957 static int
 958 snd_rme32_playback_adat_open(snd_pcm_substream_t *substream)
 959 {
 960         int rate, dummy;
 961         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 962         snd_pcm_runtime_t *runtime = substream->runtime;
 963
 964         snd_pcm_set_sync(substream);
 965
 966         spin_lock_irq(&rme32->lock);
 967         if (rme32->playback_substream != NULL) {
 968                 spin_unlock_irq(&rme32->lock);
 969                 return -EBUSY;
 970         }
 971         rme32->wcreg |= RME32_WCR_ADAT;
 972         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 973         rme32->playback_substream = substream;
 974         spin_unlock_irq(&rme32->lock);
 975
 976         if (rme32->fullduplex_mode)
 977                 runtime->hw = snd_rme32_adat_fd_info;
 978         else
 979                 runtime->hw = snd_rme32_adat_info;
 980         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 981             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 982                 /* AutoSync */
 983                 runtime->hw.rates = snd_rme32_ratecode(rate);
 984                 runtime->hw.rate_min = rate;
 985                 runtime->hw.rate_max = rate;
 986         }
 987
 988         snd_rme32_set_buffer_constraint(rme32, runtime);
 989         return 0;
 990 }
 991
 992 static int
 993 snd_rme32_capture_adat_open(snd_pcm_substream_t *substream)
 994 {
 995         int isadat, rate;
 996         rme32_t *rme32 = snd_pcm_substream_chip(substream);
 997         snd_pcm_runtime_t *runtime = substream->runtime;
 998
 999         if (rme32->fullduplex_mode)
1000                 runtime->hw = snd_rme32_adat_fd_info;
1001         else
1002                 runtime->hw = snd_rme32_adat_info;
1003         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
1004                 if (!isadat) {
1005                         return -EIO;
1006                 }
1007                 runtime->hw.rates = snd_rme32_ratecode(rate);
1008                 runtime->hw.rate_min = rate;
1009                 runtime->hw.rate_max = rate;
1010         }
1011
1012         snd_pcm_set_sync(substream);
1013
1014         spin_lock_irq(&rme32->lock);
1015         if (rme32->capture_substream != NULL) {
1016                 spin_unlock_irq(&rme32->lock);
1017                 return -EBUSY;
1018         }
1019         rme32->capture_substream = substream;
1020         spin_unlock_irq(&rme32->lock);
1021
1022         snd_rme32_set_buffer_constraint(rme32, runtime);
1023         return 0;
1024 }
1025
1026 static int snd_rme32_playback_close(snd_pcm_substream_t * substream)
1027 {
1028         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1029         int spdif = 0;
1030
1031         spin_lock_irq(&rme32->lock);
1032         rme32->playback_substream = NULL;
1033         rme32->playback_periodsize = 0;
1034         spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1035         spin_unlock_irq(&rme32->lock);
1036         if (spdif) {
1037                 rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1038                 snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1039                                SNDRV_CTL_EVENT_MASK_INFO,
1040                                &rme32->spdif_ctl->id);
1041         }
1042         return 0;
1043 }
1044
1045 static int snd_rme32_capture_close(snd_pcm_substream_t * substream)
1046 {
1047         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1048
1049         spin_lock_irq(&rme32->lock);
1050         rme32->capture_substream = NULL;
1051         rme32->capture_periodsize = 0;
1052         spin_unlock(&rme32->lock);
1053         return 0;
1054 }
1055
1056 static int snd_rme32_playback_prepare(snd_pcm_substream_t * substream)
1057 {
1058         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1059
1060         spin_lock_irq(&rme32->lock);
1061         if (rme32->fullduplex_mode) {
1062                 memset(&rme32->playback_pcm, 0, sizeof(rme32->playback_pcm));
1063                 rme32->playback_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1064                 rme32->playback_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1065         } else {
1066                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1067         }
1068         if (rme32->wcreg & RME32_WCR_SEL)
1069                 rme32->wcreg &= ~RME32_WCR_MUTE;
1070         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1071         spin_unlock_irq(&rme32->lock);
1072         return 0;
1073 }
1074
1075 static int snd_rme32_capture_prepare(snd_pcm_substream_t * substream)
1076 {
1077         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1078
1079         spin_lock_irq(&rme32->lock);
1080         if (rme32->fullduplex_mode) {
1081                 memset(&rme32->capture_pcm, 0, sizeof(rme32->capture_pcm));
1082                 rme32->capture_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1083                 rme32->capture_pcm.hw_queue_size = RME32_BUFFER_SIZE / 2;
1084                 rme32->capture_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1085         } else {
1086                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1087         }
1088         spin_unlock_irq(&rme32->lock);
1089         return 0;
1090 }
1091
1092 static int
1093 snd_rme32_pcm_trigger(snd_pcm_substream_t * substream, int cmd)
1094 {
1095         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1096         struct list_head *pos;
1097         snd_pcm_substream_t *s;
1098
1099         spin_lock(&rme32->lock);
1100         snd_pcm_group_for_each(pos, substream) {
1101                 s = snd_pcm_group_substream_entry(pos);
1102                 if (s != rme32->playback_substream &&
1103                     s != rme32->capture_substream)
1104                         continue;
1105                 switch (cmd) {
1106                 case SNDRV_PCM_TRIGGER_START:
1107                         rme32->running |= (1 << s->stream);
1108                         if (rme32->fullduplex_mode) {
1109                                 /* remember the current DMA position */
1110                                 if (s == rme32->playback_substream) {
1111                                         rme32->playback_pcm.hw_io =
1112                                         rme32->playback_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1113                                 } else {
1114                                         rme32->capture_pcm.hw_io =
1115                                         rme32->capture_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1116                                 }
1117                         }
1118                         break;
1119                 case SNDRV_PCM_TRIGGER_STOP:
1120                         rme32->running &= ~(1 << s->stream);
1121                         break;
1122                 }
1123                 snd_pcm_trigger_done(s, substream);
1124         }
1125
1126         /* prefill playback buffer */
1127         if (cmd == SNDRV_PCM_TRIGGER_START) {
1128                 snd_pcm_group_for_each(pos, substream) {
1129                         s = snd_pcm_group_substream_entry(pos);
1130                         if (s == rme32->playback_substream) {
1131                                 s->ops->ack(s);
1132                                 break;
1133                         }
1134                 }
1135         }
1136
1137         switch (cmd) {
1138         case SNDRV_PCM_TRIGGER_START:
1139                 if (rme32->running && ! RME32_ISWORKING(rme32))
1140                         snd_rme32_pcm_start(rme32, 0);
1141                 break;
1142         case SNDRV_PCM_TRIGGER_STOP:
1143                 if (! rme32->running && RME32_ISWORKING(rme32))
1144                         snd_rme32_pcm_stop(rme32, 0);
1145                 break;
1146         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1147                 if (rme32->running && RME32_ISWORKING(rme32))
1148                         snd_rme32_pcm_stop(rme32, 1);
1149                 break;
1150         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1151                 if (rme32->running && ! RME32_ISWORKING(rme32))
1152                         snd_rme32_pcm_start(rme32, 1);
1153                 break;
1154         }
1155         spin_unlock(&rme32->lock);
1156         return 0;
1157 }
1158
1159 /* pointer callback for halfduplex mode */
1160 static snd_pcm_uframes_t
1161 snd_rme32_playback_pointer(snd_pcm_substream_t * substream)
1162 {
1163         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1164         return snd_rme32_pcm_byteptr(rme32) >> rme32->playback_frlog;
1165 }
1166
1167 static snd_pcm_uframes_t
1168 snd_rme32_capture_pointer(snd_pcm_substream_t * substream)
1169 {
1170         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1171         return snd_rme32_pcm_byteptr(rme32) >> rme32->capture_frlog;
1172 }
1173
1174
1175 /* ack and pointer callbacks for fullduplex mode */
1176 static void snd_rme32_pb_trans_copy(snd_pcm_substream_t *substream,
1177                                     snd_pcm_indirect_t *rec, size_t bytes)
1178 {
1179         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1180         memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1181                     substream->runtime->dma_area + rec->sw_data, bytes);
1182 }
1183
1184 static int snd_rme32_playback_fd_ack(snd_pcm_substream_t *substream)
1185 {
1186         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1187         snd_pcm_indirect_t *rec, *cprec;
1188         unsigned long flags;
1189
1190         rec = &rme32->playback_pcm;
1191         cprec = &rme32->capture_pcm;
1192         spin_lock_irqsave(&rme32->lock, flags);
1193         rec->hw_queue_size = RME32_BUFFER_SIZE;
1194         if (rme32->running & (1 << SNDRV_PCM_STREAM_CAPTURE))
1195                 rec->hw_queue_size -= cprec->hw_ready;
1196         spin_unlock_irqrestore(&rme32->lock, flags);
1197         snd_pcm_indirect_playback_transfer(substream, rec,
1198                                            snd_rme32_pb_trans_copy);
1199         return 0;
1200 }
1201
1202 static void snd_rme32_cp_trans_copy(snd_pcm_substream_t *substream,
1203                                     snd_pcm_indirect_t *rec, size_t bytes)
1204 {
1205         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1206         memcpy_fromio(substream->runtime->dma_area + rec->sw_data,
1207                       rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1208                       bytes);
1209 }
1210
1211 static int snd_rme32_capture_fd_ack(snd_pcm_substream_t *substream)
1212 {
1213         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1214         snd_pcm_indirect_capture_transfer(substream, &rme32->capture_pcm,
1215                                           snd_rme32_cp_trans_copy);
1216         return 0;
1217 }
1218
1219 static snd_pcm_uframes_t
1220 snd_rme32_playback_fd_pointer(snd_pcm_substream_t * substream)
1221 {
1222         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1223         return snd_pcm_indirect_playback_pointer(substream, &rme32->playback_pcm,
1224                                                  snd_rme32_pcm_byteptr(rme32));
1225 }
1226
1227 static snd_pcm_uframes_t
1228 snd_rme32_capture_fd_pointer(snd_pcm_substream_t * substream)
1229 {
1230         rme32_t *rme32 = snd_pcm_substream_chip(substream);
1231         return snd_pcm_indirect_capture_pointer(substream, &rme32->capture_pcm,
1232                                                 snd_rme32_pcm_byteptr(rme32));
1233 }
1234
1235 /* for halfduplex mode */
1236 static snd_pcm_ops_t snd_rme32_playback_spdif_ops = {
1237         .open =         snd_rme32_playback_spdif_open,
1238         .close =        snd_rme32_playback_close,
1239         .ioctl =        snd_pcm_lib_ioctl,
1240         .hw_params =    snd_rme32_playback_hw_params,
1241         .hw_free =      snd_rme32_pcm_hw_free,
1242         .prepare =      snd_rme32_playback_prepare,
1243         .trigger =      snd_rme32_pcm_trigger,
1244         .pointer =      snd_rme32_playback_pointer,
1245         .copy =         snd_rme32_playback_copy,
1246         .silence =      snd_rme32_playback_silence,
1247         .mmap =         snd_pcm_lib_mmap_iomem,
1248 };
1249
1250 static snd_pcm_ops_t snd_rme32_capture_spdif_ops = {
1251         .open =         snd_rme32_capture_spdif_open,
1252         .close =        snd_rme32_capture_close,
1253         .ioctl =        snd_pcm_lib_ioctl,
1254         .hw_params =    snd_rme32_capture_hw_params,
1255         .hw_free =      snd_rme32_pcm_hw_free,
1256         .prepare =      snd_rme32_capture_prepare,
1257         .trigger =      snd_rme32_pcm_trigger,
1258         .pointer =      snd_rme32_capture_pointer,
1259         .copy =         snd_rme32_capture_copy,
1260         .mmap =         snd_pcm_lib_mmap_iomem,
1261 };
1262
1263 static snd_pcm_ops_t snd_rme32_playback_adat_ops = {
1264         .open =         snd_rme32_playback_adat_open,
1265         .close =        snd_rme32_playback_close,
1266         .ioctl =        snd_pcm_lib_ioctl,
1267         .hw_params =    snd_rme32_playback_hw_params,
1268         .prepare =      snd_rme32_playback_prepare,
1269         .trigger =      snd_rme32_pcm_trigger,
1270         .pointer =      snd_rme32_playback_pointer,
1271         .copy =         snd_rme32_playback_copy,
1272         .silence =      snd_rme32_playback_silence,
1273         .mmap =         snd_pcm_lib_mmap_iomem,
1274 };
1275
1276 static snd_pcm_ops_t snd_rme32_capture_adat_ops = {
1277         .open =         snd_rme32_capture_adat_open,
1278         .close =        snd_rme32_capture_close,
1279         .ioctl =        snd_pcm_lib_ioctl,
1280         .hw_params =    snd_rme32_capture_hw_params,
1281         .prepare =      snd_rme32_capture_prepare,
1282         .trigger =      snd_rme32_pcm_trigger,
1283         .pointer =      snd_rme32_capture_pointer,
1284         .copy =         snd_rme32_capture_copy,
1285         .mmap =         snd_pcm_lib_mmap_iomem,
1286 };
1287
1288 /* for fullduplex mode */
1289 static snd_pcm_ops_t snd_rme32_playback_spdif_fd_ops = {
1290         .open =         snd_rme32_playback_spdif_open,
1291         .close =        snd_rme32_playback_close,
1292         .ioctl =        snd_pcm_lib_ioctl,
1293         .hw_params =    snd_rme32_playback_hw_params,
1294         .hw_free =      snd_rme32_pcm_hw_free,
1295         .prepare =      snd_rme32_playback_prepare,
1296         .trigger =      snd_rme32_pcm_trigger,
1297         .pointer =      snd_rme32_playback_fd_pointer,
1298         .ack =          snd_rme32_playback_fd_ack,
1299 };
1300
1301 static snd_pcm_ops_t snd_rme32_capture_spdif_fd_ops = {
1302         .open =         snd_rme32_capture_spdif_open,
1303         .close =        snd_rme32_capture_close,
1304         .ioctl =        snd_pcm_lib_ioctl,
1305         .hw_params =    snd_rme32_capture_hw_params,
1306         .hw_free =      snd_rme32_pcm_hw_free,
1307         .prepare =      snd_rme32_capture_prepare,
1308         .trigger =      snd_rme32_pcm_trigger,
1309         .pointer =      snd_rme32_capture_fd_pointer,
1310         .ack =          snd_rme32_capture_fd_ack,
1311 };
1312
1313 static snd_pcm_ops_t snd_rme32_playback_adat_fd_ops = {
1314         .open =         snd_rme32_playback_adat_open,
1315         .close =        snd_rme32_playback_close,
1316         .ioctl =        snd_pcm_lib_ioctl,
1317         .hw_params =    snd_rme32_playback_hw_params,
1318         .prepare =      snd_rme32_playback_prepare,
1319         .trigger =      snd_rme32_pcm_trigger,
1320         .pointer =      snd_rme32_playback_fd_pointer,
1321         .ack =          snd_rme32_playback_fd_ack,
1322 };
1323
1324 static snd_pcm_ops_t snd_rme32_capture_adat_fd_ops = {
1325         .open =         snd_rme32_capture_adat_open,
1326         .close =        snd_rme32_capture_close,
1327         .ioctl =        snd_pcm_lib_ioctl,
1328         .hw_params =    snd_rme32_capture_hw_params,
1329         .prepare =      snd_rme32_capture_prepare,
1330         .trigger =      snd_rme32_pcm_trigger,
1331         .pointer =      snd_rme32_capture_fd_pointer,
1332         .ack =          snd_rme32_capture_fd_ack,
1333 };
1334
1335 static void snd_rme32_free(void *private_data)
1336 {
1337         rme32_t *rme32 = (rme32_t *) private_data;
1338
1339         if (rme32 == NULL) {
1340                 return;
1341         }
1342         if (rme32->irq >= 0) {
1343                 snd_rme32_pcm_stop(rme32, 0);
1344                 free_irq(rme32->irq, (void *) rme32);
1345                 rme32->irq = -1;
1346         }
1347         if (rme32->iobase) {
1348                 iounmap((void *) rme32->iobase);
1349                 rme32->iobase = 0;
1350         }
1351         if (rme32->port) {
1352                 pci_release_regions(rme32->pci);
1353                 rme32->port = 0;
1354         }
1355 }
1356
1357 static void snd_rme32_free_spdif_pcm(snd_pcm_t * pcm)
1358 {
1359         rme32_t *rme32 = (rme32_t *) pcm->private_data;
1360         rme32->spdif_pcm = NULL;
1361 }
1362
1363 static void
1364 snd_rme32_free_adat_pcm(snd_pcm_t *pcm)
1365 {
1366         rme32_t *rme32 = (rme32_t *) pcm->private_data;
1367         rme32->adat_pcm = NULL;
1368 }
1369
1370 static int __devinit snd_rme32_create(rme32_t * rme32)
1371 {
1372         struct pci_dev *pci = rme32->pci;
1373         int err;
1374
1375         rme32->irq = -1;
1376         spin_lock_init(&rme32->lock);
1377
1378         if ((err = pci_enable_device(pci)) < 0)
1379                 return err;
1380
1381         if ((err = pci_request_regions(pci, "RME32")) < 0)
1382                 return err;
1383         rme32->port = pci_resource_start(rme32->pci, 0);
1384
1385         if (request_irq(pci->irq, snd_rme32_interrupt, SA_INTERRUPT | SA_SHIRQ, "RME32", (void *) rme32)) {
1386                 snd_printk("unable to grab IRQ %d\n", pci->irq);
1387                 return -EBUSY;
1388         }
1389         rme32->irq = pci->irq;
1390
1391         if ((rme32->iobase = (unsigned long) ioremap_nocache(rme32->port, RME32_IO_SIZE)) == 0) {
1392                 snd_printk("unable to remap memory region 0x%lx-0x%lx\n",
1393                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1394                 return -ENOMEM;
1395         }
1396
1397         /* read the card's revision number */
1398         pci_read_config_byte(pci, 8, &rme32->rev);
1399
1400         /* set up ALSA pcm device for S/PDIF */
1401         if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1402                 return err;
1403         }
1404         rme32->spdif_pcm->private_data = rme32;
1405         rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1406         strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1407         if (rme32->fullduplex_mode) {
1408                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1409                                 &snd_rme32_playback_spdif_fd_ops);
1410                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1411                                 &snd_rme32_capture_spdif_fd_ops);
1412                 snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1413                                                       snd_dma_continuous_data(GFP_KERNEL),
1414                                                       0, RME32_MID_BUFFER_SIZE);
1415                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1416         } else {
1417                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1418                                 &snd_rme32_playback_spdif_ops);
1419                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1420                                 &snd_rme32_capture_spdif_ops);
1421                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1422         }
1423
1424         /* set up ALSA pcm device for ADAT */
1425         if ((pci->device == PCI_DEVICE_ID_DIGI32) ||
1426             (pci->device == PCI_DEVICE_ID_DIGI32_PRO)) {
1427                 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1428                 rme32->adat_pcm = NULL;
1429         }
1430         else {
1431                 if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1432                                        1, 1, &rme32->adat_pcm)) < 0)
1433                 {
1434                         return err;
1435                 }
1436                 rme32->adat_pcm->private_data = rme32;
1437                 rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1438                 strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1439                 if (rme32->fullduplex_mode) {
1440                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1441                                         &snd_rme32_playback_adat_fd_ops);
1442                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1443                                         &snd_rme32_capture_adat_fd_ops);
1444                         snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1445                                                               snd_dma_continuous_data(GFP_KERNEL),
1446                                                               0, RME32_MID_BUFFER_SIZE);
1447                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1448                 } else {
1449                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1450                                         &snd_rme32_playback_adat_ops);
1451                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1452                                         &snd_rme32_capture_adat_ops);
1453                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1454                 }
1455         }
1456
1457
1458         rme32->playback_periodsize = 0;
1459         rme32->capture_periodsize = 0;
1460
1461         /* make sure playback/capture is stopped, if by some reason active */
1462         snd_rme32_pcm_stop(rme32, 0);
1463
1464         /* reset DAC */
1465         snd_rme32_reset_dac(rme32);
1466
1467         /* reset buffer pointer */
1468         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1469
1470         /* set default values in registers */
1471         rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1472                 RME32_WCR_INP_0 | /* input select */
1473                 RME32_WCR_MUTE;  /* muting on */
1474         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1475
1476
1477         /* init switch interface */
1478         if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1479                 return err;
1480         }
1481
1482         /* init proc interface */
1483         snd_rme32_proc_init(rme32);
1484
1485         rme32->capture_substream = NULL;
1486         rme32->playback_substream = NULL;
1487
1488         return 0;
1489 }
1490
1491 /*
1492  * proc interface
1493  */
1494
1495 static void
1496 snd_rme32_proc_read(snd_info_entry_t * entry, snd_info_buffer_t * buffer)
1497 {
1498         int n;
1499         rme32_t *rme32 = (rme32_t *) entry->private_data;
1500
1501         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1502
1503         snd_iprintf(buffer, rme32->card->longname);
1504         snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1505
1506         snd_iprintf(buffer, "\nGeneral settings\n");
1507         if (rme32->fullduplex_mode)
1508                 snd_iprintf(buffer, "  Full-duplex mode\n");
1509         else
1510                 snd_iprintf(buffer, "  Half-duplex mode\n");
1511         if (RME32_PRO_WITH_8414(rme32)) {
1512                 snd_iprintf(buffer, "  receiver: CS8414\n");
1513         } else {
1514                 snd_iprintf(buffer, "  receiver: CS8412\n");
1515         }
1516         if (rme32->wcreg & RME32_WCR_MODE24) {
1517                 snd_iprintf(buffer, "  format: 24 bit");
1518         } else {
1519                 snd_iprintf(buffer, "  format: 16 bit");
1520         }
1521         if (rme32->wcreg & RME32_WCR_MONO) {
1522                 snd_iprintf(buffer, ", Mono\n");
1523         } else {
1524                 snd_iprintf(buffer, ", Stereo\n");
1525         }
1526
1527         snd_iprintf(buffer, "\nInput settings\n");
1528         switch (snd_rme32_getinputtype(rme32)) {
1529         case RME32_INPUT_OPTICAL:
1530                 snd_iprintf(buffer, "  input: optical");
1531                 break;
1532         case RME32_INPUT_COAXIAL:
1533                 snd_iprintf(buffer, "  input: coaxial");
1534                 break;
1535         case RME32_INPUT_INTERNAL:
1536                 snd_iprintf(buffer, "  input: internal");
1537                 break;
1538         case RME32_INPUT_XLR:
1539                 snd_iprintf(buffer, "  input: XLR");
1540                 break;
1541         }
1542         if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1543                 snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1544         } else {
1545                 if (n) {
1546                         snd_iprintf(buffer, " (8 channels)\n");
1547                 } else {
1548                         snd_iprintf(buffer, " (2 channels)\n");
1549                 }
1550                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1551                             snd_rme32_capture_getrate(rme32, &n));
1552         }
1553
1554         snd_iprintf(buffer, "\nOutput settings\n");
1555         if (rme32->wcreg & RME32_WCR_SEL) {
1556                 snd_iprintf(buffer, "  output signal: normal playback");
1557         } else {
1558                 snd_iprintf(buffer, "  output signal: same as input");
1559         }
1560         if (rme32->wcreg & RME32_WCR_MUTE) {
1561                 snd_iprintf(buffer, " (muted)\n");
1562         } else {
1563                 snd_iprintf(buffer, "\n");
1564         }
1565
1566         /* master output frequency */
1567         if (!
1568             ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1569              && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1570                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1571                             snd_rme32_playback_getrate(rme32));
1572         }
1573         if (rme32->rcreg & RME32_RCR_KMODE) {
1574                 snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1575         } else {
1576                 snd_iprintf(buffer, "  sample clock source: Internal\n");
1577         }
1578         if (rme32->wcreg & RME32_WCR_PRO) {
1579                 snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1580         } else {
1581                 snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1582         }
1583         if (rme32->wcreg & RME32_WCR_EMP) {
1584                 snd_iprintf(buffer, "  emphasis: on\n");
1585         } else {
1586                 snd_iprintf(buffer, "  emphasis: off\n");
1587         }
1588 }
1589
1590 static void __devinit snd_rme32_proc_init(rme32_t * rme32)
1591 {
1592         snd_info_entry_t *entry;
1593
1594         if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1595                 snd_info_set_text_ops(entry, rme32, 1024, snd_rme32_proc_read);
1596 }
1597
1598 /*
1599  * control interface
1600  */
1601
1602 static int
1603 snd_rme32_info_loopback_control(snd_kcontrol_t * kcontrol,
1604                                 snd_ctl_elem_info_t * uinfo)
1605 {
1606         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1607         uinfo->count = 1;
1608         uinfo->value.integer.min = 0;
1609         uinfo->value.integer.max = 1;
1610         return 0;
1611 }
1612 static int
1613 snd_rme32_get_loopback_control(snd_kcontrol_t * kcontrol,
1614                                snd_ctl_elem_value_t * ucontrol)
1615 {
1616         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1617
1618         spin_lock_irq(&rme32->lock);
1619         ucontrol->value.integer.value[0] =
1620             rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1621         spin_unlock_irq(&rme32->lock);
1622         return 0;
1623 }
1624 static int
1625 snd_rme32_put_loopback_control(snd_kcontrol_t * kcontrol,
1626                                snd_ctl_elem_value_t * ucontrol)
1627 {
1628         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1629         unsigned int val;
1630         int change;
1631
1632         val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1633         spin_lock_irq(&rme32->lock);
1634         val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1635         change = val != rme32->wcreg;
1636         if (ucontrol->value.integer.value[0])
1637                 val &= ~RME32_WCR_MUTE;
1638         else
1639                 val |= RME32_WCR_MUTE;
1640         writel(rme32->wcreg =
1641                val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1642         spin_unlock_irq(&rme32->lock);
1643         return change;
1644 }
1645
1646 static int
1647 snd_rme32_info_inputtype_control(snd_kcontrol_t * kcontrol,
1648                                  snd_ctl_elem_info_t * uinfo)
1649 {
1650         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1651         static char *texts[4] = { "Optical", "Coaxial", "Internal", "XLR" };
1652
1653         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1654         uinfo->count = 1;
1655         switch (rme32->pci->device) {
1656         case PCI_DEVICE_ID_DIGI32:
1657         case PCI_DEVICE_ID_DIGI32_8:
1658                 uinfo->value.enumerated.items = 3;
1659                 break;
1660         case PCI_DEVICE_ID_DIGI32_PRO:
1661                 uinfo->value.enumerated.items = 4;
1662                 break;
1663         default:
1664                 snd_BUG();
1665                 break;
1666         }
1667         if (uinfo->value.enumerated.item >
1668             uinfo->value.enumerated.items - 1) {
1669                 uinfo->value.enumerated.item =
1670                     uinfo->value.enumerated.items - 1;
1671         }
1672         strcpy(uinfo->value.enumerated.name,
1673                texts[uinfo->value.enumerated.item]);
1674         return 0;
1675 }
1676 static int
1677 snd_rme32_get_inputtype_control(snd_kcontrol_t * kcontrol,
1678                                 snd_ctl_elem_value_t * ucontrol)
1679 {
1680         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1681         unsigned int items = 3;
1682
1683         spin_lock_irq(&rme32->lock);
1684         ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1685
1686         switch (rme32->pci->device) {
1687         case PCI_DEVICE_ID_DIGI32:
1688         case PCI_DEVICE_ID_DIGI32_8:
1689                 items = 3;
1690                 break;
1691         case PCI_DEVICE_ID_DIGI32_PRO:
1692                 items = 4;
1693                 break;
1694         default:
1695                 snd_BUG();
1696                 break;
1697         }
1698         if (ucontrol->value.enumerated.item[0] >= items) {
1699                 ucontrol->value.enumerated.item[0] = items - 1;
1700         }
1701
1702         spin_unlock_irq(&rme32->lock);
1703         return 0;
1704 }
1705 static int
1706 snd_rme32_put_inputtype_control(snd_kcontrol_t * kcontrol,
1707                                 snd_ctl_elem_value_t * ucontrol)
1708 {
1709         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1710         unsigned int val;
1711         int change, items = 3;
1712
1713         switch (rme32->pci->device) {
1714         case PCI_DEVICE_ID_DIGI32:
1715         case PCI_DEVICE_ID_DIGI32_8:
1716                 items = 3;
1717                 break;
1718         case PCI_DEVICE_ID_DIGI32_PRO:
1719                 items = 4;
1720                 break;
1721         default:
1722                 snd_BUG();
1723                 break;
1724         }
1725         val = ucontrol->value.enumerated.item[0] % items;
1726
1727         spin_lock_irq(&rme32->lock);
1728         change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1729         snd_rme32_setinputtype(rme32, val);
1730         spin_unlock_irq(&rme32->lock);
1731         return change;
1732 }
1733
1734 static int
1735 snd_rme32_info_clockmode_control(snd_kcontrol_t * kcontrol,
1736                                  snd_ctl_elem_info_t * uinfo)
1737 {
1738         static char *texts[4] = { "AutoSync",
1739                                   "Internal 32.0kHz",
1740                                   "Internal 44.1kHz",
1741                                   "Internal 48.0kHz" };
1742
1743         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1744         uinfo->count = 1;
1745         uinfo->value.enumerated.items = 4;
1746         if (uinfo->value.enumerated.item > 3) {
1747                 uinfo->value.enumerated.item = 3;
1748         }
1749         strcpy(uinfo->value.enumerated.name,
1750                texts[uinfo->value.enumerated.item]);
1751         return 0;
1752 }
1753 static int
1754 snd_rme32_get_clockmode_control(snd_kcontrol_t * kcontrol,
1755                                 snd_ctl_elem_value_t * ucontrol)
1756 {
1757         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1758
1759         spin_lock_irq(&rme32->lock);
1760         ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1761         spin_unlock_irq(&rme32->lock);
1762         return 0;
1763 }
1764 static int
1765 snd_rme32_put_clockmode_control(snd_kcontrol_t * kcontrol,
1766                                 snd_ctl_elem_value_t * ucontrol)
1767 {
1768         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1769         unsigned int val;
1770         int change;
1771
1772         val = ucontrol->value.enumerated.item[0] % 3;
1773         spin_lock_irq(&rme32->lock);
1774         change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1775         snd_rme32_setclockmode(rme32, val);
1776         spin_unlock_irq(&rme32->lock);
1777         return change;
1778 }
1779
1780 static u32 snd_rme32_convert_from_aes(snd_aes_iec958_t * aes)
1781 {
1782         u32 val = 0;
1783         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1784         if (val & RME32_WCR_PRO)
1785                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1786         else
1787                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1788         return val;
1789 }
1790
1791 static void snd_rme32_convert_to_aes(snd_aes_iec958_t * aes, u32 val)
1792 {
1793         aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1794         if (val & RME32_WCR_PRO)
1795                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1796         else
1797                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1798 }
1799
1800 static int snd_rme32_control_spdif_info(snd_kcontrol_t * kcontrol,
1801                                         snd_ctl_elem_info_t * uinfo)
1802 {
1803         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1804         uinfo->count = 1;
1805         return 0;
1806 }
1807
1808 static int snd_rme32_control_spdif_get(snd_kcontrol_t * kcontrol,
1809                                        snd_ctl_elem_value_t * ucontrol)
1810 {
1811         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1812
1813         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1814                                  rme32->wcreg_spdif);
1815         return 0;
1816 }
1817
1818 static int snd_rme32_control_spdif_put(snd_kcontrol_t * kcontrol,
1819                                        snd_ctl_elem_value_t * ucontrol)
1820 {
1821         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1822         int change;
1823         u32 val;
1824
1825         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1826         spin_lock_irq(&rme32->lock);
1827         change = val != rme32->wcreg_spdif;
1828         rme32->wcreg_spdif = val;
1829         spin_unlock_irq(&rme32->lock);
1830         return change;
1831 }
1832
1833 static int snd_rme32_control_spdif_stream_info(snd_kcontrol_t * kcontrol,
1834                                                snd_ctl_elem_info_t * uinfo)
1835 {
1836         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1837         uinfo->count = 1;
1838         return 0;
1839 }
1840
1841 static int snd_rme32_control_spdif_stream_get(snd_kcontrol_t * kcontrol,
1842                                               snd_ctl_elem_value_t *
1843                                               ucontrol)
1844 {
1845         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1846
1847         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1848                                  rme32->wcreg_spdif_stream);
1849         return 0;
1850 }
1851
1852 static int snd_rme32_control_spdif_stream_put(snd_kcontrol_t * kcontrol,
1853                                               snd_ctl_elem_value_t *
1854                                               ucontrol)
1855 {
1856         rme32_t *rme32 = snd_kcontrol_chip(kcontrol);
1857         int change;
1858         u32 val;
1859
1860         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1861         spin_lock_irq(&rme32->lock);
1862         change = val != rme32->wcreg_spdif_stream;
1863         rme32->wcreg_spdif_stream = val;
1864         rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1865         writel(rme32->wcreg |= val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1866         spin_unlock_irq(&rme32->lock);
1867         return change;
1868 }
1869
1870 static int snd_rme32_control_spdif_mask_info(snd_kcontrol_t * kcontrol,
1871                                              snd_ctl_elem_info_t * uinfo)
1872 {
1873         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1874         uinfo->count = 1;
1875         return 0;
1876 }
1877
1878 static int snd_rme32_control_spdif_mask_get(snd_kcontrol_t * kcontrol,
1879                                             snd_ctl_elem_value_t *
1880                                             ucontrol)
1881 {
1882         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1883         return 0;
1884 }
1885
1886 static snd_kcontrol_new_t snd_rme32_controls[] = {
1887         {
1888                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1889                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1890                 .info = snd_rme32_control_spdif_info,
1891                 .get =  snd_rme32_control_spdif_get,
1892                 .put =  snd_rme32_control_spdif_put
1893         },
1894         {
1895                 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1896                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1897                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1898                 .info = snd_rme32_control_spdif_stream_info,
1899                 .get =  snd_rme32_control_spdif_stream_get,
1900                 .put =  snd_rme32_control_spdif_stream_put
1901         },
1902         {
1903                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1904                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1905                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1906                 .info = snd_rme32_control_spdif_mask_info,
1907                 .get =  snd_rme32_control_spdif_mask_get,
1908                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1909         },
1910         {
1911                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1912                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1913                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1914                 .info = snd_rme32_control_spdif_mask_info,
1915                 .get =  snd_rme32_control_spdif_mask_get,
1916                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1917         },
1918         {
1919                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1920                 .name = "Input Connector",
1921                 .info = snd_rme32_info_inputtype_control,
1922                 .get =  snd_rme32_get_inputtype_control,
1923                 .put =  snd_rme32_put_inputtype_control
1924         },
1925         {
1926                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1927                 .name = "Loopback Input",
1928                 .info = snd_rme32_info_loopback_control,
1929                 .get =  snd_rme32_get_loopback_control,
1930                 .put =  snd_rme32_put_loopback_control
1931         },
1932         {
1933                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1934                 .name = "Sample Clock Source",
1935                 .info = snd_rme32_info_clockmode_control,
1936                 .get =  snd_rme32_get_clockmode_control,
1937                 .put =  snd_rme32_put_clockmode_control
1938         }
1939 };
1940
1941 static int snd_rme32_create_switches(snd_card_t * card, rme32_t * rme32)
1942 {
1943         int idx, err;
1944         snd_kcontrol_t *kctl;
1945
1946         for (idx = 0; idx < (int)ARRAY_SIZE(snd_rme32_controls); idx++) {
1947                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1948                         return err;
1949                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1950                         rme32->spdif_ctl = kctl;
1951         }
1952
1953         return 0;
1954 }
1955
1956 /*
1957  * Card initialisation
1958  */
1959
1960 static void snd_rme32_card_free(snd_card_t * card)
1961 {
1962         snd_rme32_free(card->private_data);
1963 }
1964
1965 static int __devinit
1966 snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1967 {
1968         static int dev;
1969         rme32_t *rme32;
1970         snd_card_t *card;
1971         int err;
1972
1973         for (; dev < SNDRV_CARDS; dev++) {
1974                 if (!enable[dev]) {
1975                         dev++;
1976                         return -ENOENT;
1977                 }
1978                 break;
1979         }
1980         if (dev >= SNDRV_CARDS) {
1981                 return -ENODEV;
1982         }
1983         if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1984                                  sizeof(rme32_t))) == NULL)
1985                 return -ENOMEM;
1986         card->private_free = snd_rme32_card_free;
1987         rme32 = (rme32_t *) card->private_data;
1988         rme32->card = card;
1989         rme32->pci = pci;
1990         snd_card_set_dev(card, &pci->dev);
1991         if (fullduplex[dev])
1992                 rme32->fullduplex_mode = 1;
1993         if ((err = snd_rme32_create(rme32)) < 0) {
1994                 snd_card_free(card);
1995                 return err;
1996         }
1997
1998         strcpy(card->driver, "Digi32");
1999         switch (rme32->pci->device) {
2000         case PCI_DEVICE_ID_DIGI32:
2001                 strcpy(card->shortname, "RME Digi32");
2002                 break;
2003         case PCI_DEVICE_ID_DIGI32_8:
2004                 strcpy(card->shortname, "RME Digi32/8");
2005                 break;
2006         case PCI_DEVICE_ID_DIGI32_PRO:
2007                 strcpy(card->shortname, "RME Digi32 PRO");
2008                 break;
2009         }
2010         sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
2011                 card->shortname, rme32->rev, rme32->port, rme32->irq);
2012
2013         if ((err = snd_card_register(card)) < 0) {
2014                 snd_card_free(card);
2015                 return err;
2016         }
2017         pci_set_drvdata(pci, card);
2018         dev++;
2019         return 0;
2020 }
2021
2022 static void __devexit snd_rme32_remove(struct pci_dev *pci)
2023 {
2024         snd_card_free(pci_get_drvdata(pci));
2025         pci_set_drvdata(pci, NULL);
2026 }
2027
2028 static struct pci_driver driver = {
2029         .name =         "RME Digi32",
2030         .id_table =     snd_rme32_ids,
2031         .probe =        snd_rme32_probe,
2032         .remove =       __devexit_p(snd_rme32_remove),
2033 };
2034
2035 static int __init alsa_card_rme32_init(void)
2036 {
2037         return pci_module_init(&driver);
2038 }
2039
2040 static void __exit alsa_card_rme32_exit(void)
2041 {
2042         pci_unregister_driver(&driver);
2043 }
2044
2045 module_init(alsa_card_rme32_init)
2046 module_exit(alsa_card_rme32_exit)