sound/pci/rme9652/rme9652.c

   1 /*
   2  *   ALSA driver for RME Digi9652 audio interfaces
   3  *
   4  *      Copyright (c) 1999 IEM - Winfried Ritsch
   5  *      Copyright (c) 1999-2001  Paul Davis
   6  *
   7  *   This program is free software; you can redistribute it and/or modify
   8  *   it under the terms of the GNU General Public License as published by
   9  *   the Free Software Foundation; either version 2 of the License, or
  10  *   (at your option) any later version.
  11  *
  12  *   This program is distributed in the hope that it will be useful,
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *   GNU General Public License for more details.
  16  *
  17  *   You should have received a copy of the GNU General Public License
  18  *   along with this program; if not, write to the Free Software
  19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  *
  21  */
  22
  23 #include <sound/driver.h>
  24 #include <linux/delay.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/slab.h>
  29 #include <linux/moduleparam.h>
  30
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/pcm.h>
  34 #include <sound/info.h>
  35 #include <sound/asoundef.h>
  36 #include <sound/initval.h>
  37
  38 #include <asm/current.h>
  39 #include <asm/io.h>
  40
  41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  43 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  44 static int precise_ptr[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* Enable precise pointer */
  45
  46 module_param_array(index, int, NULL, 0444);
  47 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  48 module_param_array(id, charp, NULL, 0444);
  49 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  50 module_param_array(enable, bool, NULL, 0444);
  51 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  52 module_param_array(precise_ptr, bool, NULL, 0444);
  53 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  54 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  55 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  56 MODULE_LICENSE("GPL");
  57 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
  58                 "{RME,Hammerfall-Light}}");
  59
  60 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  61    capture, one for playback. Both the ADAT and S/PDIF channels appear
  62    to the host CPU in the same block of memory. There is no functional
  63    difference between them in terms of access.
  64
  65    The Hammerfall Light is identical to the Hammerfall, except that it
  66    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  67 */
  68
  69 #define RME9652_NCHANNELS       26
  70 #define RME9636_NCHANNELS       18
  71
  72 /* Preferred sync source choices - used by "sync_pref" control switch */
  73
  74 #define RME9652_SYNC_FROM_SPDIF 0
  75 #define RME9652_SYNC_FROM_ADAT1 1
  76 #define RME9652_SYNC_FROM_ADAT2 2
  77 #define RME9652_SYNC_FROM_ADAT3 3
  78
  79 /* Possible sources of S/PDIF input */
  80
  81 #define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  82 #define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  83 #define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  84
  85 /* ------------- Status-Register bits --------------------- */
  86
  87 #define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  88 #define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  89 #define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  90 #define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  91 #define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  92 #define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  93                                         /* bits 6-15 encode h/w buffer pointer position */
  94 #define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
  95 #define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
  96 #define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
  97 #define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
  98 #define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
  99 #define RME9652_tc_out     (1<<21)      /* time-code out bit */
 100 #define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
 101 #define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
 102 #define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
 103 #define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
 104 #define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
 105 #define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
 106 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
 107
 108 #define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
 109 #define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
 110 #define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
 111 #define rme9652_decode_spdif_rate(x) ((x)>>22)
 112
 113 /* Bit 6..15 : h/w buffer pointer */
 114
 115 #define RME9652_buf_pos   0x000FFC0
 116
 117 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 118    Rev G EEPROMS and Rev 1.5 cards or later.
 119 */
 120
 121 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 122
 123 #ifndef PCI_VENDOR_ID_XILINX
 124 #define PCI_VENDOR_ID_XILINX            0x10ee
 125 #endif
 126 #ifndef PCI_DEVICE_ID_XILINX_HAMMERFALL
 127 #define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
 128 #endif
 129
 130 /* amount of io space we remap for register access. i'm not sure we
 131    even need this much, but 1K is nice round number :)
 132 */
 133
 134 #define RME9652_IO_EXTENT     1024
 135
 136 #define RME9652_init_buffer       0
 137 #define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 138 #define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 139 #define RME9652_control_register  64
 140 #define RME9652_irq_clear         96
 141 #define RME9652_time_code         100   /* useful if used with alesis adat */
 142 #define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 143
 144 /* Read-only registers */
 145
 146 /* Writing to any of the register locations writes to the status
 147    register. We'll use the first location as our point of access.
 148 */
 149
 150 #define RME9652_status_register    0
 151
 152 /* --------- Control-Register Bits ---------------- */
 153
 154
 155 #define RME9652_start_bit          (1<<0)       /* start record/play */
 156                                                 /* bits 1-3 encode buffersize/latency */
 157 #define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 158 #define RME9652_IE                 (1<<5)       /* Interupt Enable */
 159 #define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 160 #define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 161 #define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 162 #define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 163 #define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 164 #define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 165 #define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 166 #define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 167 #define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 168 #define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 169 #define RME9652_SyncPref_ADAT2     (1<<16)
 170 #define RME9652_SyncPref_ADAT3     (1<<17)
 171 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 172 #define RME9652_SPDIF_SELECT       (1<<19)
 173 #define RME9652_SPDIF_CLOCK        (1<<20)
 174 #define RME9652_SPDIF_WRITE        (1<<21)
 175 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 176
 177 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 178
 179 #define RME9652_latency            0x0e
 180 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 181 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 182 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 183 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 184 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 185 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 186
 187 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 188 #define RME9652_SyncPref_ADAT1     0
 189 #define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 190
 191 /* the size of a substream (1 mono data stream) */
 192
 193 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 194 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 195
 196 /* the size of the area we need to allocate for DMA transfers. the
 197    size is the same regardless of the number of channels - the
 198    9636 still uses the same memory area.
 199
 200    Note that we allocate 1 more channel than is apparently needed
 201    because the h/w seems to write 1 byte beyond the end of the last
 202    page. Sigh.
 203 */
 204
 205 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 206 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 207
 208 typedef struct snd_rme9652 {
 209         int dev;
 210
 211         spinlock_t lock;
 212         int irq;
 213         unsigned long port;
 214         void __iomem *iobase;
 215
 216         int precise_ptr;
 217
 218         u32 control_register;   /* cached value */
 219         u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 220
 221         u32 creg_spdif;
 222         u32 creg_spdif_stream;
 223
 224         char *card_name;                /* hammerfall or hammerfall light names */
 225
 226         size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 227         size_t prev_hw_offset;          /* previous hw offset */
 228         size_t max_jitter;              /* maximum jitter in frames for
 229                                            hw pointer */
 230         size_t period_bytes;            /* guess what this is */
 231
 232         unsigned char ds_channels;
 233         unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 234
 235         struct snd_dma_buffer playback_dma_buf;
 236         struct snd_dma_buffer capture_dma_buf;
 237
 238         unsigned char *capture_buffer;  /* suitably aligned address */
 239         unsigned char *playback_buffer; /* suitably aligned address */
 240
 241         pid_t capture_pid;
 242         pid_t playback_pid;
 243
 244         snd_pcm_substream_t *capture_substream;
 245         snd_pcm_substream_t *playback_substream;
 246         int running;
 247
 248         int passthru;                   /* non-zero if doing pass-thru */
 249         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 250
 251         int last_spdif_sample_rate;     /* so that we can catch externally ... */
 252         int last_adat_sample_rate;      /* ... induced rate changes            */
 253
 254         char *channel_map;
 255
 256         snd_card_t *card;
 257         snd_pcm_t *pcm;
 258         struct pci_dev *pci;
 259         snd_kcontrol_t *spdif_ctl;
 260
 261 } rme9652_t;
 262
 263 /* These tables map the ALSA channels 1..N to the channels that we
 264    need to use in order to find the relevant channel buffer. RME
 265    refer to this kind of mapping as between "the ADAT channel and
 266    the DMA channel." We index it using the logical audio channel,
 267    and the value is the DMA channel (i.e. channel buffer number)
 268    where the data for that channel can be read/written from/to.
 269 */
 270
 271 static char channel_map_9652_ss[26] = {
 272         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 273         18, 19, 20, 21, 22, 23, 24, 25
 274 };
 275
 276 static char channel_map_9636_ss[26] = {
 277         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
 278         /* channels 16 and 17 are S/PDIF */
 279         24, 25,
 280         /* channels 18-25 don't exist */
 281         -1, -1, -1, -1, -1, -1, -1, -1
 282 };
 283
 284 static char channel_map_9652_ds[26] = {
 285         /* ADAT channels are remapped */
 286         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 287         /* channels 12 and 13 are S/PDIF */
 288         24, 25,
 289         /* others don't exist */
 290         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 291 };
 292
 293 static char channel_map_9636_ds[26] = {
 294         /* ADAT channels are remapped */
 295         1, 3, 5, 7, 9, 11, 13, 15,
 296         /* channels 8 and 9 are S/PDIF */
 297         24, 25
 298         /* others don't exist */
 299         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 300 };
 301
 302 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 303 {
 304         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 305         dmab->dev.dev = snd_dma_pci_data(pci);
 306         if (! snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 307                 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 308                                         size, dmab) < 0)
 309                         return -ENOMEM;
 310         }
 311         return 0;
 312 }
 313
 314 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 315 {
 316         if (dmab->area)
 317                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 318 }
 319
 320
 321 static struct pci_device_id snd_rme9652_ids[] = {
 322         {
 323                 .vendor    = 0x10ee,
 324                 .device    = 0x3fc4,
 325                 .subvendor = PCI_ANY_ID,
 326                 .subdevice = PCI_ANY_ID,
 327         },      /* RME Digi9652 */
 328         { 0, },
 329 };
 330
 331 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 332
 333 static inline void rme9652_write(rme9652_t *rme9652, int reg, int val)
 334 {
 335         writel(val, rme9652->iobase + reg);
 336 }
 337
 338 static inline unsigned int rme9652_read(rme9652_t *rme9652, int reg)
 339 {
 340         return readl(rme9652->iobase + reg);
 341 }
 342
 343 static inline int snd_rme9652_use_is_exclusive(rme9652_t *rme9652)
 344 {
 345         unsigned long flags;
 346         int ret = 1;
 347
 348         spin_lock_irqsave(&rme9652->lock, flags);
 349         if ((rme9652->playback_pid != rme9652->capture_pid) &&
 350             (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 351                 ret = 0;
 352         }
 353         spin_unlock_irqrestore(&rme9652->lock, flags);
 354         return ret;
 355 }
 356
 357 static inline int rme9652_adat_sample_rate(rme9652_t *rme9652)
 358 {
 359         if (rme9652_running_double_speed(rme9652)) {
 360                 return (rme9652_read(rme9652, RME9652_status_register) &
 361                         RME9652_fs48) ? 96000 : 88200;
 362         } else {
 363                 return (rme9652_read(rme9652, RME9652_status_register) &
 364                         RME9652_fs48) ? 48000 : 44100;
 365         }
 366 }
 367
 368 static inline void rme9652_compute_period_size(rme9652_t *rme9652)
 369 {
 370         unsigned int i;
 371
 372         i = rme9652->control_register & RME9652_latency;
 373         rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 374         rme9652->hw_offsetmask =
 375                 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 376         rme9652->max_jitter = 80;
 377 }
 378
 379 static snd_pcm_uframes_t rme9652_hw_pointer(rme9652_t *rme9652)
 380 {
 381         int status;
 382         unsigned int offset, frag;
 383         snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 384         snd_pcm_sframes_t delta;
 385
 386         status = rme9652_read(rme9652, RME9652_status_register);
 387         if (!rme9652->precise_ptr)
 388                 return (status & RME9652_buffer_id) ? period_size : 0;
 389         offset = status & RME9652_buf_pos;
 390
 391         /* The hardware may give a backward movement for up to 80 frames
 392            Martin Kirst <martin.kirst@freenet.de> knows the details.
 393         */
 394
 395         delta = rme9652->prev_hw_offset - offset;
 396         delta &= 0xffff;
 397         if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 398                 offset = rme9652->prev_hw_offset;
 399         else
 400                 rme9652->prev_hw_offset = offset;
 401         offset &= rme9652->hw_offsetmask;
 402         offset /= 4;
 403         frag = status & RME9652_buffer_id;
 404
 405         if (offset < period_size) {
 406                 if (offset > rme9652->max_jitter) {
 407                         if (frag)
 408                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
 409                 } else if (!frag)
 410                         return 0;
 411                 offset -= rme9652->max_jitter;
 412                 if (offset < 0)
 413                         offset += period_size * 2;
 414         } else {
 415                 if (offset > period_size + rme9652->max_jitter) {
 416                         if (!frag)
 417                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
 418                 } else if (frag)
 419                         return period_size;
 420                 offset -= rme9652->max_jitter;
 421         }
 422
 423         return offset;
 424 }
 425
 426 static inline void rme9652_reset_hw_pointer(rme9652_t *rme9652)
 427 {
 428         int i;
 429
 430         /* reset the FIFO pointer to zero. We do this by writing to 8
 431            registers, each of which is a 32bit wide register, and set
 432            them all to zero. Note that s->iobase is a pointer to
 433            int32, not pointer to char.
 434         */
 435
 436         for (i = 0; i < 8; i++) {
 437                 rme9652_write(rme9652, i * 4, 0);
 438                 udelay(10);
 439         }
 440         rme9652->prev_hw_offset = 0;
 441 }
 442
 443 static inline void rme9652_start(rme9652_t *s)
 444 {
 445         s->control_register |= (RME9652_IE | RME9652_start_bit);
 446         rme9652_write(s, RME9652_control_register, s->control_register);
 447 }
 448
 449 static inline void rme9652_stop(rme9652_t *s)
 450 {
 451         s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 452         rme9652_write(s, RME9652_control_register, s->control_register);
 453 }
 454
 455 static int rme9652_set_interrupt_interval(rme9652_t *s,
 456                                           unsigned int frames)
 457 {
 458         int restart = 0;
 459         int n;
 460
 461         spin_lock_irq(&s->lock);
 462
 463         if ((restart = s->running)) {
 464                 rme9652_stop(s);
 465         }
 466
 467         frames >>= 7;
 468         n = 0;
 469         while (frames) {
 470                 n++;
 471                 frames >>= 1;
 472         }
 473
 474         s->control_register &= ~RME9652_latency;
 475         s->control_register |= rme9652_encode_latency(n);
 476
 477         rme9652_write(s, RME9652_control_register, s->control_register);
 478
 479         rme9652_compute_period_size(s);
 480
 481         if (restart)
 482                 rme9652_start(s);
 483
 484         spin_unlock_irq(&s->lock);
 485
 486         return 0;
 487 }
 488
 489 static int rme9652_set_rate(rme9652_t *rme9652, int rate)
 490 {
 491         int restart;
 492         int reject_if_open = 0;
 493         int xrate;
 494
 495         if (!snd_rme9652_use_is_exclusive (rme9652)) {
 496                 return -EBUSY;
 497         }
 498
 499         /* Changing from a "single speed" to a "double speed" rate is
 500            not allowed if any substreams are open. This is because
 501            such a change causes a shift in the location of
 502            the DMA buffers and a reduction in the number of available
 503            buffers.
 504
 505            Note that a similar but essentially insoluble problem
 506            exists for externally-driven rate changes. All we can do
 507            is to flag rate changes in the read/write routines.
 508          */
 509
 510         spin_lock_irq(&rme9652->lock);
 511         xrate = rme9652_adat_sample_rate(rme9652);
 512
 513         switch (rate) {
 514         case 44100:
 515                 if (xrate > 48000) {
 516                         reject_if_open = 1;
 517                 }
 518                 rate = 0;
 519                 break;
 520         case 48000:
 521                 if (xrate > 48000) {
 522                         reject_if_open = 1;
 523                 }
 524                 rate = RME9652_freq;
 525                 break;
 526         case 88200:
 527                 if (xrate < 48000) {
 528                         reject_if_open = 1;
 529                 }
 530                 rate = RME9652_DS;
 531                 break;
 532         case 96000:
 533                 if (xrate < 48000) {
 534                         reject_if_open = 1;
 535                 }
 536                 rate = RME9652_DS | RME9652_freq;
 537                 break;
 538         default:
 539                 spin_unlock_irq(&rme9652->lock);
 540                 return -EINVAL;
 541         }
 542
 543         if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 544                 spin_unlock_irq(&rme9652->lock);
 545                 return -EBUSY;
 546         }
 547
 548         if ((restart = rme9652->running)) {
 549                 rme9652_stop(rme9652);
 550         }
 551         rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 552         rme9652->control_register |= rate;
 553         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 554
 555         if (restart) {
 556                 rme9652_start(rme9652);
 557         }
 558
 559         if (rate & RME9652_DS) {
 560                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 561                         rme9652->channel_map = channel_map_9652_ds;
 562                 } else {
 563                         rme9652->channel_map = channel_map_9636_ds;
 564                 }
 565         } else {
 566                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 567                         rme9652->channel_map = channel_map_9652_ss;
 568                 } else {
 569                         rme9652->channel_map = channel_map_9636_ss;
 570                 }
 571         }
 572
 573         spin_unlock_irq(&rme9652->lock);
 574         return 0;
 575 }
 576
 577 static void rme9652_set_thru(rme9652_t *rme9652, int channel, int enable)
 578 {
 579         int i;
 580
 581         rme9652->passthru = 0;
 582
 583         if (channel < 0) {
 584
 585                 /* set thru for all channels */
 586
 587                 if (enable) {
 588                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 589                                 rme9652->thru_bits |= (1 << i);
 590                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 591                         }
 592                 } else {
 593                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 594                                 rme9652->thru_bits &= ~(1 << i);
 595                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 596                         }
 597                 }
 598
 599         } else {
 600                 int mapped_channel;
 601
 602                 snd_assert(channel == RME9652_NCHANNELS, return);
 603
 604                 mapped_channel = rme9652->channel_map[channel];
 605
 606                 if (enable) {
 607                         rme9652->thru_bits |= (1 << mapped_channel);
 608                 } else {
 609                         rme9652->thru_bits &= ~(1 << mapped_channel);
 610                 }
 611
 612                 rme9652_write(rme9652,
 613                                RME9652_thru_base + mapped_channel * 4,
 614                                enable ? 1 : 0);
 615         }
 616 }
 617
 618 static int rme9652_set_passthru(rme9652_t *rme9652, int onoff)
 619 {
 620         if (onoff) {
 621                 rme9652_set_thru(rme9652, -1, 1);
 622
 623                 /* we don't want interrupts, so do a
 624                    custom version of rme9652_start().
 625                 */
 626
 627                 rme9652->control_register =
 628                         RME9652_inp_0 |
 629                         rme9652_encode_latency(7) |
 630                         RME9652_start_bit;
 631
 632                 rme9652_reset_hw_pointer(rme9652);
 633
 634                 rme9652_write(rme9652, RME9652_control_register,
 635                               rme9652->control_register);
 636                 rme9652->passthru = 1;
 637         } else {
 638                 rme9652_set_thru(rme9652, -1, 0);
 639                 rme9652_stop(rme9652);
 640                 rme9652->passthru = 0;
 641         }
 642
 643         return 0;
 644 }
 645
 646 static void rme9652_spdif_set_bit (rme9652_t *rme9652, int mask, int onoff)
 647 {
 648         if (onoff)
 649                 rme9652->control_register |= mask;
 650         else
 651                 rme9652->control_register &= ~mask;
 652
 653         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 654 }
 655
 656 static void rme9652_spdif_write_byte (rme9652_t *rme9652, const int val)
 657 {
 658         long mask;
 659         long i;
 660
 661         for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 662                 if (val & mask)
 663                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 664                 else
 665                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 666
 667                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 668                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 669         }
 670 }
 671
 672 static int rme9652_spdif_read_byte (rme9652_t *rme9652)
 673 {
 674         long mask;
 675         long val;
 676         long i;
 677
 678         val = 0;
 679
 680         for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 681                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 682                 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 683                         val |= mask;
 684                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 685         }
 686
 687         return val;
 688 }
 689
 690 static void rme9652_write_spdif_codec (rme9652_t *rme9652, const int address, const int data)
 691 {
 692         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 693         rme9652_spdif_write_byte (rme9652, 0x20);
 694         rme9652_spdif_write_byte (rme9652, address);
 695         rme9652_spdif_write_byte (rme9652, data);
 696         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 697 }
 698
 699
 700 static int rme9652_spdif_read_codec (rme9652_t *rme9652, const int address)
 701 {
 702         int ret;
 703
 704         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 705         rme9652_spdif_write_byte (rme9652, 0x20);
 706         rme9652_spdif_write_byte (rme9652, address);
 707         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 708         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 709
 710         rme9652_spdif_write_byte (rme9652, 0x21);
 711         ret = rme9652_spdif_read_byte (rme9652);
 712         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 713
 714         return ret;
 715 }
 716
 717 static void rme9652_initialize_spdif_receiver (rme9652_t *rme9652)
 718 {
 719         /* XXX what unsets this ? */
 720
 721         rme9652->control_register |= RME9652_SPDIF_RESET;
 722
 723         rme9652_write_spdif_codec (rme9652, 4, 0x40);
 724         rme9652_write_spdif_codec (rme9652, 17, 0x13);
 725         rme9652_write_spdif_codec (rme9652, 6, 0x02);
 726 }
 727
 728 static inline int rme9652_spdif_sample_rate(rme9652_t *s)
 729 {
 730         unsigned int rate_bits;
 731
 732         if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 733                 return -1;      /* error condition */
 734         }
 735
 736         if (s->hw_rev == 15) {
 737
 738                 int x, y, ret;
 739
 740                 x = rme9652_spdif_read_codec (s, 30);
 741
 742                 if (x != 0)
 743                         y = 48000 * 64 / x;
 744                 else
 745                         y = 0;
 746
 747                 if      (y > 30400 && y < 33600)  ret = 32000;
 748                 else if (y > 41900 && y < 46000)  ret = 44100;
 749                 else if (y > 46000 && y < 50400)  ret = 48000;
 750                 else if (y > 60800 && y < 67200)  ret = 64000;
 751                 else if (y > 83700 && y < 92000)  ret = 88200;
 752                 else if (y > 92000 && y < 100000) ret = 96000;
 753                 else                              ret = 0;
 754                 return ret;
 755         }
 756
 757         rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 758
 759         switch (rme9652_decode_spdif_rate(rate_bits)) {
 760         case 0x7:
 761                 return 32000;
 762                 break;
 763
 764         case 0x6:
 765                 return 44100;
 766                 break;
 767
 768         case 0x5:
 769                 return 48000;
 770                 break;
 771
 772         case 0x4:
 773                 return 88200;
 774                 break;
 775
 776         case 0x3:
 777                 return 96000;
 778                 break;
 779
 780         case 0x0:
 781                 return 64000;
 782                 break;
 783
 784         default:
 785                 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 786                            s->card_name, rate_bits);
 787                 return 0;
 788                 break;
 789         }
 790 }
 791
 792 /*-----------------------------------------------------------------------------
 793   Control Interface
 794   ----------------------------------------------------------------------------*/
 795
 796 static u32 snd_rme9652_convert_from_aes(snd_aes_iec958_t *aes)
 797 {
 798         u32 val = 0;
 799         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 800         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 801         if (val & RME9652_PRO)
 802                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 803         else
 804                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 805         return val;
 806 }
 807
 808 static void snd_rme9652_convert_to_aes(snd_aes_iec958_t *aes, u32 val)
 809 {
 810         aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 811                          ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 812         if (val & RME9652_PRO)
 813                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 814         else
 815                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 816 }
 817
 818 static int snd_rme9652_control_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 819 {
 820         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 821         uinfo->count = 1;
 822         return 0;
 823 }
 824
 825 static int snd_rme9652_control_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 826 {
 827         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 828
 829         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 830         return 0;
 831 }
 832
 833 static int snd_rme9652_control_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 834 {
 835         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 836         int change;
 837         u32 val;
 838
 839         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 840         spin_lock_irq(&rme9652->lock);
 841         change = val != rme9652->creg_spdif;
 842         rme9652->creg_spdif = val;
 843         spin_unlock_irq(&rme9652->lock);
 844         return change;
 845 }
 846
 847 static int snd_rme9652_control_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 848 {
 849         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 850         uinfo->count = 1;
 851         return 0;
 852 }
 853
 854 static int snd_rme9652_control_spdif_stream_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 855 {
 856         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 857
 858         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 859         return 0;
 860 }
 861
 862 static int snd_rme9652_control_spdif_stream_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 863 {
 864         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 865         int change;
 866         u32 val;
 867
 868         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 869         spin_lock_irq(&rme9652->lock);
 870         change = val != rme9652->creg_spdif_stream;
 871         rme9652->creg_spdif_stream = val;
 872         rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 873         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 874         spin_unlock_irq(&rme9652->lock);
 875         return change;
 876 }
 877
 878 static int snd_rme9652_control_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 879 {
 880         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 881         uinfo->count = 1;
 882         return 0;
 883 }
 884
 885 static int snd_rme9652_control_spdif_mask_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 886 {
 887         ucontrol->value.iec958.status[0] = kcontrol->private_value;
 888         return 0;
 889 }
 890
 891 #define RME9652_ADAT1_IN(xname, xindex) \
 892 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
 893   .info = snd_rme9652_info_adat1_in, \
 894   .get = snd_rme9652_get_adat1_in, \
 895   .put = snd_rme9652_put_adat1_in }
 896
 897 static unsigned int rme9652_adat1_in(rme9652_t *rme9652)
 898 {
 899         if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 900                 return 1;
 901         return 0;
 902 }
 903
 904 static int rme9652_set_adat1_input(rme9652_t *rme9652, int internal)
 905 {
 906         int restart = 0;
 907
 908         if (internal) {
 909                 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 910         } else {
 911                 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 912         }
 913
 914         /* XXX do we actually need to stop the card when we do this ? */
 915
 916         if ((restart = rme9652->running)) {
 917                 rme9652_stop(rme9652);
 918         }
 919
 920         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 921
 922         if (restart) {
 923                 rme9652_start(rme9652);
 924         }
 925
 926         return 0;
 927 }
 928
 929 static int snd_rme9652_info_adat1_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 930 {
 931         static char *texts[2] = {"ADAT1", "Internal"};
 932
 933         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 934         uinfo->count = 1;
 935         uinfo->value.enumerated.items = 2;
 936         if (uinfo->value.enumerated.item > 1)
 937                 uinfo->value.enumerated.item = 1;
 938         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
 939         return 0;
 940 }
 941
 942 static int snd_rme9652_get_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 943 {
 944         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 945
 946         spin_lock_irq(&rme9652->lock);
 947         ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 948         spin_unlock_irq(&rme9652->lock);
 949         return 0;
 950 }
 951
 952 static int snd_rme9652_put_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 953 {
 954         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 955         int change;
 956         unsigned int val;
 957
 958         if (!snd_rme9652_use_is_exclusive(rme9652))
 959                 return -EBUSY;
 960         val = ucontrol->value.enumerated.item[0] % 2;
 961         spin_lock_irq(&rme9652->lock);
 962         change = val != rme9652_adat1_in(rme9652);
 963         if (change)
 964                 rme9652_set_adat1_input(rme9652, val);
 965         spin_unlock_irq(&rme9652->lock);
 966         return change;
 967 }
 968
 969 #define RME9652_SPDIF_IN(xname, xindex) \
 970 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
 971   .info = snd_rme9652_info_spdif_in, \
 972   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
 973
 974 static unsigned int rme9652_spdif_in(rme9652_t *rme9652)
 975 {
 976         return rme9652_decode_spdif_in(rme9652->control_register &
 977                                        RME9652_inp);
 978 }
 979
 980 static int rme9652_set_spdif_input(rme9652_t *rme9652, int in)
 981 {
 982         int restart = 0;
 983
 984         rme9652->control_register &= ~RME9652_inp;
 985         rme9652->control_register |= rme9652_encode_spdif_in(in);
 986
 987         if ((restart = rme9652->running)) {
 988                 rme9652_stop(rme9652);
 989         }
 990
 991         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 992
 993         if (restart) {
 994                 rme9652_start(rme9652);
 995         }
 996
 997         return 0;
 998 }
 999
1000 static int snd_rme9652_info_spdif_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1001 {
1002         static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1003
1004         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1005         uinfo->count = 1;
1006         uinfo->value.enumerated.items = 3;
1007         if (uinfo->value.enumerated.item > 2)
1008                 uinfo->value.enumerated.item = 2;
1009         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1010         return 0;
1011 }
1012
1013 static int snd_rme9652_get_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1014 {
1015         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1016
1017         spin_lock_irq(&rme9652->lock);
1018         ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1019         spin_unlock_irq(&rme9652->lock);
1020         return 0;
1021 }
1022
1023 static int snd_rme9652_put_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1024 {
1025         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1026         int change;
1027         unsigned int val;
1028
1029         if (!snd_rme9652_use_is_exclusive(rme9652))
1030                 return -EBUSY;
1031         val = ucontrol->value.enumerated.item[0] % 3;
1032         spin_lock_irq(&rme9652->lock);
1033         change = val != rme9652_spdif_in(rme9652);
1034         if (change)
1035                 rme9652_set_spdif_input(rme9652, val);
1036         spin_unlock_irq(&rme9652->lock);
1037         return change;
1038 }
1039
1040 #define RME9652_SPDIF_OUT(xname, xindex) \
1041 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1042   .info = snd_rme9652_info_spdif_out, \
1043   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1044
1045 static int rme9652_spdif_out(rme9652_t *rme9652)
1046 {
1047         return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1048 }
1049
1050 static int rme9652_set_spdif_output(rme9652_t *rme9652, int out)
1051 {
1052         int restart = 0;
1053
1054         if (out) {
1055                 rme9652->control_register |= RME9652_opt_out;
1056         } else {
1057                 rme9652->control_register &= ~RME9652_opt_out;
1058         }
1059
1060         if ((restart = rme9652->running)) {
1061                 rme9652_stop(rme9652);
1062         }
1063
1064         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1065
1066         if (restart) {
1067                 rme9652_start(rme9652);
1068         }
1069
1070         return 0;
1071 }
1072
1073 static int snd_rme9652_info_spdif_out(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1074 {
1075         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1076         uinfo->count = 1;
1077         uinfo->value.integer.min = 0;
1078         uinfo->value.integer.max = 1;
1079         return 0;
1080 }
1081
1082 static int snd_rme9652_get_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1083 {
1084         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1085
1086         spin_lock_irq(&rme9652->lock);
1087         ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1088         spin_unlock_irq(&rme9652->lock);
1089         return 0;
1090 }
1091
1092 static int snd_rme9652_put_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1093 {
1094         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1095         int change;
1096         unsigned int val;
1097
1098         if (!snd_rme9652_use_is_exclusive(rme9652))
1099                 return -EBUSY;
1100         val = ucontrol->value.integer.value[0] & 1;
1101         spin_lock_irq(&rme9652->lock);
1102         change = (int)val != rme9652_spdif_out(rme9652);
1103         rme9652_set_spdif_output(rme9652, val);
1104         spin_unlock_irq(&rme9652->lock);
1105         return change;
1106 }
1107
1108 #define RME9652_SYNC_MODE(xname, xindex) \
1109 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1110   .info = snd_rme9652_info_sync_mode, \
1111   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1112
1113 static int rme9652_sync_mode(rme9652_t *rme9652)
1114 {
1115         if (rme9652->control_register & RME9652_wsel) {
1116                 return 2;
1117         } else if (rme9652->control_register & RME9652_Master) {
1118                 return 1;
1119         } else {
1120                 return 0;
1121         }
1122 }
1123
1124 static int rme9652_set_sync_mode(rme9652_t *rme9652, int mode)
1125 {
1126         int restart = 0;
1127
1128         switch (mode) {
1129         case 0:
1130                 rme9652->control_register &=
1131                     ~(RME9652_Master | RME9652_wsel);
1132                 break;
1133         case 1:
1134                 rme9652->control_register =
1135                     (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1136                 break;
1137         case 2:
1138                 rme9652->control_register |=
1139                     (RME9652_Master | RME9652_wsel);
1140                 break;
1141         }
1142
1143         if ((restart = rme9652->running)) {
1144                 rme9652_stop(rme9652);
1145         }
1146
1147         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1148
1149         if (restart) {
1150                 rme9652_start(rme9652);
1151         }
1152
1153         return 0;
1154 }
1155
1156 static int snd_rme9652_info_sync_mode(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1157 {
1158         static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1159
1160         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1161         uinfo->count = 1;
1162         uinfo->value.enumerated.items = 3;
1163         if (uinfo->value.enumerated.item > 2)
1164                 uinfo->value.enumerated.item = 2;
1165         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1166         return 0;
1167 }
1168
1169 static int snd_rme9652_get_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1170 {
1171         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1172
1173         spin_lock_irq(&rme9652->lock);
1174         ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1175         spin_unlock_irq(&rme9652->lock);
1176         return 0;
1177 }
1178
1179 static int snd_rme9652_put_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1180 {
1181         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1182         int change;
1183         unsigned int val;
1184
1185         val = ucontrol->value.enumerated.item[0] % 3;
1186         spin_lock_irq(&rme9652->lock);
1187         change = (int)val != rme9652_sync_mode(rme9652);
1188         rme9652_set_sync_mode(rme9652, val);
1189         spin_unlock_irq(&rme9652->lock);
1190         return change;
1191 }
1192
1193 #define RME9652_SYNC_PREF(xname, xindex) \
1194 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1195   .info = snd_rme9652_info_sync_pref, \
1196   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1197
1198 static int rme9652_sync_pref(rme9652_t *rme9652)
1199 {
1200         switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1201         case RME9652_SyncPref_ADAT1:
1202                 return RME9652_SYNC_FROM_ADAT1;
1203         case RME9652_SyncPref_ADAT2:
1204                 return RME9652_SYNC_FROM_ADAT2;
1205         case RME9652_SyncPref_ADAT3:
1206                 return RME9652_SYNC_FROM_ADAT3;
1207         case RME9652_SyncPref_SPDIF:
1208                 return RME9652_SYNC_FROM_SPDIF;
1209         }
1210         /* Not reachable */
1211         return 0;
1212 }
1213
1214 static int rme9652_set_sync_pref(rme9652_t *rme9652, int pref)
1215 {
1216         int restart;
1217
1218         rme9652->control_register &= ~RME9652_SyncPref_Mask;
1219         switch (pref) {
1220         case RME9652_SYNC_FROM_ADAT1:
1221                 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1222                 break;
1223         case RME9652_SYNC_FROM_ADAT2:
1224                 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1225                 break;
1226         case RME9652_SYNC_FROM_ADAT3:
1227                 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1228                 break;
1229         case RME9652_SYNC_FROM_SPDIF:
1230                 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1231                 break;
1232         }
1233
1234         if ((restart = rme9652->running)) {
1235                 rme9652_stop(rme9652);
1236         }
1237
1238         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1239
1240         if (restart) {
1241                 rme9652_start(rme9652);
1242         }
1243
1244         return 0;
1245 }
1246
1247 static int snd_rme9652_info_sync_pref(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1248 {
1249         static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1250         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1251
1252         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1253         uinfo->count = 1;
1254         uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1255         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1256                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1257         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1258         return 0;
1259 }
1260
1261 static int snd_rme9652_get_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1262 {
1263         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1264
1265         spin_lock_irq(&rme9652->lock);
1266         ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1267         spin_unlock_irq(&rme9652->lock);
1268         return 0;
1269 }
1270
1271 static int snd_rme9652_put_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1272 {
1273         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1274         int change, max;
1275         unsigned int val;
1276
1277         if (!snd_rme9652_use_is_exclusive(rme9652))
1278                 return -EBUSY;
1279         max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1280         val = ucontrol->value.enumerated.item[0] % max;
1281         spin_lock_irq(&rme9652->lock);
1282         change = (int)val != rme9652_sync_pref(rme9652);
1283         rme9652_set_sync_pref(rme9652, val);
1284         spin_unlock_irq(&rme9652->lock);
1285         return change;
1286 }
1287
1288 static int snd_rme9652_info_thru(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1289 {
1290         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1291         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1292         uinfo->count = rme9652->ss_channels;
1293         uinfo->value.integer.min = 0;
1294         uinfo->value.integer.max = 1;
1295         return 0;
1296 }
1297
1298 static int snd_rme9652_get_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1299 {
1300         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1301         unsigned int k;
1302         u32 thru_bits = rme9652->thru_bits;
1303
1304         for (k = 0; k < rme9652->ss_channels; ++k) {
1305                 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1306         }
1307         return 0;
1308 }
1309
1310 static int snd_rme9652_put_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1311 {
1312         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1313         int change;
1314         unsigned int chn;
1315         u32 thru_bits = 0;
1316
1317         if (!snd_rme9652_use_is_exclusive(rme9652))
1318                 return -EBUSY;
1319
1320         for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1321                 if (ucontrol->value.integer.value[chn])
1322                         thru_bits |= 1 << chn;
1323         }
1324
1325         spin_lock_irq(&rme9652->lock);
1326         change = thru_bits ^ rme9652->thru_bits;
1327         if (change) {
1328                 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1329                         if (!(change & (1 << chn)))
1330                                 continue;
1331                         rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1332                 }
1333         }
1334         spin_unlock_irq(&rme9652->lock);
1335         return !!change;
1336 }
1337
1338 #define RME9652_PASSTHRU(xname, xindex) \
1339 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1340   .info = snd_rme9652_info_passthru, \
1341   .put = snd_rme9652_put_passthru, \
1342   .get = snd_rme9652_get_passthru }
1343
1344 static int snd_rme9652_info_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
1345 {
1346         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1347         uinfo->count = 1;
1348         uinfo->value.integer.min = 0;
1349         uinfo->value.integer.max = 1;
1350         return 0;
1351 }
1352
1353 static int snd_rme9652_get_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1354 {
1355         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1356
1357         spin_lock_irq(&rme9652->lock);
1358         ucontrol->value.integer.value[0] = rme9652->passthru;
1359         spin_unlock_irq(&rme9652->lock);
1360         return 0;
1361 }
1362
1363 static int snd_rme9652_put_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1364 {
1365         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1366         int change;
1367         unsigned int val;
1368         int err = 0;
1369
1370         if (!snd_rme9652_use_is_exclusive(rme9652))
1371                 return -EBUSY;
1372
1373         val = ucontrol->value.integer.value[0] & 1;
1374         spin_lock_irq(&rme9652->lock);
1375         change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1376         if (change)
1377                 err = rme9652_set_passthru(rme9652, val);
1378         spin_unlock_irq(&rme9652->lock);
1379         return err ? err : change;
1380 }
1381
1382 /* Read-only switches */
1383
1384 #define RME9652_SPDIF_RATE(xname, xindex) \
1385 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1386   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1387   .info = snd_rme9652_info_spdif_rate, \
1388   .get = snd_rme9652_get_spdif_rate }
1389
1390 static int snd_rme9652_info_spdif_rate(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1391 {
1392         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1393         uinfo->count = 1;
1394         uinfo->value.integer.min = 0;
1395         uinfo->value.integer.max = 96000;
1396         return 0;
1397 }
1398
1399 static int snd_rme9652_get_spdif_rate(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1400 {
1401         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1402
1403         spin_lock_irq(&rme9652->lock);
1404         ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1405         spin_unlock_irq(&rme9652->lock);
1406         return 0;
1407 }
1408
1409 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1410 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1411   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1412   .info = snd_rme9652_info_adat_sync, \
1413   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1414
1415 static int snd_rme9652_info_adat_sync(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1416 {
1417         static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1418
1419         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1420         uinfo->count = 1;
1421         uinfo->value.enumerated.items = 4;
1422         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1423                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1424         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1425         return 0;
1426 }
1427
1428 static int snd_rme9652_get_adat_sync(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1429 {
1430         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1431         unsigned int mask1, mask2, val;
1432
1433         switch (kcontrol->private_value) {
1434         case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1435         case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1436         case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1437         default: return -EINVAL;
1438         }
1439         val = rme9652_read(rme9652, RME9652_status_register);
1440         ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1441         ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1442         return 0;
1443 }
1444
1445 #define RME9652_TC_VALID(xname, xindex) \
1446 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1447   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1448   .info = snd_rme9652_info_tc_valid, \
1449   .get = snd_rme9652_get_tc_valid }
1450
1451 static int snd_rme9652_info_tc_valid(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1452 {
1453         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1454         uinfo->count = 1;
1455         uinfo->value.integer.min = 0;
1456         uinfo->value.integer.max = 1;
1457         return 0;
1458 }
1459
1460 static int snd_rme9652_get_tc_valid(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1461 {
1462         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1463
1464         ucontrol->value.integer.value[0] =
1465                 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1466         return 0;
1467 }
1468
1469 #if ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1470
1471 /* FIXME: this routine needs a port to the new control API --jk */
1472
1473 static int snd_rme9652_get_tc_value(void *private_data,
1474                                     snd_kswitch_t *kswitch,
1475                                     snd_switch_t *uswitch)
1476 {
1477         rme9652_t *s = (rme9652_t *) private_data;
1478         u32 value;
1479         int i;
1480
1481         uswitch->type = SNDRV_SW_TYPE_DWORD;
1482
1483         if ((rme9652_read(s, RME9652_status_register) &
1484              RME9652_tc_valid) == 0) {
1485                 uswitch->value.data32[0] = 0;
1486                 return 0;
1487         }
1488
1489         /* timecode request */
1490
1491         rme9652_write(s, RME9652_time_code, 0);
1492
1493         /* XXX bug alert: loop-based timing !!!! */
1494
1495         for (i = 0; i < 50; i++) {
1496                 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1497                         break;
1498         }
1499
1500         if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1501                 return -EIO;
1502         }
1503
1504         value = 0;
1505
1506         for (i = 0; i < 32; i++) {
1507                 value >>= 1;
1508
1509                 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1510                         value |= 0x80000000;
1511         }
1512
1513         if (value > 2 * 60 * 48000) {
1514                 value -= 2 * 60 * 48000;
1515         } else {
1516                 value = 0;
1517         }
1518
1519         uswitch->value.data32[0] = value;
1520
1521         return 0;
1522 }
1523
1524 #endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1525
1526 static snd_kcontrol_new_t snd_rme9652_controls[] = {
1527 {
1528         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1529         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1530         .info =         snd_rme9652_control_spdif_info,
1531         .get =          snd_rme9652_control_spdif_get,
1532         .put =          snd_rme9652_control_spdif_put,
1533 },
1534 {
1535         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1536         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1537         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1538         .info =         snd_rme9652_control_spdif_stream_info,
1539         .get =          snd_rme9652_control_spdif_stream_get,
1540         .put =          snd_rme9652_control_spdif_stream_put,
1541 },
1542 {
1543         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1544         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1545         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1546         .info =         snd_rme9652_control_spdif_mask_info,
1547         .get =          snd_rme9652_control_spdif_mask_get,
1548         .private_value = IEC958_AES0_NONAUDIO |
1549                         IEC958_AES0_PROFESSIONAL |
1550                         IEC958_AES0_CON_EMPHASIS,
1551 },
1552 {
1553         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1554         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1555         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1556         .info =         snd_rme9652_control_spdif_mask_info,
1557         .get =          snd_rme9652_control_spdif_mask_get,
1558         .private_value = IEC958_AES0_NONAUDIO |
1559                         IEC958_AES0_PROFESSIONAL |
1560                         IEC958_AES0_PRO_EMPHASIS,
1561 },
1562 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1563 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1564 RME9652_SYNC_MODE("Sync Mode", 0),
1565 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1566 {
1567         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1568         .name = "Channels Thru",
1569         .index = 0,
1570         .info = snd_rme9652_info_thru,
1571         .get = snd_rme9652_get_thru,
1572         .put = snd_rme9652_put_thru,
1573 },
1574 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1575 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1576 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1577 RME9652_TC_VALID("Timecode Valid", 0),
1578 RME9652_PASSTHRU("Passthru", 0)
1579 };
1580
1581 static snd_kcontrol_new_t snd_rme9652_adat3_check =
1582 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1583
1584 static snd_kcontrol_new_t snd_rme9652_adat1_input =
1585 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1586
1587 static int snd_rme9652_create_controls(snd_card_t *card, rme9652_t *rme9652)
1588 {
1589         unsigned int idx;
1590         int err;
1591         snd_kcontrol_t *kctl;
1592
1593         for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1594                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1595                         return err;
1596                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1597                         rme9652->spdif_ctl = kctl;
1598         }
1599
1600         if (rme9652->ss_channels == RME9652_NCHANNELS)
1601                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1602                         return err;
1603
1604         if (rme9652->hw_rev >= 15)
1605                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1606                         return err;
1607
1608         return 0;
1609 }
1610
1611 /*------------------------------------------------------------
1612    /proc interface
1613  ------------------------------------------------------------*/
1614
1615 static void
1616 snd_rme9652_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1617 {
1618         rme9652_t *rme9652 = (rme9652_t *) entry->private_data;
1619         u32 thru_bits = rme9652->thru_bits;
1620         int show_auto_sync_source = 0;
1621         int i;
1622         unsigned int status;
1623         int x;
1624
1625         status = rme9652_read(rme9652, RME9652_status_register);
1626
1627         snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1628         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1629                     rme9652->capture_buffer, rme9652->playback_buffer);
1630         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1631                     rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1632         snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1633
1634         snd_iprintf(buffer, "\n");
1635
1636         x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1637                                              RME9652_latency));
1638
1639         snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1640                     x, (unsigned long) rme9652->period_bytes);
1641         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1642                     rme9652_hw_pointer(rme9652));
1643         snd_iprintf(buffer, "Passthru: %s\n",
1644                     rme9652->passthru ? "yes" : "no");
1645
1646         if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1647                 snd_iprintf(buffer, "Clock mode: autosync\n");
1648                 show_auto_sync_source = 1;
1649         } else if (rme9652->control_register & RME9652_wsel) {
1650                 if (status & RME9652_wsel_rd) {
1651                         snd_iprintf(buffer, "Clock mode: word clock\n");
1652                 } else {
1653                         snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1654                 }
1655         } else {
1656                 snd_iprintf(buffer, "Clock mode: master\n");
1657         }
1658
1659         if (show_auto_sync_source) {
1660                 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1661                 case RME9652_SyncPref_ADAT1:
1662                         snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1663                         break;
1664                 case RME9652_SyncPref_ADAT2:
1665                         snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1666                         break;
1667                 case RME9652_SyncPref_ADAT3:
1668                         snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1669                         break;
1670                 case RME9652_SyncPref_SPDIF:
1671                         snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1672                         break;
1673                 default:
1674                         snd_iprintf(buffer, "Pref. sync source: ???\n");
1675                 }
1676         }
1677
1678         if (rme9652->hw_rev >= 15)
1679                 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1680                             (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1681                             "Internal" : "ADAT1 optical");
1682
1683         snd_iprintf(buffer, "\n");
1684
1685         switch (rme9652_decode_spdif_in(rme9652->control_register &
1686                                         RME9652_inp)) {
1687         case RME9652_SPDIFIN_OPTICAL:
1688                 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1689                 break;
1690         case RME9652_SPDIFIN_COAXIAL:
1691                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1692                 break;
1693         case RME9652_SPDIFIN_INTERN:
1694                 snd_iprintf(buffer, "IEC958 input: Internal\n");
1695                 break;
1696         default:
1697                 snd_iprintf(buffer, "IEC958 input: ???\n");
1698                 break;
1699         }
1700
1701         if (rme9652->control_register & RME9652_opt_out) {
1702                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1703         } else {
1704                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1705         }
1706
1707         if (rme9652->control_register & RME9652_PRO) {
1708                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1709         } else {
1710                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1711         }
1712
1713         if (rme9652->control_register & RME9652_EMP) {
1714                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1715         } else {
1716                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1717         }
1718
1719         if (rme9652->control_register & RME9652_Dolby) {
1720                 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1721         } else {
1722                 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1723         }
1724
1725         i = rme9652_spdif_sample_rate(rme9652);
1726
1727         if (i < 0) {
1728                 snd_iprintf(buffer,
1729                             "IEC958 sample rate: error flag set\n");
1730         } else if (i == 0) {
1731                 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1732         } else {
1733                 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1734         }
1735
1736         snd_iprintf(buffer, "\n");
1737
1738         snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1739                     rme9652_adat_sample_rate(rme9652));
1740
1741         /* Sync Check */
1742
1743         x = status & RME9652_sync_0;
1744         if (status & RME9652_lock_0) {
1745                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1746         } else {
1747                 snd_iprintf(buffer, "ADAT1: No Lock\n");
1748         }
1749
1750         x = status & RME9652_sync_1;
1751         if (status & RME9652_lock_1) {
1752                 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1753         } else {
1754                 snd_iprintf(buffer, "ADAT2: No Lock\n");
1755         }
1756
1757         x = status & RME9652_sync_2;
1758         if (status & RME9652_lock_2) {
1759                 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1760         } else {
1761                 snd_iprintf(buffer, "ADAT3: No Lock\n");
1762         }
1763
1764         snd_iprintf(buffer, "\n");
1765
1766         snd_iprintf(buffer, "Timecode signal: %s\n",
1767                     (status & RME9652_tc_valid) ? "yes" : "no");
1768
1769         /* thru modes */
1770
1771         snd_iprintf(buffer, "Punch Status:\n\n");
1772
1773         for (i = 0; i < rme9652->ss_channels; i++) {
1774                 if (thru_bits & (1 << i)) {
1775                         snd_iprintf(buffer, "%2d:  on ", i + 1);
1776                 } else {
1777                         snd_iprintf(buffer, "%2d: off ", i + 1);
1778                 }
1779
1780                 if (((i + 1) % 8) == 0) {
1781                         snd_iprintf(buffer, "\n");
1782                 }
1783         }
1784
1785         snd_iprintf(buffer, "\n");
1786 }
1787
1788 static void __devinit snd_rme9652_proc_init(rme9652_t *rme9652)
1789 {
1790         snd_info_entry_t *entry;
1791
1792         if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1793                 snd_info_set_text_ops(entry, rme9652, 1024, snd_rme9652_proc_read);
1794 }
1795
1796 static void snd_rme9652_free_buffers(rme9652_t *rme9652)
1797 {
1798         snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1799         snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1800 }
1801
1802 static int snd_rme9652_free(rme9652_t *rme9652)
1803 {
1804         if (rme9652->irq >= 0)
1805                 rme9652_stop(rme9652);
1806         snd_rme9652_free_buffers(rme9652);
1807
1808         if (rme9652->irq >= 0)
1809                 free_irq(rme9652->irq, (void *)rme9652);
1810         if (rme9652->iobase)
1811                 iounmap(rme9652->iobase);
1812         if (rme9652->port)
1813                 pci_release_regions(rme9652->pci);
1814
1815         pci_disable_device(rme9652->pci);
1816         return 0;
1817 }
1818
1819 static int __devinit snd_rme9652_initialize_memory(rme9652_t *rme9652)
1820 {
1821         unsigned long pb_bus, cb_bus;
1822
1823         if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1824             snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1825                 if (rme9652->capture_dma_buf.area)
1826                         snd_dma_free_pages(&rme9652->capture_dma_buf);
1827                 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1828                 return -ENOMEM;
1829         }
1830
1831         /* Align to bus-space 64K boundary */
1832
1833         cb_bus = (rme9652->capture_dma_buf.addr + 0xFFFF) & ~0xFFFFl;
1834         pb_bus = (rme9652->playback_dma_buf.addr + 0xFFFF) & ~0xFFFFl;
1835
1836         /* Tell the card where it is */
1837
1838         rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1839         rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1840
1841         rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1842         rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1843
1844         return 0;
1845 }
1846
1847 static void snd_rme9652_set_defaults(rme9652_t *rme9652)
1848 {
1849         unsigned int k;
1850
1851         /* ASSUMPTION: rme9652->lock is either held, or
1852            there is no need to hold it (e.g. during module
1853            initalization).
1854          */
1855
1856         /* set defaults:
1857
1858            SPDIF Input via Coax
1859            autosync clock mode
1860            maximum latency (7 = 8192 samples, 64Kbyte buffer,
1861            which implies 2 4096 sample, 32Kbyte periods).
1862
1863            if rev 1.5, initialize the S/PDIF receiver.
1864
1865          */
1866
1867         rme9652->control_register =
1868             RME9652_inp_0 | rme9652_encode_latency(7);
1869
1870         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1871
1872         rme9652_reset_hw_pointer(rme9652);
1873         rme9652_compute_period_size(rme9652);
1874
1875         /* default: thru off for all channels */
1876
1877         for (k = 0; k < RME9652_NCHANNELS; ++k)
1878                 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1879
1880         rme9652->thru_bits = 0;
1881         rme9652->passthru = 0;
1882
1883         /* set a default rate so that the channel map is set up */
1884
1885         rme9652_set_rate(rme9652, 48000);
1886 }
1887
1888 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1889 {
1890         rme9652_t *rme9652 = (rme9652_t *) dev_id;
1891
1892         if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1893                 return IRQ_NONE;
1894         }
1895
1896         rme9652_write(rme9652, RME9652_irq_clear, 0);
1897
1898         if (rme9652->capture_substream) {
1899                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1900         }
1901
1902         if (rme9652->playback_substream) {
1903                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1904         }
1905         return IRQ_HANDLED;
1906 }
1907
1908 static snd_pcm_uframes_t snd_rme9652_hw_pointer(snd_pcm_substream_t *substream)
1909 {
1910         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1911         return rme9652_hw_pointer(rme9652);
1912 }
1913
1914 static char *rme9652_channel_buffer_location(rme9652_t *rme9652,
1915                                              int stream,
1916                                              int channel)
1917
1918 {
1919         int mapped_channel;
1920
1921         snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1922
1923         if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1924                 return NULL;
1925         }
1926
1927         if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1928                 return rme9652->capture_buffer +
1929                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1930         } else {
1931                 return rme9652->playback_buffer +
1932                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1933         }
1934 }
1935
1936 static int snd_rme9652_playback_copy(snd_pcm_substream_t *substream, int channel,
1937                                      snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
1938 {
1939         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1940         char *channel_buf;
1941
1942         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1943
1944         channel_buf = rme9652_channel_buffer_location (rme9652,
1945                                                        substream->pstr->stream,
1946                                                        channel);
1947         snd_assert(channel_buf != NULL, return -EIO);
1948         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
1949                 return -EFAULT;
1950         return count;
1951 }
1952
1953 static int snd_rme9652_capture_copy(snd_pcm_substream_t *substream, int channel,
1954                                     snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
1955 {
1956         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1957         char *channel_buf;
1958
1959         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1960
1961         channel_buf = rme9652_channel_buffer_location (rme9652,
1962                                                        substream->pstr->stream,
1963                                                        channel);
1964         snd_assert(channel_buf != NULL, return -EIO);
1965         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
1966                 return -EFAULT;
1967         return count;
1968 }
1969
1970 static int snd_rme9652_hw_silence(snd_pcm_substream_t *substream, int channel,
1971                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
1972 {
1973         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1974         char *channel_buf;
1975
1976         channel_buf = rme9652_channel_buffer_location (rme9652,
1977                                                        substream->pstr->stream,
1978                                                        channel);
1979         snd_assert(channel_buf != NULL, return -EIO);
1980         memset(channel_buf + pos * 4, 0, count * 4);
1981         return count;
1982 }
1983
1984 static int snd_rme9652_reset(snd_pcm_substream_t *substream)
1985 {
1986         snd_pcm_runtime_t *runtime = substream->runtime;
1987         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1988         snd_pcm_substream_t *other;
1989         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1990                 other = rme9652->capture_substream;
1991         else
1992                 other = rme9652->playback_substream;
1993         if (rme9652->running)
1994                 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1995         else
1996                 runtime->status->hw_ptr = 0;
1997         if (other) {
1998                 struct list_head *pos;
1999                 snd_pcm_substream_t *s;
2000                 snd_pcm_runtime_t *oruntime = other->runtime;
2001                 snd_pcm_group_for_each(pos, substream) {
2002                         s = snd_pcm_group_substream_entry(pos);
2003                         if (s == other) {
2004                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
2005                                 break;
2006                         }
2007                 }
2008         }
2009         return 0;
2010 }
2011
2012 static int snd_rme9652_hw_params(snd_pcm_substream_t *substream,
2013                                  snd_pcm_hw_params_t *params)
2014 {
2015         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2016         int err;
2017         pid_t this_pid;
2018         pid_t other_pid;
2019
2020         spin_lock_irq(&rme9652->lock);
2021
2022         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2023                 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2024                 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
2025                 this_pid = rme9652->playback_pid;
2026                 other_pid = rme9652->capture_pid;
2027         } else {
2028                 this_pid = rme9652->capture_pid;
2029                 other_pid = rme9652->playback_pid;
2030         }
2031
2032         if ((other_pid > 0) && (this_pid != other_pid)) {
2033
2034                 /* The other stream is open, and not by the same
2035                    task as this one. Make sure that the parameters
2036                    that matter are the same.
2037                  */
2038
2039                 if ((int)params_rate(params) !=
2040                     rme9652_adat_sample_rate(rme9652)) {
2041                         spin_unlock_irq(&rme9652->lock);
2042                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2043                         return -EBUSY;
2044                 }
2045
2046                 if (params_period_size(params) != rme9652->period_bytes / 4) {
2047                         spin_unlock_irq(&rme9652->lock);
2048                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2049                         return -EBUSY;
2050                 }
2051
2052                 /* We're fine. */
2053
2054                 spin_unlock_irq(&rme9652->lock);
2055                 return 0;
2056
2057         } else {
2058                 spin_unlock_irq(&rme9652->lock);
2059         }
2060
2061         /* how to make sure that the rate matches an externally-set one ?
2062          */
2063
2064         if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2065                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2066                 return err;
2067         }
2068
2069         if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2070                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2071                 return err;
2072         }
2073
2074         return 0;
2075 }
2076
2077 static int snd_rme9652_channel_info(snd_pcm_substream_t *substream,
2078                                     snd_pcm_channel_info_t *info)
2079 {
2080         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2081         int chn;
2082
2083         snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2084
2085         if ((chn = rme9652->channel_map[info->channel]) < 0) {
2086                 return -EINVAL;
2087         }
2088
2089         info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2090         info->first = 0;
2091         info->step = 32;
2092         return 0;
2093 }
2094
2095 static int snd_rme9652_ioctl(snd_pcm_substream_t *substream,
2096                              unsigned int cmd, void *arg)
2097 {
2098         switch (cmd) {
2099         case SNDRV_PCM_IOCTL1_RESET:
2100         {
2101                 return snd_rme9652_reset(substream);
2102         }
2103         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2104         {
2105                 snd_pcm_channel_info_t *info = arg;
2106                 return snd_rme9652_channel_info(substream, info);
2107         }
2108         default:
2109                 break;
2110         }
2111
2112         return snd_pcm_lib_ioctl(substream, cmd, arg);
2113 }
2114
2115 static void rme9652_silence_playback(rme9652_t *rme9652)
2116 {
2117         memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2118 }
2119
2120 static int snd_rme9652_trigger(snd_pcm_substream_t *substream,
2121                                int cmd)
2122 {
2123         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2124         snd_pcm_substream_t *other;
2125         int running;
2126         spin_lock(&rme9652->lock);
2127         running = rme9652->running;
2128         switch (cmd) {
2129         case SNDRV_PCM_TRIGGER_START:
2130                 running |= 1 << substream->stream;
2131                 break;
2132         case SNDRV_PCM_TRIGGER_STOP:
2133                 running &= ~(1 << substream->stream);
2134                 break;
2135         default:
2136                 snd_BUG();
2137                 spin_unlock(&rme9652->lock);
2138                 return -EINVAL;
2139         }
2140         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2141                 other = rme9652->capture_substream;
2142         else
2143                 other = rme9652->playback_substream;
2144
2145         if (other) {
2146                 struct list_head *pos;
2147                 snd_pcm_substream_t *s;
2148                 snd_pcm_group_for_each(pos, substream) {
2149                         s = snd_pcm_group_substream_entry(pos);
2150                         if (s == other) {
2151                                 snd_pcm_trigger_done(s, substream);
2152                                 if (cmd == SNDRV_PCM_TRIGGER_START)
2153                                         running |= 1 << s->stream;
2154                                 else
2155                                         running &= ~(1 << s->stream);
2156                                 goto _ok;
2157                         }
2158                 }
2159                 if (cmd == SNDRV_PCM_TRIGGER_START) {
2160                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2161                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2162                                 rme9652_silence_playback(rme9652);
2163                 } else {
2164                         if (running &&
2165                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2166                                 rme9652_silence_playback(rme9652);
2167                 }
2168         } else {
2169                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2170                         rme9652_silence_playback(rme9652);
2171         }
2172  _ok:
2173         snd_pcm_trigger_done(substream, substream);
2174         if (!rme9652->running && running)
2175                 rme9652_start(rme9652);
2176         else if (rme9652->running && !running)
2177                 rme9652_stop(rme9652);
2178         rme9652->running = running;
2179         spin_unlock(&rme9652->lock);
2180
2181         return 0;
2182 }
2183
2184 static int snd_rme9652_prepare(snd_pcm_substream_t *substream)
2185 {
2186         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2187         unsigned long flags;
2188         int result = 0;
2189
2190         spin_lock_irqsave(&rme9652->lock, flags);
2191         if (!rme9652->running)
2192                 rme9652_reset_hw_pointer(rme9652);
2193         spin_unlock_irqrestore(&rme9652->lock, flags);
2194         return result;
2195 }
2196
2197 static snd_pcm_hardware_t snd_rme9652_playback_subinfo =
2198 {
2199         .info =                 (SNDRV_PCM_INFO_MMAP |
2200                                  SNDRV_PCM_INFO_MMAP_VALID |
2201                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2202                                  SNDRV_PCM_INFO_SYNC_START |
2203                                  SNDRV_PCM_INFO_DOUBLE),
2204         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2205         .rates =                (SNDRV_PCM_RATE_44100 |
2206                                  SNDRV_PCM_RATE_48000 |
2207                                  SNDRV_PCM_RATE_88200 |
2208                                  SNDRV_PCM_RATE_96000),
2209         .rate_min =             44100,
2210         .rate_max =             96000,
2211         .channels_min =         10,
2212         .channels_max =         26,
2213         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2214         .period_bytes_min =     (64 * 4) * 10,
2215         .period_bytes_max =     (8192 * 4) * 26,
2216         .periods_min =          2,
2217         .periods_max =          2,
2218         .fifo_size =            0,
2219 };
2220
2221 static snd_pcm_hardware_t snd_rme9652_capture_subinfo =
2222 {
2223         .info =                 (SNDRV_PCM_INFO_MMAP |
2224                                  SNDRV_PCM_INFO_MMAP_VALID |
2225                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2226                                  SNDRV_PCM_INFO_SYNC_START),
2227         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2228         .rates =                (SNDRV_PCM_RATE_44100 |
2229                                  SNDRV_PCM_RATE_48000 |
2230                                  SNDRV_PCM_RATE_88200 |
2231                                  SNDRV_PCM_RATE_96000),
2232         .rate_min =             44100,
2233         .rate_max =             96000,
2234         .channels_min =         10,
2235         .channels_max =         26,
2236         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2237         .period_bytes_min =     (64 * 4) * 10,
2238         .period_bytes_max =     (8192 * 4) * 26,
2239         .periods_min =          2,
2240         .periods_max =          2,
2241         .fifo_size =            0,
2242 };
2243
2244 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2245
2246 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = {
2247         .count = ARRAY_SIZE(period_sizes),
2248         .list = period_sizes,
2249         .mask = 0
2250 };
2251
2252 static int snd_rme9652_hw_rule_channels(snd_pcm_hw_params_t *params,
2253                                         snd_pcm_hw_rule_t *rule)
2254 {
2255         rme9652_t *rme9652 = rule->private;
2256         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2257         unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2258         return snd_interval_list(c, 2, list, 0);
2259 }
2260
2261 static int snd_rme9652_hw_rule_channels_rate(snd_pcm_hw_params_t *params,
2262                                              snd_pcm_hw_rule_t *rule)
2263 {
2264         rme9652_t *rme9652 = rule->private;
2265         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2266         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2267         if (r->min > 48000) {
2268                 snd_interval_t t = {
2269                         .min = rme9652->ds_channels,
2270                         .max = rme9652->ds_channels,
2271                         .integer = 1,
2272                 };
2273                 return snd_interval_refine(c, &t);
2274         } else if (r->max < 88200) {
2275                 snd_interval_t t = {
2276                         .min = rme9652->ss_channels,
2277                         .max = rme9652->ss_channels,
2278                         .integer = 1,
2279                 };
2280                 return snd_interval_refine(c, &t);
2281         }
2282         return 0;
2283 }
2284
2285 static int snd_rme9652_hw_rule_rate_channels(snd_pcm_hw_params_t *params,
2286                                              snd_pcm_hw_rule_t *rule)
2287 {
2288         rme9652_t *rme9652 = rule->private;
2289         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2290         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2291         if (c->min >= rme9652->ss_channels) {
2292                 snd_interval_t t = {
2293                         .min = 44100,
2294                         .max = 48000,
2295                         .integer = 1,
2296                 };
2297                 return snd_interval_refine(r, &t);
2298         } else if (c->max <= rme9652->ds_channels) {
2299                 snd_interval_t t = {
2300                         .min = 88200,
2301                         .max = 96000,
2302                         .integer = 1,
2303                 };
2304                 return snd_interval_refine(r, &t);
2305         }
2306         return 0;
2307 }
2308
2309 static int snd_rme9652_playback_open(snd_pcm_substream_t *substream)
2310 {
2311         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2312         snd_pcm_runtime_t *runtime = substream->runtime;
2313
2314         spin_lock_irq(&rme9652->lock);
2315
2316         snd_pcm_set_sync(substream);
2317
2318         runtime->hw = snd_rme9652_playback_subinfo;
2319         runtime->dma_area = rme9652->playback_buffer;
2320         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2321
2322         if (rme9652->capture_substream == NULL) {
2323                 rme9652_stop(rme9652);
2324                 rme9652_set_thru(rme9652, -1, 0);
2325         }
2326
2327         rme9652->playback_pid = current->pid;
2328         rme9652->playback_substream = substream;
2329
2330         spin_unlock_irq(&rme9652->lock);
2331
2332         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2333         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2334         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2335                              snd_rme9652_hw_rule_channels, rme9652,
2336                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2337         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2338                              snd_rme9652_hw_rule_channels_rate, rme9652,
2339                              SNDRV_PCM_HW_PARAM_RATE, -1);
2340         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2341                              snd_rme9652_hw_rule_rate_channels, rme9652,
2342                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2343
2344         rme9652->creg_spdif_stream = rme9652->creg_spdif;
2345         rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2346         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2347                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2348         return 0;
2349 }
2350
2351 static int snd_rme9652_playback_release(snd_pcm_substream_t *substream)
2352 {
2353         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2354
2355         spin_lock_irq(&rme9652->lock);
2356
2357         rme9652->playback_pid = -1;
2358         rme9652->playback_substream = NULL;
2359
2360         spin_unlock_irq(&rme9652->lock);
2361
2362         rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2363         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2364                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2365         return 0;
2366 }
2367
2368
2369 static int snd_rme9652_capture_open(snd_pcm_substream_t *substream)
2370 {
2371         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2372         snd_pcm_runtime_t *runtime = substream->runtime;
2373
2374         spin_lock_irq(&rme9652->lock);
2375
2376         snd_pcm_set_sync(substream);
2377
2378         runtime->hw = snd_rme9652_capture_subinfo;
2379         runtime->dma_area = rme9652->capture_buffer;
2380         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2381
2382         if (rme9652->playback_substream == NULL) {
2383                 rme9652_stop(rme9652);
2384                 rme9652_set_thru(rme9652, -1, 0);
2385         }
2386
2387         rme9652->capture_pid = current->pid;
2388         rme9652->capture_substream = substream;
2389
2390         spin_unlock_irq(&rme9652->lock);
2391
2392         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2393         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2394         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2395                              snd_rme9652_hw_rule_channels, rme9652,
2396                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2397         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2398                              snd_rme9652_hw_rule_channels_rate, rme9652,
2399                              SNDRV_PCM_HW_PARAM_RATE, -1);
2400         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2401                              snd_rme9652_hw_rule_rate_channels, rme9652,
2402                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2403         return 0;
2404 }
2405
2406 static int snd_rme9652_capture_release(snd_pcm_substream_t *substream)
2407 {
2408         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2409
2410         spin_lock_irq(&rme9652->lock);
2411
2412         rme9652->capture_pid = -1;
2413         rme9652->capture_substream = NULL;
2414
2415         spin_unlock_irq(&rme9652->lock);
2416         return 0;
2417 }
2418
2419 static snd_pcm_ops_t snd_rme9652_playback_ops = {
2420         .open =         snd_rme9652_playback_open,
2421         .close =        snd_rme9652_playback_release,
2422         .ioctl =        snd_rme9652_ioctl,
2423         .hw_params =    snd_rme9652_hw_params,
2424         .prepare =      snd_rme9652_prepare,
2425         .trigger =      snd_rme9652_trigger,
2426         .pointer =      snd_rme9652_hw_pointer,
2427         .copy =         snd_rme9652_playback_copy,
2428         .silence =      snd_rme9652_hw_silence,
2429 };
2430
2431 static snd_pcm_ops_t snd_rme9652_capture_ops = {
2432         .open =         snd_rme9652_capture_open,
2433         .close =        snd_rme9652_capture_release,
2434         .ioctl =        snd_rme9652_ioctl,
2435         .hw_params =    snd_rme9652_hw_params,
2436         .prepare =      snd_rme9652_prepare,
2437         .trigger =      snd_rme9652_trigger,
2438         .pointer =      snd_rme9652_hw_pointer,
2439         .copy =         snd_rme9652_capture_copy,
2440 };
2441
2442 static int __devinit snd_rme9652_create_pcm(snd_card_t *card,
2443                                          rme9652_t *rme9652)
2444 {
2445         snd_pcm_t *pcm;
2446         int err;
2447
2448         if ((err = snd_pcm_new(card,
2449                                rme9652->card_name,
2450                                0, 1, 1, &pcm)) < 0) {
2451                 return err;
2452         }
2453
2454         rme9652->pcm = pcm;
2455         pcm->private_data = rme9652;
2456         strcpy(pcm->name, rme9652->card_name);
2457
2458         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2459         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2460
2461         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2462
2463         return 0;
2464 }
2465
2466 static int __devinit snd_rme9652_create(snd_card_t *card,
2467                                      rme9652_t *rme9652,
2468                                      int precise_ptr)
2469 {
2470         struct pci_dev *pci = rme9652->pci;
2471         int err;
2472         int status;
2473         unsigned short rev;
2474
2475         rme9652->irq = -1;
2476         rme9652->card = card;
2477
2478         pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2479
2480         switch (rev & 0xff) {
2481         case 3:
2482         case 4:
2483         case 8:
2484         case 9:
2485                 break;
2486
2487         default:
2488                 /* who knows? */
2489                 return -ENODEV;
2490         }
2491
2492         if ((err = pci_enable_device(pci)) < 0)
2493                 return err;
2494
2495         spin_lock_init(&rme9652->lock);
2496
2497         if ((err = pci_request_regions(pci, "rme9652")) < 0)
2498                 return err;
2499         rme9652->port = pci_resource_start(pci, 0);
2500         rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2501         if (rme9652->iobase == NULL) {
2502                 snd_printk("unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2503                 return -EBUSY;
2504         }
2505
2506         if (request_irq(pci->irq, snd_rme9652_interrupt, SA_INTERRUPT|SA_SHIRQ, "rme9652", (void *)rme9652)) {
2507                 snd_printk("unable to request IRQ %d\n", pci->irq);
2508                 return -EBUSY;
2509         }
2510         rme9652->irq = pci->irq;
2511         rme9652->precise_ptr = precise_ptr;
2512
2513         /* Determine the h/w rev level of the card. This seems like
2514            a particularly kludgy way to encode it, but its what RME
2515            chose to do, so we follow them ...
2516         */
2517
2518         status = rme9652_read(rme9652, RME9652_status_register);
2519         if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2520                 rme9652->hw_rev = 15;
2521         } else {
2522                 rme9652->hw_rev = 11;
2523         }
2524
2525         /* Differentiate between the standard Hammerfall, and the
2526            "Light", which does not have the expansion board. This
2527            method comes from information received from Mathhias
2528            Clausen at RME. Display the EEPROM and h/w revID where
2529            relevant.
2530         */
2531
2532         switch (rev) {
2533         case 8: /* original eprom */
2534                 strcpy(card->driver, "RME9636");
2535                 if (rme9652->hw_rev == 15) {
2536                         rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2537                 } else {
2538                         rme9652->card_name = "RME Digi9636";
2539                 }
2540                 rme9652->ss_channels = RME9636_NCHANNELS;
2541                 break;
2542         case 9: /* W36_G EPROM */
2543                 strcpy(card->driver, "RME9636");
2544                 rme9652->card_name = "RME Digi9636 (Rev G)";
2545                 rme9652->ss_channels = RME9636_NCHANNELS;
2546                 break;
2547         case 4: /* W52_G EPROM */
2548                 strcpy(card->driver, "RME9652");
2549                 rme9652->card_name = "RME Digi9652 (Rev G)";
2550                 rme9652->ss_channels = RME9652_NCHANNELS;
2551                 break;
2552         case 3: /* original eprom */
2553                 strcpy(card->driver, "RME9652");
2554                 if (rme9652->hw_rev == 15) {
2555                         rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2556                 } else {
2557                         rme9652->card_name = "RME Digi9652";
2558                 }
2559                 rme9652->ss_channels = RME9652_NCHANNELS;
2560                 break;
2561         }
2562
2563         rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2564
2565         pci_set_master(rme9652->pci);
2566
2567         if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2568                 return err;
2569         }
2570
2571         if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2572                 return err;
2573         }
2574
2575         if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2576                 return err;
2577         }
2578
2579         snd_rme9652_proc_init(rme9652);
2580
2581         rme9652->last_spdif_sample_rate = -1;
2582         rme9652->last_adat_sample_rate = -1;
2583         rme9652->playback_pid = -1;
2584         rme9652->capture_pid = -1;
2585         rme9652->capture_substream = NULL;
2586         rme9652->playback_substream = NULL;
2587
2588         snd_rme9652_set_defaults(rme9652);
2589
2590         if (rme9652->hw_rev == 15) {
2591                 rme9652_initialize_spdif_receiver (rme9652);
2592         }
2593
2594         return 0;
2595 }
2596
2597 static void snd_rme9652_card_free(snd_card_t *card)
2598 {
2599         rme9652_t *rme9652 = (rme9652_t *) card->private_data;
2600
2601         if (rme9652)
2602                 snd_rme9652_free(rme9652);
2603 }
2604
2605 static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2606                                        const struct pci_device_id *pci_id)
2607 {
2608         static int dev;
2609         rme9652_t *rme9652;
2610         snd_card_t *card;
2611         int err;
2612
2613         if (dev >= SNDRV_CARDS)
2614                 return -ENODEV;
2615         if (!enable[dev]) {
2616                 dev++;
2617                 return -ENOENT;
2618         }
2619
2620         card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2621                             sizeof(rme9652_t));
2622
2623         if (!card)
2624                 return -ENOMEM;
2625
2626         rme9652 = (rme9652_t *) card->private_data;
2627         card->private_free = snd_rme9652_card_free;
2628         rme9652->dev = dev;
2629         rme9652->pci = pci;
2630         snd_card_set_dev(card, &pci->dev);
2631
2632         if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2633                 snd_card_free(card);
2634                 return err;
2635         }
2636
2637         strcpy(card->shortname, rme9652->card_name);
2638
2639         sprintf(card->longname, "%s at 0x%lx, irq %d",
2640                 card->shortname, rme9652->port, rme9652->irq);
2641
2642
2643         if ((err = snd_card_register(card)) < 0) {
2644                 snd_card_free(card);
2645                 return err;
2646         }
2647         pci_set_drvdata(pci, card);
2648         dev++;
2649         return 0;
2650 }
2651
2652 static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2653 {
2654         snd_card_free(pci_get_drvdata(pci));
2655         pci_set_drvdata(pci, NULL);
2656 }
2657
2658 static struct pci_driver driver = {
2659         .name     = "RME Digi9652 (Hammerfall)",
2660         .id_table = snd_rme9652_ids,
2661         .probe    = snd_rme9652_probe,
2662         .remove   = __devexit_p(snd_rme9652_remove),
2663 };
2664
2665 static int __init alsa_card_hammerfall_init(void)
2666 {
2667         return pci_module_init(&driver);
2668 }
2669
2670 static void __exit alsa_card_hammerfall_exit(void)
2671 {
2672         pci_unregister_driver(&driver);
2673 }
2674
2675 module_init(alsa_card_hammerfall_init)
2676 module_exit(alsa_card_hammerfall_exit)