sound/pci/rme9652/rme9652.c

   1 /*
   2  *   ALSA driver for RME Digi9652 audio interfaces
   3  *
   4  *      Copyright (c) 1999 IEM - Winfried Ritsch
   5  *      Copyright (c) 1999-2001  Paul Davis
   6  *
   7  *   This program is free software; you can redistribute it and/or modify
   8  *   it under the terms of the GNU General Public License as published by
   9  *   the Free Software Foundation; either version 2 of the License, or
  10  *   (at your option) any later version.
  11  *
  12  *   This program is distributed in the hope that it will be useful,
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *   GNU General Public License for more details.
  16  *
  17  *   You should have received a copy of the GNU General Public License
  18  *   along with this program; if not, write to the Free Software
  19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  *
  21  */
  22
  23 #include <sound/driver.h>
  24 #include <linux/delay.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/slab.h>
  29 #include <linux/moduleparam.h>
  30
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/pcm.h>
  34 #include <sound/info.h>
  35 #include <sound/asoundef.h>
  36 #include <sound/initval.h>
  37
  38 #include <asm/current.h>
  39 #include <asm/io.h>
  40
  41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  43 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  44 static int precise_ptr[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* Enable precise pointer */
  45 static int boot_devs;
  46
  47 module_param_array(index, int, boot_devs, 0444);
  48 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  49 module_param_array(id, charp, boot_devs, 0444);
  50 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  51 module_param_array(enable, bool, boot_devs, 0444);
  52 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  53 module_param_array(precise_ptr, bool, boot_devs, 0444);
  54 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  55 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  56 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  57 MODULE_LICENSE("GPL");
  58 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
  59                 "{RME,Hammerfall-Light}}");
  60
  61 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  62    capture, one for playback. Both the ADAT and S/PDIF channels appear
  63    to the host CPU in the same block of memory. There is no functional
  64    difference between them in terms of access.
  65
  66    The Hammerfall Light is identical to the Hammerfall, except that it
  67    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  68 */
  69
  70 #define RME9652_NCHANNELS       26
  71 #define RME9636_NCHANNELS       18
  72
  73 /* Preferred sync source choices - used by "sync_pref" control switch */
  74
  75 #define RME9652_SYNC_FROM_SPDIF 0
  76 #define RME9652_SYNC_FROM_ADAT1 1
  77 #define RME9652_SYNC_FROM_ADAT2 2
  78 #define RME9652_SYNC_FROM_ADAT3 3
  79
  80 /* Possible sources of S/PDIF input */
  81
  82 #define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  83 #define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  84 #define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  85
  86 /* ------------- Status-Register bits --------------------- */
  87
  88 #define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  89 #define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  90 #define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  91 #define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  92 #define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  93 #define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  94                                         /* bits 6-15 encode h/w buffer pointer position */
  95 #define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
  96 #define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
  97 #define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
  98 #define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
  99 #define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
 100 #define RME9652_tc_out     (1<<21)      /* time-code out bit */
 101 #define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
 102 #define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
 103 #define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
 104 #define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
 105 #define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
 106 #define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
 107 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
 108
 109 #define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
 110 #define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
 111 #define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
 112 #define rme9652_decode_spdif_rate(x) ((x)>>22)
 113
 114 /* Bit 6..15 : h/w buffer pointer */
 115
 116 #define RME9652_buf_pos   0x000FFC0
 117
 118 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 119    Rev G EEPROMS and Rev 1.5 cards or later.
 120 */
 121
 122 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 123
 124 #ifndef PCI_VENDOR_ID_XILINX
 125 #define PCI_VENDOR_ID_XILINX            0x10ee
 126 #endif
 127 #ifndef PCI_DEVICE_ID_XILINX_HAMMERFALL
 128 #define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
 129 #endif
 130
 131 /* amount of io space we remap for register access. i'm not sure we
 132    even need this much, but 1K is nice round number :)
 133 */
 134
 135 #define RME9652_IO_EXTENT     1024
 136
 137 #define RME9652_init_buffer       0
 138 #define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 139 #define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 140 #define RME9652_control_register  64
 141 #define RME9652_irq_clear         96
 142 #define RME9652_time_code         100   /* useful if used with alesis adat */
 143 #define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 144
 145 /* Read-only registers */
 146
 147 /* Writing to any of the register locations writes to the status
 148    register. We'll use the first location as our point of access.
 149 */
 150
 151 #define RME9652_status_register    0
 152
 153 /* --------- Control-Register Bits ---------------- */
 154
 155
 156 #define RME9652_start_bit          (1<<0)       /* start record/play */
 157                                                 /* bits 1-3 encode buffersize/latency */
 158 #define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 159 #define RME9652_IE                 (1<<5)       /* Interupt Enable */
 160 #define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 161 #define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 162 #define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 163 #define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 164 #define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 165 #define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 166 #define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 167 #define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 168 #define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 169 #define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 170 #define RME9652_SyncPref_ADAT2     (1<<16)
 171 #define RME9652_SyncPref_ADAT3     (1<<17)
 172 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 173 #define RME9652_SPDIF_SELECT       (1<<19)
 174 #define RME9652_SPDIF_CLOCK        (1<<20)
 175 #define RME9652_SPDIF_WRITE        (1<<21)
 176 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 177
 178 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 179
 180 #define RME9652_latency            0x0e
 181 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 182 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 183 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 184 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 185 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 186 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 187
 188 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 189 #define RME9652_SyncPref_ADAT1     0
 190 #define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 191
 192 /* the size of a substream (1 mono data stream) */
 193
 194 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 195 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 196
 197 /* the size of the area we need to allocate for DMA transfers. the
 198    size is the same regardless of the number of channels - the
 199    9636 still uses the same memory area.
 200
 201    Note that we allocate 1 more channel than is apparently needed
 202    because the h/w seems to write 1 byte beyond the end of the last
 203    page. Sigh.
 204 */
 205
 206 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 207 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 208
 209 typedef struct snd_rme9652 {
 210         int dev;
 211
 212         spinlock_t lock;
 213         int irq;
 214         unsigned long port;
 215         unsigned long iobase;
 216
 217         int precise_ptr;
 218
 219         u32 control_register;   /* cached value */
 220         u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 221
 222         u32 creg_spdif;
 223         u32 creg_spdif_stream;
 224
 225         char *card_name;                /* hammerfall or hammerfall light names */
 226
 227         size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 228         size_t prev_hw_offset;          /* previous hw offset */
 229         size_t max_jitter;              /* maximum jitter in frames for
 230                                            hw pointer */
 231         size_t period_bytes;            /* guess what this is */
 232
 233         unsigned char ds_channels;
 234         unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 235
 236         struct snd_dma_buffer playback_dma_buf;
 237         struct snd_dma_buffer capture_dma_buf;
 238
 239         unsigned char *capture_buffer;  /* suitably aligned address */
 240         unsigned char *playback_buffer; /* suitably aligned address */
 241
 242         pid_t capture_pid;
 243         pid_t playback_pid;
 244
 245         snd_pcm_substream_t *capture_substream;
 246         snd_pcm_substream_t *playback_substream;
 247         int running;
 248
 249         int passthru;                   /* non-zero if doing pass-thru */
 250         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 251
 252         int last_spdif_sample_rate;     /* so that we can catch externally ... */
 253         int last_adat_sample_rate;      /* ... induced rate changes            */
 254
 255         char *channel_map;
 256
 257         snd_card_t *card;
 258         snd_pcm_t *pcm;
 259         struct pci_dev *pci;
 260         snd_kcontrol_t *spdif_ctl;
 261
 262 } rme9652_t;
 263
 264 /* These tables map the ALSA channels 1..N to the channels that we
 265    need to use in order to find the relevant channel buffer. RME
 266    refer to this kind of mapping as between "the ADAT channel and
 267    the DMA channel." We index it using the logical audio channel,
 268    and the value is the DMA channel (i.e. channel buffer number)
 269    where the data for that channel can be read/written from/to.
 270 */
 271
 272 static char channel_map_9652_ss[26] = {
 273         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 274         18, 19, 20, 21, 22, 23, 24, 25
 275 };
 276
 277 static char channel_map_9636_ss[26] = {
 278         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
 279         /* channels 16 and 17 are S/PDIF */
 280         24, 25,
 281         /* channels 18-25 don't exist */
 282         -1, -1, -1, -1, -1, -1, -1, -1
 283 };
 284
 285 static char channel_map_9652_ds[26] = {
 286         /* ADAT channels are remapped */
 287         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 288         /* channels 12 and 13 are S/PDIF */
 289         24, 25,
 290         /* others don't exist */
 291         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 292 };
 293
 294 static char channel_map_9636_ds[26] = {
 295         /* ADAT channels are remapped */
 296         1, 3, 5, 7, 9, 11, 13, 15,
 297         /* channels 8 and 9 are S/PDIF */
 298         24, 25
 299         /* others don't exist */
 300         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 301 };
 302
 303 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 304 {
 305         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 306         dmab->dev.dev = snd_dma_pci_data(pci);
 307         if (! snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 308                 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 309                                         size, dmab) < 0)
 310                         return -ENOMEM;
 311         }
 312         return 0;
 313 }
 314
 315 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 316 {
 317         if (dmab->area)
 318                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 319 }
 320
 321
 322 static struct pci_device_id snd_rme9652_ids[] = {
 323         {
 324                 .vendor    = 0x10ee,
 325                 .device    = 0x3fc4,
 326                 .subvendor = PCI_ANY_ID,
 327                 .subdevice = PCI_ANY_ID,
 328         },      /* RME Digi9652 */
 329         { 0, },
 330 };
 331
 332 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 333
 334 static inline void rme9652_write(rme9652_t *rme9652, int reg, int val)
 335 {
 336         writel(val, rme9652->iobase + reg);
 337 }
 338
 339 static inline unsigned int rme9652_read(rme9652_t *rme9652, int reg)
 340 {
 341         return readl(rme9652->iobase + reg);
 342 }
 343
 344 static inline int snd_rme9652_use_is_exclusive(rme9652_t *rme9652)
 345 {
 346         unsigned long flags;
 347         int ret = 1;
 348
 349         spin_lock_irqsave(&rme9652->lock, flags);
 350         if ((rme9652->playback_pid != rme9652->capture_pid) &&
 351             (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 352                 ret = 0;
 353         }
 354         spin_unlock_irqrestore(&rme9652->lock, flags);
 355         return ret;
 356 }
 357
 358 static inline int rme9652_adat_sample_rate(rme9652_t *rme9652)
 359 {
 360         if (rme9652_running_double_speed(rme9652)) {
 361                 return (rme9652_read(rme9652, RME9652_status_register) &
 362                         RME9652_fs48) ? 96000 : 88200;
 363         } else {
 364                 return (rme9652_read(rme9652, RME9652_status_register) &
 365                         RME9652_fs48) ? 48000 : 44100;
 366         }
 367 }
 368
 369 static inline void rme9652_compute_period_size(rme9652_t *rme9652)
 370 {
 371         unsigned int i;
 372
 373         i = rme9652->control_register & RME9652_latency;
 374         rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 375         rme9652->hw_offsetmask =
 376                 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 377         rme9652->max_jitter = 80;
 378 }
 379
 380 static snd_pcm_uframes_t rme9652_hw_pointer(rme9652_t *rme9652)
 381 {
 382         int status;
 383         unsigned int offset, frag;
 384         snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 385         snd_pcm_sframes_t delta;
 386
 387         status = rme9652_read(rme9652, RME9652_status_register);
 388         if (!rme9652->precise_ptr)
 389                 return (status & RME9652_buffer_id) ? period_size : 0;
 390         offset = status & RME9652_buf_pos;
 391
 392         /* The hardware may give a backward movement for up to 80 frames
 393            Martin Kirst <martin.kirst@freenet.de> knows the details.
 394         */
 395
 396         delta = rme9652->prev_hw_offset - offset;
 397         delta &= 0xffff;
 398         if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 399                 offset = rme9652->prev_hw_offset;
 400         else
 401                 rme9652->prev_hw_offset = offset;
 402         offset &= rme9652->hw_offsetmask;
 403         offset /= 4;
 404         frag = status & RME9652_buffer_id;
 405
 406         if (offset < period_size) {
 407                 if (offset > rme9652->max_jitter) {
 408                         if (frag)
 409                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
 410                 } else if (!frag)
 411                         return 0;
 412                 offset -= rme9652->max_jitter;
 413                 if (offset < 0)
 414                         offset += period_size * 2;
 415         } else {
 416                 if (offset > period_size + rme9652->max_jitter) {
 417                         if (!frag)
 418                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
 419                 } else if (frag)
 420                         return period_size;
 421                 offset -= rme9652->max_jitter;
 422         }
 423
 424         return offset;
 425 }
 426
 427 static inline void rme9652_reset_hw_pointer(rme9652_t *rme9652)
 428 {
 429         int i;
 430
 431         /* reset the FIFO pointer to zero. We do this by writing to 8
 432            registers, each of which is a 32bit wide register, and set
 433            them all to zero. Note that s->iobase is a pointer to
 434            int32, not pointer to char.
 435         */
 436
 437         for (i = 0; i < 8; i++) {
 438                 rme9652_write(rme9652, i * 4, 0);
 439                 udelay(10);
 440         }
 441         rme9652->prev_hw_offset = 0;
 442 }
 443
 444 static inline void rme9652_start(rme9652_t *s)
 445 {
 446         s->control_register |= (RME9652_IE | RME9652_start_bit);
 447         rme9652_write(s, RME9652_control_register, s->control_register);
 448 }
 449
 450 static inline void rme9652_stop(rme9652_t *s)
 451 {
 452         s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 453         rme9652_write(s, RME9652_control_register, s->control_register);
 454 }
 455
 456 static int rme9652_set_interrupt_interval(rme9652_t *s,
 457                                           unsigned int frames)
 458 {
 459         int restart = 0;
 460         int n;
 461
 462         spin_lock_irq(&s->lock);
 463
 464         if ((restart = s->running)) {
 465                 rme9652_stop(s);
 466         }
 467
 468         frames >>= 7;
 469         n = 0;
 470         while (frames) {
 471                 n++;
 472                 frames >>= 1;
 473         }
 474
 475         s->control_register &= ~RME9652_latency;
 476         s->control_register |= rme9652_encode_latency(n);
 477
 478         rme9652_write(s, RME9652_control_register, s->control_register);
 479
 480         rme9652_compute_period_size(s);
 481
 482         if (restart)
 483                 rme9652_start(s);
 484
 485         spin_unlock_irq(&s->lock);
 486
 487         return 0;
 488 }
 489
 490 static int rme9652_set_rate(rme9652_t *rme9652, int rate)
 491 {
 492         int restart;
 493         int reject_if_open = 0;
 494         int xrate;
 495
 496         if (!snd_rme9652_use_is_exclusive (rme9652)) {
 497                 return -EBUSY;
 498         }
 499
 500         /* Changing from a "single speed" to a "double speed" rate is
 501            not allowed if any substreams are open. This is because
 502            such a change causes a shift in the location of
 503            the DMA buffers and a reduction in the number of available
 504            buffers.
 505
 506            Note that a similar but essentially insoluble problem
 507            exists for externally-driven rate changes. All we can do
 508            is to flag rate changes in the read/write routines.
 509          */
 510
 511         spin_lock_irq(&rme9652->lock);
 512         xrate = rme9652_adat_sample_rate(rme9652);
 513
 514         switch (rate) {
 515         case 44100:
 516                 if (xrate > 48000) {
 517                         reject_if_open = 1;
 518                 }
 519                 rate = 0;
 520                 break;
 521         case 48000:
 522                 if (xrate > 48000) {
 523                         reject_if_open = 1;
 524                 }
 525                 rate = RME9652_freq;
 526                 break;
 527         case 88200:
 528                 if (xrate < 48000) {
 529                         reject_if_open = 1;
 530                 }
 531                 rate = RME9652_DS;
 532                 break;
 533         case 96000:
 534                 if (xrate < 48000) {
 535                         reject_if_open = 1;
 536                 }
 537                 rate = RME9652_DS | RME9652_freq;
 538                 break;
 539         default:
 540                 spin_unlock_irq(&rme9652->lock);
 541                 return -EINVAL;
 542         }
 543
 544         if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 545                 spin_unlock_irq(&rme9652->lock);
 546                 return -EBUSY;
 547         }
 548
 549         if ((restart = rme9652->running)) {
 550                 rme9652_stop(rme9652);
 551         }
 552         rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 553         rme9652->control_register |= rate;
 554         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 555
 556         if (restart) {
 557                 rme9652_start(rme9652);
 558         }
 559
 560         if (rate & RME9652_DS) {
 561                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 562                         rme9652->channel_map = channel_map_9652_ds;
 563                 } else {
 564                         rme9652->channel_map = channel_map_9636_ds;
 565                 }
 566         } else {
 567                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 568                         rme9652->channel_map = channel_map_9652_ss;
 569                 } else {
 570                         rme9652->channel_map = channel_map_9636_ss;
 571                 }
 572         }
 573
 574         spin_unlock_irq(&rme9652->lock);
 575         return 0;
 576 }
 577
 578 static void rme9652_set_thru(rme9652_t *rme9652, int channel, int enable)
 579 {
 580         int i;
 581
 582         rme9652->passthru = 0;
 583
 584         if (channel < 0) {
 585
 586                 /* set thru for all channels */
 587
 588                 if (enable) {
 589                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 590                                 rme9652->thru_bits |= (1 << i);
 591                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 592                         }
 593                 } else {
 594                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 595                                 rme9652->thru_bits &= ~(1 << i);
 596                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 597                         }
 598                 }
 599
 600         } else {
 601                 int mapped_channel;
 602
 603                 snd_assert(channel == RME9652_NCHANNELS, return);
 604
 605                 mapped_channel = rme9652->channel_map[channel];
 606
 607                 if (enable) {
 608                         rme9652->thru_bits |= (1 << mapped_channel);
 609                 } else {
 610                         rme9652->thru_bits &= ~(1 << mapped_channel);
 611                 }
 612
 613                 rme9652_write(rme9652,
 614                                RME9652_thru_base + mapped_channel * 4,
 615                                enable ? 1 : 0);
 616         }
 617 }
 618
 619 static int rme9652_set_passthru(rme9652_t *rme9652, int onoff)
 620 {
 621         if (onoff) {
 622                 rme9652_set_thru(rme9652, -1, 1);
 623
 624                 /* we don't want interrupts, so do a
 625                    custom version of rme9652_start().
 626                 */
 627
 628                 rme9652->control_register =
 629                         RME9652_inp_0 |
 630                         rme9652_encode_latency(7) |
 631                         RME9652_start_bit;
 632
 633                 rme9652_reset_hw_pointer(rme9652);
 634
 635                 rme9652_write(rme9652, RME9652_control_register,
 636                               rme9652->control_register);
 637                 rme9652->passthru = 1;
 638         } else {
 639                 rme9652_set_thru(rme9652, -1, 0);
 640                 rme9652_stop(rme9652);
 641                 rme9652->passthru = 0;
 642         }
 643
 644         return 0;
 645 }
 646
 647 static void rme9652_spdif_set_bit (rme9652_t *rme9652, int mask, int onoff)
 648 {
 649         if (onoff)
 650                 rme9652->control_register |= mask;
 651         else
 652                 rme9652->control_register &= ~mask;
 653
 654         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 655 }
 656
 657 static void rme9652_spdif_write_byte (rme9652_t *rme9652, const int val)
 658 {
 659         long mask;
 660         long i;
 661
 662         for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 663                 if (val & mask)
 664                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 665                 else
 666                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 667
 668                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 669                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 670         }
 671 }
 672
 673 static int rme9652_spdif_read_byte (rme9652_t *rme9652)
 674 {
 675         long mask;
 676         long val;
 677         long i;
 678
 679         val = 0;
 680
 681         for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 682                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 683                 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 684                         val |= mask;
 685                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 686         }
 687
 688         return val;
 689 }
 690
 691 static void rme9652_write_spdif_codec (rme9652_t *rme9652, const int address, const int data)
 692 {
 693         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 694         rme9652_spdif_write_byte (rme9652, 0x20);
 695         rme9652_spdif_write_byte (rme9652, address);
 696         rme9652_spdif_write_byte (rme9652, data);
 697         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 698 }
 699
 700
 701 static int rme9652_spdif_read_codec (rme9652_t *rme9652, const int address)
 702 {
 703         int ret;
 704
 705         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 706         rme9652_spdif_write_byte (rme9652, 0x20);
 707         rme9652_spdif_write_byte (rme9652, address);
 708         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 709         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 710
 711         rme9652_spdif_write_byte (rme9652, 0x21);
 712         ret = rme9652_spdif_read_byte (rme9652);
 713         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 714
 715         return ret;
 716 }
 717
 718 static void rme9652_initialize_spdif_receiver (rme9652_t *rme9652)
 719 {
 720         /* XXX what unsets this ? */
 721
 722         rme9652->control_register |= RME9652_SPDIF_RESET;
 723
 724         rme9652_write_spdif_codec (rme9652, 4, 0x40);
 725         rme9652_write_spdif_codec (rme9652, 17, 0x13);
 726         rme9652_write_spdif_codec (rme9652, 6, 0x02);
 727 }
 728
 729 static inline int rme9652_spdif_sample_rate(rme9652_t *s)
 730 {
 731         unsigned int rate_bits;
 732
 733         if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 734                 return -1;      /* error condition */
 735         }
 736
 737         if (s->hw_rev == 15) {
 738
 739                 int x, y, ret;
 740
 741                 x = rme9652_spdif_read_codec (s, 30);
 742
 743                 if (x != 0)
 744                         y = 48000 * 64 / x;
 745                 else
 746                         y = 0;
 747
 748                 if      (y > 30400 && y < 33600)  ret = 32000;
 749                 else if (y > 41900 && y < 46000)  ret = 44100;
 750                 else if (y > 46000 && y < 50400)  ret = 48000;
 751                 else if (y > 60800 && y < 67200)  ret = 64000;
 752                 else if (y > 83700 && y < 92000)  ret = 88200;
 753                 else if (y > 92000 && y < 100000) ret = 96000;
 754                 else                              ret = 0;
 755                 return ret;
 756         }
 757
 758         rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 759
 760         switch (rme9652_decode_spdif_rate(rate_bits)) {
 761         case 0x7:
 762                 return 32000;
 763                 break;
 764
 765         case 0x6:
 766                 return 44100;
 767                 break;
 768
 769         case 0x5:
 770                 return 48000;
 771                 break;
 772
 773         case 0x4:
 774                 return 88200;
 775                 break;
 776
 777         case 0x3:
 778                 return 96000;
 779                 break;
 780
 781         case 0x0:
 782                 return 64000;
 783                 break;
 784
 785         default:
 786                 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 787                            s->card_name, rate_bits);
 788                 return 0;
 789                 break;
 790         }
 791 }
 792
 793 /*-----------------------------------------------------------------------------
 794   Control Interface
 795   ----------------------------------------------------------------------------*/
 796
 797 static u32 snd_rme9652_convert_from_aes(snd_aes_iec958_t *aes)
 798 {
 799         u32 val = 0;
 800         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 801         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 802         if (val & RME9652_PRO)
 803                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 804         else
 805                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 806         return val;
 807 }
 808
 809 static void snd_rme9652_convert_to_aes(snd_aes_iec958_t *aes, u32 val)
 810 {
 811         aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 812                          ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 813         if (val & RME9652_PRO)
 814                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 815         else
 816                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 817 }
 818
 819 static int snd_rme9652_control_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 820 {
 821         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 822         uinfo->count = 1;
 823         return 0;
 824 }
 825
 826 static int snd_rme9652_control_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 827 {
 828         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 829
 830         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 831         return 0;
 832 }
 833
 834 static int snd_rme9652_control_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 835 {
 836         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 837         int change;
 838         u32 val;
 839
 840         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 841         spin_lock_irq(&rme9652->lock);
 842         change = val != rme9652->creg_spdif;
 843         rme9652->creg_spdif = val;
 844         spin_unlock_irq(&rme9652->lock);
 845         return change;
 846 }
 847
 848 static int snd_rme9652_control_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 849 {
 850         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 851         uinfo->count = 1;
 852         return 0;
 853 }
 854
 855 static int snd_rme9652_control_spdif_stream_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 856 {
 857         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 858
 859         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 860         return 0;
 861 }
 862
 863 static int snd_rme9652_control_spdif_stream_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 864 {
 865         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 866         int change;
 867         u32 val;
 868
 869         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 870         spin_lock_irq(&rme9652->lock);
 871         change = val != rme9652->creg_spdif_stream;
 872         rme9652->creg_spdif_stream = val;
 873         rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 874         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 875         spin_unlock_irq(&rme9652->lock);
 876         return change;
 877 }
 878
 879 static int snd_rme9652_control_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 880 {
 881         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 882         uinfo->count = 1;
 883         return 0;
 884 }
 885
 886 static int snd_rme9652_control_spdif_mask_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 887 {
 888         ucontrol->value.iec958.status[0] = kcontrol->private_value;
 889         return 0;
 890 }
 891
 892 #define RME9652_ADAT1_IN(xname, xindex) \
 893 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
 894   .info = snd_rme9652_info_adat1_in, \
 895   .get = snd_rme9652_get_adat1_in, \
 896   .put = snd_rme9652_put_adat1_in }
 897
 898 static unsigned int rme9652_adat1_in(rme9652_t *rme9652)
 899 {
 900         if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 901                 return 1;
 902         return 0;
 903 }
 904
 905 static int rme9652_set_adat1_input(rme9652_t *rme9652, int internal)
 906 {
 907         int restart = 0;
 908
 909         if (internal) {
 910                 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 911         } else {
 912                 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 913         }
 914
 915         /* XXX do we actually need to stop the card when we do this ? */
 916
 917         if ((restart = rme9652->running)) {
 918                 rme9652_stop(rme9652);
 919         }
 920
 921         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 922
 923         if (restart) {
 924                 rme9652_start(rme9652);
 925         }
 926
 927         return 0;
 928 }
 929
 930 static int snd_rme9652_info_adat1_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 931 {
 932         static char *texts[2] = {"ADAT1", "Internal"};
 933
 934         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 935         uinfo->count = 1;
 936         uinfo->value.enumerated.items = 2;
 937         if (uinfo->value.enumerated.item > 1)
 938                 uinfo->value.enumerated.item = 1;
 939         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
 940         return 0;
 941 }
 942
 943 static int snd_rme9652_get_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 944 {
 945         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 946
 947         spin_lock_irq(&rme9652->lock);
 948         ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 949         spin_unlock_irq(&rme9652->lock);
 950         return 0;
 951 }
 952
 953 static int snd_rme9652_put_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 954 {
 955         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
 956         int change;
 957         unsigned int val;
 958
 959         if (!snd_rme9652_use_is_exclusive(rme9652))
 960                 return -EBUSY;
 961         val = ucontrol->value.enumerated.item[0] % 2;
 962         spin_lock_irq(&rme9652->lock);
 963         change = val != rme9652_adat1_in(rme9652);
 964         if (change)
 965                 rme9652_set_adat1_input(rme9652, val);
 966         spin_unlock_irq(&rme9652->lock);
 967         return change;
 968 }
 969
 970 #define RME9652_SPDIF_IN(xname, xindex) \
 971 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
 972   .info = snd_rme9652_info_spdif_in, \
 973   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
 974
 975 static unsigned int rme9652_spdif_in(rme9652_t *rme9652)
 976 {
 977         return rme9652_decode_spdif_in(rme9652->control_register &
 978                                        RME9652_inp);
 979 }
 980
 981 static int rme9652_set_spdif_input(rme9652_t *rme9652, int in)
 982 {
 983         int restart = 0;
 984
 985         rme9652->control_register &= ~RME9652_inp;
 986         rme9652->control_register |= rme9652_encode_spdif_in(in);
 987
 988         if ((restart = rme9652->running)) {
 989                 rme9652_stop(rme9652);
 990         }
 991
 992         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 993
 994         if (restart) {
 995                 rme9652_start(rme9652);
 996         }
 997
 998         return 0;
 999 }
1000
1001 static int snd_rme9652_info_spdif_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1002 {
1003         static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1004
1005         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1006         uinfo->count = 1;
1007         uinfo->value.enumerated.items = 3;
1008         if (uinfo->value.enumerated.item > 2)
1009                 uinfo->value.enumerated.item = 2;
1010         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1011         return 0;
1012 }
1013
1014 static int snd_rme9652_get_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1015 {
1016         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1017
1018         spin_lock_irq(&rme9652->lock);
1019         ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1020         spin_unlock_irq(&rme9652->lock);
1021         return 0;
1022 }
1023
1024 static int snd_rme9652_put_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1025 {
1026         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1027         int change;
1028         unsigned int val;
1029
1030         if (!snd_rme9652_use_is_exclusive(rme9652))
1031                 return -EBUSY;
1032         val = ucontrol->value.enumerated.item[0] % 3;
1033         spin_lock_irq(&rme9652->lock);
1034         change = val != rme9652_spdif_in(rme9652);
1035         if (change)
1036                 rme9652_set_spdif_input(rme9652, val);
1037         spin_unlock_irq(&rme9652->lock);
1038         return change;
1039 }
1040
1041 #define RME9652_SPDIF_OUT(xname, xindex) \
1042 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1043   .info = snd_rme9652_info_spdif_out, \
1044   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1045
1046 static int rme9652_spdif_out(rme9652_t *rme9652)
1047 {
1048         return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1049 }
1050
1051 static int rme9652_set_spdif_output(rme9652_t *rme9652, int out)
1052 {
1053         int restart = 0;
1054
1055         if (out) {
1056                 rme9652->control_register |= RME9652_opt_out;
1057         } else {
1058                 rme9652->control_register &= ~RME9652_opt_out;
1059         }
1060
1061         if ((restart = rme9652->running)) {
1062                 rme9652_stop(rme9652);
1063         }
1064
1065         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1066
1067         if (restart) {
1068                 rme9652_start(rme9652);
1069         }
1070
1071         return 0;
1072 }
1073
1074 static int snd_rme9652_info_spdif_out(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1075 {
1076         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1077         uinfo->count = 1;
1078         uinfo->value.integer.min = 0;
1079         uinfo->value.integer.max = 1;
1080         return 0;
1081 }
1082
1083 static int snd_rme9652_get_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1084 {
1085         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1086
1087         spin_lock_irq(&rme9652->lock);
1088         ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1089         spin_unlock_irq(&rme9652->lock);
1090         return 0;
1091 }
1092
1093 static int snd_rme9652_put_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1094 {
1095         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1096         int change;
1097         unsigned int val;
1098
1099         if (!snd_rme9652_use_is_exclusive(rme9652))
1100                 return -EBUSY;
1101         val = ucontrol->value.integer.value[0] & 1;
1102         spin_lock_irq(&rme9652->lock);
1103         change = (int)val != rme9652_spdif_out(rme9652);
1104         rme9652_set_spdif_output(rme9652, val);
1105         spin_unlock_irq(&rme9652->lock);
1106         return change;
1107 }
1108
1109 #define RME9652_SYNC_MODE(xname, xindex) \
1110 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1111   .info = snd_rme9652_info_sync_mode, \
1112   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1113
1114 static int rme9652_sync_mode(rme9652_t *rme9652)
1115 {
1116         if (rme9652->control_register & RME9652_wsel) {
1117                 return 2;
1118         } else if (rme9652->control_register & RME9652_Master) {
1119                 return 1;
1120         } else {
1121                 return 0;
1122         }
1123 }
1124
1125 static int rme9652_set_sync_mode(rme9652_t *rme9652, int mode)
1126 {
1127         int restart = 0;
1128
1129         switch (mode) {
1130         case 0:
1131                 rme9652->control_register &=
1132                     ~(RME9652_Master | RME9652_wsel);
1133                 break;
1134         case 1:
1135                 rme9652->control_register =
1136                     (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1137                 break;
1138         case 2:
1139                 rme9652->control_register |=
1140                     (RME9652_Master | RME9652_wsel);
1141                 break;
1142         }
1143
1144         if ((restart = rme9652->running)) {
1145                 rme9652_stop(rme9652);
1146         }
1147
1148         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1149
1150         if (restart) {
1151                 rme9652_start(rme9652);
1152         }
1153
1154         return 0;
1155 }
1156
1157 static int snd_rme9652_info_sync_mode(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1158 {
1159         static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1160
1161         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1162         uinfo->count = 1;
1163         uinfo->value.enumerated.items = 3;
1164         if (uinfo->value.enumerated.item > 2)
1165                 uinfo->value.enumerated.item = 2;
1166         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1167         return 0;
1168 }
1169
1170 static int snd_rme9652_get_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1171 {
1172         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1173
1174         spin_lock_irq(&rme9652->lock);
1175         ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1176         spin_unlock_irq(&rme9652->lock);
1177         return 0;
1178 }
1179
1180 static int snd_rme9652_put_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1181 {
1182         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1183         int change;
1184         unsigned int val;
1185
1186         val = ucontrol->value.enumerated.item[0] % 3;
1187         spin_lock_irq(&rme9652->lock);
1188         change = (int)val != rme9652_sync_mode(rme9652);
1189         rme9652_set_sync_mode(rme9652, val);
1190         spin_unlock_irq(&rme9652->lock);
1191         return change;
1192 }
1193
1194 #define RME9652_SYNC_PREF(xname, xindex) \
1195 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1196   .info = snd_rme9652_info_sync_pref, \
1197   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1198
1199 static int rme9652_sync_pref(rme9652_t *rme9652)
1200 {
1201         switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1202         case RME9652_SyncPref_ADAT1:
1203                 return RME9652_SYNC_FROM_ADAT1;
1204         case RME9652_SyncPref_ADAT2:
1205                 return RME9652_SYNC_FROM_ADAT2;
1206         case RME9652_SyncPref_ADAT3:
1207                 return RME9652_SYNC_FROM_ADAT3;
1208         case RME9652_SyncPref_SPDIF:
1209                 return RME9652_SYNC_FROM_SPDIF;
1210         }
1211         /* Not reachable */
1212         return 0;
1213 }
1214
1215 static int rme9652_set_sync_pref(rme9652_t *rme9652, int pref)
1216 {
1217         int restart;
1218
1219         rme9652->control_register &= ~RME9652_SyncPref_Mask;
1220         switch (pref) {
1221         case RME9652_SYNC_FROM_ADAT1:
1222                 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1223                 break;
1224         case RME9652_SYNC_FROM_ADAT2:
1225                 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1226                 break;
1227         case RME9652_SYNC_FROM_ADAT3:
1228                 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1229                 break;
1230         case RME9652_SYNC_FROM_SPDIF:
1231                 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1232                 break;
1233         }
1234
1235         if ((restart = rme9652->running)) {
1236                 rme9652_stop(rme9652);
1237         }
1238
1239         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1240
1241         if (restart) {
1242                 rme9652_start(rme9652);
1243         }
1244
1245         return 0;
1246 }
1247
1248 static int snd_rme9652_info_sync_pref(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1249 {
1250         static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1251         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1252
1253         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1254         uinfo->count = 1;
1255         uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1256         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1257                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1258         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1259         return 0;
1260 }
1261
1262 static int snd_rme9652_get_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1263 {
1264         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1265
1266         spin_lock_irq(&rme9652->lock);
1267         ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1268         spin_unlock_irq(&rme9652->lock);
1269         return 0;
1270 }
1271
1272 static int snd_rme9652_put_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1273 {
1274         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1275         int change, max;
1276         unsigned int val;
1277
1278         if (!snd_rme9652_use_is_exclusive(rme9652))
1279                 return -EBUSY;
1280         max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1281         val = ucontrol->value.enumerated.item[0] % max;
1282         spin_lock_irq(&rme9652->lock);
1283         change = (int)val != rme9652_sync_pref(rme9652);
1284         rme9652_set_sync_pref(rme9652, val);
1285         spin_unlock_irq(&rme9652->lock);
1286         return change;
1287 }
1288
1289 static int snd_rme9652_info_thru(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1290 {
1291         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1292         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1293         uinfo->count = rme9652->ss_channels;
1294         uinfo->value.integer.min = 0;
1295         uinfo->value.integer.max = 1;
1296         return 0;
1297 }
1298
1299 static int snd_rme9652_get_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1300 {
1301         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1302         unsigned int k;
1303         u32 thru_bits = rme9652->thru_bits;
1304
1305         for (k = 0; k < rme9652->ss_channels; ++k) {
1306                 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1307         }
1308         return 0;
1309 }
1310
1311 static int snd_rme9652_put_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1312 {
1313         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1314         int change;
1315         unsigned int chn;
1316         u32 thru_bits = 0;
1317
1318         if (!snd_rme9652_use_is_exclusive(rme9652))
1319                 return -EBUSY;
1320
1321         for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1322                 if (ucontrol->value.integer.value[chn])
1323                         thru_bits |= 1 << chn;
1324         }
1325
1326         spin_lock_irq(&rme9652->lock);
1327         change = thru_bits ^ rme9652->thru_bits;
1328         if (change) {
1329                 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1330                         if (!(change & (1 << chn)))
1331                                 continue;
1332                         rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1333                 }
1334         }
1335         spin_unlock_irq(&rme9652->lock);
1336         return !!change;
1337 }
1338
1339 #define RME9652_PASSTHRU(xname, xindex) \
1340 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1341   .info = snd_rme9652_info_passthru, \
1342   .put = snd_rme9652_put_passthru, \
1343   .get = snd_rme9652_get_passthru }
1344
1345 static int snd_rme9652_info_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
1346 {
1347         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1348         uinfo->count = 1;
1349         uinfo->value.integer.min = 0;
1350         uinfo->value.integer.max = 1;
1351         return 0;
1352 }
1353
1354 static int snd_rme9652_get_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1355 {
1356         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1357
1358         spin_lock_irq(&rme9652->lock);
1359         ucontrol->value.integer.value[0] = rme9652->passthru;
1360         spin_unlock_irq(&rme9652->lock);
1361         return 0;
1362 }
1363
1364 static int snd_rme9652_put_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1365 {
1366         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1367         int change;
1368         unsigned int val;
1369         int err = 0;
1370
1371         if (!snd_rme9652_use_is_exclusive(rme9652))
1372                 return -EBUSY;
1373
1374         val = ucontrol->value.integer.value[0] & 1;
1375         spin_lock_irq(&rme9652->lock);
1376         change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1377         if (change)
1378                 err = rme9652_set_passthru(rme9652, val);
1379         spin_unlock_irq(&rme9652->lock);
1380         return err ? err : change;
1381 }
1382
1383 /* Read-only switches */
1384
1385 #define RME9652_SPDIF_RATE(xname, xindex) \
1386 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1387   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1388   .info = snd_rme9652_info_spdif_rate, \
1389   .get = snd_rme9652_get_spdif_rate }
1390
1391 static int snd_rme9652_info_spdif_rate(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1392 {
1393         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1394         uinfo->count = 1;
1395         uinfo->value.integer.min = 0;
1396         uinfo->value.integer.max = 96000;
1397         return 0;
1398 }
1399
1400 static int snd_rme9652_get_spdif_rate(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1401 {
1402         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1403
1404         spin_lock_irq(&rme9652->lock);
1405         ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1406         spin_unlock_irq(&rme9652->lock);
1407         return 0;
1408 }
1409
1410 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1411 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1412   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1413   .info = snd_rme9652_info_adat_sync, \
1414   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1415
1416 static int snd_rme9652_info_adat_sync(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1417 {
1418         static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1419
1420         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1421         uinfo->count = 1;
1422         uinfo->value.enumerated.items = 4;
1423         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1424                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1425         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1426         return 0;
1427 }
1428
1429 static int snd_rme9652_get_adat_sync(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1430 {
1431         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1432         unsigned int mask1, mask2, val;
1433
1434         switch (kcontrol->private_value) {
1435         case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1436         case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1437         case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1438         default: return -EINVAL;
1439         }
1440         val = rme9652_read(rme9652, RME9652_status_register);
1441         ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1442         ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1443         return 0;
1444 }
1445
1446 #define RME9652_TC_VALID(xname, xindex) \
1447 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1448   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1449   .info = snd_rme9652_info_tc_valid, \
1450   .get = snd_rme9652_get_tc_valid }
1451
1452 static int snd_rme9652_info_tc_valid(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1453 {
1454         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1455         uinfo->count = 1;
1456         uinfo->value.integer.min = 0;
1457         uinfo->value.integer.max = 1;
1458         return 0;
1459 }
1460
1461 static int snd_rme9652_get_tc_valid(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1462 {
1463         rme9652_t *rme9652 = snd_kcontrol_chip(kcontrol);
1464
1465         ucontrol->value.integer.value[0] =
1466                 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1467         return 0;
1468 }
1469
1470 #if ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1471
1472 /* FIXME: this routine needs a port to the new control API --jk */
1473
1474 static int snd_rme9652_get_tc_value(void *private_data,
1475                                     snd_kswitch_t *kswitch,
1476                                     snd_switch_t *uswitch)
1477 {
1478         rme9652_t *s = (rme9652_t *) private_data;
1479         u32 value;
1480         int i;
1481
1482         uswitch->type = SNDRV_SW_TYPE_DWORD;
1483
1484         if ((rme9652_read(s, RME9652_status_register) &
1485              RME9652_tc_valid) == 0) {
1486                 uswitch->value.data32[0] = 0;
1487                 return 0;
1488         }
1489
1490         /* timecode request */
1491
1492         rme9652_write(s, RME9652_time_code, 0);
1493
1494         /* XXX bug alert: loop-based timing !!!! */
1495
1496         for (i = 0; i < 50; i++) {
1497                 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1498                         break;
1499         }
1500
1501         if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1502                 return -EIO;
1503         }
1504
1505         value = 0;
1506
1507         for (i = 0; i < 32; i++) {
1508                 value >>= 1;
1509
1510                 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1511                         value |= 0x80000000;
1512         }
1513
1514         if (value > 2 * 60 * 48000) {
1515                 value -= 2 * 60 * 48000;
1516         } else {
1517                 value = 0;
1518         }
1519
1520         uswitch->value.data32[0] = value;
1521
1522         return 0;
1523 }
1524
1525 #endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1526
1527 static snd_kcontrol_new_t snd_rme9652_controls[] = {
1528 {
1529         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1530         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1531         .info =         snd_rme9652_control_spdif_info,
1532         .get =          snd_rme9652_control_spdif_get,
1533         .put =          snd_rme9652_control_spdif_put,
1534 },
1535 {
1536         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1537         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1538         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1539         .info =         snd_rme9652_control_spdif_stream_info,
1540         .get =          snd_rme9652_control_spdif_stream_get,
1541         .put =          snd_rme9652_control_spdif_stream_put,
1542 },
1543 {
1544         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1545         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1546         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1547         .info =         snd_rme9652_control_spdif_mask_info,
1548         .get =          snd_rme9652_control_spdif_mask_get,
1549         .private_value = IEC958_AES0_NONAUDIO |
1550                         IEC958_AES0_PROFESSIONAL |
1551                         IEC958_AES0_CON_EMPHASIS,
1552 },
1553 {
1554         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1555         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1556         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1557         .info =         snd_rme9652_control_spdif_mask_info,
1558         .get =          snd_rme9652_control_spdif_mask_get,
1559         .private_value = IEC958_AES0_NONAUDIO |
1560                         IEC958_AES0_PROFESSIONAL |
1561                         IEC958_AES0_PRO_EMPHASIS,
1562 },
1563 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1564 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1565 RME9652_SYNC_MODE("Sync Mode", 0),
1566 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1567 {
1568         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1569         .name = "Channels Thru",
1570         .index = 0,
1571         .info = snd_rme9652_info_thru,
1572         .get = snd_rme9652_get_thru,
1573         .put = snd_rme9652_put_thru,
1574 },
1575 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1576 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1577 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1578 RME9652_TC_VALID("Timecode Valid", 0),
1579 RME9652_PASSTHRU("Passthru", 0)
1580 };
1581
1582 static snd_kcontrol_new_t snd_rme9652_adat3_check =
1583 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1584
1585 static snd_kcontrol_new_t snd_rme9652_adat1_input =
1586 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1587
1588 int snd_rme9652_create_controls(snd_card_t *card, rme9652_t *rme9652)
1589 {
1590         unsigned int idx;
1591         int err;
1592         snd_kcontrol_t *kctl;
1593
1594         for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1595                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1596                         return err;
1597                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1598                         rme9652->spdif_ctl = kctl;
1599         }
1600
1601         if (rme9652->ss_channels == RME9652_NCHANNELS)
1602                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1603                         return err;
1604
1605         if (rme9652->hw_rev >= 15)
1606                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1607                         return err;
1608
1609         return 0;
1610 }
1611
1612 /*------------------------------------------------------------
1613    /proc interface
1614  ------------------------------------------------------------*/
1615
1616 static void
1617 snd_rme9652_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1618 {
1619         rme9652_t *rme9652 = (rme9652_t *) entry->private_data;
1620         u32 thru_bits = rme9652->thru_bits;
1621         int show_auto_sync_source = 0;
1622         int i;
1623         unsigned int status;
1624         int x;
1625
1626         status = rme9652_read(rme9652, RME9652_status_register);
1627
1628         snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1629         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1630                     rme9652->capture_buffer, rme9652->playback_buffer);
1631         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1632                     rme9652->irq, rme9652->port, rme9652->iobase);
1633         snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1634
1635         snd_iprintf(buffer, "\n");
1636
1637         x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1638                                              RME9652_latency));
1639
1640         snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1641                     x, (unsigned long) rme9652->period_bytes);
1642         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1643                     rme9652_hw_pointer(rme9652));
1644         snd_iprintf(buffer, "Passthru: %s\n",
1645                     rme9652->passthru ? "yes" : "no");
1646
1647         if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1648                 snd_iprintf(buffer, "Clock mode: autosync\n");
1649                 show_auto_sync_source = 1;
1650         } else if (rme9652->control_register & RME9652_wsel) {
1651                 if (status & RME9652_wsel_rd) {
1652                         snd_iprintf(buffer, "Clock mode: word clock\n");
1653                 } else {
1654                         snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1655                 }
1656         } else {
1657                 snd_iprintf(buffer, "Clock mode: master\n");
1658         }
1659
1660         if (show_auto_sync_source) {
1661                 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1662                 case RME9652_SyncPref_ADAT1:
1663                         snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1664                         break;
1665                 case RME9652_SyncPref_ADAT2:
1666                         snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1667                         break;
1668                 case RME9652_SyncPref_ADAT3:
1669                         snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1670                         break;
1671                 case RME9652_SyncPref_SPDIF:
1672                         snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1673                         break;
1674                 default:
1675                         snd_iprintf(buffer, "Pref. sync source: ???\n");
1676                 }
1677         }
1678
1679         if (rme9652->hw_rev >= 15)
1680                 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1681                             (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1682                             "Internal" : "ADAT1 optical");
1683
1684         snd_iprintf(buffer, "\n");
1685
1686         switch (rme9652_decode_spdif_in(rme9652->control_register &
1687                                         RME9652_inp)) {
1688         case RME9652_SPDIFIN_OPTICAL:
1689                 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1690                 break;
1691         case RME9652_SPDIFIN_COAXIAL:
1692                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1693                 break;
1694         case RME9652_SPDIFIN_INTERN:
1695                 snd_iprintf(buffer, "IEC958 input: Internal\n");
1696                 break;
1697         default:
1698                 snd_iprintf(buffer, "IEC958 input: ???\n");
1699                 break;
1700         }
1701
1702         if (rme9652->control_register & RME9652_opt_out) {
1703                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1704         } else {
1705                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1706         }
1707
1708         if (rme9652->control_register & RME9652_PRO) {
1709                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1710         } else {
1711                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1712         }
1713
1714         if (rme9652->control_register & RME9652_EMP) {
1715                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1716         } else {
1717                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1718         }
1719
1720         if (rme9652->control_register & RME9652_Dolby) {
1721                 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1722         } else {
1723                 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1724         }
1725
1726         i = rme9652_spdif_sample_rate(rme9652);
1727
1728         if (i < 0) {
1729                 snd_iprintf(buffer,
1730                             "IEC958 sample rate: error flag set\n");
1731         } else if (i == 0) {
1732                 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1733         } else {
1734                 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1735         }
1736
1737         snd_iprintf(buffer, "\n");
1738
1739         snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1740                     rme9652_adat_sample_rate(rme9652));
1741
1742         /* Sync Check */
1743
1744         x = status & RME9652_sync_0;
1745         if (status & RME9652_lock_0) {
1746                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1747         } else {
1748                 snd_iprintf(buffer, "ADAT1: No Lock\n");
1749         }
1750
1751         x = status & RME9652_sync_1;
1752         if (status & RME9652_lock_1) {
1753                 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1754         } else {
1755                 snd_iprintf(buffer, "ADAT2: No Lock\n");
1756         }
1757
1758         x = status & RME9652_sync_2;
1759         if (status & RME9652_lock_2) {
1760                 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1761         } else {
1762                 snd_iprintf(buffer, "ADAT3: No Lock\n");
1763         }
1764
1765         snd_iprintf(buffer, "\n");
1766
1767         snd_iprintf(buffer, "Timecode signal: %s\n",
1768                     (status & RME9652_tc_valid) ? "yes" : "no");
1769
1770         /* thru modes */
1771
1772         snd_iprintf(buffer, "Punch Status:\n\n");
1773
1774         for (i = 0; i < rme9652->ss_channels; i++) {
1775                 if (thru_bits & (1 << i)) {
1776                         snd_iprintf(buffer, "%2d:  on ", i + 1);
1777                 } else {
1778                         snd_iprintf(buffer, "%2d: off ", i + 1);
1779                 }
1780
1781                 if (((i + 1) % 8) == 0) {
1782                         snd_iprintf(buffer, "\n");
1783                 }
1784         }
1785
1786         snd_iprintf(buffer, "\n");
1787 }
1788
1789 static void __devinit snd_rme9652_proc_init(rme9652_t *rme9652)
1790 {
1791         snd_info_entry_t *entry;
1792
1793         if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1794                 snd_info_set_text_ops(entry, rme9652, 1024, snd_rme9652_proc_read);
1795 }
1796
1797 static void snd_rme9652_free_buffers(rme9652_t *rme9652)
1798 {
1799         snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1800         snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1801 }
1802
1803 static int snd_rme9652_free(rme9652_t *rme9652)
1804 {
1805         if (rme9652->irq >= 0)
1806                 rme9652_stop(rme9652);
1807         snd_rme9652_free_buffers(rme9652);
1808
1809         if (rme9652->irq >= 0)
1810                 free_irq(rme9652->irq, (void *)rme9652);
1811         if (rme9652->iobase)
1812                 iounmap((void *) rme9652->iobase);
1813         if (rme9652->port)
1814                 pci_release_regions(rme9652->pci);
1815
1816         return 0;
1817 }
1818
1819 static int __devinit snd_rme9652_initialize_memory(rme9652_t *rme9652)
1820 {
1821         unsigned long pb_bus, cb_bus;
1822
1823         if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1824             snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1825                 if (rme9652->capture_dma_buf.area)
1826                         snd_dma_free_pages(&rme9652->capture_dma_buf);
1827                 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1828                 return -ENOMEM;
1829         }
1830
1831         /* Align to bus-space 64K boundary */
1832
1833         cb_bus = (rme9652->capture_dma_buf.addr + 0xFFFF) & ~0xFFFFl;
1834         pb_bus = (rme9652->playback_dma_buf.addr + 0xFFFF) & ~0xFFFFl;
1835
1836         /* Tell the card where it is */
1837
1838         rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1839         rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1840
1841         rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1842         rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1843
1844         return 0;
1845 }
1846
1847 static void snd_rme9652_set_defaults(rme9652_t *rme9652)
1848 {
1849         unsigned int k;
1850
1851         /* ASSUMPTION: rme9652->lock is either held, or
1852            there is no need to hold it (e.g. during module
1853            initalization).
1854          */
1855
1856         /* set defaults:
1857
1858            SPDIF Input via Coax
1859            autosync clock mode
1860            maximum latency (7 = 8192 samples, 64Kbyte buffer,
1861            which implies 2 4096 sample, 32Kbyte periods).
1862
1863            if rev 1.5, initialize the S/PDIF receiver.
1864
1865          */
1866
1867         rme9652->control_register =
1868             RME9652_inp_0 | rme9652_encode_latency(7);
1869
1870         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1871
1872         rme9652_reset_hw_pointer(rme9652);
1873         rme9652_compute_period_size(rme9652);
1874
1875         /* default: thru off for all channels */
1876
1877         for (k = 0; k < RME9652_NCHANNELS; ++k)
1878                 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1879
1880         rme9652->thru_bits = 0;
1881         rme9652->passthru = 0;
1882
1883         /* set a default rate so that the channel map is set up */
1884
1885         rme9652_set_rate(rme9652, 48000);
1886 }
1887
1888 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1889 {
1890         rme9652_t *rme9652 = (rme9652_t *) dev_id;
1891
1892         if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1893                 return IRQ_NONE;
1894         }
1895
1896         rme9652_write(rme9652, RME9652_irq_clear, 0);
1897
1898         if (rme9652->capture_substream) {
1899                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1900         }
1901
1902         if (rme9652->playback_substream) {
1903                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1904         }
1905         return IRQ_HANDLED;
1906 }
1907
1908 static snd_pcm_uframes_t snd_rme9652_hw_pointer(snd_pcm_substream_t *substream)
1909 {
1910         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1911         return rme9652_hw_pointer(rme9652);
1912 }
1913
1914 static char *rme9652_channel_buffer_location(rme9652_t *rme9652,
1915                                              int stream,
1916                                              int channel)
1917
1918 {
1919         int mapped_channel;
1920
1921         snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1922
1923         if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1924                 return NULL;
1925         }
1926
1927         if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1928                 return rme9652->capture_buffer +
1929                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1930         } else {
1931                 return rme9652->playback_buffer +
1932                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1933         }
1934 }
1935
1936 static int snd_rme9652_playback_copy(snd_pcm_substream_t *substream, int channel,
1937                                      snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
1938 {
1939         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1940         char *channel_buf;
1941
1942         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1943
1944         channel_buf = rme9652_channel_buffer_location (rme9652,
1945                                                        substream->pstr->stream,
1946                                                        channel);
1947         snd_assert(channel_buf != NULL, return -EIO);
1948         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
1949                 return -EFAULT;
1950         return count;
1951 }
1952
1953 static int snd_rme9652_capture_copy(snd_pcm_substream_t *substream, int channel,
1954                                     snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
1955 {
1956         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1957         char *channel_buf;
1958
1959         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1960
1961         channel_buf = rme9652_channel_buffer_location (rme9652,
1962                                                        substream->pstr->stream,
1963                                                        channel);
1964         snd_assert(channel_buf != NULL, return -EIO);
1965         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
1966                 return -EFAULT;
1967         return count;
1968 }
1969
1970 static int snd_rme9652_hw_silence(snd_pcm_substream_t *substream, int channel,
1971                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
1972 {
1973         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1974         char *channel_buf;
1975
1976         channel_buf = rme9652_channel_buffer_location (rme9652,
1977                                                        substream->pstr->stream,
1978                                                        channel);
1979         snd_assert(channel_buf != NULL, return -EIO);
1980         memset(channel_buf + pos * 4, 0, count * 4);
1981         return count;
1982 }
1983
1984 static int snd_rme9652_reset(snd_pcm_substream_t *substream)
1985 {
1986         snd_pcm_runtime_t *runtime = substream->runtime;
1987         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
1988         snd_pcm_substream_t *other;
1989         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1990                 other = rme9652->capture_substream;
1991         else
1992                 other = rme9652->playback_substream;
1993         if (rme9652->running)
1994                 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1995         else
1996                 runtime->status->hw_ptr = 0;
1997         if (other) {
1998                 struct list_head *pos;
1999                 snd_pcm_substream_t *s;
2000                 snd_pcm_runtime_t *oruntime = other->runtime;
2001                 snd_pcm_group_for_each(pos, substream) {
2002                         s = snd_pcm_group_substream_entry(pos);
2003                         if (s == other) {
2004                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
2005                                 break;
2006                         }
2007                 }
2008         }
2009         return 0;
2010 }
2011
2012 static int snd_rme9652_hw_params(snd_pcm_substream_t *substream,
2013                                  snd_pcm_hw_params_t *params)
2014 {
2015         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2016         int err;
2017         pid_t this_pid;
2018         pid_t other_pid;
2019
2020         spin_lock_irq(&rme9652->lock);
2021
2022         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2023                 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2024                 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
2025                 this_pid = rme9652->playback_pid;
2026                 other_pid = rme9652->capture_pid;
2027         } else {
2028                 this_pid = rme9652->capture_pid;
2029                 other_pid = rme9652->playback_pid;
2030         }
2031
2032         if ((other_pid > 0) && (this_pid != other_pid)) {
2033
2034                 /* The other stream is open, and not by the same
2035                    task as this one. Make sure that the parameters
2036                    that matter are the same.
2037                  */
2038
2039                 if ((int)params_rate(params) !=
2040                     rme9652_adat_sample_rate(rme9652)) {
2041                         spin_unlock_irq(&rme9652->lock);
2042                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2043                         return -EBUSY;
2044                 }
2045
2046                 if (params_period_size(params) != rme9652->period_bytes / 4) {
2047                         spin_unlock_irq(&rme9652->lock);
2048                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2049                         return -EBUSY;
2050                 }
2051
2052                 /* We're fine. */
2053
2054                 spin_unlock_irq(&rme9652->lock);
2055                 return 0;
2056
2057         } else {
2058                 spin_unlock_irq(&rme9652->lock);
2059         }
2060
2061         /* how to make sure that the rate matches an externally-set one ?
2062          */
2063
2064         if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2065                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2066                 return err;
2067         }
2068
2069         if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2070                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2071                 return err;
2072         }
2073
2074         return 0;
2075 }
2076
2077 static int snd_rme9652_channel_info(snd_pcm_substream_t *substream,
2078                                     snd_pcm_channel_info_t *info)
2079 {
2080         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2081         int chn;
2082
2083         snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2084
2085         if ((chn = rme9652->channel_map[info->channel]) < 0) {
2086                 return -EINVAL;
2087         }
2088
2089         info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2090         info->first = 0;
2091         info->step = 32;
2092         return 0;
2093 }
2094
2095 static int snd_rme9652_ioctl(snd_pcm_substream_t *substream,
2096                              unsigned int cmd, void *arg)
2097 {
2098         switch (cmd) {
2099         case SNDRV_PCM_IOCTL1_RESET:
2100         {
2101                 return snd_rme9652_reset(substream);
2102         }
2103         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2104         {
2105                 snd_pcm_channel_info_t *info = arg;
2106                 return snd_rme9652_channel_info(substream, info);
2107         }
2108         default:
2109                 break;
2110         }
2111
2112         return snd_pcm_lib_ioctl(substream, cmd, arg);
2113 }
2114
2115 static void rme9652_silence_playback(rme9652_t *rme9652)
2116 {
2117         memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2118 }
2119
2120 static int snd_rme9652_trigger(snd_pcm_substream_t *substream,
2121                                int cmd)
2122 {
2123         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2124         snd_pcm_substream_t *other;
2125         int running;
2126         spin_lock(&rme9652->lock);
2127         running = rme9652->running;
2128         switch (cmd) {
2129         case SNDRV_PCM_TRIGGER_START:
2130                 running |= 1 << substream->stream;
2131                 break;
2132         case SNDRV_PCM_TRIGGER_STOP:
2133                 running &= ~(1 << substream->stream);
2134                 break;
2135         default:
2136                 snd_BUG();
2137                 spin_unlock(&rme9652->lock);
2138                 return -EINVAL;
2139         }
2140         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2141                 other = rme9652->capture_substream;
2142         else
2143                 other = rme9652->playback_substream;
2144
2145         if (other) {
2146                 struct list_head *pos;
2147                 snd_pcm_substream_t *s;
2148                 snd_pcm_group_for_each(pos, substream) {
2149                         s = snd_pcm_group_substream_entry(pos);
2150                         if (s == other) {
2151                                 snd_pcm_trigger_done(s, substream);
2152                                 if (cmd == SNDRV_PCM_TRIGGER_START)
2153                                         running |= 1 << s->stream;
2154                                 else
2155                                         running &= ~(1 << s->stream);
2156                                 goto _ok;
2157                         }
2158                 }
2159                 if (cmd == SNDRV_PCM_TRIGGER_START) {
2160                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2161                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2162                                 rme9652_silence_playback(rme9652);
2163                 } else {
2164                         if (running &&
2165                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2166                                 rme9652_silence_playback(rme9652);
2167                 }
2168         } else {
2169                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2170                         rme9652_silence_playback(rme9652);
2171         }
2172  _ok:
2173         snd_pcm_trigger_done(substream, substream);
2174         if (!rme9652->running && running)
2175                 rme9652_start(rme9652);
2176         else if (rme9652->running && !running)
2177                 rme9652_stop(rme9652);
2178         rme9652->running = running;
2179         spin_unlock(&rme9652->lock);
2180
2181         return 0;
2182 }
2183
2184 static int snd_rme9652_prepare(snd_pcm_substream_t *substream)
2185 {
2186         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2187         unsigned long flags;
2188         int result = 0;
2189
2190         spin_lock_irqsave(&rme9652->lock, flags);
2191         if (!rme9652->running)
2192                 rme9652_reset_hw_pointer(rme9652);
2193         spin_unlock_irqrestore(&rme9652->lock, flags);
2194         return result;
2195 }
2196
2197 static snd_pcm_hardware_t snd_rme9652_playback_subinfo =
2198 {
2199         .info =                 (SNDRV_PCM_INFO_MMAP |
2200                                  SNDRV_PCM_INFO_MMAP_VALID |
2201                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2202                                  SNDRV_PCM_INFO_SYNC_START |
2203                                  SNDRV_PCM_INFO_DOUBLE),
2204         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2205         .rates =                (SNDRV_PCM_RATE_44100 |
2206                                  SNDRV_PCM_RATE_48000 |
2207                                  SNDRV_PCM_RATE_88200 |
2208                                  SNDRV_PCM_RATE_96000),
2209         .rate_min =             44100,
2210         .rate_max =             96000,
2211         .channels_min =         10,
2212         .channels_max =         26,
2213         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2214         .period_bytes_min =     (64 * 4) * 10,
2215         .period_bytes_max =     (8192 * 4) * 26,
2216         .periods_min =          2,
2217         .periods_max =          2,
2218         .fifo_size =            0,
2219 };
2220
2221 static snd_pcm_hardware_t snd_rme9652_capture_subinfo =
2222 {
2223         .info =                 (SNDRV_PCM_INFO_MMAP |
2224                                  SNDRV_PCM_INFO_MMAP_VALID |
2225                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2226                                  SNDRV_PCM_INFO_SYNC_START),
2227         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2228         .rates =                (SNDRV_PCM_RATE_44100 |
2229                                  SNDRV_PCM_RATE_48000 |
2230                                  SNDRV_PCM_RATE_88200 |
2231                                  SNDRV_PCM_RATE_96000),
2232         .rate_min =             44100,
2233         .rate_max =             96000,
2234         .channels_min =         10,
2235         .channels_max =         26,
2236         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2237         .period_bytes_min =     (64 * 4) * 10,
2238         .period_bytes_max =     (8192 * 4) * 26,
2239         .periods_min =          2,
2240         .periods_max =          2,
2241         .fifo_size =            0,
2242 };
2243
2244 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2245
2246 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = {
2247         .count = ARRAY_SIZE(period_sizes),
2248         .list = period_sizes,
2249         .mask = 0
2250 };
2251
2252 static int snd_rme9652_hw_rule_channels(snd_pcm_hw_params_t *params,
2253                                         snd_pcm_hw_rule_t *rule)
2254 {
2255         rme9652_t *rme9652 = rule->private;
2256         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2257         unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2258         return snd_interval_list(c, 2, list, 0);
2259 }
2260
2261 static int snd_rme9652_hw_rule_channels_rate(snd_pcm_hw_params_t *params,
2262                                              snd_pcm_hw_rule_t *rule)
2263 {
2264         rme9652_t *rme9652 = rule->private;
2265         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2266         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2267         if (r->min > 48000) {
2268                 snd_interval_t t = {
2269                         .min = rme9652->ds_channels,
2270                         .max = rme9652->ds_channels,
2271                         .integer = 1,
2272                 };
2273                 return snd_interval_refine(c, &t);
2274         } else if (r->max < 88200) {
2275                 snd_interval_t t = {
2276                         .min = rme9652->ss_channels,
2277                         .max = rme9652->ss_channels,
2278                         .integer = 1,
2279                 };
2280                 return snd_interval_refine(c, &t);
2281         }
2282         return 0;
2283 }
2284
2285 static int snd_rme9652_hw_rule_rate_channels(snd_pcm_hw_params_t *params,
2286                                              snd_pcm_hw_rule_t *rule)
2287 {
2288         rme9652_t *rme9652 = rule->private;
2289         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2290         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2291         if (c->min >= rme9652->ss_channels) {
2292                 snd_interval_t t = {
2293                         .min = 44100,
2294                         .max = 48000,
2295                         .integer = 1,
2296                 };
2297                 return snd_interval_refine(r, &t);
2298         } else if (c->max <= rme9652->ds_channels) {
2299                 snd_interval_t t = {
2300                         .min = 88200,
2301                         .max = 96000,
2302                         .integer = 1,
2303                 };
2304                 return snd_interval_refine(r, &t);
2305         }
2306         return 0;
2307 }
2308
2309 static int snd_rme9652_playback_open(snd_pcm_substream_t *substream)
2310 {
2311         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2312         snd_pcm_runtime_t *runtime = substream->runtime;
2313
2314         spin_lock_irq(&rme9652->lock);
2315
2316         snd_pcm_set_sync(substream);
2317
2318         runtime->hw = snd_rme9652_playback_subinfo;
2319         runtime->dma_area = rme9652->playback_buffer;
2320         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2321
2322         if (rme9652->capture_substream == NULL) {
2323                 rme9652_stop(rme9652);
2324                 rme9652_set_thru(rme9652, -1, 0);
2325         }
2326
2327         rme9652->playback_pid = current->pid;
2328         rme9652->playback_substream = substream;
2329
2330         spin_unlock_irq(&rme9652->lock);
2331
2332         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2333         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2334         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2335                              snd_rme9652_hw_rule_channels, rme9652,
2336                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2337         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2338                              snd_rme9652_hw_rule_channels_rate, rme9652,
2339                              SNDRV_PCM_HW_PARAM_RATE, -1);
2340         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2341                              snd_rme9652_hw_rule_rate_channels, rme9652,
2342                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2343
2344         rme9652->creg_spdif_stream = rme9652->creg_spdif;
2345         rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2346         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2347                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2348         return 0;
2349 }
2350
2351 static int snd_rme9652_playback_release(snd_pcm_substream_t *substream)
2352 {
2353         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2354
2355         spin_lock_irq(&rme9652->lock);
2356
2357         rme9652->playback_pid = -1;
2358         rme9652->playback_substream = NULL;
2359
2360         spin_unlock_irq(&rme9652->lock);
2361
2362         rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2363         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2364                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2365         return 0;
2366 }
2367
2368
2369 static int snd_rme9652_capture_open(snd_pcm_substream_t *substream)
2370 {
2371         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2372         snd_pcm_runtime_t *runtime = substream->runtime;
2373
2374         spin_lock_irq(&rme9652->lock);
2375
2376         snd_pcm_set_sync(substream);
2377
2378         runtime->hw = snd_rme9652_capture_subinfo;
2379         runtime->dma_area = rme9652->capture_buffer;
2380         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2381
2382         if (rme9652->playback_substream == NULL) {
2383                 rme9652_stop(rme9652);
2384                 rme9652_set_thru(rme9652, -1, 0);
2385         }
2386
2387         rme9652->capture_pid = current->pid;
2388         rme9652->capture_substream = substream;
2389
2390         spin_unlock_irq(&rme9652->lock);
2391
2392         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2393         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2394         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2395                              snd_rme9652_hw_rule_channels, rme9652,
2396                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2397         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2398                              snd_rme9652_hw_rule_channels_rate, rme9652,
2399                              SNDRV_PCM_HW_PARAM_RATE, -1);
2400         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2401                              snd_rme9652_hw_rule_rate_channels, rme9652,
2402                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2403         return 0;
2404 }
2405
2406 static int snd_rme9652_capture_release(snd_pcm_substream_t *substream)
2407 {
2408         rme9652_t *rme9652 = snd_pcm_substream_chip(substream);
2409
2410         spin_lock_irq(&rme9652->lock);
2411
2412         rme9652->capture_pid = -1;
2413         rme9652->capture_substream = NULL;
2414
2415         spin_unlock_irq(&rme9652->lock);
2416         return 0;
2417 }
2418
2419 static snd_pcm_ops_t snd_rme9652_playback_ops = {
2420         .open =         snd_rme9652_playback_open,
2421         .close =        snd_rme9652_playback_release,
2422         .ioctl =        snd_rme9652_ioctl,
2423         .hw_params =    snd_rme9652_hw_params,
2424         .prepare =      snd_rme9652_prepare,
2425         .trigger =      snd_rme9652_trigger,
2426         .pointer =      snd_rme9652_hw_pointer,
2427         .copy =         snd_rme9652_playback_copy,
2428         .silence =      snd_rme9652_hw_silence,
2429 };
2430
2431 static snd_pcm_ops_t snd_rme9652_capture_ops = {
2432         .open =         snd_rme9652_capture_open,
2433         .close =        snd_rme9652_capture_release,
2434         .ioctl =        snd_rme9652_ioctl,
2435         .hw_params =    snd_rme9652_hw_params,
2436         .prepare =      snd_rme9652_prepare,
2437         .trigger =      snd_rme9652_trigger,
2438         .pointer =      snd_rme9652_hw_pointer,
2439         .copy =         snd_rme9652_capture_copy,
2440 };
2441
2442 static int __devinit snd_rme9652_create_pcm(snd_card_t *card,
2443                                          rme9652_t *rme9652)
2444 {
2445         snd_pcm_t *pcm;
2446         int err;
2447
2448         if ((err = snd_pcm_new(card,
2449                                rme9652->card_name,
2450                                0, 1, 1, &pcm)) < 0) {
2451                 return err;
2452         }
2453
2454         rme9652->pcm = pcm;
2455         pcm->private_data = rme9652;
2456         strcpy(pcm->name, rme9652->card_name);
2457
2458         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2459         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2460
2461         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2462
2463         return 0;
2464 }
2465
2466 static int __devinit snd_rme9652_create(snd_card_t *card,
2467                                      rme9652_t *rme9652,
2468                                      int precise_ptr)
2469 {
2470         struct pci_dev *pci = rme9652->pci;
2471         int err;
2472         int status;
2473         unsigned short rev;
2474
2475         rme9652->irq = -1;
2476         rme9652->card = card;
2477
2478         pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2479
2480         switch (rev & 0xff) {
2481         case 3:
2482         case 4:
2483         case 8:
2484         case 9:
2485                 break;
2486
2487         default:
2488                 /* who knows? */
2489                 return -ENODEV;
2490         }
2491
2492         if ((err = pci_enable_device(pci)) < 0)
2493                 return err;
2494
2495         spin_lock_init(&rme9652->lock);
2496
2497         if ((err = pci_request_regions(pci, "rme9652")) < 0)
2498                 return err;
2499         rme9652->port = pci_resource_start(pci, 0);
2500         rme9652->iobase = (unsigned long) ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2501         if (rme9652->iobase == 0) {
2502                 snd_printk("unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2503                 return -EBUSY;
2504         }
2505
2506         if (request_irq(pci->irq, snd_rme9652_interrupt, SA_INTERRUPT|SA_SHIRQ, "rme9652", (void *)rme9652)) {
2507                 snd_printk("unable to request IRQ %d\n", pci->irq);
2508                 return -EBUSY;
2509         }
2510         rme9652->irq = pci->irq;
2511         rme9652->precise_ptr = precise_ptr;
2512
2513         /* Determine the h/w rev level of the card. This seems like
2514            a particularly kludgy way to encode it, but its what RME
2515            chose to do, so we follow them ...
2516         */
2517
2518         status = rme9652_read(rme9652, RME9652_status_register);
2519         if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2520                 rme9652->hw_rev = 15;
2521         } else {
2522                 rme9652->hw_rev = 11;
2523         }
2524
2525         /* Differentiate between the standard Hammerfall, and the
2526            "Light", which does not have the expansion board. This
2527            method comes from information received from Mathhias
2528            Clausen at RME. Display the EEPROM and h/w revID where
2529            relevant.
2530         */
2531
2532         switch (rev) {
2533         case 8: /* original eprom */
2534                 strcpy(card->driver, "RME9636");
2535                 if (rme9652->hw_rev == 15) {
2536                         rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2537                 } else {
2538                         rme9652->card_name = "RME Digi9636";
2539                 }
2540                 rme9652->ss_channels = RME9636_NCHANNELS;
2541                 break;
2542         case 9: /* W36_G EPROM */
2543                 strcpy(card->driver, "RME9636");
2544                 rme9652->card_name = "RME Digi9636 (Rev G)";
2545                 rme9652->ss_channels = RME9636_NCHANNELS;
2546                 break;
2547         case 4: /* W52_G EPROM */
2548                 strcpy(card->driver, "RME9652");
2549                 rme9652->card_name = "RME Digi9652 (Rev G)";
2550                 rme9652->ss_channels = RME9652_NCHANNELS;
2551                 break;
2552         case 3: /* original eprom */
2553                 strcpy(card->driver, "RME9652");
2554                 if (rme9652->hw_rev == 15) {
2555                         rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2556                 } else {
2557                         rme9652->card_name = "RME Digi9652";
2558                 }
2559                 rme9652->ss_channels = RME9652_NCHANNELS;
2560                 break;
2561         }
2562
2563         rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2564
2565         pci_set_master(rme9652->pci);
2566
2567         if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2568                 return err;
2569         }
2570
2571         if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2572                 return err;
2573         }
2574
2575         if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2576                 return err;
2577         }
2578
2579         snd_rme9652_proc_init(rme9652);
2580
2581         rme9652->last_spdif_sample_rate = -1;
2582         rme9652->last_adat_sample_rate = -1;
2583         rme9652->playback_pid = -1;
2584         rme9652->capture_pid = -1;
2585         rme9652->capture_substream = NULL;
2586         rme9652->playback_substream = NULL;
2587
2588         snd_rme9652_set_defaults(rme9652);
2589
2590         if (rme9652->hw_rev == 15) {
2591                 rme9652_initialize_spdif_receiver (rme9652);
2592         }
2593
2594         return 0;
2595 }
2596
2597 static void snd_rme9652_card_free(snd_card_t *card)
2598 {
2599         rme9652_t *rme9652 = (rme9652_t *) card->private_data;
2600
2601         if (rme9652)
2602                 snd_rme9652_free(rme9652);
2603 }
2604
2605 static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2606                                        const struct pci_device_id *pci_id)
2607 {
2608         static int dev;
2609         rme9652_t *rme9652;
2610         snd_card_t *card;
2611         int err;
2612
2613         if (dev >= SNDRV_CARDS)
2614                 return -ENODEV;
2615         if (!enable[dev]) {
2616                 dev++;
2617                 return -ENOENT;
2618         }
2619
2620         card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2621                             sizeof(rme9652_t));
2622
2623         if (!card)
2624                 return -ENOMEM;
2625
2626         rme9652 = (rme9652_t *) card->private_data;
2627         card->private_free = snd_rme9652_card_free;
2628         rme9652->dev = dev;
2629         rme9652->pci = pci;
2630         snd_card_set_dev(card, &pci->dev);
2631
2632         if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2633                 snd_card_free(card);
2634                 return err;
2635         }
2636
2637         strcpy(card->shortname, rme9652->card_name);
2638
2639         sprintf(card->longname, "%s at 0x%lx, irq %d",
2640                 card->shortname, rme9652->port, rme9652->irq);
2641
2642
2643         if ((err = snd_card_register(card)) < 0) {
2644                 snd_card_free(card);
2645                 return err;
2646         }
2647         pci_set_drvdata(pci, card);
2648         dev++;
2649         return 0;
2650 }
2651
2652 static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2653 {
2654         snd_card_free(pci_get_drvdata(pci));
2655         pci_set_drvdata(pci, NULL);
2656 }
2657
2658 static struct pci_driver driver = {
2659         .name     = "RME Digi9652 (Hammerfall)",
2660         .id_table = snd_rme9652_ids,
2661         .probe    = snd_rme9652_probe,
2662         .remove   = __devexit_p(snd_rme9652_remove),
2663 };
2664
2665 static int __init alsa_card_hammerfall_init(void)
2666 {
2667         return pci_module_init(&driver);
2668 }
2669
2670 static void __exit alsa_card_hammerfall_exit(void)
2671 {
2672         pci_unregister_driver(&driver);
2673 }
2674
2675 module_init(alsa_card_hammerfall_init)
2676 module_exit(alsa_card_hammerfall_exit)