sound/pci/rme9652/rme9652.c

   1 /*
   2  *   ALSA driver for RME Digi9652 audio interfaces
   3  *
   4  *      Copyright (c) 1999 IEM - Winfried Ritsch
   5  *      Copyright (c) 1999-2001  Paul Davis
   6  *
   7  *   This program is free software; you can redistribute it and/or modify
   8  *   it under the terms of the GNU General Public License as published by
   9  *   the Free Software Foundation; either version 2 of the License, or
  10  *   (at your option) any later version.
  11  *
  12  *   This program is distributed in the hope that it will be useful,
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *   GNU General Public License for more details.
  16  *
  17  *   You should have received a copy of the GNU General Public License
  18  *   along with this program; if not, write to the Free Software
  19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  *
  21  */
  22
  23 #include <sound/driver.h>
  24 #include <linux/delay.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/slab.h>
  29 #include <linux/moduleparam.h>
  30
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/pcm.h>
  34 #include <sound/info.h>
  35 #include <sound/asoundef.h>
  36 #include <sound/initval.h>
  37
  38 #include <asm/current.h>
  39 #include <asm/io.h>
  40
  41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  43 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  44 static int precise_ptr[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* Enable precise pointer */
  45 static int boot_devs;
  46
  47 module_param_array(index, int, boot_devs, 0444);
  48 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  49 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
  50 module_param_array(id, charp, boot_devs, 0444);
  51 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  52 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
  53 module_param_array(enable, bool, boot_devs, 0444);
  54 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  55 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
  56 module_param_array(precise_ptr, bool, boot_devs, 0444);
  57 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  58 MODULE_PARM_SYNTAX(precise_ptr, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC);
  59 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  60 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  61 MODULE_LICENSE("GPL");
  62 MODULE_CLASSES("{sound}");
  63 MODULE_DEVICES("{{RME,Hammerfall},"
  64                 "{RME,Hammerfall-Light}}");
  65
  66 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  67    capture, one for playback. Both the ADAT and S/PDIF channels appear
  68    to the host CPU in the same block of memory. There is no functional
  69    difference between them in terms of access.
  70
  71    The Hammerfall Light is identical to the Hammerfall, except that it
  72    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  73 */
  74
  75 #define RME9652_NCHANNELS       26
  76 #define RME9636_NCHANNELS       18
  77
  78 /* Preferred sync source choices - used by "sync_pref" control switch */
  79
  80 #define RME9652_SYNC_FROM_SPDIF 0
  81 #define RME9652_SYNC_FROM_ADAT1 1
  82 #define RME9652_SYNC_FROM_ADAT2 2
  83 #define RME9652_SYNC_FROM_ADAT3 3
  84
  85 /* Possible sources of S/PDIF input */
  86
  87 #define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  88 #define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  89 #define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  90
  91 /* ------------- Status-Register bits --------------------- */
  92
  93 #define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  94 #define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  95 #define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  96 #define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  97 #define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  98 #define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  99                                         /* bits 6-15 encode h/w buffer pointer position */
 100 #define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
 101 #define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
 102 #define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
 103 #define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
 104 #define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
 105 #define RME9652_tc_out     (1<<21)      /* time-code out bit */
 106 #define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
 107 #define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
 108 #define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
 109 #define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
 110 #define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
 111 #define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
 112 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
 113
 114 #define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
 115 #define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
 116 #define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
 117 #define rme9652_decode_spdif_rate(x) ((x)>>22)
 118
 119 /* Bit 6..15 : h/w buffer pointer */
 120
 121 #define RME9652_buf_pos   0x000FFC0
 122
 123 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 124    Rev G EEPROMS and Rev 1.5 cards or later.
 125 */
 126
 127 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 128
 129 #ifndef PCI_VENDOR_ID_XILINX
 130 #define PCI_VENDOR_ID_XILINX            0x10ee
 131 #endif
 132 #ifndef PCI_DEVICE_ID_XILINX_HAMMERFALL
 133 #define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
 134 #endif
 135
 136 /* amount of io space we remap for register access. i'm not sure we
 137    even need this much, but 1K is nice round number :)
 138 */
 139
 140 #define RME9652_IO_EXTENT     1024
 141
 142 #define RME9652_init_buffer       0
 143 #define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 144 #define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 145 #define RME9652_control_register  64
 146 #define RME9652_irq_clear         96
 147 #define RME9652_time_code         100   /* useful if used with alesis adat */
 148 #define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 149
 150 /* Read-only registers */
 151
 152 /* Writing to any of the register locations writes to the status
 153    register. We'll use the first location as our point of access.
 154 */
 155
 156 #define RME9652_status_register    0
 157
 158 /* --------- Control-Register Bits ---------------- */
 159
 160
 161 #define RME9652_start_bit          (1<<0)       /* start record/play */
 162                                                 /* bits 1-3 encode buffersize/latency */
 163 #define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 164 #define RME9652_IE                 (1<<5)       /* Interupt Enable */
 165 #define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 166 #define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 167 #define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 168 #define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 169 #define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 170 #define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 171 #define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 172 #define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 173 #define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 174 #define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 175 #define RME9652_SyncPref_ADAT2     (1<<16)
 176 #define RME9652_SyncPref_ADAT3     (1<<17)
 177 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 178 #define RME9652_SPDIF_SELECT       (1<<19)
 179 #define RME9652_SPDIF_CLOCK        (1<<20)
 180 #define RME9652_SPDIF_WRITE        (1<<21)
 181 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 182
 183 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 184
 185 #define RME9652_latency            0x0e
 186 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 187 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 188 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 189 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 190 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 191 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 192
 193 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 194 #define RME9652_SyncPref_ADAT1     0
 195 #define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 196
 197 /* the size of a substream (1 mono data stream) */
 198
 199 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 200 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 201
 202 /* the size of the area we need to allocate for DMA transfers. the
 203    size is the same regardless of the number of channels - the
 204    9636 still uses the same memory area.
 205
 206    Note that we allocate 1 more channel than is apparently needed
 207    because the h/w seems to write 1 byte beyond the end of the last
 208    page. Sigh.
 209 */
 210
 211 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 212 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 213
 214 typedef struct snd_rme9652 {
 215         int dev;
 216
 217         spinlock_t lock;
 218         int irq;
 219         unsigned long port;
 220         struct resource *res_port;
 221         unsigned long iobase;
 222
 223         int precise_ptr;
 224
 225         u32 control_register;   /* cached value */
 226         u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 227
 228         u32 creg_spdif;
 229         u32 creg_spdif_stream;
 230
 231         char *card_name;                /* hammerfall or hammerfall light names */
 232
 233         size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 234         size_t prev_hw_offset;          /* previous hw offset */
 235         size_t max_jitter;              /* maximum jitter in frames for
 236                                            hw pointer */
 237         size_t period_bytes;            /* guess what this is */
 238
 239         unsigned char ds_channels;
 240         unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 241
 242         void *capture_buffer_unaligned; /* original buffer addresses */
 243         void *playback_buffer_unaligned;        /* original buffer addresses */
 244         unsigned char *capture_buffer;  /* suitably aligned address */
 245         unsigned char *playback_buffer; /* suitably aligned address */
 246         dma_addr_t capture_buffer_addr;
 247         dma_addr_t playback_buffer_addr;
 248
 249         pid_t capture_pid;
 250         pid_t playback_pid;
 251
 252         snd_pcm_substream_t *capture_substream;
 253         snd_pcm_substream_t *playback_substream;
 254         int running;
 255
 256         int passthru;                   /* non-zero if doing pass-thru */
 257         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 258
 259         int last_spdif_sample_rate;     /* so that we can catch externally ... */
 260         int last_adat_sample_rate;      /* ... induced rate changes            */
 261
 262         char *channel_map;
 263
 264         snd_card_t *card;
 265         snd_pcm_t *pcm;
 266         struct pci_dev *pci;
 267         snd_kcontrol_t *spdif_ctl;
 268
 269 } rme9652_t;
 270
 271 /* These tables map the ALSA channels 1..N to the channels that we
 272    need to use in order to find the relevant channel buffer. RME
 273    refer to this kind of mapping as between "the ADAT channel and
 274    the DMA channel." We index it using the logical audio channel,
 275    and the value is the DMA channel (i.e. channel buffer number)
 276    where the data for that channel can be read/written from/to.
 277 */
 278
 279 static char channel_map_9652_ss[26] = {
 280         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 281         18, 19, 20, 21, 22, 23, 24, 25
 282 };
 283
 284 static char channel_map_9636_ss[26] = {
 285         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
 286         /* channels 16 and 17 are S/PDIF */
 287         24, 25,
 288         /* channels 18-25 don't exist */
 289         -1, -1, -1, -1, -1, -1, -1, -1
 290 };
 291
 292 static char channel_map_9652_ds[26] = {
 293         /* ADAT channels are remapped */
 294         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 295         /* channels 12 and 13 are S/PDIF */
 296         24, 25,
 297         /* others don't exist */
 298         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 299 };
 300
 301 static char channel_map_9636_ds[26] = {
 302         /* ADAT channels are remapped */
 303         1, 3, 5, 7, 9, 11, 13, 15,
 304         /* channels 8 and 9 are S/PDIF */
 305         24, 25
 306         /* others don't exist */
 307         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 308 };
 309
 310 #define RME9652_PREALLOCATE_MEMORY      /* via module snd-hammerfall-mem */
 311
 312 #ifdef RME9652_PREALLOCATE_MEMORY
 313 static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
 314 {
 315         struct snd_dma_device pdev;
 316         struct snd_dma_buffer dmbuf;
 317
 318         memset(&pdev, 0, sizeof(pdev));
 319         pdev.type = SNDRV_DMA_TYPE_DEV;
 320         pdev.dev = snd_dma_pci_data(pci);
 321         pdev.id = capture;
 322         dmbuf.bytes = 0;
 323         if (! snd_dma_get_reserved(&pdev, &dmbuf)) {
 324                 if (snd_dma_alloc_pages(&pdev, size, &dmbuf) < 0)
 325                         return NULL;
 326                 snd_dma_set_reserved(&pdev, &dmbuf);
 327         }
 328         *addrp = dmbuf.addr;
 329         return dmbuf.area;
 330 }
 331
 332 static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
 333 {
 334         struct snd_dma_device pdev;
 335
 336         memset(&pdev, 0, sizeof(pdev));
 337         pdev.type = SNDRV_DMA_TYPE_DEV;
 338         pdev.dev = snd_dma_pci_data(pci);
 339         pdev.id = capture;
 340         snd_dma_free_reserved(&pdev);
 341 }
 342
 343 #else
 344 static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
 345 {
 346         return snd_malloc_pci_pages(pci, size, addrp);
 347 }
 348
 349 static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
 350 {
 351         snd_free_pci_pages(pci, size, ptr, addr);
 352 }
 353 #endif
 354
 355 static struct pci_device_id snd_rme9652_ids[] = {
 356         {
 357                 .vendor    = 0x10ee,
 358                 .device    = 0x3fc4,
 359                 .subvendor = PCI_ANY_ID,
 360                 .subdevice = PCI_ANY_ID,
 361         },      /* RME Digi9652 */
 362         { 0, },
 363 };
 364
 365 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 366
 367 static inline void rme9652_write(rme9652_t *rme9652, int reg, int val)
 368 {
 369         writel(val, rme9652->iobase + reg);
 370 }
 371
 372 static inline unsigned int rme9652_read(rme9652_t *rme9652, int reg)
 373 {
 374         return readl(rme9652->iobase + reg);
 375 }
 376
 377 static inline int snd_rme9652_use_is_exclusive(rme9652_t *rme9652)
 378 {
 379         unsigned long flags;
 380         int ret = 1;
 381
 382         spin_lock_irqsave(&rme9652->lock, flags);
 383         if ((rme9652->playback_pid != rme9652->capture_pid) &&
 384             (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 385                 ret = 0;
 386         }
 387         spin_unlock_irqrestore(&rme9652->lock, flags);
 388         return ret;
 389 }
 390
 391 static inline int rme9652_adat_sample_rate(rme9652_t *rme9652)
 392 {
 393         if (rme9652_running_double_speed(rme9652)) {
 394                 return (rme9652_read(rme9652, RME9652_status_register) &
 395                         RME9652_fs48) ? 96000 : 88200;
 396         } else {
 397                 return (rme9652_read(rme9652, RME9652_status_register) &
 398                         RME9652_fs48) ? 48000 : 44100;
 399         }
 400 }
 401
 402 static inline void rme9652_compute_period_size(rme9652_t *rme9652)
 403 {
 404         unsigned int i;
 405
 406         i = rme9652->control_register & RME9652_latency;
 407         rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 408         rme9652->hw_offsetmask =
 409                 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 410         rme9652->max_jitter = 80;
 411 }
 412
 413 static snd_pcm_uframes_t rme9652_hw_pointer(rme9652_t *rme9652)
 414 {
 415         int status;
 416         unsigned int offset, frag;
 417         snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 418         snd_pcm_sframes_t delta;
 419
 420         status = rme9652_read(rme9652, RME9652_status_register);
 421         if (!rme9652->precise_ptr)
 422                 return (status & RME9652_buffer_id) ? period_size : 0;
 423         offset = status & RME9652_buf_pos;
 424
 425         /* The hardware may give a backward movement for up to 80 frames
 426            Martin Kirst <martin.kirst@freenet.de> knows the details.
 427         */
 428
 429         delta = rme9652->prev_hw_offset - offset;
 430         delta &= 0xffff;
 431         if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 432                 offset = rme9652->prev_hw_offset;
 433         else
 434                 rme9652->prev_hw_offset = offset;
 435         offset &= rme9652->hw_offsetmask;
 436         offset /= 4;
 437         frag = status & RME9652_buffer_id;
 438
 439         if (offset < period_size) {
 440                 if (offset > rme9652->max_jitter) {
 441                         if (frag)
 442                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
 443                 } else if (!frag)
 444                         return 0;
 445                 offset -= rme9652->max_jitter;
 446                 if (offset < 0)
 447                         offset += period_size * 2;
 448         } else {
 449                 if (offset > period_size + rme9652->max_jitter) {
 450                         if (!frag)
 451                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
 452                 } else if (frag)
 453                         return period_size;
 454                 offset -= rme9652->max_jitter;
 455         }
 456
 457         return offset;
 458 }
 459
 460 static inline void rme9652_reset_hw_pointer(rme9652_t *rme9652)
 461 {
 462         int i;
 463
 464         /* reset the FIFO pointer to zero. We do this by writing to 8
 465            registers, each of which is a 32bit wide register, and set
 466            them all to zero. Note that s->iobase is a pointer to
 467            int32, not pointer to char.
 468         */
 469
 470         for (i = 0; i < 8; i++) {
 471                 rme9652_write(rme9652, i * 4, 0);
 472                 udelay(10);
 473         }
 474         rme9652->prev_hw_offset = 0;
 475 }
 476
 477 static inline void rme9652_start(rme9652_t *s)
 478 {
 479         s->control_register |= (RME9652_IE | RME9652_start_bit);
 480         rme9652_write(s, RME9652_control_register, s->control_register);
 481 }
 482
 483 static inline void rme9652_stop(rme9652_t *s)
 484 {
 485         s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 486         rme9652_write(s, RME9652_control_register, s->control_register);
 487 }
 488
 489 static int rme9652_set_interrupt_interval(rme9652_t *s,
 490                                           unsigned int frames)
 491 {
 492         int restart = 0;
 493         int n;
 494
 495         spin_lock_irq(&s->lock);
 496
 497         if ((restart = s->running)) {
 498                 rme9652_stop(s);
 499         }
 500
 501         frames >>= 7;
 502         n = 0;
 503         while (frames) {
 504                 n++;
 505                 frames >>= 1;
 506         }
 507
 508         s->control_register &= ~RME9652_latency;
 509         s->control_register |= rme9652_encode_latency(n);
 510
 511         rme9652_write(s, RME9652_control_register, s->control_register);
 512
 513         rme9652_compute_period_size(s);
 514
 515         if (restart)
 516                 rme9652_start(s);
 517
 518         spin_unlock_irq(&s->lock);
 519
 520         return 0;
 521 }
 522
 523 static int rme9652_set_rate(rme9652_t *rme9652, int rate)
 524 {
 525         int restart;
 526         int reject_if_open = 0;
 527         int xrate;
 528
 529         if (!snd_rme9652_use_is_exclusive (rme9652)) {
 530                 return -EBUSY;
 531         }
 532
 533         /* Changing from a "single speed" to a "double speed" rate is
 534            not allowed if any substreams are open. This is because
 535            such a change causes a shift in the location of
 536            the DMA buffers and a reduction in the number of available
 537            buffers.
 538
 539            Note that a similar but essentially insoluble problem
 540            exists for externally-driven rate changes. All we can do
 541            is to flag rate changes in the read/write routines.
 542          */
 543
 544         spin_lock_irq(&rme9652->lock);
 545         xrate = rme9652_adat_sample_rate(rme9652);
 546
 547         switch (rate) {
 548         case 44100:
 549                 if (xrate > 48000) {
 550                         reject_if_open = 1;
 551                 }
 552                 rate = 0;
 553                 break;
 554         case 48000:
 555                 if (xrate > 48000) {
 556                         reject_if_open = 1;
 557                 }
 558                 rate = RME9652_freq;
 559                 break;
 560         case 88200:
 561                 if (xrate < 48000) {
 562                         reject_if_open = 1;
 563                 }
 564                 rate = RME9652_DS;
 565                 break;
 566         case 96000:
 567                 if (xrate < 48000) {
 568                         reject_if_open = 1;
 569                 }
 570                 rate = RME9652_DS | RME9652_freq;
 571                 break;
 572         default:
 573                 spin_unlock_irq(&rme9652->lock);
 574                 return -EINVAL;
 575         }
 576
 577         if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 578                 spin_unlock_irq(&rme9652->lock);
 579                 return -EBUSY;
 580         }
 581
 582         if ((restart = rme9652->running)) {
 583                 rme9652_stop(rme9652);
 584         }
 585         rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 586         rme9652->control_register |= rate;
 587         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 588
 589         if (restart) {
 590                 rme9652_start(rme9652);
 591         }
 592
 593         if (rate & RME9652_DS) {
 594                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 595                         rme9652->channel_map = channel_map_9652_ds;
 596                 } else {
 597                         rme9652->channel_map = channel_map_9636_ds;
 598                 }
 599         } else {
 600                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 601                         rme9652->channel_map = channel_map_9652_ss;
 602                 } else {
 603                         rme9652->channel_map = channel_map_9636_ss;
 604                 }
 605         }
 606
 607         spin_unlock_irq(&rme9652->lock);
 608         return 0;
 609 }
 610
 611 static void rme9652_set_thru(rme9652_t *rme9652, int channel, int enable)
 612 {
 613         int i;
 614
 615         rme9652->passthru = 0;
 616
 617         if (channel < 0) {
 618
 619                 /* set thru for all channels */
 620
 621                 if (enable) {
 622                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 623                                 rme9652->thru_bits |= (1 << i);
 624                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 625                         }
 626                 } else {
 627                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 628                                 rme9652->thru_bits &= ~(1 << i);
 629                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 630                         }
 631                 }
 632
 633         } else {
 634                 int mapped_channel;
 635
 636                 snd_assert(channel == RME9652_NCHANNELS, return);
 637
 638                 mapped_channel = rme9652->channel_map[channel];
 639
 640                 if (enable) {
 641                         rme9652->thru_bits |= (1 << mapped_channel);
 642                 } else {
 643                         rme9652->thru_bits &= ~(1 << mapped_channel);
 644                 }
 645
 646                 rme9652_write(rme9652,
 647                                RME9652_thru_base + mapped_channel * 4,
 648                                enable ? 1 : 0);
 649         }
 650 }
 651
 652 static int rme9652_set_passthru(rme9652_t *rme9652, int onoff)
 653 {
 654         if (onoff) {
 655                 rme9652_set_thru(rme9652, -1, 1);
 656
 657                 /* we don't want interrupts, so do a
 658                    custom version of rme9652_start().
 659                 */
 660
 661                 rme9652->control_register =
 662                         RME9652_inp_0 |
 663                         rme9652_encode_latency(7) |
 664                         RME9652_start_bit;
 665
 666                 rme9652_reset_hw_pointer(rme9652);
 667
 668                 rme9652_write(rme9652, RME9652_control_register,
 669                               rme9652->control_register);
 670                 rme9652->passthru = 1;
 671         } else {
 672                 rme9652_set_thru(rme9652, -1, 0);
 673                 rme9652_stop(rme9652);
 674                 rme9652->passthru = 0;
 675         }
 676
 677         return 0;
 678 }
 679
 680 static void rme9652_spdif_set_bit (rme9652_t *rme9652, int mask, int onoff)
 681 {
 682         if (onoff)
 683                 rme9652->control_register |= mask;
 684         else
 685                 rme9652->control_register &= ~mask;
 686
 687         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 688 }
 689
 690 static void rme9652_spdif_write_byte (rme9652_t *rme9652, const int val)
 691 {
 692         long mask;
 693         long i;
 694
 695         for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 696                 if (val & mask)
 697                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 698                 else
 699                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 700
 701                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 702                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 703         }
 704 }
 705
 706 static int rme9652_spdif_read_byte (rme9652_t *rme9652)
 707 {
 708         long mask;
 709         long val;
 710         long i;
 711
 712         val = 0;
 713
 714         for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 715                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 716                 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 717                         val |= mask;
 718                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 719         }
 720
 721         return val;
 722 }
 723
 724 static void rme9652_write_spdif_codec (rme9652_t *rme9652, const int address, const int data)
 725 {
 726         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 727         rme9652_spdif_write_byte (rme9652, 0x20);
 728         rme9652_spdif_write_byte (rme9652, address);
 729         rme9652_spdif_write_byte (rme9652, data);
 730         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 731 }
 732
 733
 734 static int rme9652_spdif_read_codec (rme9652_t *rme9652, const int address)
 735 {
 736         int ret;
 737
 738         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 739         rme9652_spdif_write_byte (rme9652, 0x20);
 740         rme9652_spdif_write_byte (rme9652, address);
 741         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 742         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 743
 744         rme9652_spdif_write_byte (rme9652, 0x21);
 745         ret = rme9652_spdif_read_byte (rme9652);
 746         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 747
 748         return ret;
 749 }
 750
 751 static void rme9652_initialize_spdif_receiver (rme9652_t *rme9652)
 752 {
 753         /* XXX what unsets this ? */
 754
 755         rme9652->control_register |= RME9652_SPDIF_RESET;
 756
 757         rme9652_write_spdif_codec (rme9652, 4, 0x40);
 758         rme9652_write_spdif_codec (rme9652, 17, 0x13);
 759         rme9652_write_spdif_codec (rme9652, 6, 0x02);
 760 }
 761
 762 static inline int rme9652_spdif_sample_rate(rme9652_t *s)
 763 {
 764         unsigned int rate_bits;
 765
 766         if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 767                 return -1;      /* error condition */
 768         }
 769
 770         if (s->hw_rev == 15) {
 771
 772                 int x, y, ret;
 773
 774                 x = rme9652_spdif_read_codec (s, 30);
 775
 776                 if (x != 0)
 777                         y = 48000 * 64 / x;
 778                 else
 779                         y = 0;
 780
 781                 if      (y > 30400 && y < 33600)  ret = 32000;
 782                 else if (y > 41900 && y < 46000)  ret = 44100;
 783                 else if (y > 46000 && y < 50400)  ret = 48000;
 784                 else if (y > 60800 && y < 67200)  ret = 64000;
 785                 else if (y > 83700 && y < 92000)  ret = 88200;
 786                 else if (y > 92000 && y < 100000) ret = 96000;
 787                 else                              ret = 0;
 788                 return ret;
 789         }
 790
 791         rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 792
 793         switch (rme9652_decode_spdif_rate(rate_bits)) {
 794         case 0x7:
 795                 return 32000;
 796                 break;
 797
 798         case 0x6:
 799                 return 44100;
 800                 break;
 801
 802         case 0x5:
 803                 return 48000;
 804                 break;
 805
 806         case 0x4:
 807                 return 88200;
 808                 break;
 809
 810         case 0x3:
 811                 return 96000;
 812                 break;
 813
 814         case 0x0:
 815                 return 64000;
 816                 break;
 817
 818         default:
 819                 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 820                            s->card_name, rate_bits);
 821                 return 0;
 822                 break;
 823         }
 824 }
 825
 826 /*-----------------------------------------------------------------------------
 827   Control Interface
 828   ----------------------------------------------------------------------------*/
 829
 830 static u32 snd_rme9652_convert_from_aes(snd_aes_iec958_t *aes)
 831 {
 832         u32 val = 0;
 833         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 834         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 835         if (val & RME9652_PRO)
 836                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 837         else
 838                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 839         return val;
 840 }
 841
 842 static void snd_rme9652_convert_to_aes(snd_aes_iec958_t *aes, u32 val)
 843 {
 844         aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 845                          ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 846         if (val & RME9652_PRO)
 847                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 848         else
 849                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 850 }
 851
 852 static int snd_rme9652_control_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 853 {
 854         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 855         uinfo->count = 1;
 856         return 0;
 857 }
 858
 859 static int snd_rme9652_control_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 860 {
 861         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 862
 863         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 864         return 0;
 865 }
 866
 867 static int snd_rme9652_control_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 868 {
 869         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 870         unsigned long flags;
 871         int change;
 872         u32 val;
 873
 874         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 875         spin_lock_irqsave(&rme9652->lock, flags);
 876         change = val != rme9652->creg_spdif;
 877         rme9652->creg_spdif = val;
 878         spin_unlock_irqrestore(&rme9652->lock, flags);
 879         return change;
 880 }
 881
 882 static int snd_rme9652_control_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 883 {
 884         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 885         uinfo->count = 1;
 886         return 0;
 887 }
 888
 889 static int snd_rme9652_control_spdif_stream_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 890 {
 891         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 892
 893         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 894         return 0;
 895 }
 896
 897 static int snd_rme9652_control_spdif_stream_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 898 {
 899         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 900         unsigned long flags;
 901         int change;
 902         u32 val;
 903
 904         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 905         spin_lock_irqsave(&rme9652->lock, flags);
 906         change = val != rme9652->creg_spdif_stream;
 907         rme9652->creg_spdif_stream = val;
 908         rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 909         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 910         spin_unlock_irqrestore(&rme9652->lock, flags);
 911         return change;
 912 }
 913
 914 static int snd_rme9652_control_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 915 {
 916         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 917         uinfo->count = 1;
 918         return 0;
 919 }
 920
 921 static int snd_rme9652_control_spdif_mask_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 922 {
 923         ucontrol->value.iec958.status[0] = kcontrol->private_value;
 924         return 0;
 925 }
 926
 927 #define RME9652_ADAT1_IN(xname, xindex) \
 928 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
 929   .info = snd_rme9652_info_adat1_in, \
 930   .get = snd_rme9652_get_adat1_in, \
 931   .put = snd_rme9652_put_adat1_in }
 932
 933 static unsigned int rme9652_adat1_in(rme9652_t *rme9652)
 934 {
 935         if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 936                 return 1;
 937         return 0;
 938 }
 939
 940 static int rme9652_set_adat1_input(rme9652_t *rme9652, int internal)
 941 {
 942         int restart = 0;
 943
 944         if (internal) {
 945                 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 946         } else {
 947                 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 948         }
 949
 950         /* XXX do we actually need to stop the card when we do this ? */
 951
 952         if ((restart = rme9652->running)) {
 953                 rme9652_stop(rme9652);
 954         }
 955
 956         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 957
 958         if (restart) {
 959                 rme9652_start(rme9652);
 960         }
 961
 962         return 0;
 963 }
 964
 965 static int snd_rme9652_info_adat1_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 966 {
 967         static char *texts[2] = {"ADAT1", "Internal"};
 968
 969         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 970         uinfo->count = 1;
 971         uinfo->value.enumerated.items = 2;
 972         if (uinfo->value.enumerated.item > 1)
 973                 uinfo->value.enumerated.item = 1;
 974         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
 975         return 0;
 976 }
 977
 978 static int snd_rme9652_get_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 979 {
 980         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 981         unsigned long flags;
 982
 983         spin_lock_irqsave(&rme9652->lock, flags);
 984         ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 985         spin_unlock_irqrestore(&rme9652->lock, flags);
 986         return 0;
 987 }
 988
 989 static int snd_rme9652_put_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 990 {
 991         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 992         unsigned long flags;
 993         int change;
 994         unsigned int val;
 995
 996         if (!snd_rme9652_use_is_exclusive(rme9652))
 997                 return -EBUSY;
 998         val = ucontrol->value.enumerated.item[0] % 2;
 999         spin_lock_irqsave(&rme9652->lock, flags);
1000         change = val != rme9652_adat1_in(rme9652);
1001         if (change)
1002                 rme9652_set_adat1_input(rme9652, val);
1003         spin_unlock_irqrestore(&rme9652->lock, flags);
1004         return change;
1005 }
1006
1007 #define RME9652_SPDIF_IN(xname, xindex) \
1008 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1009   .info = snd_rme9652_info_spdif_in, \
1010   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
1011
1012 static unsigned int rme9652_spdif_in(rme9652_t *rme9652)
1013 {
1014         return rme9652_decode_spdif_in(rme9652->control_register &
1015                                        RME9652_inp);
1016 }
1017
1018 static int rme9652_set_spdif_input(rme9652_t *rme9652, int in)
1019 {
1020         int restart = 0;
1021
1022         rme9652->control_register &= ~RME9652_inp;
1023         rme9652->control_register |= rme9652_encode_spdif_in(in);
1024
1025         if ((restart = rme9652->running)) {
1026                 rme9652_stop(rme9652);
1027         }
1028
1029         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1030
1031         if (restart) {
1032                 rme9652_start(rme9652);
1033         }
1034
1035         return 0;
1036 }
1037
1038 static int snd_rme9652_info_spdif_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1039 {
1040         static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1041
1042         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1043         uinfo->count = 1;
1044         uinfo->value.enumerated.items = 3;
1045         if (uinfo->value.enumerated.item > 2)
1046                 uinfo->value.enumerated.item = 2;
1047         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1048         return 0;
1049 }
1050
1051 static int snd_rme9652_get_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1052 {
1053         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1054         unsigned long flags;
1055
1056         spin_lock_irqsave(&rme9652->lock, flags);
1057         ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1058         spin_unlock_irqrestore(&rme9652->lock, flags);
1059         return 0;
1060 }
1061
1062 static int snd_rme9652_put_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1063 {
1064         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1065         unsigned long flags;
1066         int change;
1067         unsigned int val;
1068
1069         if (!snd_rme9652_use_is_exclusive(rme9652))
1070                 return -EBUSY;
1071         val = ucontrol->value.enumerated.item[0] % 3;
1072         spin_lock_irqsave(&rme9652->lock, flags);
1073         change = val != rme9652_spdif_in(rme9652);
1074         if (change)
1075                 rme9652_set_spdif_input(rme9652, val);
1076         spin_unlock_irqrestore(&rme9652->lock, flags);
1077         return change;
1078 }
1079
1080 #define RME9652_SPDIF_OUT(xname, xindex) \
1081 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1082   .info = snd_rme9652_info_spdif_out, \
1083   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1084
1085 static int rme9652_spdif_out(rme9652_t *rme9652)
1086 {
1087         return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1088 }
1089
1090 static int rme9652_set_spdif_output(rme9652_t *rme9652, int out)
1091 {
1092         int restart = 0;
1093
1094         if (out) {
1095                 rme9652->control_register |= RME9652_opt_out;
1096         } else {
1097                 rme9652->control_register &= ~RME9652_opt_out;
1098         }
1099
1100         if ((restart = rme9652->running)) {
1101                 rme9652_stop(rme9652);
1102         }
1103
1104         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1105
1106         if (restart) {
1107                 rme9652_start(rme9652);
1108         }
1109
1110         return 0;
1111 }
1112
1113 static int snd_rme9652_info_spdif_out(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1114 {
1115         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1116         uinfo->count = 1;
1117         uinfo->value.integer.min = 0;
1118         uinfo->value.integer.max = 1;
1119         return 0;
1120 }
1121
1122 static int snd_rme9652_get_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1123 {
1124         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1125         unsigned long flags;
1126
1127         spin_lock_irqsave(&rme9652->lock, flags);
1128         ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1129         spin_unlock_irqrestore(&rme9652->lock, flags);
1130         return 0;
1131 }
1132
1133 static int snd_rme9652_put_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1134 {
1135         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1136         unsigned long flags;
1137         int change;
1138         unsigned int val;
1139
1140         if (!snd_rme9652_use_is_exclusive(rme9652))
1141                 return -EBUSY;
1142         val = ucontrol->value.integer.value[0] & 1;
1143         spin_lock_irqsave(&rme9652->lock, flags);
1144         change = (int)val != rme9652_spdif_out(rme9652);
1145         rme9652_set_spdif_output(rme9652, val);
1146         spin_unlock_irqrestore(&rme9652->lock, flags);
1147         return change;
1148 }
1149
1150 #define RME9652_SYNC_MODE(xname, xindex) \
1151 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1152   .info = snd_rme9652_info_sync_mode, \
1153   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1154
1155 static int rme9652_sync_mode(rme9652_t *rme9652)
1156 {
1157         if (rme9652->control_register & RME9652_wsel) {
1158                 return 2;
1159         } else if (rme9652->control_register & RME9652_Master) {
1160                 return 1;
1161         } else {
1162                 return 0;
1163         }
1164 }
1165
1166 static int rme9652_set_sync_mode(rme9652_t *rme9652, int mode)
1167 {
1168         int restart = 0;
1169
1170         switch (mode) {
1171         case 0:
1172                 rme9652->control_register &=
1173                     ~(RME9652_Master | RME9652_wsel);
1174                 break;
1175         case 1:
1176                 rme9652->control_register =
1177                     (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1178                 break;
1179         case 2:
1180                 rme9652->control_register |=
1181                     (RME9652_Master | RME9652_wsel);
1182                 break;
1183         }
1184
1185         if ((restart = rme9652->running)) {
1186                 rme9652_stop(rme9652);
1187         }
1188
1189         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1190
1191         if (restart) {
1192                 rme9652_start(rme9652);
1193         }
1194
1195         return 0;
1196 }
1197
1198 static int snd_rme9652_info_sync_mode(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1199 {
1200         static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1201
1202         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1203         uinfo->count = 1;
1204         uinfo->value.enumerated.items = 3;
1205         if (uinfo->value.enumerated.item > 2)
1206                 uinfo->value.enumerated.item = 2;
1207         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1208         return 0;
1209 }
1210
1211 static int snd_rme9652_get_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1212 {
1213         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1214         unsigned long flags;
1215
1216         spin_lock_irqsave(&rme9652->lock, flags);
1217         ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1218         spin_unlock_irqrestore(&rme9652->lock, flags);
1219         return 0;
1220 }
1221
1222 static int snd_rme9652_put_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1223 {
1224         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1225         unsigned long flags;
1226         int change;
1227         unsigned int val;
1228
1229         val = ucontrol->value.enumerated.item[0] % 3;
1230         spin_lock_irqsave(&rme9652->lock, flags);
1231         change = (int)val != rme9652_sync_mode(rme9652);
1232         rme9652_set_sync_mode(rme9652, val);
1233         spin_unlock_irqrestore(&rme9652->lock, flags);
1234         return change;
1235 }
1236
1237 #define RME9652_SYNC_PREF(xname, xindex) \
1238 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1239   .info = snd_rme9652_info_sync_pref, \
1240   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1241
1242 static int rme9652_sync_pref(rme9652_t *rme9652)
1243 {
1244         switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1245         case RME9652_SyncPref_ADAT1:
1246                 return RME9652_SYNC_FROM_ADAT1;
1247         case RME9652_SyncPref_ADAT2:
1248                 return RME9652_SYNC_FROM_ADAT2;
1249         case RME9652_SyncPref_ADAT3:
1250                 return RME9652_SYNC_FROM_ADAT3;
1251         case RME9652_SyncPref_SPDIF:
1252                 return RME9652_SYNC_FROM_SPDIF;
1253         }
1254         /* Not reachable */
1255         return 0;
1256 }
1257
1258 static int rme9652_set_sync_pref(rme9652_t *rme9652, int pref)
1259 {
1260         int restart;
1261
1262         rme9652->control_register &= ~RME9652_SyncPref_Mask;
1263         switch (pref) {
1264         case RME9652_SYNC_FROM_ADAT1:
1265                 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1266                 break;
1267         case RME9652_SYNC_FROM_ADAT2:
1268                 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1269                 break;
1270         case RME9652_SYNC_FROM_ADAT3:
1271                 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1272                 break;
1273         case RME9652_SYNC_FROM_SPDIF:
1274                 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1275                 break;
1276         }
1277
1278         if ((restart = rme9652->running)) {
1279                 rme9652_stop(rme9652);
1280         }
1281
1282         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1283
1284         if (restart) {
1285                 rme9652_start(rme9652);
1286         }
1287
1288         return 0;
1289 }
1290
1291 static int snd_rme9652_info_sync_pref(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1292 {
1293         static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1294         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1295
1296         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1297         uinfo->count = 1;
1298         uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1299         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1300                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1301         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1302         return 0;
1303 }
1304
1305 static int snd_rme9652_get_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1306 {
1307         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1308         unsigned long flags;
1309
1310         spin_lock_irqsave(&rme9652->lock, flags);
1311         ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1312         spin_unlock_irqrestore(&rme9652->lock, flags);
1313         return 0;
1314 }
1315
1316 static int snd_rme9652_put_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1317 {
1318         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1319         unsigned long flags;
1320         int change, max;
1321         unsigned int val;
1322
1323         if (!snd_rme9652_use_is_exclusive(rme9652))
1324                 return -EBUSY;
1325         max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1326         val = ucontrol->value.enumerated.item[0] % max;
1327         spin_lock_irqsave(&rme9652->lock, flags);
1328         change = (int)val != rme9652_sync_pref(rme9652);
1329         rme9652_set_sync_pref(rme9652, val);
1330         spin_unlock_irqrestore(&rme9652->lock, flags);
1331         return change;
1332 }
1333
1334 static int snd_rme9652_info_thru(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1335 {
1336         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1337         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1338         uinfo->count = rme9652->ss_channels;
1339         uinfo->value.integer.min = 0;
1340         uinfo->value.integer.max = 1;
1341         return 0;
1342 }
1343
1344 static int snd_rme9652_get_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1345 {
1346         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1347         unsigned int k;
1348         u32 thru_bits = rme9652->thru_bits;
1349
1350         for (k = 0; k < rme9652->ss_channels; ++k) {
1351                 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1352         }
1353         return 0;
1354 }
1355
1356 static int snd_rme9652_put_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1357 {
1358         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1359         unsigned long flags;
1360         int change;
1361         unsigned int chn;
1362         u32 thru_bits = 0;
1363
1364         if (!snd_rme9652_use_is_exclusive(rme9652))
1365                 return -EBUSY;
1366
1367         for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1368                 if (ucontrol->value.integer.value[chn])
1369                         thru_bits |= 1 << chn;
1370         }
1371
1372         spin_lock_irqsave(&rme9652->lock, flags);
1373         change = thru_bits ^ rme9652->thru_bits;
1374         if (change) {
1375                 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1376                         if (!(change & (1 << chn)))
1377                                 continue;
1378                         rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1379                 }
1380         }
1381         spin_unlock_irqrestore(&rme9652->lock, flags);
1382         return !!change;
1383 }
1384
1385 #define RME9652_PASSTHRU(xname, xindex) \
1386 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1387   .info = snd_rme9652_info_passthru, \
1388   .put = snd_rme9652_put_passthru, \
1389   .get = snd_rme9652_get_passthru }
1390
1391 static int snd_rme9652_info_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
1392 {
1393         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1394         uinfo->count = 1;
1395         uinfo->value.integer.min = 0;
1396         uinfo->value.integer.max = 1;
1397         return 0;
1398 }
1399
1400 static int snd_rme9652_get_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1401 {
1402         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1403         unsigned long flags;
1404
1405         spin_lock_irqsave(&rme9652->lock, flags);
1406         ucontrol->value.integer.value[0] = rme9652->passthru;
1407         spin_unlock_irqrestore(&rme9652->lock, flags);
1408         return 0;
1409 }
1410
1411 static int snd_rme9652_put_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1412 {
1413         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1414         unsigned long flags;
1415         int change;
1416         unsigned int val;
1417         int err = 0;
1418
1419         if (!snd_rme9652_use_is_exclusive(rme9652))
1420                 return -EBUSY;
1421
1422         val = ucontrol->value.integer.value[0] & 1;
1423         spin_lock_irqsave(&rme9652->lock, flags);
1424         change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1425         if (change)
1426                 err = rme9652_set_passthru(rme9652, val);
1427         spin_unlock_irqrestore(&rme9652->lock, flags);
1428         return err ? err : change;
1429 }
1430
1431 /* Read-only switches */
1432
1433 #define RME9652_SPDIF_RATE(xname, xindex) \
1434 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1435   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1436   .info = snd_rme9652_info_spdif_rate, \
1437   .get = snd_rme9652_get_spdif_rate }
1438
1439 static int snd_rme9652_info_spdif_rate(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1440 {
1441         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1442         uinfo->count = 1;
1443         uinfo->value.integer.min = 0;
1444         uinfo->value.integer.max = 96000;
1445         return 0;
1446 }
1447
1448 static int snd_rme9652_get_spdif_rate(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1449 {
1450         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1451         unsigned long flags;
1452
1453         spin_lock_irqsave(&rme9652->lock, flags);
1454         ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1455         spin_unlock_irqrestore(&rme9652->lock, flags);
1456         return 0;
1457 }
1458
1459 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1460 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1461   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1462   .info = snd_rme9652_info_adat_sync, \
1463   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1464
1465 static int snd_rme9652_info_adat_sync(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1466 {
1467         static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1468
1469         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1470         uinfo->count = 1;
1471         uinfo->value.enumerated.items = 4;
1472         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1473                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1474         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1475         return 0;
1476 }
1477
1478 static int snd_rme9652_get_adat_sync(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1479 {
1480         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1481         unsigned int mask1, mask2, val;
1482
1483         switch (kcontrol->private_value) {
1484         case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1485         case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1486         case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1487         default: return -EINVAL;
1488         }
1489         val = rme9652_read(rme9652, RME9652_status_register);
1490         ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1491         ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1492         return 0;
1493 }
1494
1495 #define RME9652_TC_VALID(xname, xindex) \
1496 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1497   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1498   .info = snd_rme9652_info_tc_valid, \
1499   .get = snd_rme9652_get_tc_valid }
1500
1501 static int snd_rme9652_info_tc_valid(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1502 {
1503         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1504         uinfo->count = 1;
1505         uinfo->value.integer.min = 0;
1506         uinfo->value.integer.max = 1;
1507         return 0;
1508 }
1509
1510 static int snd_rme9652_get_tc_valid(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1511 {
1512         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1513
1514         ucontrol->value.integer.value[0] =
1515                 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1516         return 0;
1517 }
1518
1519 #if ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1520
1521 /* FIXME: this routine needs a port to the new control API --jk */
1522
1523 static int snd_rme9652_get_tc_value(void *private_data,
1524                                     snd_kswitch_t *kswitch,
1525                                     snd_switch_t *uswitch)
1526 {
1527         rme9652_t *s = (rme9652_t *) private_data;
1528         u32 value;
1529         int i;
1530
1531         uswitch->type = SNDRV_SW_TYPE_DWORD;
1532
1533         if ((rme9652_read(s, RME9652_status_register) &
1534              RME9652_tc_valid) == 0) {
1535                 uswitch->value.data32[0] = 0;
1536                 return 0;
1537         }
1538
1539         /* timecode request */
1540
1541         rme9652_write(s, RME9652_time_code, 0);
1542
1543         /* XXX bug alert: loop-based timing !!!! */
1544
1545         for (i = 0; i < 50; i++) {
1546                 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1547                         break;
1548         }
1549
1550         if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1551                 return -EIO;
1552         }
1553
1554         value = 0;
1555
1556         for (i = 0; i < 32; i++) {
1557                 value >>= 1;
1558
1559                 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1560                         value |= 0x80000000;
1561         }
1562
1563         if (value > 2 * 60 * 48000) {
1564                 value -= 2 * 60 * 48000;
1565         } else {
1566                 value = 0;
1567         }
1568
1569         uswitch->value.data32[0] = value;
1570
1571         return 0;
1572 }
1573
1574 #endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1575
1576 #define RME9652_CONTROLS (sizeof(snd_rme9652_controls)/sizeof(snd_kcontrol_new_t))
1577
1578 static snd_kcontrol_new_t snd_rme9652_controls[] = {
1579 {
1580         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1581         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1582         .info =         snd_rme9652_control_spdif_info,
1583         .get =          snd_rme9652_control_spdif_get,
1584         .put =          snd_rme9652_control_spdif_put,
1585 },
1586 {
1587         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1588         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1589         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1590         .info =         snd_rme9652_control_spdif_stream_info,
1591         .get =          snd_rme9652_control_spdif_stream_get,
1592         .put =          snd_rme9652_control_spdif_stream_put,
1593 },
1594 {
1595         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1596         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1597         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1598         .info =         snd_rme9652_control_spdif_mask_info,
1599         .get =          snd_rme9652_control_spdif_mask_get,
1600         .private_value = IEC958_AES0_NONAUDIO |
1601                         IEC958_AES0_PROFESSIONAL |
1602                         IEC958_AES0_CON_EMPHASIS,
1603 },
1604 {
1605         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1606         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1607         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1608         .info =         snd_rme9652_control_spdif_mask_info,
1609         .get =          snd_rme9652_control_spdif_mask_get,
1610         .private_value = IEC958_AES0_NONAUDIO |
1611                         IEC958_AES0_PROFESSIONAL |
1612                         IEC958_AES0_PRO_EMPHASIS,
1613 },
1614 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1615 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1616 RME9652_SYNC_MODE("Sync Mode", 0),
1617 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1618 {
1619         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1620         .name = "Channels Thru",
1621         .index = 0,
1622         .info = snd_rme9652_info_thru,
1623         .get = snd_rme9652_get_thru,
1624         .put = snd_rme9652_put_thru,
1625 },
1626 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1627 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1628 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1629 RME9652_TC_VALID("Timecode Valid", 0),
1630 RME9652_PASSTHRU("Passthru", 0)
1631 };
1632
1633 static snd_kcontrol_new_t snd_rme9652_adat3_check =
1634 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1635
1636 static snd_kcontrol_new_t snd_rme9652_adat1_input =
1637 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1638
1639 int snd_rme9652_create_controls(snd_card_t *card, rme9652_t *rme9652)
1640 {
1641         unsigned int idx;
1642         int err;
1643         snd_kcontrol_t *kctl;
1644
1645         for (idx = 0; idx < RME9652_CONTROLS; idx++) {
1646                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1647                         return err;
1648                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1649                         rme9652->spdif_ctl = kctl;
1650         }
1651
1652         if (rme9652->ss_channels == RME9652_NCHANNELS)
1653                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1654                         return err;
1655
1656         if (rme9652->hw_rev >= 15)
1657                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1658                         return err;
1659
1660         return 0;
1661 }
1662
1663 /*------------------------------------------------------------
1664    /proc interface
1665  ------------------------------------------------------------*/
1666
1667 static void
1668 snd_rme9652_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1669 {
1670         rme9652_t *rme9652 = (rme9652_t *) entry->private_data;
1671         u32 thru_bits = rme9652->thru_bits;
1672         int show_auto_sync_source = 0;
1673         int i;
1674         unsigned int status;
1675         int x;
1676
1677         status = rme9652_read(rme9652, RME9652_status_register);
1678
1679         snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1680         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1681                     rme9652->capture_buffer, rme9652->playback_buffer);
1682         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1683                     rme9652->irq, rme9652->port, rme9652->iobase);
1684         snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1685
1686         snd_iprintf(buffer, "\n");
1687
1688         x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1689                                              RME9652_latency));
1690
1691         snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1692                     x, (unsigned long) rme9652->period_bytes);
1693         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1694                     rme9652_hw_pointer(rme9652));
1695         snd_iprintf(buffer, "Passthru: %s\n",
1696                     rme9652->passthru ? "yes" : "no");
1697
1698         if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1699                 snd_iprintf(buffer, "Clock mode: autosync\n");
1700                 show_auto_sync_source = 1;
1701         } else if (rme9652->control_register & RME9652_wsel) {
1702                 if (status & RME9652_wsel_rd) {
1703                         snd_iprintf(buffer, "Clock mode: word clock\n");
1704                 } else {
1705                         snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1706                 }
1707         } else {
1708                 snd_iprintf(buffer, "Clock mode: master\n");
1709         }
1710
1711         if (show_auto_sync_source) {
1712                 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1713                 case RME9652_SyncPref_ADAT1:
1714                         snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1715                         break;
1716                 case RME9652_SyncPref_ADAT2:
1717                         snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1718                         break;
1719                 case RME9652_SyncPref_ADAT3:
1720                         snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1721                         break;
1722                 case RME9652_SyncPref_SPDIF:
1723                         snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1724                         break;
1725                 default:
1726                         snd_iprintf(buffer, "Pref. sync source: ???\n");
1727                 }
1728         }
1729
1730         if (rme9652->hw_rev >= 15)
1731                 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1732                             (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1733                             "Internal" : "ADAT1 optical");
1734
1735         snd_iprintf(buffer, "\n");
1736
1737         switch (rme9652_decode_spdif_in(rme9652->control_register &
1738                                         RME9652_inp)) {
1739         case RME9652_SPDIFIN_OPTICAL:
1740                 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1741                 break;
1742         case RME9652_SPDIFIN_COAXIAL:
1743                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1744                 break;
1745         case RME9652_SPDIFIN_INTERN:
1746                 snd_iprintf(buffer, "IEC958 input: Internal\n");
1747                 break;
1748         default:
1749                 snd_iprintf(buffer, "IEC958 input: ???\n");
1750                 break;
1751         }
1752
1753         if (rme9652->control_register & RME9652_opt_out) {
1754                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1755         } else {
1756                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1757         }
1758
1759         if (rme9652->control_register & RME9652_PRO) {
1760                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1761         } else {
1762                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1763         }
1764
1765         if (rme9652->control_register & RME9652_EMP) {
1766                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1767         } else {
1768                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1769         }
1770
1771         if (rme9652->control_register & RME9652_Dolby) {
1772                 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1773         } else {
1774                 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1775         }
1776
1777         i = rme9652_spdif_sample_rate(rme9652);
1778
1779         if (i < 0) {
1780                 snd_iprintf(buffer,
1781                             "IEC958 sample rate: error flag set\n");
1782         } else if (i == 0) {
1783                 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1784         } else {
1785                 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1786         }
1787
1788         snd_iprintf(buffer, "\n");
1789
1790         snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1791                     rme9652_adat_sample_rate(rme9652));
1792
1793         /* Sync Check */
1794
1795         x = status & RME9652_sync_0;
1796         if (status & RME9652_lock_0) {
1797                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1798         } else {
1799                 snd_iprintf(buffer, "ADAT1: No Lock\n");
1800         }
1801
1802         x = status & RME9652_sync_1;
1803         if (status & RME9652_lock_1) {
1804                 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1805         } else {
1806                 snd_iprintf(buffer, "ADAT2: No Lock\n");
1807         }
1808
1809         x = status & RME9652_sync_2;
1810         if (status & RME9652_lock_2) {
1811                 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1812         } else {
1813                 snd_iprintf(buffer, "ADAT3: No Lock\n");
1814         }
1815
1816         snd_iprintf(buffer, "\n");
1817
1818         snd_iprintf(buffer, "Timecode signal: %s\n",
1819                     (status & RME9652_tc_valid) ? "yes" : "no");
1820
1821         /* thru modes */
1822
1823         snd_iprintf(buffer, "Punch Status:\n\n");
1824
1825         for (i = 0; i < rme9652->ss_channels; i++) {
1826                 if (thru_bits & (1 << i)) {
1827                         snd_iprintf(buffer, "%2d:  on ", i + 1);
1828                 } else {
1829                         snd_iprintf(buffer, "%2d: off ", i + 1);
1830                 }
1831
1832                 if (((i + 1) % 8) == 0) {
1833                         snd_iprintf(buffer, "\n");
1834                 }
1835         }
1836
1837         snd_iprintf(buffer, "\n");
1838 }
1839
1840 static void __devinit snd_rme9652_proc_init(rme9652_t *rme9652)
1841 {
1842         snd_info_entry_t *entry;
1843
1844         if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1845                 snd_info_set_text_ops(entry, rme9652, 1024, snd_rme9652_proc_read);
1846 }
1847
1848 static void snd_rme9652_free_buffers(rme9652_t *rme9652)
1849 {
1850         if (rme9652->capture_buffer_unaligned) {
1851                 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
1852                                            rme9652->capture_buffer_unaligned,
1853                                            rme9652->capture_buffer_addr, 1);
1854         }
1855
1856         if (rme9652->playback_buffer_unaligned) {
1857                 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
1858                                            rme9652->playback_buffer_unaligned,
1859                                            rme9652->playback_buffer_addr, 0);
1860         }
1861 }
1862
1863 static int snd_rme9652_free(rme9652_t *rme9652)
1864 {
1865         if (rme9652->irq >= 0)
1866                 rme9652_stop(rme9652);
1867         snd_rme9652_free_buffers(rme9652);
1868
1869         if (rme9652->iobase)
1870                 iounmap((void *) rme9652->iobase);
1871         if (rme9652->res_port) {
1872                 release_resource(rme9652->res_port);
1873                 kfree_nocheck(rme9652->res_port);
1874         }
1875         if (rme9652->irq >= 0)
1876                 free_irq(rme9652->irq, (void *)rme9652);
1877         return 0;
1878 }
1879
1880 static int __devinit snd_rme9652_initialize_memory(rme9652_t *rme9652)
1881 {
1882         void *pb, *cb;
1883         dma_addr_t pb_addr, cb_addr;
1884         unsigned long pb_bus, cb_bus;
1885
1886         cb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &cb_addr, 1);
1887         pb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &pb_addr, 0);
1888
1889         if (cb == 0 || pb == 0) {
1890                 if (cb) {
1891                         snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, cb, cb_addr, 1);
1892                 }
1893                 if (pb) {
1894                         snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, pb, pb_addr, 0);
1895                 }
1896
1897                 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1898                 return -ENOMEM;
1899         }
1900
1901         /* save raw addresses for use when freeing memory later */
1902
1903         rme9652->capture_buffer_unaligned = cb;
1904         rme9652->playback_buffer_unaligned = pb;
1905         rme9652->capture_buffer_addr = cb_addr;
1906         rme9652->playback_buffer_addr = pb_addr;
1907
1908         /* Align to bus-space 64K boundary */
1909
1910         cb_bus = (cb_addr + 0xFFFF) & ~0xFFFFl;
1911         pb_bus = (pb_addr + 0xFFFF) & ~0xFFFFl;
1912
1913         /* Tell the card where it is */
1914
1915         rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1916         rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1917
1918         rme9652->capture_buffer = cb + (cb_bus - cb_addr);
1919         rme9652->playback_buffer = pb + (pb_bus - pb_addr);
1920
1921         return 0;
1922 }
1923
1924 static void snd_rme9652_set_defaults(rme9652_t *rme9652)
1925 {
1926         unsigned int k;
1927
1928         /* ASSUMPTION: rme9652->lock is either held, or
1929            there is no need to hold it (e.g. during module
1930            initalization).
1931          */
1932
1933         /* set defaults:
1934
1935            SPDIF Input via Coax
1936            autosync clock mode
1937            maximum latency (7 = 8192 samples, 64Kbyte buffer,
1938            which implies 2 4096 sample, 32Kbyte periods).
1939
1940            if rev 1.5, initialize the S/PDIF receiver.
1941
1942          */
1943
1944         rme9652->control_register =
1945             RME9652_inp_0 | rme9652_encode_latency(7);
1946
1947         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1948
1949         rme9652_reset_hw_pointer(rme9652);
1950         rme9652_compute_period_size(rme9652);
1951
1952         /* default: thru off for all channels */
1953
1954         for (k = 0; k < RME9652_NCHANNELS; ++k)
1955                 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1956
1957         rme9652->thru_bits = 0;
1958         rme9652->passthru = 0;
1959
1960         /* set a default rate so that the channel map is set up */
1961
1962         rme9652_set_rate(rme9652, 48000);
1963 }
1964
1965 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1966 {
1967         rme9652_t *rme9652 = (rme9652_t *) dev_id;
1968
1969         if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1970                 return IRQ_NONE;
1971         }
1972
1973         rme9652_write(rme9652, RME9652_irq_clear, 0);
1974
1975         if (rme9652->capture_substream) {
1976                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1977         }
1978
1979         if (rme9652->playback_substream) {
1980                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1981         }
1982         return IRQ_HANDLED;
1983 }
1984
1985 static snd_pcm_uframes_t snd_rme9652_hw_pointer(snd_pcm_substream_t *substream)
1986 {
1987         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
1988         return rme9652_hw_pointer(rme9652);
1989 }
1990
1991 static char *rme9652_channel_buffer_location(rme9652_t *rme9652,
1992                                              int stream,
1993                                              int channel)
1994
1995 {
1996         int mapped_channel;
1997
1998         snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1999
2000         if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
2001                 return NULL;
2002         }
2003
2004         if (stream == SNDRV_PCM_STREAM_CAPTURE) {
2005                 return rme9652->capture_buffer +
2006                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
2007         } else {
2008                 return rme9652->playback_buffer +
2009                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
2010         }
2011 }
2012
2013 static int snd_rme9652_playback_copy(snd_pcm_substream_t *substream, int channel,
2014                                      snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
2015 {
2016         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2017         char *channel_buf;
2018
2019         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
2020
2021         channel_buf = rme9652_channel_buffer_location (rme9652,
2022                                                        substream->pstr->stream,
2023                                                        channel);
2024         snd_assert(channel_buf != NULL, return -EIO);
2025         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
2026                 return -EFAULT;
2027         return count;
2028 }
2029
2030 static int snd_rme9652_capture_copy(snd_pcm_substream_t *substream, int channel,
2031                                     snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
2032 {
2033         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2034         char *channel_buf;
2035
2036         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
2037
2038         channel_buf = rme9652_channel_buffer_location (rme9652,
2039                                                        substream->pstr->stream,
2040                                                        channel);
2041         snd_assert(channel_buf != NULL, return -EIO);
2042         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
2043                 return -EFAULT;
2044         return count;
2045 }
2046
2047 static int snd_rme9652_hw_silence(snd_pcm_substream_t *substream, int channel,
2048                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
2049 {
2050         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2051         char *channel_buf;
2052
2053         channel_buf = rme9652_channel_buffer_location (rme9652,
2054                                                        substream->pstr->stream,
2055                                                        channel);
2056         snd_assert(channel_buf != NULL, return -EIO);
2057         memset(channel_buf + pos * 4, 0, count * 4);
2058         return count;
2059 }
2060
2061 static int snd_rme9652_reset(snd_pcm_substream_t *substream)
2062 {
2063         snd_pcm_runtime_t *runtime = substream->runtime;
2064         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2065         snd_pcm_substream_t *other;
2066         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2067                 other = rme9652->capture_substream;
2068         else
2069                 other = rme9652->playback_substream;
2070         if (rme9652->running)
2071                 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
2072         else
2073                 runtime->status->hw_ptr = 0;
2074         if (other) {
2075                 struct list_head *pos;
2076                 snd_pcm_substream_t *s;
2077                 snd_pcm_runtime_t *oruntime = other->runtime;
2078                 snd_pcm_group_for_each(pos, substream) {
2079                         s = snd_pcm_group_substream_entry(pos);
2080                         if (s == other) {
2081                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
2082                                 break;
2083                         }
2084                 }
2085         }
2086         return 0;
2087 }
2088
2089 static int snd_rme9652_hw_params(snd_pcm_substream_t *substream,
2090                                  snd_pcm_hw_params_t *params)
2091 {
2092         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2093         int err;
2094         pid_t this_pid;
2095         pid_t other_pid;
2096
2097         spin_lock_irq(&rme9652->lock);
2098
2099         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2100                 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2101                 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
2102                 this_pid = rme9652->playback_pid;
2103                 other_pid = rme9652->capture_pid;
2104         } else {
2105                 this_pid = rme9652->capture_pid;
2106                 other_pid = rme9652->playback_pid;
2107         }
2108
2109         if ((other_pid > 0) && (this_pid != other_pid)) {
2110
2111                 /* The other stream is open, and not by the same
2112                    task as this one. Make sure that the parameters
2113                    that matter are the same.
2114                  */
2115
2116                 if ((int)params_rate(params) !=
2117                     rme9652_adat_sample_rate(rme9652)) {
2118                         spin_unlock_irq(&rme9652->lock);
2119                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2120                         return -EBUSY;
2121                 }
2122
2123                 if (params_period_size(params) != rme9652->period_bytes / 4) {
2124                         spin_unlock_irq(&rme9652->lock);
2125                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2126                         return -EBUSY;
2127                 }
2128
2129                 /* We're fine. */
2130
2131                 spin_unlock_irq(&rme9652->lock);
2132                 return 0;
2133
2134         } else {
2135                 spin_unlock_irq(&rme9652->lock);
2136         }
2137
2138         /* how to make sure that the rate matches an externally-set one ?
2139          */
2140
2141         if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2142                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2143                 return err;
2144         }
2145
2146         if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2147                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2148                 return err;
2149         }
2150
2151         return 0;
2152 }
2153
2154 static int snd_rme9652_channel_info(snd_pcm_substream_t *substream,
2155                                     snd_pcm_channel_info_t *info)
2156 {
2157         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2158         int chn;
2159
2160         snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2161
2162         if ((chn = rme9652->channel_map[info->channel]) < 0) {
2163                 return -EINVAL;
2164         }
2165
2166         info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2167         info->first = 0;
2168         info->step = 32;
2169         return 0;
2170 }
2171
2172 static int snd_rme9652_ioctl(snd_pcm_substream_t *substream,
2173                              unsigned int cmd, void *arg)
2174 {
2175         switch (cmd) {
2176         case SNDRV_PCM_IOCTL1_RESET:
2177         {
2178                 return snd_rme9652_reset(substream);
2179         }
2180         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2181         {
2182                 snd_pcm_channel_info_t *info = arg;
2183                 return snd_rme9652_channel_info(substream, info);
2184         }
2185         default:
2186                 break;
2187         }
2188
2189         return snd_pcm_lib_ioctl(substream, cmd, arg);
2190 }
2191
2192 static void rme9652_silence_playback(rme9652_t *rme9652)
2193 {
2194         memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2195 }
2196
2197 static int snd_rme9652_trigger(snd_pcm_substream_t *substream,
2198                                int cmd)
2199 {
2200         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2201         snd_pcm_substream_t *other;
2202         int running;
2203         spin_lock(&rme9652->lock);
2204         running = rme9652->running;
2205         switch (cmd) {
2206         case SNDRV_PCM_TRIGGER_START:
2207                 running |= 1 << substream->stream;
2208                 break;
2209         case SNDRV_PCM_TRIGGER_STOP:
2210                 running &= ~(1 << substream->stream);
2211                 break;
2212         default:
2213                 snd_BUG();
2214                 spin_unlock(&rme9652->lock);
2215                 return -EINVAL;
2216         }
2217         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2218                 other = rme9652->capture_substream;
2219         else
2220                 other = rme9652->playback_substream;
2221
2222         if (other) {
2223                 struct list_head *pos;
2224                 snd_pcm_substream_t *s;
2225                 snd_pcm_group_for_each(pos, substream) {
2226                         s = snd_pcm_group_substream_entry(pos);
2227                         if (s == other) {
2228                                 snd_pcm_trigger_done(s, substream);
2229                                 if (cmd == SNDRV_PCM_TRIGGER_START)
2230                                         running |= 1 << s->stream;
2231                                 else
2232                                         running &= ~(1 << s->stream);
2233                                 goto _ok;
2234                         }
2235                 }
2236                 if (cmd == SNDRV_PCM_TRIGGER_START) {
2237                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2238                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2239                                 rme9652_silence_playback(rme9652);
2240                 } else {
2241                         if (running &&
2242                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2243                                 rme9652_silence_playback(rme9652);
2244                 }
2245         } else {
2246                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2247                         rme9652_silence_playback(rme9652);
2248         }
2249  _ok:
2250         snd_pcm_trigger_done(substream, substream);
2251         if (!rme9652->running && running)
2252                 rme9652_start(rme9652);
2253         else if (rme9652->running && !running)
2254                 rme9652_stop(rme9652);
2255         rme9652->running = running;
2256         spin_unlock(&rme9652->lock);
2257
2258         return 0;
2259 }
2260
2261 static int snd_rme9652_prepare(snd_pcm_substream_t *substream)
2262 {
2263         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2264         int result = 0;
2265
2266         spin_lock(&rme9652->lock);
2267         if (!rme9652->running)
2268                 rme9652_reset_hw_pointer(rme9652);
2269         spin_unlock(&rme9652->lock);
2270         return result;
2271 }
2272
2273 static snd_pcm_hardware_t snd_rme9652_playback_subinfo =
2274 {
2275         .info =                 (SNDRV_PCM_INFO_MMAP |
2276                                  SNDRV_PCM_INFO_MMAP_VALID |
2277                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2278                                  SNDRV_PCM_INFO_SYNC_START |
2279                                  SNDRV_PCM_INFO_DOUBLE),
2280         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2281         .rates =                (SNDRV_PCM_RATE_44100 |
2282                                  SNDRV_PCM_RATE_48000 |
2283                                  SNDRV_PCM_RATE_88200 |
2284                                  SNDRV_PCM_RATE_96000),
2285         .rate_min =             44100,
2286         .rate_max =             96000,
2287         .channels_min =         10,
2288         .channels_max =         26,
2289         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2290         .period_bytes_min =     (64 * 4) * 10,
2291         .period_bytes_max =     (8192 * 4) * 26,
2292         .periods_min =          2,
2293         .periods_max =          2,
2294         .fifo_size =            0,
2295 };
2296
2297 static snd_pcm_hardware_t snd_rme9652_capture_subinfo =
2298 {
2299         .info =                 (SNDRV_PCM_INFO_MMAP |
2300                                  SNDRV_PCM_INFO_MMAP_VALID |
2301                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2302                                  SNDRV_PCM_INFO_SYNC_START),
2303         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2304         .rates =                (SNDRV_PCM_RATE_44100 |
2305                                  SNDRV_PCM_RATE_48000 |
2306                                  SNDRV_PCM_RATE_88200 |
2307                                  SNDRV_PCM_RATE_96000),
2308         .rate_min =             44100,
2309         .rate_max =             96000,
2310         .channels_min =         10,
2311         .channels_max =         26,
2312         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2313         .period_bytes_min =     (64 * 4) * 10,
2314         .period_bytes_max =     (8192 * 4) * 26,
2315         .periods_min =          2,
2316         .periods_max =          2,
2317         .fifo_size =            0,
2318 };
2319
2320 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2321
2322 #define PERIOD_SIZES sizeof(period_sizes) / sizeof(period_sizes[0])
2323
2324 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = {
2325         .count = PERIOD_SIZES,
2326         .list = period_sizes,
2327         .mask = 0
2328 };
2329
2330 static int snd_rme9652_hw_rule_channels(snd_pcm_hw_params_t *params,
2331                                         snd_pcm_hw_rule_t *rule)
2332 {
2333         rme9652_t *rme9652 = rule->private;
2334         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2335         unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2336         return snd_interval_list(c, 2, list, 0);
2337 }
2338
2339 static int snd_rme9652_hw_rule_channels_rate(snd_pcm_hw_params_t *params,
2340                                              snd_pcm_hw_rule_t *rule)
2341 {
2342         rme9652_t *rme9652 = rule->private;
2343         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2344         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2345         if (r->min > 48000) {
2346                 snd_interval_t t = {
2347                         .min = rme9652->ds_channels,
2348                         .max = rme9652->ds_channels,
2349                         .integer = 1,
2350                 };
2351                 return snd_interval_refine(c, &t);
2352         } else if (r->max < 88200) {
2353                 snd_interval_t t = {
2354                         .min = rme9652->ss_channels,
2355                         .max = rme9652->ss_channels,
2356                         .integer = 1,
2357                 };
2358                 return snd_interval_refine(c, &t);
2359         }
2360         return 0;
2361 }
2362
2363 static int snd_rme9652_hw_rule_rate_channels(snd_pcm_hw_params_t *params,
2364                                              snd_pcm_hw_rule_t *rule)
2365 {
2366         rme9652_t *rme9652 = rule->private;
2367         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2368         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2369         if (c->min >= rme9652->ss_channels) {
2370                 snd_interval_t t = {
2371                         .min = 44100,
2372                         .max = 48000,
2373                         .integer = 1,
2374                 };
2375                 return snd_interval_refine(r, &t);
2376         } else if (c->max <= rme9652->ds_channels) {
2377                 snd_interval_t t = {
2378                         .min = 88200,
2379                         .max = 96000,
2380                         .integer = 1,
2381                 };
2382                 return snd_interval_refine(r, &t);
2383         }
2384         return 0;
2385 }
2386
2387 static int snd_rme9652_playback_open(snd_pcm_substream_t *substream)
2388 {
2389         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2390         unsigned long flags;
2391         snd_pcm_runtime_t *runtime = substream->runtime;
2392
2393         spin_lock_irqsave(&rme9652->lock, flags);
2394
2395         snd_pcm_set_sync(substream);
2396
2397         runtime->hw = snd_rme9652_playback_subinfo;
2398         runtime->dma_area = rme9652->playback_buffer;
2399         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2400
2401         if (rme9652->capture_substream == NULL) {
2402                 rme9652_stop(rme9652);
2403                 rme9652_set_thru(rme9652, -1, 0);
2404         }
2405
2406         rme9652->playback_pid = current->pid;
2407         rme9652->playback_substream = substream;
2408
2409         spin_unlock_irqrestore(&rme9652->lock, flags);
2410
2411         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2412         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2413         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2414                              snd_rme9652_hw_rule_channels, rme9652,
2415                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2416         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2417                              snd_rme9652_hw_rule_channels_rate, rme9652,
2418                              SNDRV_PCM_HW_PARAM_RATE, -1);
2419         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2420                              snd_rme9652_hw_rule_rate_channels, rme9652,
2421                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2422
2423         rme9652->creg_spdif_stream = rme9652->creg_spdif;
2424         rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2425         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2426                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2427         return 0;
2428 }
2429
2430 static int snd_rme9652_playback_release(snd_pcm_substream_t *substream)
2431 {
2432         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2433         unsigned long flags;
2434
2435         spin_lock_irqsave(&rme9652->lock, flags);
2436
2437         rme9652->playback_pid = -1;
2438         rme9652->playback_substream = NULL;
2439
2440         spin_unlock_irqrestore(&rme9652->lock, flags);
2441
2442         rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2443         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2444                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2445         return 0;
2446 }
2447
2448
2449 static int snd_rme9652_capture_open(snd_pcm_substream_t *substream)
2450 {
2451         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2452         unsigned long flags;
2453         snd_pcm_runtime_t *runtime = substream->runtime;
2454
2455         spin_lock_irqsave(&rme9652->lock, flags);
2456
2457         snd_pcm_set_sync(substream);
2458
2459         runtime->hw = snd_rme9652_capture_subinfo;
2460         runtime->dma_area = rme9652->capture_buffer;
2461         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2462
2463         if (rme9652->playback_substream == NULL) {
2464                 rme9652_stop(rme9652);
2465                 rme9652_set_thru(rme9652, -1, 0);
2466         }
2467
2468         rme9652->capture_pid = current->pid;
2469         rme9652->capture_substream = substream;
2470
2471         spin_unlock_irqrestore(&rme9652->lock, flags);
2472
2473         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2474         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2475         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2476                              snd_rme9652_hw_rule_channels, rme9652,
2477                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2478         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2479                              snd_rme9652_hw_rule_channels_rate, rme9652,
2480                              SNDRV_PCM_HW_PARAM_RATE, -1);
2481         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2482                              snd_rme9652_hw_rule_rate_channels, rme9652,
2483                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2484         return 0;
2485 }
2486
2487 static int snd_rme9652_capture_release(snd_pcm_substream_t *substream)
2488 {
2489         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2490         unsigned long flags;
2491
2492         spin_lock_irqsave(&rme9652->lock, flags);
2493
2494         rme9652->capture_pid = -1;
2495         rme9652->capture_substream = NULL;
2496
2497         spin_unlock_irqrestore(&rme9652->lock, flags);
2498         return 0;
2499 }
2500
2501 static snd_pcm_ops_t snd_rme9652_playback_ops = {
2502         .open =         snd_rme9652_playback_open,
2503         .close =        snd_rme9652_playback_release,
2504         .ioctl =        snd_rme9652_ioctl,
2505         .hw_params =    snd_rme9652_hw_params,
2506         .prepare =      snd_rme9652_prepare,
2507         .trigger =      snd_rme9652_trigger,
2508         .pointer =      snd_rme9652_hw_pointer,
2509         .copy =         snd_rme9652_playback_copy,
2510         .silence =      snd_rme9652_hw_silence,
2511 };
2512
2513 static snd_pcm_ops_t snd_rme9652_capture_ops = {
2514         .open =         snd_rme9652_capture_open,
2515         .close =        snd_rme9652_capture_release,
2516         .ioctl =        snd_rme9652_ioctl,
2517         .hw_params =    snd_rme9652_hw_params,
2518         .prepare =      snd_rme9652_prepare,
2519         .trigger =      snd_rme9652_trigger,
2520         .pointer =      snd_rme9652_hw_pointer,
2521         .copy =         snd_rme9652_capture_copy,
2522 };
2523
2524 static int __devinit snd_rme9652_create_pcm(snd_card_t *card,
2525                                          rme9652_t *rme9652)
2526 {
2527         snd_pcm_t *pcm;
2528         int err;
2529
2530         if ((err = snd_pcm_new(card,
2531                                rme9652->card_name,
2532                                0, 1, 1, &pcm)) < 0) {
2533                 return err;
2534         }
2535
2536         rme9652->pcm = pcm;
2537         pcm->private_data = rme9652;
2538         strcpy(pcm->name, rme9652->card_name);
2539
2540         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2541         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2542
2543         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2544
2545         return 0;
2546 }
2547
2548 static int __devinit snd_rme9652_create(snd_card_t *card,
2549                                      rme9652_t *rme9652,
2550                                      int precise_ptr)
2551 {
2552         struct pci_dev *pci = rme9652->pci;
2553         int err;
2554         int status;
2555         unsigned short rev;
2556
2557         rme9652->irq = -1;
2558         rme9652->card = card;
2559
2560         pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2561
2562         switch (rev & 0xff) {
2563         case 3:
2564         case 4:
2565         case 8:
2566         case 9:
2567                 break;
2568
2569         default:
2570                 /* who knows? */
2571                 return -ENODEV;
2572         }
2573
2574         if ((err = pci_enable_device(pci)) < 0)
2575                 return err;
2576
2577         spin_lock_init(&rme9652->lock);
2578
2579         rme9652->port = pci_resource_start(pci, 0);
2580         if ((rme9652->res_port = request_mem_region(rme9652->port, RME9652_IO_EXTENT, "rme9652")) == NULL) {
2581                 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2582                 return -EBUSY;
2583         }
2584
2585         rme9652->iobase = (unsigned long) ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2586         if (rme9652->iobase == 0) {
2587                 snd_printk("unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2588                 return -EBUSY;
2589         }
2590
2591         if (request_irq(pci->irq, snd_rme9652_interrupt, SA_INTERRUPT|SA_SHIRQ, "rme9652", (void *)rme9652)) {
2592                 snd_printk("unable to request IRQ %d\n", pci->irq);
2593                 return -EBUSY;
2594         }
2595         rme9652->irq = pci->irq;
2596         rme9652->precise_ptr = precise_ptr;
2597
2598         /* Determine the h/w rev level of the card. This seems like
2599            a particularly kludgy way to encode it, but its what RME
2600            chose to do, so we follow them ...
2601         */
2602
2603         status = rme9652_read(rme9652, RME9652_status_register);
2604         if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2605                 rme9652->hw_rev = 15;
2606         } else {
2607                 rme9652->hw_rev = 11;
2608         }
2609
2610         /* Differentiate between the standard Hammerfall, and the
2611            "Light", which does not have the expansion board. This
2612            method comes from information received from Mathhias
2613            Clausen at RME. Display the EEPROM and h/w revID where
2614            relevant.
2615         */
2616
2617         switch (rev) {
2618         case 8: /* original eprom */
2619                 strcpy(card->driver, "RME9636");
2620                 if (rme9652->hw_rev == 15) {
2621                         rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2622                 } else {
2623                         rme9652->card_name = "RME Digi9636";
2624                 }
2625                 rme9652->ss_channels = RME9636_NCHANNELS;
2626                 break;
2627         case 9: /* W36_G EPROM */
2628                 strcpy(card->driver, "RME9636");
2629                 rme9652->card_name = "RME Digi9636 (Rev G)";
2630                 rme9652->ss_channels = RME9636_NCHANNELS;
2631                 break;
2632         case 4: /* W52_G EPROM */
2633                 strcpy(card->driver, "RME9652");
2634                 rme9652->card_name = "RME Digi9652 (Rev G)";
2635                 rme9652->ss_channels = RME9652_NCHANNELS;
2636                 break;
2637         case 3: /* original eprom */
2638                 strcpy(card->driver, "RME9652");
2639                 if (rme9652->hw_rev == 15) {
2640                         rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2641                 } else {
2642                         rme9652->card_name = "RME Digi9652";
2643                 }
2644                 rme9652->ss_channels = RME9652_NCHANNELS;
2645                 break;
2646         }
2647
2648         rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2649
2650         pci_set_master(rme9652->pci);
2651
2652         if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2653                 return err;
2654         }
2655
2656         if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2657                 return err;
2658         }
2659
2660         if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2661                 return err;
2662         }
2663
2664         snd_rme9652_proc_init(rme9652);
2665
2666         rme9652->last_spdif_sample_rate = -1;
2667         rme9652->last_adat_sample_rate = -1;
2668         rme9652->playback_pid = -1;
2669         rme9652->capture_pid = -1;
2670         rme9652->capture_substream = NULL;
2671         rme9652->playback_substream = NULL;
2672
2673         snd_rme9652_set_defaults(rme9652);
2674
2675         if (rme9652->hw_rev == 15) {
2676                 rme9652_initialize_spdif_receiver (rme9652);
2677         }
2678
2679         return 0;
2680 }
2681
2682 static void snd_rme9652_card_free(snd_card_t *card)
2683 {
2684         rme9652_t *rme9652 = (rme9652_t *) card->private_data;
2685
2686         if (rme9652)
2687                 snd_rme9652_free(rme9652);
2688 }
2689
2690 static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2691                                        const struct pci_device_id *pci_id)
2692 {
2693         static int dev;
2694         rme9652_t *rme9652;
2695         snd_card_t *card;
2696         int err;
2697
2698         if (dev >= SNDRV_CARDS)
2699                 return -ENODEV;
2700         if (!enable[dev]) {
2701                 dev++;
2702                 return -ENOENT;
2703         }
2704
2705         card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2706                             sizeof(rme9652_t));
2707
2708         if (!card)
2709                 return -ENOMEM;
2710
2711         rme9652 = (rme9652_t *) card->private_data;
2712         card->private_free = snd_rme9652_card_free;
2713         rme9652->dev = dev;
2714         rme9652->pci = pci;
2715         snd_card_set_dev(card, &pci->dev);
2716
2717         if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2718                 snd_card_free(card);
2719                 return err;
2720         }
2721
2722         strcpy(card->shortname, rme9652->card_name);
2723
2724         sprintf(card->longname, "%s at 0x%lx, irq %d",
2725                 card->shortname, rme9652->port, rme9652->irq);
2726
2727
2728         if ((err = snd_card_register(card)) < 0) {
2729                 snd_card_free(card);
2730                 return err;
2731         }
2732         pci_set_drvdata(pci, card);
2733         dev++;
2734         return 0;
2735 }
2736
2737 static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2738 {
2739         snd_card_free(pci_get_drvdata(pci));
2740         pci_set_drvdata(pci, NULL);
2741 }
2742
2743 static struct pci_driver driver = {
2744         .name     = "RME Digi9652 (Hammerfall)",
2745         .id_table = snd_rme9652_ids,
2746         .probe    = snd_rme9652_probe,
2747         .remove   = __devexit_p(snd_rme9652_remove),
2748 };
2749
2750 static int __init alsa_card_hammerfall_init(void)
2751 {
2752         return pci_module_init(&driver);
2753 }
2754
2755 static void __exit alsa_card_hammerfall_exit(void)
2756 {
2757         pci_unregister_driver(&driver);
2758 }
2759
2760 module_init(alsa_card_hammerfall_init)
2761 module_exit(alsa_card_hammerfall_exit)