sound/pci/rme9652/rme9652.c

   1 /*
   2  *   ALSA driver for RME Digi9652 audio interfaces
   3  *
   4  *      Copyright (c) 1999 IEM - Winfried Ritsch
   5  *      Copyright (c) 1999-2001  Paul Davis
   6  *
   7  *   This program is free software; you can redistribute it and/or modify
   8  *   it under the terms of the GNU General Public License as published by
   9  *   the Free Software Foundation; either version 2 of the License, or
  10  *   (at your option) any later version.
  11  *
  12  *   This program is distributed in the hope that it will be useful,
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *   GNU General Public License for more details.
  16  *
  17  *   You should have received a copy of the GNU General Public License
  18  *   along with this program; if not, write to the Free Software
  19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  *
  21  */
  22
  23 #include <sound/driver.h>
  24 #include <linux/delay.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/slab.h>
  29
  30 #include <sound/core.h>
  31 #include <sound/control.h>
  32 #include <sound/pcm.h>
  33 #include <sound/info.h>
  34 #include <sound/asoundef.h>
  35 #define SNDRV_GET_ID
  36 #include <sound/initval.h>
  37
  38 #include <asm/current.h>
  39 #include <asm/io.h>
  40
  41 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  42 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  43 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  44 static int precise_ptr[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* Enable precise pointer */
  45
  46 MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
  47 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  48 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
  49 MODULE_PARM(id, "1-" __MODULE_STRING(SNDRV_CARDS) "s");
  50 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  51 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
  52 MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
  53 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  54 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
  55 MODULE_PARM(precise_ptr, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
  56 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  57 MODULE_PARM_SYNTAX(precise_ptr, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC);
  58 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  59 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  60 MODULE_LICENSE("GPL");
  61 MODULE_CLASSES("{sound}");
  62 MODULE_DEVICES("{{RME,Hammerfall},"
  63                 "{RME,Hammerfall-Light}}");
  64
  65 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  66    capture, one for playback. Both the ADAT and S/PDIF channels appear
  67    to the host CPU in the same block of memory. There is no functional
  68    difference between them in terms of access.
  69
  70    The Hammerfall Light is identical to the Hammerfall, except that it
  71    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  72 */
  73
  74 #define RME9652_NCHANNELS       26
  75 #define RME9636_NCHANNELS       18
  76
  77 /* Preferred sync source choices - used by "sync_pref" control switch */
  78
  79 #define RME9652_SYNC_FROM_SPDIF 0
  80 #define RME9652_SYNC_FROM_ADAT1 1
  81 #define RME9652_SYNC_FROM_ADAT2 2
  82 #define RME9652_SYNC_FROM_ADAT3 3
  83
  84 /* Possible sources of S/PDIF input */
  85
  86 #define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  87 #define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  88 #define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  89
  90 /* ------------- Status-Register bits --------------------- */
  91
  92 #define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  93 #define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  94 #define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  95 #define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  96 #define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  97 #define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  98                                         /* bits 6-15 encode h/w buffer pointer position */
  99 #define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
 100 #define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
 101 #define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
 102 #define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
 103 #define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
 104 #define RME9652_tc_out     (1<<21)      /* time-code out bit */
 105 #define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
 106 #define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
 107 #define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
 108 #define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
 109 #define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
 110 #define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
 111 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
 112
 113 #define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
 114 #define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
 115 #define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
 116 #define rme9652_decode_spdif_rate(x) ((x)>>22)
 117
 118 /* Bit 6..15 : h/w buffer pointer */
 119
 120 #define RME9652_buf_pos   0x000FFC0
 121
 122 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 123    Rev G EEPROMS and Rev 1.5 cards or later.
 124 */
 125
 126 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 127
 128 #ifndef PCI_VENDOR_ID_XILINX
 129 #define PCI_VENDOR_ID_XILINX            0x10ee
 130 #endif
 131 #ifndef PCI_DEVICE_ID_XILINX_HAMMERFALL
 132 #define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
 133 #endif
 134
 135 /* amount of io space we remap for register access. i'm not sure we
 136    even need this much, but 1K is nice round number :)
 137 */
 138
 139 #define RME9652_IO_EXTENT     1024
 140
 141 #define RME9652_init_buffer       0
 142 #define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 143 #define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 144 #define RME9652_control_register  64
 145 #define RME9652_irq_clear         96
 146 #define RME9652_time_code         100   /* useful if used with alesis adat */
 147 #define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 148
 149 /* Read-only registers */
 150
 151 /* Writing to any of the register locations writes to the status
 152    register. We'll use the first location as our point of access.
 153 */
 154
 155 #define RME9652_status_register    0
 156
 157 /* --------- Control-Register Bits ---------------- */
 158
 159
 160 #define RME9652_start_bit          (1<<0)       /* start record/play */
 161                                                 /* bits 1-3 encode buffersize/latency */
 162 #define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 163 #define RME9652_IE                 (1<<5)       /* Interupt Enable */
 164 #define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 165 #define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 166 #define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 167 #define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 168 #define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 169 #define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 170 #define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 171 #define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 172 #define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 173 #define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 174 #define RME9652_SyncPref_ADAT2     (1<<16)
 175 #define RME9652_SyncPref_ADAT3     (1<<17)
 176 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 177 #define RME9652_SPDIF_SELECT       (1<<19)
 178 #define RME9652_SPDIF_CLOCK        (1<<20)
 179 #define RME9652_SPDIF_WRITE        (1<<21)
 180 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 181
 182 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 183
 184 #define RME9652_latency            0x0e
 185 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 186 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 187 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 188 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 189 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 190 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 191
 192 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 193 #define RME9652_SyncPref_ADAT1     0
 194 #define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 195
 196 /* the size of a substream (1 mono data stream) */
 197
 198 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 199 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 200
 201 /* the size of the area we need to allocate for DMA transfers. the
 202    size is the same regardless of the number of channels - the
 203    9636 still uses the same memory area.
 204
 205    Note that we allocate 1 more channel than is apparently needed
 206    because the h/w seems to write 1 byte beyond the end of the last
 207    page. Sigh.
 208 */
 209
 210 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 211 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 212
 213 typedef struct snd_rme9652 {
 214         int dev;
 215
 216         spinlock_t lock;
 217         int irq;
 218         unsigned long port;
 219         struct resource *res_port;
 220         unsigned long iobase;
 221
 222         int precise_ptr;
 223
 224         u32 control_register;   /* cached value */
 225         u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 226
 227         u32 creg_spdif;
 228         u32 creg_spdif_stream;
 229
 230         char *card_name;                /* hammerfall or hammerfall light names */
 231
 232         size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 233         size_t prev_hw_offset;          /* previous hw offset */
 234         size_t max_jitter;              /* maximum jitter in frames for
 235                                            hw pointer */
 236         size_t period_bytes;            /* guess what this is */
 237
 238         unsigned char ds_channels;
 239         unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 240
 241         void *capture_buffer_unaligned; /* original buffer addresses */
 242         void *playback_buffer_unaligned;        /* original buffer addresses */
 243         unsigned char *capture_buffer;  /* suitably aligned address */
 244         unsigned char *playback_buffer; /* suitably aligned address */
 245         dma_addr_t capture_buffer_addr;
 246         dma_addr_t playback_buffer_addr;
 247
 248         pid_t capture_pid;
 249         pid_t playback_pid;
 250
 251         snd_pcm_substream_t *capture_substream;
 252         snd_pcm_substream_t *playback_substream;
 253         int running;
 254
 255         int passthru;                   /* non-zero if doing pass-thru */
 256         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 257
 258         int last_spdif_sample_rate;     /* so that we can catch externally ... */
 259         int last_adat_sample_rate;      /* ... induced rate changes            */
 260
 261         char *channel_map;
 262
 263         snd_card_t *card;
 264         snd_pcm_t *pcm;
 265         struct pci_dev *pci;
 266         snd_kcontrol_t *spdif_ctl;
 267
 268 } rme9652_t;
 269
 270 /* These tables map the ALSA channels 1..N to the channels that we
 271    need to use in order to find the relevant channel buffer. RME
 272    refer to this kind of mapping as between "the ADAT channel and
 273    the DMA channel." We index it using the logical audio channel,
 274    and the value is the DMA channel (i.e. channel buffer number)
 275    where the data for that channel can be read/written from/to.
 276 */
 277
 278 static char channel_map_9652_ss[26] = {
 279         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 280         18, 19, 20, 21, 22, 23, 24, 25
 281 };
 282
 283 static char channel_map_9636_ss[26] = {
 284         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
 285         /* channels 16 and 17 are S/PDIF */
 286         24, 25,
 287         /* channels 18-25 don't exist */
 288         -1, -1, -1, -1, -1, -1, -1, -1
 289 };
 290
 291 static char channel_map_9652_ds[26] = {
 292         /* ADAT channels are remapped */
 293         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 294         /* channels 12 and 13 are S/PDIF */
 295         24, 25,
 296         /* others don't exist */
 297         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 298 };
 299
 300 static char channel_map_9636_ds[26] = {
 301         /* ADAT channels are remapped */
 302         1, 3, 5, 7, 9, 11, 13, 15,
 303         /* channels 8 and 9 are S/PDIF */
 304         24, 25
 305         /* others don't exist */
 306         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 307 };
 308
 309 #define RME9652_PREALLOCATE_MEMORY      /* via module snd-hammerfall-mem */
 310
 311 #ifdef RME9652_PREALLOCATE_MEMORY
 312 static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
 313 {
 314         struct snd_dma_device pdev;
 315         struct snd_dma_buffer dmbuf;
 316
 317         memset(&pdev, 0, sizeof(pdev));
 318         pdev.type = SNDRV_DMA_TYPE_DEV;
 319         pdev.dev = snd_dma_pci_data(pci);
 320         pdev.id = capture;
 321         dmbuf.bytes = 0;
 322         if (! snd_dma_get_reserved(&pdev, &dmbuf)) {
 323                 if (snd_dma_alloc_pages(&pdev, size, &dmbuf) < 0)
 324                         return NULL;
 325                 snd_dma_set_reserved(&pdev, &dmbuf);
 326         }
 327         *addrp = dmbuf.addr;
 328         return dmbuf.area;
 329 }
 330
 331 static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
 332 {
 333         struct snd_dma_device pdev;
 334
 335         memset(&pdev, 0, sizeof(pdev));
 336         pdev.type = SNDRV_DMA_TYPE_DEV;
 337         pdev.dev = snd_dma_pci_data(pci);
 338         pdev.id = capture;
 339         snd_dma_free_reserved(&pdev);
 340 }
 341
 342 #else
 343 static void *snd_hammerfall_get_buffer(struct pci_dev *pci, size_t size, dma_addr_t *addrp, int capture)
 344 {
 345         return snd_malloc_pci_pages(pci, size, addrp);
 346 }
 347
 348 static void snd_hammerfall_free_buffer(struct pci_dev *pci, size_t size, void *ptr, dma_addr_t addr, int capture)
 349 {
 350         snd_free_pci_pages(pci, size, ptr, addr);
 351 }
 352 #endif
 353
 354 static struct pci_device_id snd_rme9652_ids[] = {
 355         {
 356                 .vendor    = 0x10ee,
 357                 .device    = 0x3fc4,
 358                 .subvendor = PCI_ANY_ID,
 359                 .subdevice = PCI_ANY_ID,
 360         },      /* RME Digi9652 */
 361         { 0, },
 362 };
 363
 364 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 365
 366 static inline void rme9652_write(rme9652_t *rme9652, int reg, int val)
 367 {
 368         writel(val, rme9652->iobase + reg);
 369 }
 370
 371 static inline unsigned int rme9652_read(rme9652_t *rme9652, int reg)
 372 {
 373         return readl(rme9652->iobase + reg);
 374 }
 375
 376 static inline int snd_rme9652_use_is_exclusive(rme9652_t *rme9652)
 377 {
 378         unsigned long flags;
 379         int ret = 1;
 380
 381         spin_lock_irqsave(&rme9652->lock, flags);
 382         if ((rme9652->playback_pid != rme9652->capture_pid) &&
 383             (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 384                 ret = 0;
 385         }
 386         spin_unlock_irqrestore(&rme9652->lock, flags);
 387         return ret;
 388 }
 389
 390 static inline int rme9652_adat_sample_rate(rme9652_t *rme9652)
 391 {
 392         if (rme9652_running_double_speed(rme9652)) {
 393                 return (rme9652_read(rme9652, RME9652_status_register) &
 394                         RME9652_fs48) ? 96000 : 88200;
 395         } else {
 396                 return (rme9652_read(rme9652, RME9652_status_register) &
 397                         RME9652_fs48) ? 48000 : 44100;
 398         }
 399 }
 400
 401 static inline void rme9652_compute_period_size(rme9652_t *rme9652)
 402 {
 403         unsigned int i;
 404
 405         i = rme9652->control_register & RME9652_latency;
 406         rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 407         rme9652->hw_offsetmask =
 408                 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 409         rme9652->max_jitter = 80;
 410 }
 411
 412 static snd_pcm_uframes_t rme9652_hw_pointer(rme9652_t *rme9652)
 413 {
 414         int status;
 415         unsigned int offset, frag;
 416         snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 417         snd_pcm_sframes_t delta;
 418
 419         status = rme9652_read(rme9652, RME9652_status_register);
 420         if (!rme9652->precise_ptr)
 421                 return (status & RME9652_buffer_id) ? period_size : 0;
 422         offset = status & RME9652_buf_pos;
 423
 424         /* The hardware may give a backward movement for up to 80 frames
 425            Martin Kirst <martin.kirst@freenet.de> knows the details.
 426         */
 427
 428         delta = rme9652->prev_hw_offset - offset;
 429         delta &= 0xffff;
 430         if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 431                 offset = rme9652->prev_hw_offset;
 432         else
 433                 rme9652->prev_hw_offset = offset;
 434         offset &= rme9652->hw_offsetmask;
 435         offset /= 4;
 436         frag = status & RME9652_buffer_id;
 437
 438         if (offset < period_size) {
 439                 if (offset > rme9652->max_jitter) {
 440                         if (frag)
 441                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
 442                 } else if (!frag)
 443                         return 0;
 444                 offset -= rme9652->max_jitter;
 445                 if (offset < 0)
 446                         offset += period_size * 2;
 447         } else {
 448                 if (offset > period_size + rme9652->max_jitter) {
 449                         if (!frag)
 450                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
 451                 } else if (frag)
 452                         return period_size;
 453                 offset -= rme9652->max_jitter;
 454         }
 455
 456         return offset;
 457 }
 458
 459 static inline void rme9652_reset_hw_pointer(rme9652_t *rme9652)
 460 {
 461         int i;
 462
 463         /* reset the FIFO pointer to zero. We do this by writing to 8
 464            registers, each of which is a 32bit wide register, and set
 465            them all to zero. Note that s->iobase is a pointer to
 466            int32, not pointer to char.
 467         */
 468
 469         for (i = 0; i < 8; i++) {
 470                 rme9652_write(rme9652, i * 4, 0);
 471                 udelay(10);
 472         }
 473         rme9652->prev_hw_offset = 0;
 474 }
 475
 476 static inline void rme9652_start(rme9652_t *s)
 477 {
 478         s->control_register |= (RME9652_IE | RME9652_start_bit);
 479         rme9652_write(s, RME9652_control_register, s->control_register);
 480 }
 481
 482 static inline void rme9652_stop(rme9652_t *s)
 483 {
 484         s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 485         rme9652_write(s, RME9652_control_register, s->control_register);
 486 }
 487
 488 static int rme9652_set_interrupt_interval(rme9652_t *s,
 489                                           unsigned int frames)
 490 {
 491         int restart = 0;
 492         int n;
 493
 494         spin_lock_irq(&s->lock);
 495
 496         if ((restart = s->running)) {
 497                 rme9652_stop(s);
 498         }
 499
 500         frames >>= 7;
 501         n = 0;
 502         while (frames) {
 503                 n++;
 504                 frames >>= 1;
 505         }
 506
 507         s->control_register &= ~RME9652_latency;
 508         s->control_register |= rme9652_encode_latency(n);
 509
 510         rme9652_write(s, RME9652_control_register, s->control_register);
 511
 512         rme9652_compute_period_size(s);
 513
 514         if (restart)
 515                 rme9652_start(s);
 516
 517         spin_unlock_irq(&s->lock);
 518
 519         return 0;
 520 }
 521
 522 static int rme9652_set_rate(rme9652_t *rme9652, int rate)
 523 {
 524         int restart;
 525         int reject_if_open = 0;
 526         int xrate;
 527
 528         if (!snd_rme9652_use_is_exclusive (rme9652)) {
 529                 return -EBUSY;
 530         }
 531
 532         /* Changing from a "single speed" to a "double speed" rate is
 533            not allowed if any substreams are open. This is because
 534            such a change causes a shift in the location of
 535            the DMA buffers and a reduction in the number of available
 536            buffers.
 537
 538            Note that a similar but essentially insoluble problem
 539            exists for externally-driven rate changes. All we can do
 540            is to flag rate changes in the read/write routines.
 541          */
 542
 543         spin_lock_irq(&rme9652->lock);
 544         xrate = rme9652_adat_sample_rate(rme9652);
 545
 546         switch (rate) {
 547         case 44100:
 548                 if (xrate > 48000) {
 549                         reject_if_open = 1;
 550                 }
 551                 rate = 0;
 552                 break;
 553         case 48000:
 554                 if (xrate > 48000) {
 555                         reject_if_open = 1;
 556                 }
 557                 rate = RME9652_freq;
 558                 break;
 559         case 88200:
 560                 if (xrate < 48000) {
 561                         reject_if_open = 1;
 562                 }
 563                 rate = RME9652_DS;
 564                 break;
 565         case 96000:
 566                 if (xrate < 48000) {
 567                         reject_if_open = 1;
 568                 }
 569                 rate = RME9652_DS | RME9652_freq;
 570                 break;
 571         default:
 572                 spin_unlock_irq(&rme9652->lock);
 573                 return -EINVAL;
 574         }
 575
 576         if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 577                 spin_unlock_irq(&rme9652->lock);
 578                 return -EBUSY;
 579         }
 580
 581         if ((restart = rme9652->running)) {
 582                 rme9652_stop(rme9652);
 583         }
 584         rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 585         rme9652->control_register |= rate;
 586         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 587
 588         if (restart) {
 589                 rme9652_start(rme9652);
 590         }
 591
 592         if (rate & RME9652_DS) {
 593                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 594                         rme9652->channel_map = channel_map_9652_ds;
 595                 } else {
 596                         rme9652->channel_map = channel_map_9636_ds;
 597                 }
 598         } else {
 599                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 600                         rme9652->channel_map = channel_map_9652_ss;
 601                 } else {
 602                         rme9652->channel_map = channel_map_9636_ss;
 603                 }
 604         }
 605
 606         spin_unlock_irq(&rme9652->lock);
 607         return 0;
 608 }
 609
 610 static void rme9652_set_thru(rme9652_t *rme9652, int channel, int enable)
 611 {
 612         int i;
 613
 614         rme9652->passthru = 0;
 615
 616         if (channel < 0) {
 617
 618                 /* set thru for all channels */
 619
 620                 if (enable) {
 621                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 622                                 rme9652->thru_bits |= (1 << i);
 623                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 624                         }
 625                 } else {
 626                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 627                                 rme9652->thru_bits &= ~(1 << i);
 628                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 629                         }
 630                 }
 631
 632         } else {
 633                 int mapped_channel;
 634
 635                 snd_assert(channel == RME9652_NCHANNELS, return);
 636
 637                 mapped_channel = rme9652->channel_map[channel];
 638
 639                 if (enable) {
 640                         rme9652->thru_bits |= (1 << mapped_channel);
 641                 } else {
 642                         rme9652->thru_bits &= ~(1 << mapped_channel);
 643                 }
 644
 645                 rme9652_write(rme9652,
 646                                RME9652_thru_base + mapped_channel * 4,
 647                                enable ? 1 : 0);
 648         }
 649 }
 650
 651 static int rme9652_set_passthru(rme9652_t *rme9652, int onoff)
 652 {
 653         if (onoff) {
 654                 rme9652_set_thru(rme9652, -1, 1);
 655
 656                 /* we don't want interrupts, so do a
 657                    custom version of rme9652_start().
 658                 */
 659
 660                 rme9652->control_register =
 661                         RME9652_inp_0 |
 662                         rme9652_encode_latency(7) |
 663                         RME9652_start_bit;
 664
 665                 rme9652_reset_hw_pointer(rme9652);
 666
 667                 rme9652_write(rme9652, RME9652_control_register,
 668                               rme9652->control_register);
 669                 rme9652->passthru = 1;
 670         } else {
 671                 rme9652_set_thru(rme9652, -1, 0);
 672                 rme9652_stop(rme9652);
 673                 rme9652->passthru = 0;
 674         }
 675
 676         return 0;
 677 }
 678
 679 static void rme9652_spdif_set_bit (rme9652_t *rme9652, int mask, int onoff)
 680 {
 681         if (onoff)
 682                 rme9652->control_register |= mask;
 683         else
 684                 rme9652->control_register &= ~mask;
 685
 686         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 687 }
 688
 689 static void rme9652_spdif_write_byte (rme9652_t *rme9652, const int val)
 690 {
 691         long mask;
 692         long i;
 693
 694         for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 695                 if (val & mask)
 696                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 697                 else
 698                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 699
 700                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 701                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 702         }
 703 }
 704
 705 static int rme9652_spdif_read_byte (rme9652_t *rme9652)
 706 {
 707         long mask;
 708         long val;
 709         long i;
 710
 711         val = 0;
 712
 713         for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 714                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 715                 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 716                         val |= mask;
 717                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 718         }
 719
 720         return val;
 721 }
 722
 723 static void rme9652_write_spdif_codec (rme9652_t *rme9652, const int address, const int data)
 724 {
 725         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 726         rme9652_spdif_write_byte (rme9652, 0x20);
 727         rme9652_spdif_write_byte (rme9652, address);
 728         rme9652_spdif_write_byte (rme9652, data);
 729         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 730 }
 731
 732
 733 static int rme9652_spdif_read_codec (rme9652_t *rme9652, const int address)
 734 {
 735         int ret;
 736
 737         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 738         rme9652_spdif_write_byte (rme9652, 0x20);
 739         rme9652_spdif_write_byte (rme9652, address);
 740         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 741         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 742
 743         rme9652_spdif_write_byte (rme9652, 0x21);
 744         ret = rme9652_spdif_read_byte (rme9652);
 745         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 746
 747         return ret;
 748 }
 749
 750 static void rme9652_initialize_spdif_receiver (rme9652_t *rme9652)
 751 {
 752         /* XXX what unsets this ? */
 753
 754         rme9652->control_register |= RME9652_SPDIF_RESET;
 755
 756         rme9652_write_spdif_codec (rme9652, 4, 0x40);
 757         rme9652_write_spdif_codec (rme9652, 17, 0x13);
 758         rme9652_write_spdif_codec (rme9652, 6, 0x02);
 759 }
 760
 761 static inline int rme9652_spdif_sample_rate(rme9652_t *s)
 762 {
 763         unsigned int rate_bits;
 764
 765         if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 766                 return -1;      /* error condition */
 767         }
 768
 769         if (s->hw_rev == 15) {
 770
 771                 int x, y, ret;
 772
 773                 x = rme9652_spdif_read_codec (s, 30);
 774
 775                 if (x != 0)
 776                         y = 48000 * 64 / x;
 777                 else
 778                         y = 0;
 779
 780                 if      (y > 30400 && y < 33600)  ret = 32000;
 781                 else if (y > 41900 && y < 46000)  ret = 44100;
 782                 else if (y > 46000 && y < 50400)  ret = 48000;
 783                 else if (y > 60800 && y < 67200)  ret = 64000;
 784                 else if (y > 83700 && y < 92000)  ret = 88200;
 785                 else if (y > 92000 && y < 100000) ret = 96000;
 786                 else                              ret = 0;
 787                 return ret;
 788         }
 789
 790         rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 791
 792         switch (rme9652_decode_spdif_rate(rate_bits)) {
 793         case 0x7:
 794                 return 32000;
 795                 break;
 796
 797         case 0x6:
 798                 return 44100;
 799                 break;
 800
 801         case 0x5:
 802                 return 48000;
 803                 break;
 804
 805         case 0x4:
 806                 return 88200;
 807                 break;
 808
 809         case 0x3:
 810                 return 96000;
 811                 break;
 812
 813         case 0x0:
 814                 return 64000;
 815                 break;
 816
 817         default:
 818                 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 819                            s->card_name, rate_bits);
 820                 return 0;
 821                 break;
 822         }
 823 }
 824
 825 /*-----------------------------------------------------------------------------
 826   Control Interface
 827   ----------------------------------------------------------------------------*/
 828
 829 static u32 snd_rme9652_convert_from_aes(snd_aes_iec958_t *aes)
 830 {
 831         u32 val = 0;
 832         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 833         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 834         if (val & RME9652_PRO)
 835                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 836         else
 837                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 838         return val;
 839 }
 840
 841 static void snd_rme9652_convert_to_aes(snd_aes_iec958_t *aes, u32 val)
 842 {
 843         aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 844                          ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 845         if (val & RME9652_PRO)
 846                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 847         else
 848                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 849 }
 850
 851 static int snd_rme9652_control_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 852 {
 853         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 854         uinfo->count = 1;
 855         return 0;
 856 }
 857
 858 static int snd_rme9652_control_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 859 {
 860         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 861
 862         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 863         return 0;
 864 }
 865
 866 static int snd_rme9652_control_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 867 {
 868         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 869         unsigned long flags;
 870         int change;
 871         u32 val;
 872
 873         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 874         spin_lock_irqsave(&rme9652->lock, flags);
 875         change = val != rme9652->creg_spdif;
 876         rme9652->creg_spdif = val;
 877         spin_unlock_irqrestore(&rme9652->lock, flags);
 878         return change;
 879 }
 880
 881 static int snd_rme9652_control_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 882 {
 883         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 884         uinfo->count = 1;
 885         return 0;
 886 }
 887
 888 static int snd_rme9652_control_spdif_stream_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 889 {
 890         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 891
 892         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 893         return 0;
 894 }
 895
 896 static int snd_rme9652_control_spdif_stream_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 897 {
 898         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 899         unsigned long flags;
 900         int change;
 901         u32 val;
 902
 903         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 904         spin_lock_irqsave(&rme9652->lock, flags);
 905         change = val != rme9652->creg_spdif_stream;
 906         rme9652->creg_spdif_stream = val;
 907         rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 908         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 909         spin_unlock_irqrestore(&rme9652->lock, flags);
 910         return change;
 911 }
 912
 913 static int snd_rme9652_control_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 914 {
 915         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 916         uinfo->count = 1;
 917         return 0;
 918 }
 919
 920 static int snd_rme9652_control_spdif_mask_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 921 {
 922         ucontrol->value.iec958.status[0] = kcontrol->private_value;
 923         return 0;
 924 }
 925
 926 #define RME9652_ADAT1_IN(xname, xindex) \
 927 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
 928   .info = snd_rme9652_info_adat1_in, \
 929   .get = snd_rme9652_get_adat1_in, \
 930   .put = snd_rme9652_put_adat1_in }
 931
 932 static unsigned int rme9652_adat1_in(rme9652_t *rme9652)
 933 {
 934         if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 935                 return 1;
 936         return 0;
 937 }
 938
 939 static int rme9652_set_adat1_input(rme9652_t *rme9652, int internal)
 940 {
 941         int restart = 0;
 942
 943         if (internal) {
 944                 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 945         } else {
 946                 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 947         }
 948
 949         /* XXX do we actually need to stop the card when we do this ? */
 950
 951         if ((restart = rme9652->running)) {
 952                 rme9652_stop(rme9652);
 953         }
 954
 955         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 956
 957         if (restart) {
 958                 rme9652_start(rme9652);
 959         }
 960
 961         return 0;
 962 }
 963
 964 static int snd_rme9652_info_adat1_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 965 {
 966         static char *texts[2] = {"ADAT1", "Internal"};
 967
 968         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 969         uinfo->count = 1;
 970         uinfo->value.enumerated.items = 2;
 971         if (uinfo->value.enumerated.item > 1)
 972                 uinfo->value.enumerated.item = 1;
 973         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
 974         return 0;
 975 }
 976
 977 static int snd_rme9652_get_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 978 {
 979         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 980         unsigned long flags;
 981
 982         spin_lock_irqsave(&rme9652->lock, flags);
 983         ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 984         spin_unlock_irqrestore(&rme9652->lock, flags);
 985         return 0;
 986 }
 987
 988 static int snd_rme9652_put_adat1_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 989 {
 990         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
 991         unsigned long flags;
 992         int change;
 993         unsigned int val;
 994
 995         if (!snd_rme9652_use_is_exclusive(rme9652))
 996                 return -EBUSY;
 997         val = ucontrol->value.enumerated.item[0] % 2;
 998         spin_lock_irqsave(&rme9652->lock, flags);
 999         change = val != rme9652_adat1_in(rme9652);
1000         if (change)
1001                 rme9652_set_adat1_input(rme9652, val);
1002         spin_unlock_irqrestore(&rme9652->lock, flags);
1003         return change;
1004 }
1005
1006 #define RME9652_SPDIF_IN(xname, xindex) \
1007 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1008   .info = snd_rme9652_info_spdif_in, \
1009   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
1010
1011 static unsigned int rme9652_spdif_in(rme9652_t *rme9652)
1012 {
1013         return rme9652_decode_spdif_in(rme9652->control_register &
1014                                        RME9652_inp);
1015 }
1016
1017 static int rme9652_set_spdif_input(rme9652_t *rme9652, int in)
1018 {
1019         int restart = 0;
1020
1021         rme9652->control_register &= ~RME9652_inp;
1022         rme9652->control_register |= rme9652_encode_spdif_in(in);
1023
1024         if ((restart = rme9652->running)) {
1025                 rme9652_stop(rme9652);
1026         }
1027
1028         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1029
1030         if (restart) {
1031                 rme9652_start(rme9652);
1032         }
1033
1034         return 0;
1035 }
1036
1037 static int snd_rme9652_info_spdif_in(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1038 {
1039         static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1040
1041         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1042         uinfo->count = 1;
1043         uinfo->value.enumerated.items = 3;
1044         if (uinfo->value.enumerated.item > 2)
1045                 uinfo->value.enumerated.item = 2;
1046         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1047         return 0;
1048 }
1049
1050 static int snd_rme9652_get_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1051 {
1052         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1053         unsigned long flags;
1054
1055         spin_lock_irqsave(&rme9652->lock, flags);
1056         ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1057         spin_unlock_irqrestore(&rme9652->lock, flags);
1058         return 0;
1059 }
1060
1061 static int snd_rme9652_put_spdif_in(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1062 {
1063         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1064         unsigned long flags;
1065         int change;
1066         unsigned int val;
1067
1068         if (!snd_rme9652_use_is_exclusive(rme9652))
1069                 return -EBUSY;
1070         val = ucontrol->value.enumerated.item[0] % 3;
1071         spin_lock_irqsave(&rme9652->lock, flags);
1072         change = val != rme9652_spdif_in(rme9652);
1073         if (change)
1074                 rme9652_set_spdif_input(rme9652, val);
1075         spin_unlock_irqrestore(&rme9652->lock, flags);
1076         return change;
1077 }
1078
1079 #define RME9652_SPDIF_OUT(xname, xindex) \
1080 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1081   .info = snd_rme9652_info_spdif_out, \
1082   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1083
1084 static int rme9652_spdif_out(rme9652_t *rme9652)
1085 {
1086         return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1087 }
1088
1089 static int rme9652_set_spdif_output(rme9652_t *rme9652, int out)
1090 {
1091         int restart = 0;
1092
1093         if (out) {
1094                 rme9652->control_register |= RME9652_opt_out;
1095         } else {
1096                 rme9652->control_register &= ~RME9652_opt_out;
1097         }
1098
1099         if ((restart = rme9652->running)) {
1100                 rme9652_stop(rme9652);
1101         }
1102
1103         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1104
1105         if (restart) {
1106                 rme9652_start(rme9652);
1107         }
1108
1109         return 0;
1110 }
1111
1112 static int snd_rme9652_info_spdif_out(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1113 {
1114         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1115         uinfo->count = 1;
1116         uinfo->value.integer.min = 0;
1117         uinfo->value.integer.max = 1;
1118         return 0;
1119 }
1120
1121 static int snd_rme9652_get_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1122 {
1123         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1124         unsigned long flags;
1125
1126         spin_lock_irqsave(&rme9652->lock, flags);
1127         ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1128         spin_unlock_irqrestore(&rme9652->lock, flags);
1129         return 0;
1130 }
1131
1132 static int snd_rme9652_put_spdif_out(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1133 {
1134         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1135         unsigned long flags;
1136         int change;
1137         unsigned int val;
1138
1139         if (!snd_rme9652_use_is_exclusive(rme9652))
1140                 return -EBUSY;
1141         val = ucontrol->value.integer.value[0] & 1;
1142         spin_lock_irqsave(&rme9652->lock, flags);
1143         change = (int)val != rme9652_spdif_out(rme9652);
1144         rme9652_set_spdif_output(rme9652, val);
1145         spin_unlock_irqrestore(&rme9652->lock, flags);
1146         return change;
1147 }
1148
1149 #define RME9652_SYNC_MODE(xname, xindex) \
1150 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1151   .info = snd_rme9652_info_sync_mode, \
1152   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1153
1154 static int rme9652_sync_mode(rme9652_t *rme9652)
1155 {
1156         if (rme9652->control_register & RME9652_wsel) {
1157                 return 2;
1158         } else if (rme9652->control_register & RME9652_Master) {
1159                 return 1;
1160         } else {
1161                 return 0;
1162         }
1163 }
1164
1165 static int rme9652_set_sync_mode(rme9652_t *rme9652, int mode)
1166 {
1167         int restart = 0;
1168
1169         switch (mode) {
1170         case 0:
1171                 rme9652->control_register &=
1172                     ~(RME9652_Master | RME9652_wsel);
1173                 break;
1174         case 1:
1175                 rme9652->control_register =
1176                     (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1177                 break;
1178         case 2:
1179                 rme9652->control_register |=
1180                     (RME9652_Master | RME9652_wsel);
1181                 break;
1182         }
1183
1184         if ((restart = rme9652->running)) {
1185                 rme9652_stop(rme9652);
1186         }
1187
1188         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1189
1190         if (restart) {
1191                 rme9652_start(rme9652);
1192         }
1193
1194         return 0;
1195 }
1196
1197 static int snd_rme9652_info_sync_mode(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1198 {
1199         static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1200
1201         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1202         uinfo->count = 1;
1203         uinfo->value.enumerated.items = 3;
1204         if (uinfo->value.enumerated.item > 2)
1205                 uinfo->value.enumerated.item = 2;
1206         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1207         return 0;
1208 }
1209
1210 static int snd_rme9652_get_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1211 {
1212         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1213         unsigned long flags;
1214
1215         spin_lock_irqsave(&rme9652->lock, flags);
1216         ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1217         spin_unlock_irqrestore(&rme9652->lock, flags);
1218         return 0;
1219 }
1220
1221 static int snd_rme9652_put_sync_mode(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1222 {
1223         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1224         unsigned long flags;
1225         int change;
1226         unsigned int val;
1227
1228         val = ucontrol->value.enumerated.item[0] % 3;
1229         spin_lock_irqsave(&rme9652->lock, flags);
1230         change = (int)val != rme9652_sync_mode(rme9652);
1231         rme9652_set_sync_mode(rme9652, val);
1232         spin_unlock_irqrestore(&rme9652->lock, flags);
1233         return change;
1234 }
1235
1236 #define RME9652_SYNC_PREF(xname, xindex) \
1237 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1238   .info = snd_rme9652_info_sync_pref, \
1239   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1240
1241 static int rme9652_sync_pref(rme9652_t *rme9652)
1242 {
1243         switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1244         case RME9652_SyncPref_ADAT1:
1245                 return RME9652_SYNC_FROM_ADAT1;
1246         case RME9652_SyncPref_ADAT2:
1247                 return RME9652_SYNC_FROM_ADAT2;
1248         case RME9652_SyncPref_ADAT3:
1249                 return RME9652_SYNC_FROM_ADAT3;
1250         case RME9652_SyncPref_SPDIF:
1251                 return RME9652_SYNC_FROM_SPDIF;
1252         }
1253         /* Not reachable */
1254         return 0;
1255 }
1256
1257 static int rme9652_set_sync_pref(rme9652_t *rme9652, int pref)
1258 {
1259         int restart;
1260
1261         rme9652->control_register &= ~RME9652_SyncPref_Mask;
1262         switch (pref) {
1263         case RME9652_SYNC_FROM_ADAT1:
1264                 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1265                 break;
1266         case RME9652_SYNC_FROM_ADAT2:
1267                 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1268                 break;
1269         case RME9652_SYNC_FROM_ADAT3:
1270                 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1271                 break;
1272         case RME9652_SYNC_FROM_SPDIF:
1273                 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1274                 break;
1275         }
1276
1277         if ((restart = rme9652->running)) {
1278                 rme9652_stop(rme9652);
1279         }
1280
1281         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1282
1283         if (restart) {
1284                 rme9652_start(rme9652);
1285         }
1286
1287         return 0;
1288 }
1289
1290 static int snd_rme9652_info_sync_pref(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1291 {
1292         static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1293         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1294
1295         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1296         uinfo->count = 1;
1297         uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1298         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1299                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1300         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1301         return 0;
1302 }
1303
1304 static int snd_rme9652_get_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1305 {
1306         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1307         unsigned long flags;
1308
1309         spin_lock_irqsave(&rme9652->lock, flags);
1310         ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1311         spin_unlock_irqrestore(&rme9652->lock, flags);
1312         return 0;
1313 }
1314
1315 static int snd_rme9652_put_sync_pref(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1316 {
1317         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1318         unsigned long flags;
1319         int change, max;
1320         unsigned int val;
1321
1322         if (!snd_rme9652_use_is_exclusive(rme9652))
1323                 return -EBUSY;
1324         max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1325         val = ucontrol->value.enumerated.item[0] % max;
1326         spin_lock_irqsave(&rme9652->lock, flags);
1327         change = (int)val != rme9652_sync_pref(rme9652);
1328         rme9652_set_sync_pref(rme9652, val);
1329         spin_unlock_irqrestore(&rme9652->lock, flags);
1330         return change;
1331 }
1332
1333 static int snd_rme9652_info_thru(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1334 {
1335         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1336         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1337         uinfo->count = rme9652->ss_channels;
1338         uinfo->value.integer.min = 0;
1339         uinfo->value.integer.max = 1;
1340         return 0;
1341 }
1342
1343 static int snd_rme9652_get_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1344 {
1345         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1346         unsigned int k;
1347         u32 thru_bits = rme9652->thru_bits;
1348
1349         for (k = 0; k < rme9652->ss_channels; ++k) {
1350                 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1351         }
1352         return 0;
1353 }
1354
1355 static int snd_rme9652_put_thru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1356 {
1357         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1358         unsigned long flags;
1359         int change;
1360         unsigned int chn;
1361         u32 thru_bits = 0;
1362
1363         if (!snd_rme9652_use_is_exclusive(rme9652))
1364                 return -EBUSY;
1365
1366         for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1367                 if (ucontrol->value.integer.value[chn])
1368                         thru_bits |= 1 << chn;
1369         }
1370
1371         spin_lock_irqsave(&rme9652->lock, flags);
1372         change = thru_bits ^ rme9652->thru_bits;
1373         if (change) {
1374                 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1375                         if (!(change & (1 << chn)))
1376                                 continue;
1377                         rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1378                 }
1379         }
1380         spin_unlock_irqrestore(&rme9652->lock, flags);
1381         return !!change;
1382 }
1383
1384 #define RME9652_PASSTHRU(xname, xindex) \
1385 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1386   .info = snd_rme9652_info_passthru, \
1387   .put = snd_rme9652_put_passthru, \
1388   .get = snd_rme9652_get_passthru }
1389
1390 static int snd_rme9652_info_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
1391 {
1392         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1393         uinfo->count = 1;
1394         uinfo->value.integer.min = 0;
1395         uinfo->value.integer.max = 1;
1396         return 0;
1397 }
1398
1399 static int snd_rme9652_get_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1400 {
1401         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1402         unsigned long flags;
1403
1404         spin_lock_irqsave(&rme9652->lock, flags);
1405         ucontrol->value.integer.value[0] = rme9652->passthru;
1406         spin_unlock_irqrestore(&rme9652->lock, flags);
1407         return 0;
1408 }
1409
1410 static int snd_rme9652_put_passthru(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1411 {
1412         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1413         unsigned long flags;
1414         int change;
1415         unsigned int val;
1416         int err = 0;
1417
1418         if (!snd_rme9652_use_is_exclusive(rme9652))
1419                 return -EBUSY;
1420
1421         val = ucontrol->value.integer.value[0] & 1;
1422         spin_lock_irqsave(&rme9652->lock, flags);
1423         change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1424         if (change)
1425                 err = rme9652_set_passthru(rme9652, val);
1426         spin_unlock_irqrestore(&rme9652->lock, flags);
1427         return err ? err : change;
1428 }
1429
1430 /* Read-only switches */
1431
1432 #define RME9652_SPDIF_RATE(xname, xindex) \
1433 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1434   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1435   .info = snd_rme9652_info_spdif_rate, \
1436   .get = snd_rme9652_get_spdif_rate }
1437
1438 static int snd_rme9652_info_spdif_rate(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1439 {
1440         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1441         uinfo->count = 1;
1442         uinfo->value.integer.min = 0;
1443         uinfo->value.integer.max = 96000;
1444         return 0;
1445 }
1446
1447 static int snd_rme9652_get_spdif_rate(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1448 {
1449         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1450         unsigned long flags;
1451
1452         spin_lock_irqsave(&rme9652->lock, flags);
1453         ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1454         spin_unlock_irqrestore(&rme9652->lock, flags);
1455         return 0;
1456 }
1457
1458 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1459 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1460   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1461   .info = snd_rme9652_info_adat_sync, \
1462   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1463
1464 static int snd_rme9652_info_adat_sync(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1465 {
1466         static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1467
1468         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1469         uinfo->count = 1;
1470         uinfo->value.enumerated.items = 4;
1471         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1472                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1473         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1474         return 0;
1475 }
1476
1477 static int snd_rme9652_get_adat_sync(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1478 {
1479         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1480         unsigned int mask1, mask2, val;
1481
1482         switch (kcontrol->private_value) {
1483         case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1484         case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1485         case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1486         default: return -EINVAL;
1487         }
1488         val = rme9652_read(rme9652, RME9652_status_register);
1489         ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1490         ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1491         return 0;
1492 }
1493
1494 #define RME9652_TC_VALID(xname, xindex) \
1495 { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = xname, .index = xindex, \
1496   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1497   .info = snd_rme9652_info_tc_valid, \
1498   .get = snd_rme9652_get_tc_valid }
1499
1500 static int snd_rme9652_info_tc_valid(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1501 {
1502         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1503         uinfo->count = 1;
1504         uinfo->value.integer.min = 0;
1505         uinfo->value.integer.max = 1;
1506         return 0;
1507 }
1508
1509 static int snd_rme9652_get_tc_valid(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1510 {
1511         rme9652_t *rme9652 = _snd_kcontrol_chip(kcontrol);
1512
1513         ucontrol->value.integer.value[0] =
1514                 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1515         return 0;
1516 }
1517
1518 #if ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1519
1520 /* FIXME: this routine needs a port to the new control API --jk */
1521
1522 static int snd_rme9652_get_tc_value(void *private_data,
1523                                     snd_kswitch_t *kswitch,
1524                                     snd_switch_t *uswitch)
1525 {
1526         rme9652_t *s = (rme9652_t *) private_data;
1527         u32 value;
1528         int i;
1529
1530         uswitch->type = SNDRV_SW_TYPE_DWORD;
1531
1532         if ((rme9652_read(s, RME9652_status_register) &
1533              RME9652_tc_valid) == 0) {
1534                 uswitch->value.data32[0] = 0;
1535                 return 0;
1536         }
1537
1538         /* timecode request */
1539
1540         rme9652_write(s, RME9652_time_code, 0);
1541
1542         /* XXX bug alert: loop-based timing !!!! */
1543
1544         for (i = 0; i < 50; i++) {
1545                 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1546                         break;
1547         }
1548
1549         if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1550                 return -EIO;
1551         }
1552
1553         value = 0;
1554
1555         for (i = 0; i < 32; i++) {
1556                 value >>= 1;
1557
1558                 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1559                         value |= 0x80000000;
1560         }
1561
1562         if (value > 2 * 60 * 48000) {
1563                 value -= 2 * 60 * 48000;
1564         } else {
1565                 value = 0;
1566         }
1567
1568         uswitch->value.data32[0] = value;
1569
1570         return 0;
1571 }
1572
1573 #endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1574
1575 #define RME9652_CONTROLS (sizeof(snd_rme9652_controls)/sizeof(snd_kcontrol_new_t))
1576
1577 static snd_kcontrol_new_t snd_rme9652_controls[] = {
1578 {
1579         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1580         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1581         .info =         snd_rme9652_control_spdif_info,
1582         .get =          snd_rme9652_control_spdif_get,
1583         .put =          snd_rme9652_control_spdif_put,
1584 },
1585 {
1586         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1587         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1588         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1589         .info =         snd_rme9652_control_spdif_stream_info,
1590         .get =          snd_rme9652_control_spdif_stream_get,
1591         .put =          snd_rme9652_control_spdif_stream_put,
1592 },
1593 {
1594         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1595         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1596         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1597         .info =         snd_rme9652_control_spdif_mask_info,
1598         .get =          snd_rme9652_control_spdif_mask_get,
1599         .private_value = IEC958_AES0_NONAUDIO |
1600                         IEC958_AES0_PROFESSIONAL |
1601                         IEC958_AES0_CON_EMPHASIS,
1602 },
1603 {
1604         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1605         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1606         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1607         .info =         snd_rme9652_control_spdif_mask_info,
1608         .get =          snd_rme9652_control_spdif_mask_get,
1609         .private_value = IEC958_AES0_NONAUDIO |
1610                         IEC958_AES0_PROFESSIONAL |
1611                         IEC958_AES0_PRO_EMPHASIS,
1612 },
1613 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1614 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1615 RME9652_SYNC_MODE("Sync Mode", 0),
1616 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1617 {
1618         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1619         .name = "Channels Thru",
1620         .index = 0,
1621         .info = snd_rme9652_info_thru,
1622         .get = snd_rme9652_get_thru,
1623         .put = snd_rme9652_put_thru,
1624 },
1625 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1626 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1627 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1628 RME9652_TC_VALID("Timecode Valid", 0),
1629 RME9652_PASSTHRU("Passthru", 0)
1630 };
1631
1632 static snd_kcontrol_new_t snd_rme9652_adat3_check =
1633 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1634
1635 static snd_kcontrol_new_t snd_rme9652_adat1_input =
1636 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1637
1638 int snd_rme9652_create_controls(snd_card_t *card, rme9652_t *rme9652)
1639 {
1640         unsigned int idx;
1641         int err;
1642         snd_kcontrol_t *kctl;
1643
1644         for (idx = 0; idx < RME9652_CONTROLS; idx++) {
1645                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1646                         return err;
1647                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1648                         rme9652->spdif_ctl = kctl;
1649         }
1650
1651         if (rme9652->ss_channels == RME9652_NCHANNELS)
1652                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1653                         return err;
1654
1655         if (rme9652->hw_rev >= 15)
1656                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1657                         return err;
1658
1659         return 0;
1660 }
1661
1662 /*------------------------------------------------------------
1663    /proc interface
1664  ------------------------------------------------------------*/
1665
1666 static void
1667 snd_rme9652_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1668 {
1669         rme9652_t *rme9652 = (rme9652_t *) entry->private_data;
1670         u32 thru_bits = rme9652->thru_bits;
1671         int show_auto_sync_source = 0;
1672         int i;
1673         unsigned int status;
1674         int x;
1675
1676         status = rme9652_read(rme9652, RME9652_status_register);
1677
1678         snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1679         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1680                     rme9652->capture_buffer, rme9652->playback_buffer);
1681         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1682                     rme9652->irq, rme9652->port, rme9652->iobase);
1683         snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1684
1685         snd_iprintf(buffer, "\n");
1686
1687         x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1688                                              RME9652_latency));
1689
1690         snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1691                     x, (unsigned long) rme9652->period_bytes);
1692         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1693                     rme9652_hw_pointer(rme9652));
1694         snd_iprintf(buffer, "Passthru: %s\n",
1695                     rme9652->passthru ? "yes" : "no");
1696
1697         if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1698                 snd_iprintf(buffer, "Clock mode: autosync\n");
1699                 show_auto_sync_source = 1;
1700         } else if (rme9652->control_register & RME9652_wsel) {
1701                 if (status & RME9652_wsel_rd) {
1702                         snd_iprintf(buffer, "Clock mode: word clock\n");
1703                 } else {
1704                         snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1705                 }
1706         } else {
1707                 snd_iprintf(buffer, "Clock mode: master\n");
1708         }
1709
1710         if (show_auto_sync_source) {
1711                 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1712                 case RME9652_SyncPref_ADAT1:
1713                         snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1714                         break;
1715                 case RME9652_SyncPref_ADAT2:
1716                         snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1717                         break;
1718                 case RME9652_SyncPref_ADAT3:
1719                         snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1720                         break;
1721                 case RME9652_SyncPref_SPDIF:
1722                         snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1723                         break;
1724                 default:
1725                         snd_iprintf(buffer, "Pref. sync source: ???\n");
1726                 }
1727         }
1728
1729         if (rme9652->hw_rev >= 15)
1730                 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1731                             (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1732                             "Internal" : "ADAT1 optical");
1733
1734         snd_iprintf(buffer, "\n");
1735
1736         switch (rme9652_decode_spdif_in(rme9652->control_register &
1737                                         RME9652_inp)) {
1738         case RME9652_SPDIFIN_OPTICAL:
1739                 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1740                 break;
1741         case RME9652_SPDIFIN_COAXIAL:
1742                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1743                 break;
1744         case RME9652_SPDIFIN_INTERN:
1745                 snd_iprintf(buffer, "IEC958 input: Internal\n");
1746                 break;
1747         default:
1748                 snd_iprintf(buffer, "IEC958 input: ???\n");
1749                 break;
1750         }
1751
1752         if (rme9652->control_register & RME9652_opt_out) {
1753                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1754         } else {
1755                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1756         }
1757
1758         if (rme9652->control_register & RME9652_PRO) {
1759                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1760         } else {
1761                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1762         }
1763
1764         if (rme9652->control_register & RME9652_EMP) {
1765                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1766         } else {
1767                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1768         }
1769
1770         if (rme9652->control_register & RME9652_Dolby) {
1771                 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1772         } else {
1773                 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1774         }
1775
1776         i = rme9652_spdif_sample_rate(rme9652);
1777
1778         if (i < 0) {
1779                 snd_iprintf(buffer,
1780                             "IEC958 sample rate: error flag set\n");
1781         } else if (i == 0) {
1782                 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1783         } else {
1784                 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1785         }
1786
1787         snd_iprintf(buffer, "\n");
1788
1789         snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1790                     rme9652_adat_sample_rate(rme9652));
1791
1792         /* Sync Check */
1793
1794         x = status & RME9652_sync_0;
1795         if (status & RME9652_lock_0) {
1796                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1797         } else {
1798                 snd_iprintf(buffer, "ADAT1: No Lock\n");
1799         }
1800
1801         x = status & RME9652_sync_1;
1802         if (status & RME9652_lock_1) {
1803                 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1804         } else {
1805                 snd_iprintf(buffer, "ADAT2: No Lock\n");
1806         }
1807
1808         x = status & RME9652_sync_2;
1809         if (status & RME9652_lock_2) {
1810                 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1811         } else {
1812                 snd_iprintf(buffer, "ADAT3: No Lock\n");
1813         }
1814
1815         snd_iprintf(buffer, "\n");
1816
1817         snd_iprintf(buffer, "Timecode signal: %s\n",
1818                     (status & RME9652_tc_valid) ? "yes" : "no");
1819
1820         /* thru modes */
1821
1822         snd_iprintf(buffer, "Punch Status:\n\n");
1823
1824         for (i = 0; i < rme9652->ss_channels; i++) {
1825                 if (thru_bits & (1 << i)) {
1826                         snd_iprintf(buffer, "%2d:  on ", i + 1);
1827                 } else {
1828                         snd_iprintf(buffer, "%2d: off ", i + 1);
1829                 }
1830
1831                 if (((i + 1) % 8) == 0) {
1832                         snd_iprintf(buffer, "\n");
1833                 }
1834         }
1835
1836         snd_iprintf(buffer, "\n");
1837 }
1838
1839 static void __devinit snd_rme9652_proc_init(rme9652_t *rme9652)
1840 {
1841         snd_info_entry_t *entry;
1842
1843         if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1844                 snd_info_set_text_ops(entry, rme9652, 1024, snd_rme9652_proc_read);
1845 }
1846
1847 static void snd_rme9652_free_buffers(rme9652_t *rme9652)
1848 {
1849         if (rme9652->capture_buffer_unaligned) {
1850                 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
1851                                            rme9652->capture_buffer_unaligned,
1852                                            rme9652->capture_buffer_addr, 1);
1853         }
1854
1855         if (rme9652->playback_buffer_unaligned) {
1856                 snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES,
1857                                            rme9652->playback_buffer_unaligned,
1858                                            rme9652->playback_buffer_addr, 0);
1859         }
1860 }
1861
1862 static int snd_rme9652_free(rme9652_t *rme9652)
1863 {
1864         if (rme9652->irq >= 0)
1865                 rme9652_stop(rme9652);
1866         snd_rme9652_free_buffers(rme9652);
1867
1868         if (rme9652->iobase)
1869                 iounmap((void *) rme9652->iobase);
1870         if (rme9652->res_port) {
1871                 release_resource(rme9652->res_port);
1872                 kfree_nocheck(rme9652->res_port);
1873         }
1874         if (rme9652->irq >= 0)
1875                 free_irq(rme9652->irq, (void *)rme9652);
1876         return 0;
1877 }
1878
1879 static int __devinit snd_rme9652_initialize_memory(rme9652_t *rme9652)
1880 {
1881         void *pb, *cb;
1882         dma_addr_t pb_addr, cb_addr;
1883         unsigned long pb_bus, cb_bus;
1884
1885         cb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &cb_addr, 1);
1886         pb = snd_hammerfall_get_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, &pb_addr, 0);
1887
1888         if (cb == 0 || pb == 0) {
1889                 if (cb) {
1890                         snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, cb, cb_addr, 1);
1891                 }
1892                 if (pb) {
1893                         snd_hammerfall_free_buffer(rme9652->pci, RME9652_DMA_AREA_BYTES, pb, pb_addr, 0);
1894                 }
1895
1896                 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1897                 return -ENOMEM;
1898         }
1899
1900         /* save raw addresses for use when freeing memory later */
1901
1902         rme9652->capture_buffer_unaligned = cb;
1903         rme9652->playback_buffer_unaligned = pb;
1904         rme9652->capture_buffer_addr = cb_addr;
1905         rme9652->playback_buffer_addr = pb_addr;
1906
1907         /* Align to bus-space 64K boundary */
1908
1909         cb_bus = (cb_addr + 0xFFFF) & ~0xFFFFl;
1910         pb_bus = (pb_addr + 0xFFFF) & ~0xFFFFl;
1911
1912         /* Tell the card where it is */
1913
1914         rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1915         rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1916
1917         rme9652->capture_buffer = cb + (cb_bus - cb_addr);
1918         rme9652->playback_buffer = pb + (pb_bus - pb_addr);
1919
1920         return 0;
1921 }
1922
1923 static void snd_rme9652_set_defaults(rme9652_t *rme9652)
1924 {
1925         unsigned int k;
1926
1927         /* ASSUMPTION: rme9652->lock is either held, or
1928            there is no need to hold it (e.g. during module
1929            initalization).
1930          */
1931
1932         /* set defaults:
1933
1934            SPDIF Input via Coax
1935            autosync clock mode
1936            maximum latency (7 = 8192 samples, 64Kbyte buffer,
1937            which implies 2 4096 sample, 32Kbyte periods).
1938
1939            if rev 1.5, initialize the S/PDIF receiver.
1940
1941          */
1942
1943         rme9652->control_register =
1944             RME9652_inp_0 | rme9652_encode_latency(7);
1945
1946         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1947
1948         rme9652_reset_hw_pointer(rme9652);
1949         rme9652_compute_period_size(rme9652);
1950
1951         /* default: thru off for all channels */
1952
1953         for (k = 0; k < RME9652_NCHANNELS; ++k)
1954                 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1955
1956         rme9652->thru_bits = 0;
1957         rme9652->passthru = 0;
1958
1959         /* set a default rate so that the channel map is set up */
1960
1961         rme9652_set_rate(rme9652, 48000);
1962 }
1963
1964 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1965 {
1966         rme9652_t *rme9652 = (rme9652_t *) dev_id;
1967
1968         if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1969                 return IRQ_NONE;
1970         }
1971
1972         rme9652_write(rme9652, RME9652_irq_clear, 0);
1973
1974         if (rme9652->capture_substream) {
1975                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1976         }
1977
1978         if (rme9652->playback_substream) {
1979                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1980         }
1981         return IRQ_HANDLED;
1982 }
1983
1984 static snd_pcm_uframes_t snd_rme9652_hw_pointer(snd_pcm_substream_t *substream)
1985 {
1986         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
1987         return rme9652_hw_pointer(rme9652);
1988 }
1989
1990 static char *rme9652_channel_buffer_location(rme9652_t *rme9652,
1991                                              int stream,
1992                                              int channel)
1993
1994 {
1995         int mapped_channel;
1996
1997         snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1998
1999         if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
2000                 return NULL;
2001         }
2002
2003         if (stream == SNDRV_PCM_STREAM_CAPTURE) {
2004                 return rme9652->capture_buffer +
2005                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
2006         } else {
2007                 return rme9652->playback_buffer +
2008                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
2009         }
2010 }
2011
2012 static int snd_rme9652_playback_copy(snd_pcm_substream_t *substream, int channel,
2013                                      snd_pcm_uframes_t pos, void *src, snd_pcm_uframes_t count)
2014 {
2015         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2016         char *channel_buf;
2017
2018         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
2019
2020         channel_buf = rme9652_channel_buffer_location (rme9652,
2021                                                        substream->pstr->stream,
2022                                                        channel);
2023         snd_assert(channel_buf != NULL, return -EIO);
2024         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
2025                 return -EFAULT;
2026         return count;
2027 }
2028
2029 static int snd_rme9652_capture_copy(snd_pcm_substream_t *substream, int channel,
2030                                     snd_pcm_uframes_t pos, void *dst, snd_pcm_uframes_t count)
2031 {
2032         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2033         char *channel_buf;
2034
2035         snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
2036
2037         channel_buf = rme9652_channel_buffer_location (rme9652,
2038                                                        substream->pstr->stream,
2039                                                        channel);
2040         snd_assert(channel_buf != NULL, return -EIO);
2041         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
2042                 return -EFAULT;
2043         return count;
2044 }
2045
2046 static int snd_rme9652_hw_silence(snd_pcm_substream_t *substream, int channel,
2047                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
2048 {
2049         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2050         char *channel_buf;
2051
2052         channel_buf = rme9652_channel_buffer_location (rme9652,
2053                                                        substream->pstr->stream,
2054                                                        channel);
2055         snd_assert(channel_buf != NULL, return -EIO);
2056         memset(channel_buf + pos * 4, 0, count * 4);
2057         return count;
2058 }
2059
2060 static int snd_rme9652_reset(snd_pcm_substream_t *substream)
2061 {
2062         snd_pcm_runtime_t *runtime = substream->runtime;
2063         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2064         snd_pcm_substream_t *other;
2065         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2066                 other = rme9652->capture_substream;
2067         else
2068                 other = rme9652->playback_substream;
2069         if (rme9652->running)
2070                 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
2071         else
2072                 runtime->status->hw_ptr = 0;
2073         if (other) {
2074                 struct list_head *pos;
2075                 snd_pcm_substream_t *s;
2076                 snd_pcm_runtime_t *oruntime = other->runtime;
2077                 snd_pcm_group_for_each(pos, substream) {
2078                         s = snd_pcm_group_substream_entry(pos);
2079                         if (s == other) {
2080                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
2081                                 break;
2082                         }
2083                 }
2084         }
2085         return 0;
2086 }
2087
2088 static int snd_rme9652_hw_params(snd_pcm_substream_t *substream,
2089                                  snd_pcm_hw_params_t *params)
2090 {
2091         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2092         int err;
2093         pid_t this_pid;
2094         pid_t other_pid;
2095
2096         spin_lock_irq(&rme9652->lock);
2097
2098         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2099                 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2100                 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
2101                 this_pid = rme9652->playback_pid;
2102                 other_pid = rme9652->capture_pid;
2103         } else {
2104                 this_pid = rme9652->capture_pid;
2105                 other_pid = rme9652->playback_pid;
2106         }
2107
2108         if ((other_pid > 0) && (this_pid != other_pid)) {
2109
2110                 /* The other stream is open, and not by the same
2111                    task as this one. Make sure that the parameters
2112                    that matter are the same.
2113                  */
2114
2115                 if ((int)params_rate(params) !=
2116                     rme9652_adat_sample_rate(rme9652)) {
2117                         spin_unlock_irq(&rme9652->lock);
2118                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2119                         return -EBUSY;
2120                 }
2121
2122                 if (params_period_size(params) != rme9652->period_bytes / 4) {
2123                         spin_unlock_irq(&rme9652->lock);
2124                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2125                         return -EBUSY;
2126                 }
2127
2128                 /* We're fine. */
2129
2130                 spin_unlock_irq(&rme9652->lock);
2131                 return 0;
2132
2133         } else {
2134                 spin_unlock_irq(&rme9652->lock);
2135         }
2136
2137         /* how to make sure that the rate matches an externally-set one ?
2138          */
2139
2140         if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2141                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2142                 return err;
2143         }
2144
2145         if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2146                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2147                 return err;
2148         }
2149
2150         return 0;
2151 }
2152
2153 static int snd_rme9652_channel_info(snd_pcm_substream_t *substream,
2154                                     snd_pcm_channel_info_t *info)
2155 {
2156         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2157         int chn;
2158
2159         snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2160
2161         if ((chn = rme9652->channel_map[info->channel]) < 0) {
2162                 return -EINVAL;
2163         }
2164
2165         info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2166         info->first = 0;
2167         info->step = 32;
2168         return 0;
2169 }
2170
2171 static int snd_rme9652_ioctl(snd_pcm_substream_t *substream,
2172                              unsigned int cmd, void *arg)
2173 {
2174         switch (cmd) {
2175         case SNDRV_PCM_IOCTL1_RESET:
2176         {
2177                 return snd_rme9652_reset(substream);
2178         }
2179         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2180         {
2181                 snd_pcm_channel_info_t *info = arg;
2182                 return snd_rme9652_channel_info(substream, info);
2183         }
2184         default:
2185                 break;
2186         }
2187
2188         return snd_pcm_lib_ioctl(substream, cmd, arg);
2189 }
2190
2191 static void rme9652_silence_playback(rme9652_t *rme9652)
2192 {
2193         memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2194 }
2195
2196 static int snd_rme9652_trigger(snd_pcm_substream_t *substream,
2197                                int cmd)
2198 {
2199         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2200         snd_pcm_substream_t *other;
2201         int running;
2202         spin_lock(&rme9652->lock);
2203         running = rme9652->running;
2204         switch (cmd) {
2205         case SNDRV_PCM_TRIGGER_START:
2206                 running |= 1 << substream->stream;
2207                 break;
2208         case SNDRV_PCM_TRIGGER_STOP:
2209                 running &= ~(1 << substream->stream);
2210                 break;
2211         default:
2212                 snd_BUG();
2213                 spin_unlock(&rme9652->lock);
2214                 return -EINVAL;
2215         }
2216         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2217                 other = rme9652->capture_substream;
2218         else
2219                 other = rme9652->playback_substream;
2220
2221         if (other) {
2222                 struct list_head *pos;
2223                 snd_pcm_substream_t *s;
2224                 snd_pcm_group_for_each(pos, substream) {
2225                         s = snd_pcm_group_substream_entry(pos);
2226                         if (s == other) {
2227                                 snd_pcm_trigger_done(s, substream);
2228                                 if (cmd == SNDRV_PCM_TRIGGER_START)
2229                                         running |= 1 << s->stream;
2230                                 else
2231                                         running &= ~(1 << s->stream);
2232                                 goto _ok;
2233                         }
2234                 }
2235                 if (cmd == SNDRV_PCM_TRIGGER_START) {
2236                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2237                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2238                                 rme9652_silence_playback(rme9652);
2239                 } else {
2240                         if (running &&
2241                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2242                                 rme9652_silence_playback(rme9652);
2243                 }
2244         } else {
2245                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2246                         rme9652_silence_playback(rme9652);
2247         }
2248  _ok:
2249         snd_pcm_trigger_done(substream, substream);
2250         if (!rme9652->running && running)
2251                 rme9652_start(rme9652);
2252         else if (rme9652->running && !running)
2253                 rme9652_stop(rme9652);
2254         rme9652->running = running;
2255         spin_unlock(&rme9652->lock);
2256
2257         return 0;
2258 }
2259
2260 static int snd_rme9652_prepare(snd_pcm_substream_t *substream)
2261 {
2262         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2263         int result = 0;
2264
2265         spin_lock_irq(&rme9652->lock);
2266         if (!rme9652->running)
2267                 rme9652_reset_hw_pointer(rme9652);
2268         spin_unlock_irq(&rme9652->lock);
2269         return result;
2270 }
2271
2272 static snd_pcm_hardware_t snd_rme9652_playback_subinfo =
2273 {
2274         .info =                 (SNDRV_PCM_INFO_MMAP |
2275                                  SNDRV_PCM_INFO_MMAP_VALID |
2276                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2277                                  SNDRV_PCM_INFO_SYNC_START |
2278                                  SNDRV_PCM_INFO_DOUBLE),
2279         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2280         .rates =                (SNDRV_PCM_RATE_44100 |
2281                                  SNDRV_PCM_RATE_48000 |
2282                                  SNDRV_PCM_RATE_88200 |
2283                                  SNDRV_PCM_RATE_96000),
2284         .rate_min =             44100,
2285         .rate_max =             96000,
2286         .channels_min =         10,
2287         .channels_max =         26,
2288         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2289         .period_bytes_min =     (64 * 4) * 10,
2290         .period_bytes_max =     (8192 * 4) * 26,
2291         .periods_min =          2,
2292         .periods_max =          2,
2293         .fifo_size =            0,
2294 };
2295
2296 static snd_pcm_hardware_t snd_rme9652_capture_subinfo =
2297 {
2298         .info =                 (SNDRV_PCM_INFO_MMAP |
2299                                  SNDRV_PCM_INFO_MMAP_VALID |
2300                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2301                                  SNDRV_PCM_INFO_SYNC_START),
2302         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2303         .rates =                (SNDRV_PCM_RATE_44100 |
2304                                  SNDRV_PCM_RATE_48000 |
2305                                  SNDRV_PCM_RATE_88200 |
2306                                  SNDRV_PCM_RATE_96000),
2307         .rate_min =             44100,
2308         .rate_max =             96000,
2309         .channels_min =         10,
2310         .channels_max =         26,
2311         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2312         .period_bytes_min =     (64 * 4) * 10,
2313         .period_bytes_max =     (8192 * 4) * 26,
2314         .periods_min =          2,
2315         .periods_max =          2,
2316         .fifo_size =            0,
2317 };
2318
2319 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2320
2321 #define PERIOD_SIZES sizeof(period_sizes) / sizeof(period_sizes[0])
2322
2323 static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = {
2324         .count = PERIOD_SIZES,
2325         .list = period_sizes,
2326         .mask = 0
2327 };
2328
2329 static int snd_rme9652_hw_rule_channels(snd_pcm_hw_params_t *params,
2330                                         snd_pcm_hw_rule_t *rule)
2331 {
2332         rme9652_t *rme9652 = rule->private;
2333         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2334         unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2335         return snd_interval_list(c, 2, list, 0);
2336 }
2337
2338 static int snd_rme9652_hw_rule_channels_rate(snd_pcm_hw_params_t *params,
2339                                              snd_pcm_hw_rule_t *rule)
2340 {
2341         rme9652_t *rme9652 = rule->private;
2342         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2343         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2344         if (r->min > 48000) {
2345                 snd_interval_t t = {
2346                         .min = rme9652->ds_channels,
2347                         .max = rme9652->ds_channels,
2348                         .integer = 1,
2349                 };
2350                 return snd_interval_refine(c, &t);
2351         } else if (r->max < 88200) {
2352                 snd_interval_t t = {
2353                         .min = rme9652->ss_channels,
2354                         .max = rme9652->ss_channels,
2355                         .integer = 1,
2356                 };
2357                 return snd_interval_refine(c, &t);
2358         }
2359         return 0;
2360 }
2361
2362 static int snd_rme9652_hw_rule_rate_channels(snd_pcm_hw_params_t *params,
2363                                              snd_pcm_hw_rule_t *rule)
2364 {
2365         rme9652_t *rme9652 = rule->private;
2366         snd_interval_t *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2367         snd_interval_t *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2368         if (c->min >= rme9652->ss_channels) {
2369                 snd_interval_t t = {
2370                         .min = 44100,
2371                         .max = 48000,
2372                         .integer = 1,
2373                 };
2374                 return snd_interval_refine(r, &t);
2375         } else if (c->max <= rme9652->ds_channels) {
2376                 snd_interval_t t = {
2377                         .min = 88200,
2378                         .max = 96000,
2379                         .integer = 1,
2380                 };
2381                 return snd_interval_refine(r, &t);
2382         }
2383         return 0;
2384 }
2385
2386 static int snd_rme9652_playback_open(snd_pcm_substream_t *substream)
2387 {
2388         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2389         unsigned long flags;
2390         snd_pcm_runtime_t *runtime = substream->runtime;
2391
2392         spin_lock_irqsave(&rme9652->lock, flags);
2393
2394         snd_pcm_set_sync(substream);
2395
2396         runtime->hw = snd_rme9652_playback_subinfo;
2397         runtime->dma_area = rme9652->playback_buffer;
2398         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2399
2400         if (rme9652->capture_substream == NULL) {
2401                 rme9652_stop(rme9652);
2402                 rme9652_set_thru(rme9652, -1, 0);
2403         }
2404
2405         rme9652->playback_pid = current->pid;
2406         rme9652->playback_substream = substream;
2407
2408         spin_unlock_irqrestore(&rme9652->lock, flags);
2409
2410         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2411         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2412         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2413                              snd_rme9652_hw_rule_channels, rme9652,
2414                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2415         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2416                              snd_rme9652_hw_rule_channels_rate, rme9652,
2417                              SNDRV_PCM_HW_PARAM_RATE, -1);
2418         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2419                              snd_rme9652_hw_rule_rate_channels, rme9652,
2420                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2421
2422         rme9652->creg_spdif_stream = rme9652->creg_spdif;
2423         rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2424         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2425                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2426         return 0;
2427 }
2428
2429 static int snd_rme9652_playback_release(snd_pcm_substream_t *substream)
2430 {
2431         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2432         unsigned long flags;
2433
2434         spin_lock_irqsave(&rme9652->lock, flags);
2435
2436         rme9652->playback_pid = -1;
2437         rme9652->playback_substream = NULL;
2438
2439         spin_unlock_irqrestore(&rme9652->lock, flags);
2440
2441         rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2442         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2443                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2444         return 0;
2445 }
2446
2447
2448 static int snd_rme9652_capture_open(snd_pcm_substream_t *substream)
2449 {
2450         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2451         unsigned long flags;
2452         snd_pcm_runtime_t *runtime = substream->runtime;
2453
2454         spin_lock_irqsave(&rme9652->lock, flags);
2455
2456         snd_pcm_set_sync(substream);
2457
2458         runtime->hw = snd_rme9652_capture_subinfo;
2459         runtime->dma_area = rme9652->capture_buffer;
2460         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2461
2462         if (rme9652->playback_substream == NULL) {
2463                 rme9652_stop(rme9652);
2464                 rme9652_set_thru(rme9652, -1, 0);
2465         }
2466
2467         rme9652->capture_pid = current->pid;
2468         rme9652->capture_substream = substream;
2469
2470         spin_unlock_irqrestore(&rme9652->lock, flags);
2471
2472         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2473         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2474         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2475                              snd_rme9652_hw_rule_channels, rme9652,
2476                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2477         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2478                              snd_rme9652_hw_rule_channels_rate, rme9652,
2479                              SNDRV_PCM_HW_PARAM_RATE, -1);
2480         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2481                              snd_rme9652_hw_rule_rate_channels, rme9652,
2482                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2483         return 0;
2484 }
2485
2486 static int snd_rme9652_capture_release(snd_pcm_substream_t *substream)
2487 {
2488         rme9652_t *rme9652 = _snd_pcm_substream_chip(substream);
2489         unsigned long flags;
2490
2491         spin_lock_irqsave(&rme9652->lock, flags);
2492
2493         rme9652->capture_pid = -1;
2494         rme9652->capture_substream = NULL;
2495
2496         spin_unlock_irqrestore(&rme9652->lock, flags);
2497         return 0;
2498 }
2499
2500 static snd_pcm_ops_t snd_rme9652_playback_ops = {
2501         .open =         snd_rme9652_playback_open,
2502         .close =        snd_rme9652_playback_release,
2503         .ioctl =        snd_rme9652_ioctl,
2504         .hw_params =    snd_rme9652_hw_params,
2505         .prepare =      snd_rme9652_prepare,
2506         .trigger =      snd_rme9652_trigger,
2507         .pointer =      snd_rme9652_hw_pointer,
2508         .copy =         snd_rme9652_playback_copy,
2509         .silence =      snd_rme9652_hw_silence,
2510 };
2511
2512 static snd_pcm_ops_t snd_rme9652_capture_ops = {
2513         .open =         snd_rme9652_capture_open,
2514         .close =        snd_rme9652_capture_release,
2515         .ioctl =        snd_rme9652_ioctl,
2516         .hw_params =    snd_rme9652_hw_params,
2517         .prepare =      snd_rme9652_prepare,
2518         .trigger =      snd_rme9652_trigger,
2519         .pointer =      snd_rme9652_hw_pointer,
2520         .copy =         snd_rme9652_capture_copy,
2521 };
2522
2523 static int __devinit snd_rme9652_create_pcm(snd_card_t *card,
2524                                          rme9652_t *rme9652)
2525 {
2526         snd_pcm_t *pcm;
2527         int err;
2528
2529         if ((err = snd_pcm_new(card,
2530                                rme9652->card_name,
2531                                0, 1, 1, &pcm)) < 0) {
2532                 return err;
2533         }
2534
2535         rme9652->pcm = pcm;
2536         pcm->private_data = rme9652;
2537         strcpy(pcm->name, rme9652->card_name);
2538
2539         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2540         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2541
2542         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2543
2544         return 0;
2545 }
2546
2547 static int __devinit snd_rme9652_create(snd_card_t *card,
2548                                      rme9652_t *rme9652,
2549                                      int precise_ptr)
2550 {
2551         struct pci_dev *pci = rme9652->pci;
2552         int err;
2553         int status;
2554         unsigned short rev;
2555
2556         rme9652->irq = -1;
2557         rme9652->card = card;
2558
2559         pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2560
2561         switch (rev & 0xff) {
2562         case 3:
2563         case 4:
2564         case 8:
2565         case 9:
2566                 break;
2567
2568         default:
2569                 /* who knows? */
2570                 return -ENODEV;
2571         }
2572
2573         if ((err = pci_enable_device(pci)) < 0)
2574                 return err;
2575
2576         spin_lock_init(&rme9652->lock);
2577
2578         rme9652->port = pci_resource_start(pci, 0);
2579         if ((rme9652->res_port = request_mem_region(rme9652->port, RME9652_IO_EXTENT, "rme9652")) == NULL) {
2580                 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2581                 return -EBUSY;
2582         }
2583
2584         rme9652->iobase = (unsigned long) ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2585         if (rme9652->iobase == 0) {
2586                 snd_printk("unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2587                 return -EBUSY;
2588         }
2589
2590         if (request_irq(pci->irq, snd_rme9652_interrupt, SA_INTERRUPT|SA_SHIRQ, "rme9652", (void *)rme9652)) {
2591                 snd_printk("unable to request IRQ %d\n", pci->irq);
2592                 return -EBUSY;
2593         }
2594         rme9652->irq = pci->irq;
2595         rme9652->precise_ptr = precise_ptr;
2596
2597         /* Determine the h/w rev level of the card. This seems like
2598            a particularly kludgy way to encode it, but its what RME
2599            chose to do, so we follow them ...
2600         */
2601
2602         status = rme9652_read(rme9652, RME9652_status_register);
2603         if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2604                 rme9652->hw_rev = 15;
2605         } else {
2606                 rme9652->hw_rev = 11;
2607         }
2608
2609         /* Differentiate between the standard Hammerfall, and the
2610            "Light", which does not have the expansion board. This
2611            method comes from information received from Mathhias
2612            Clausen at RME. Display the EEPROM and h/w revID where
2613            relevant.
2614         */
2615
2616         switch (rev) {
2617         case 8: /* original eprom */
2618                 strcpy(card->driver, "RME9636");
2619                 if (rme9652->hw_rev == 15) {
2620                         rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2621                 } else {
2622                         rme9652->card_name = "RME Digi9636";
2623                 }
2624                 rme9652->ss_channels = RME9636_NCHANNELS;
2625                 break;
2626         case 9: /* W36_G EPROM */
2627                 strcpy(card->driver, "RME9636");
2628                 rme9652->card_name = "RME Digi9636 (Rev G)";
2629                 rme9652->ss_channels = RME9636_NCHANNELS;
2630                 break;
2631         case 4: /* W52_G EPROM */
2632                 strcpy(card->driver, "RME9652");
2633                 rme9652->card_name = "RME Digi9652 (Rev G)";
2634                 rme9652->ss_channels = RME9652_NCHANNELS;
2635                 break;
2636         case 3: /* original eprom */
2637                 strcpy(card->driver, "RME9652");
2638                 if (rme9652->hw_rev == 15) {
2639                         rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2640                 } else {
2641                         rme9652->card_name = "RME Digi9652";
2642                 }
2643                 rme9652->ss_channels = RME9652_NCHANNELS;
2644                 break;
2645         }
2646
2647         rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2648
2649         pci_set_master(rme9652->pci);
2650
2651         if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2652                 return err;
2653         }
2654
2655         if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2656                 return err;
2657         }
2658
2659         if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2660                 return err;
2661         }
2662
2663         snd_rme9652_proc_init(rme9652);
2664
2665         rme9652->last_spdif_sample_rate = -1;
2666         rme9652->last_adat_sample_rate = -1;
2667         rme9652->playback_pid = -1;
2668         rme9652->capture_pid = -1;
2669         rme9652->capture_substream = NULL;
2670         rme9652->playback_substream = NULL;
2671
2672         snd_rme9652_set_defaults(rme9652);
2673
2674         if (rme9652->hw_rev == 15) {
2675                 rme9652_initialize_spdif_receiver (rme9652);
2676         }
2677
2678         return 0;
2679 }
2680
2681 static void snd_rme9652_card_free(snd_card_t *card)
2682 {
2683         rme9652_t *rme9652 = (rme9652_t *) card->private_data;
2684
2685         if (rme9652)
2686                 snd_rme9652_free(rme9652);
2687 }
2688
2689 static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2690                                        const struct pci_device_id *pci_id)
2691 {
2692         static int dev;
2693         rme9652_t *rme9652;
2694         snd_card_t *card;
2695         int err;
2696
2697         if (dev >= SNDRV_CARDS)
2698                 return -ENODEV;
2699         if (!enable[dev]) {
2700                 dev++;
2701                 return -ENOENT;
2702         }
2703
2704         card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2705                             sizeof(rme9652_t));
2706
2707         if (!card)
2708                 return -ENOMEM;
2709
2710         rme9652 = (rme9652_t *) card->private_data;
2711         card->private_free = snd_rme9652_card_free;
2712         rme9652->dev = dev;
2713         rme9652->pci = pci;
2714         snd_card_set_dev(card, &pci->dev);
2715
2716         if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2717                 snd_card_free(card);
2718                 return err;
2719         }
2720
2721         strcpy(card->shortname, rme9652->card_name);
2722
2723         sprintf(card->longname, "%s at 0x%lx, irq %d",
2724                 card->shortname, rme9652->port, rme9652->irq);
2725
2726
2727         if ((err = snd_card_register(card)) < 0) {
2728                 snd_card_free(card);
2729                 return err;
2730         }
2731         pci_set_drvdata(pci, card);
2732         dev++;
2733         return 0;
2734 }
2735
2736 static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2737 {
2738         snd_card_free(pci_get_drvdata(pci));
2739         pci_set_drvdata(pci, NULL);
2740 }
2741
2742 static struct pci_driver driver = {
2743         .name     = "RME Digi9652 (Hammerfall)",
2744         .id_table = snd_rme9652_ids,
2745         .probe    = snd_rme9652_probe,
2746         .remove   = __devexit_p(snd_rme9652_remove),
2747 };
2748
2749 static int __init alsa_card_hammerfall_init(void)
2750 {
2751         if (pci_module_init(&driver) < 0) {
2752 #ifdef MODULE
2753                 printk(KERN_ERR "RME Digi9652/Digi9636: no cards found\n");
2754 #endif
2755                 return -ENODEV;
2756         }
2757
2758         return 0;
2759 }
2760
2761 static void __exit alsa_card_hammerfall_exit(void)
2762 {
2763         pci_unregister_driver(&driver);
2764 }
2765
2766 module_init(alsa_card_hammerfall_init)
2767 module_exit(alsa_card_hammerfall_exit)
2768
2769 #ifndef MODULE
2770
2771 /* format is: snd-rme9652=enable,index,id */
2772
2773 static int __init alsa_card_rme9652_setup(char *str)
2774 {
2775         static unsigned __initdata nr_dev = 0;
2776
2777         if (nr_dev >= SNDRV_CARDS)
2778                 return 0;
2779         (void)(get_option(&str,&enable[nr_dev]) == 2 &&
2780                get_option(&str,&index[nr_dev]) == 2 &&
2781                get_id(&str,&id[nr_dev]) == 2);
2782         nr_dev++;
2783         return 1;
2784 }
2785
2786 __setup("snd-rme9652=", alsa_card_rme9652_setup);
2787
2788 #endif /* ifndef MODULE */