2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Routines for control of YMF724/740/744/754 chips
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <sound/driver.h>
28 #include <linux/delay.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/pci.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/vmalloc.h>
36 #include <sound/core.h>
37 #include <sound/control.h>
38 #include <sound/info.h>
39 #include <sound/ymfpci.h>
40 #include <sound/asoundef.h>
41 #include <sound/mpu401.h>
45 #define chip_t ymfpci_t
55 static void snd_ymfpci_irq_wait(ymfpci_t *chip);
57 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset)
59 return readb(chip->reg_area_virt + offset);
62 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val)
64 writeb(val, chip->reg_area_virt + offset);
67 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset)
69 return readw(chip->reg_area_virt + offset);
72 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val)
74 writew(val, chip->reg_area_virt + offset);
77 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset)
79 return readl(chip->reg_area_virt + offset);
82 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val)
84 writel(val, chip->reg_area_virt + offset);
87 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary)
90 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
92 end_time = (jiffies + ((3 * HZ) / 4)) + 1;
94 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
96 set_current_state(TASK_UNINTERRUPTIBLE);
98 } while (end_time - (signed long)jiffies >= 0);
99 snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
103 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val)
105 ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return);
108 snd_ymfpci_codec_ready(chip, 0);
109 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
110 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
113 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg)
115 ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return -ENXIO);
117 if (snd_ymfpci_codec_ready(chip, 0))
119 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
120 if (snd_ymfpci_codec_ready(chip, 0))
122 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
124 for (i = 0; i < 600; i++)
125 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
127 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
134 static u32 snd_ymfpci_calc_delta(u32 rate)
137 case 8000: return 0x02aaab00;
138 case 11025: return 0x03accd00;
139 case 16000: return 0x05555500;
140 case 22050: return 0x07599a00;
141 case 32000: return 0x0aaaab00;
142 case 44100: return 0x0eb33300;
143 default: return ((rate << 16) / 375) << 5;
147 static u32 def_rate[8] = {
148 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
151 static u32 snd_ymfpci_calc_lpfK(u32 rate)
154 static u32 val[8] = {
155 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
156 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
160 return 0x40000000; /* FIXME: What's the right value? */
161 for (i = 0; i < 8; i++)
162 if (rate <= def_rate[i])
167 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
170 static u32 val[8] = {
171 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
172 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
177 for (i = 0; i < 8; i++)
178 if (rate <= def_rate[i])
184 * Hardware start management
187 static void snd_ymfpci_hw_start(ymfpci_t *chip)
191 spin_lock_irqsave(&chip->reg_lock, flags);
192 if (chip->start_count++ > 0)
194 snd_ymfpci_writel(chip, YDSXGR_MODE,
195 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
196 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
198 spin_unlock_irqrestore(&chip->reg_lock, flags);
201 static void snd_ymfpci_hw_stop(ymfpci_t *chip)
206 spin_lock_irqsave(&chip->reg_lock, flags);
207 if (--chip->start_count > 0)
209 snd_ymfpci_writel(chip, YDSXGR_MODE,
210 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
211 while (timeout-- > 0) {
212 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
215 if (atomic_read(&chip->interrupt_sleep_count)) {
216 atomic_set(&chip->interrupt_sleep_count, 0);
217 wake_up(&chip->interrupt_sleep);
220 spin_unlock_irqrestore(&chip->reg_lock, flags);
224 * Playback voice management
227 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
229 ymfpci_voice_t *voice, *voice2;
233 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
234 voice = &chip->voices[idx];
235 voice2 = pair ? &chip->voices[idx+1] : NULL;
236 if (voice->use || (voice2 && voice2->use))
254 snd_ymfpci_hw_start(chip);
256 snd_ymfpci_hw_start(chip);
263 int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
268 snd_assert(rvoice != NULL, return -EINVAL);
269 snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
271 spin_lock_irqsave(&chip->voice_lock, flags);
273 result = voice_alloc(chip, type, pair, rvoice);
274 if (result == 0 || type != YMFPCI_PCM)
276 /* TODO: synth/midi voice deallocation */
279 spin_unlock_irqrestore(&chip->voice_lock, flags);
283 int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice)
287 snd_assert(pvoice != NULL, return -EINVAL);
288 snd_ymfpci_hw_stop(chip);
289 spin_lock_irqsave(&chip->voice_lock, flags);
290 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
292 pvoice->interrupt = NULL;
293 spin_unlock_irqrestore(&chip->voice_lock, flags);
301 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice)
306 if ((ypcm = voice->ypcm) == NULL)
308 if (ypcm->substream == NULL)
310 spin_lock(&chip->reg_lock);
312 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
313 if (pos < ypcm->last_pos)
314 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
316 delta = pos - ypcm->last_pos;
317 ypcm->period_pos += delta;
318 ypcm->last_pos = pos;
319 if (ypcm->period_pos >= ypcm->period_size) {
320 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
321 ypcm->period_pos %= ypcm->period_size;
322 spin_unlock(&chip->reg_lock);
323 snd_pcm_period_elapsed(ypcm->substream);
324 spin_lock(&chip->reg_lock);
327 spin_unlock(&chip->reg_lock);
330 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream)
332 snd_pcm_runtime_t *runtime = substream->runtime;
333 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return);
334 ymfpci_t *chip = ypcm->chip;
337 spin_lock(&chip->reg_lock);
339 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
340 if (pos < ypcm->last_pos)
341 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
343 delta = pos - ypcm->last_pos;
344 ypcm->period_pos += delta;
345 ypcm->last_pos = pos;
346 if (ypcm->period_pos >= ypcm->period_size) {
347 ypcm->period_pos %= ypcm->period_size;
348 // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
349 spin_unlock(&chip->reg_lock);
350 snd_pcm_period_elapsed(substream);
351 spin_lock(&chip->reg_lock);
354 spin_unlock(&chip->reg_lock);
357 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream,
360 ymfpci_t *chip = snd_pcm_substream_chip(substream);
361 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, substream->runtime->private_data, return -ENXIO);
364 spin_lock(&chip->reg_lock);
365 if (ypcm->voices[0] == NULL) {
370 case SNDRV_PCM_TRIGGER_START:
371 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
372 case SNDRV_PCM_TRIGGER_RESUME:
373 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
374 if (ypcm->voices[1] != NULL)
375 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
378 case SNDRV_PCM_TRIGGER_STOP:
379 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
380 case SNDRV_PCM_TRIGGER_SUSPEND:
381 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
382 if (ypcm->voices[1] != NULL)
383 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
391 spin_unlock(&chip->reg_lock);
394 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream,
397 ymfpci_t *chip = snd_pcm_substream_chip(substream);
398 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, substream->runtime->private_data, return -ENXIO);
402 spin_lock(&chip->reg_lock);
404 case SNDRV_PCM_TRIGGER_START:
405 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
406 case SNDRV_PCM_TRIGGER_RESUME:
407 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
408 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
411 case SNDRV_PCM_TRIGGER_STOP:
412 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
413 case SNDRV_PCM_TRIGGER_SUSPEND:
414 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
415 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
422 spin_unlock(&chip->reg_lock);
426 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices)
430 if (ypcm->voices[1] != NULL && voices < 2) {
431 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
432 ypcm->voices[1] = NULL;
434 if (voices == 1 && ypcm->voices[0] != NULL)
435 return 0; /* already allocated */
436 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
437 return 0; /* already allocated */
439 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
440 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
441 ypcm->voices[0] = NULL;
444 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
447 ypcm->voices[0]->ypcm = ypcm;
448 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
450 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
451 ypcm->voices[1]->ypcm = ypcm;
456 static void snd_ymfpci_pcm_init_voice(ymfpci_voice_t *voice, int stereo,
457 int rate, int w_16, unsigned long addr,
459 int output_front, int output_rear)
462 u32 delta = snd_ymfpci_calc_delta(rate);
463 u32 lpfQ = snd_ymfpci_calc_lpfQ(rate);
464 u32 lpfK = snd_ymfpci_calc_lpfK(rate);
465 snd_ymfpci_playback_bank_t *bank;
468 snd_assert(voice != NULL, return);
469 format = (stereo ? 0x00010000 : 0) | (w_16 ? 0 : 0x80000000);
470 for (nbank = 0; nbank < 2; nbank++) {
471 bank = &voice->bank[nbank];
472 bank->format = cpu_to_le32(format);
473 bank->loop_default = 0;
474 bank->base = cpu_to_le32(addr);
475 bank->loop_start = 0;
476 bank->loop_end = cpu_to_le32(end);
478 bank->eg_gain_end = cpu_to_le32(0x40000000);
479 bank->lpfQ = cpu_to_le32(lpfQ);
481 bank->num_of_frames = 0;
482 bank->loop_count = 0;
484 bank->start_frac = 0;
486 bank->delta_end = cpu_to_le32(delta);
488 bank->lpfK_end = cpu_to_le32(lpfK);
489 bank->eg_gain = cpu_to_le32(0x40000000);
495 bank->left_gain_end =
496 bank->right_gain_end =
500 bank->eff1_gain_end =
501 bank->eff2_gain_end =
502 bank->eff3_gain_end = 0;
508 bank->left_gain_end =
509 bank->right_gain_end = cpu_to_le32(0x40000000);
513 bank->eff2_gain_end =
515 bank->eff3_gain_end = cpu_to_le32(0x40000000);
519 if ((voice->number & 1) == 0) {
521 bank->left_gain_end = cpu_to_le32(0x40000000);
523 bank->format |= cpu_to_le32(1);
525 bank->right_gain_end = cpu_to_le32(0x40000000);
529 if ((voice->number & 1) == 0) {
531 bank->eff3_gain_end = cpu_to_le32(0x40000000);
533 bank->format |= cpu_to_le32(1);
535 bank->eff2_gain_end = cpu_to_le32(0x40000000);
542 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip)
544 if (snd_dma_alloc_pages(&chip->dma_dev, 4096, &chip->ac3_tmp_base) < 0)
547 chip->bank_effect[3][0]->base =
548 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
549 chip->bank_effect[3][0]->loop_end =
550 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
551 chip->bank_effect[4][0]->base =
552 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
553 chip->bank_effect[4][0]->loop_end =
554 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
556 spin_lock_irq(&chip->reg_lock);
557 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
558 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
559 spin_unlock_irq(&chip->reg_lock);
563 static int snd_ymfpci_ac3_done(ymfpci_t *chip)
565 spin_lock_irq(&chip->reg_lock);
566 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
567 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
568 spin_unlock_irq(&chip->reg_lock);
569 // snd_ymfpci_irq_wait(chip);
570 if (chip->ac3_tmp_base.area) {
571 snd_dma_free_pages(&chip->dma_dev, &chip->ac3_tmp_base);
572 chip->ac3_tmp_base.area = NULL;
577 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream,
578 snd_pcm_hw_params_t * hw_params)
580 snd_pcm_runtime_t *runtime = substream->runtime;
581 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
584 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
586 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
591 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream)
593 ymfpci_t *chip = snd_pcm_substream_chip(substream);
594 snd_pcm_runtime_t *runtime = substream->runtime;
597 if (runtime->private_data == NULL)
599 ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
601 /* wait, until the PCI operations are not finished */
602 snd_ymfpci_irq_wait(chip);
603 snd_pcm_lib_free_pages(substream);
604 if (ypcm->voices[1]) {
605 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
606 ypcm->voices[1] = NULL;
608 if (ypcm->voices[0]) {
609 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
610 ypcm->voices[0] = NULL;
615 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream)
617 // ymfpci_t *chip = snd_pcm_substream_chip(substream);
618 snd_pcm_runtime_t *runtime = substream->runtime;
619 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
622 ypcm->period_size = runtime->period_size;
623 ypcm->buffer_size = runtime->buffer_size;
624 ypcm->period_pos = 0;
626 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
627 snd_ymfpci_pcm_init_voice(ypcm->voices[nvoice],
628 runtime->channels == 2,
630 snd_pcm_format_width(runtime->format) == 16,
638 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream,
639 snd_pcm_hw_params_t * hw_params)
641 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
644 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream)
646 ymfpci_t *chip = snd_pcm_substream_chip(substream);
648 /* wait, until the PCI operations are not finished */
649 snd_ymfpci_irq_wait(chip);
650 return snd_pcm_lib_free_pages(substream);
653 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream)
655 ymfpci_t *chip = snd_pcm_substream_chip(substream);
656 snd_pcm_runtime_t *runtime = substream->runtime;
657 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
658 snd_ymfpci_capture_bank_t * bank;
662 ypcm->period_size = runtime->period_size;
663 ypcm->buffer_size = runtime->buffer_size;
664 ypcm->period_pos = 0;
667 rate = ((48000 * 4096) / runtime->rate) - 1;
669 if (runtime->channels == 2) {
673 if (snd_pcm_format_width(runtime->format) == 8)
677 switch (ypcm->capture_bank_number) {
679 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
680 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
683 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
684 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
687 for (nbank = 0; nbank < 2; nbank++) {
688 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
689 bank->base = cpu_to_le32(runtime->dma_addr);
690 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
692 bank->num_of_loops = 0;
697 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream)
699 ymfpci_t *chip = snd_pcm_substream_chip(substream);
700 snd_pcm_runtime_t *runtime = substream->runtime;
701 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
702 ymfpci_voice_t *voice = ypcm->voices[0];
704 if (!(ypcm->running && voice))
706 return le32_to_cpu(voice->bank[chip->active_bank].start);
709 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream)
711 ymfpci_t *chip = snd_pcm_substream_chip(substream);
712 snd_pcm_runtime_t *runtime = substream->runtime;
713 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
717 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
720 static void snd_ymfpci_irq_wait(ymfpci_t *chip)
725 while (loops-- > 0) {
726 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
728 init_waitqueue_entry(&wait, current);
729 add_wait_queue(&chip->interrupt_sleep, &wait);
730 atomic_inc(&chip->interrupt_sleep_count);
731 set_current_state(TASK_UNINTERRUPTIBLE);
732 schedule_timeout(HZ/20);
733 remove_wait_queue(&chip->interrupt_sleep, &wait);
737 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
739 ymfpci_t *chip = snd_magic_cast(ymfpci_t, dev_id, return IRQ_NONE);
740 u32 status, nvoice, mode;
741 ymfpci_voice_t *voice;
743 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
744 if (status & 0x80000000) {
745 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
746 spin_lock(&chip->voice_lock);
747 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
748 voice = &chip->voices[nvoice];
749 if (voice->interrupt)
750 voice->interrupt(chip, voice);
752 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
753 if (chip->capture_substream[nvoice])
754 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
757 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
758 if (chip->effect_substream[nvoice])
759 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
762 spin_unlock(&chip->voice_lock);
763 spin_lock(&chip->reg_lock);
764 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
765 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
766 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
767 spin_unlock(&chip->reg_lock);
769 if (atomic_read(&chip->interrupt_sleep_count)) {
770 atomic_set(&chip->interrupt_sleep_count, 0);
771 wake_up(&chip->interrupt_sleep);
775 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
778 snd_timer_interrupt(chip->timer, chip->timer->sticks);
780 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
783 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
787 static snd_pcm_hardware_t snd_ymfpci_playback =
789 .info = (SNDRV_PCM_INFO_MMAP |
790 SNDRV_PCM_INFO_MMAP_VALID |
791 SNDRV_PCM_INFO_INTERLEAVED |
792 SNDRV_PCM_INFO_BLOCK_TRANSFER |
793 SNDRV_PCM_INFO_PAUSE |
794 SNDRV_PCM_INFO_RESUME),
795 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
796 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
801 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
802 .period_bytes_min = 64,
803 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
809 static snd_pcm_hardware_t snd_ymfpci_capture =
811 .info = (SNDRV_PCM_INFO_MMAP |
812 SNDRV_PCM_INFO_MMAP_VALID |
813 SNDRV_PCM_INFO_INTERLEAVED |
814 SNDRV_PCM_INFO_BLOCK_TRANSFER |
815 SNDRV_PCM_INFO_PAUSE |
816 SNDRV_PCM_INFO_RESUME),
817 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
818 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
823 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
824 .period_bytes_min = 64,
825 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
831 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime)
833 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return);
836 snd_magic_kfree(ypcm);
839 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream)
841 ymfpci_t *chip = snd_pcm_substream_chip(substream);
842 snd_pcm_runtime_t *runtime = substream->runtime;
845 ypcm = snd_magic_kcalloc(ymfpci_pcm_t, 0, GFP_KERNEL);
849 ypcm->type = PLAYBACK_VOICE;
850 ypcm->substream = substream;
851 runtime->hw = snd_ymfpci_playback;
852 runtime->private_data = ypcm;
853 runtime->private_free = snd_ymfpci_pcm_free_substream;
854 /* FIXME? True value is 256/48 = 5.33333 ms */
855 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
859 /* call with spinlock held */
860 static void ymfpci_open_extension(ymfpci_t *chip)
862 if (! chip->rear_opened) {
863 if (! chip->spdif_opened) /* set AC3 */
864 snd_ymfpci_writel(chip, YDSXGR_MODE,
865 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
866 /* enable second codec (4CHEN) */
867 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
868 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
872 /* call with spinlock held */
873 static void ymfpci_close_extension(ymfpci_t *chip)
875 if (! chip->rear_opened) {
876 if (! chip->spdif_opened)
877 snd_ymfpci_writel(chip, YDSXGR_MODE,
878 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
879 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
880 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
884 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream)
886 ymfpci_t *chip = snd_pcm_substream_chip(substream);
887 snd_pcm_runtime_t *runtime = substream->runtime;
892 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
894 ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return 0);
895 ypcm->output_front = 1;
896 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
897 spin_lock_irqsave(&chip->reg_lock, flags);
898 if (ypcm->output_rear) {
899 ymfpci_open_extension(chip);
902 spin_unlock_irqrestore(&chip->reg_lock, flags);
906 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream)
908 ymfpci_t *chip = snd_pcm_substream_chip(substream);
909 snd_pcm_runtime_t *runtime = substream->runtime;
914 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
916 ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return 0);
917 ypcm->output_front = 0;
918 ypcm->output_rear = 1;
919 spin_lock_irqsave(&chip->reg_lock, flags);
920 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
921 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
922 ymfpci_open_extension(chip);
923 chip->spdif_pcm_bits = chip->spdif_bits;
924 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
925 chip->spdif_opened++;
926 spin_unlock_irqrestore(&chip->reg_lock, flags);
928 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
929 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
930 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
934 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream)
936 ymfpci_t *chip = snd_pcm_substream_chip(substream);
937 snd_pcm_runtime_t *runtime = substream->runtime;
942 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
944 ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return 0);
945 ypcm->output_front = 0;
946 ypcm->output_rear = 1;
947 spin_lock_irqsave(&chip->reg_lock, flags);
948 ymfpci_open_extension(chip);
950 spin_unlock_irqrestore(&chip->reg_lock, flags);
954 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream,
955 u32 capture_bank_number)
957 ymfpci_t *chip = snd_pcm_substream_chip(substream);
958 snd_pcm_runtime_t *runtime = substream->runtime;
961 ypcm = snd_magic_kcalloc(ymfpci_pcm_t, 0, GFP_KERNEL);
965 ypcm->type = capture_bank_number + CAPTURE_REC;
966 ypcm->substream = substream;
967 ypcm->capture_bank_number = capture_bank_number;
968 chip->capture_substream[capture_bank_number] = substream;
969 runtime->hw = snd_ymfpci_capture;
970 /* FIXME? True value is 256/48 = 5.33333 ms */
971 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
972 runtime->private_data = ypcm;
973 runtime->private_free = snd_ymfpci_pcm_free_substream;
974 snd_ymfpci_hw_start(chip);
978 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream)
980 return snd_ymfpci_capture_open(substream, 0);
983 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream)
985 return snd_ymfpci_capture_open(substream, 1);
988 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream)
993 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream)
995 ymfpci_t *chip = snd_pcm_substream_chip(substream);
996 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, substream->runtime->private_data, return -ENXIO);
999 spin_lock_irqsave(&chip->reg_lock, flags);
1000 if (ypcm->output_rear && chip->rear_opened > 0) {
1001 chip->rear_opened--;
1002 ymfpci_close_extension(chip);
1004 spin_unlock_irqrestore(&chip->reg_lock, flags);
1005 return snd_ymfpci_playback_close_1(substream);
1008 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream)
1010 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1011 unsigned long flags;
1013 spin_lock_irqsave(&chip->reg_lock, flags);
1014 chip->spdif_opened = 0;
1015 ymfpci_close_extension(chip);
1016 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1017 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1018 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1019 spin_unlock_irqrestore(&chip->reg_lock, flags);
1020 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1021 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1022 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1023 return snd_ymfpci_playback_close_1(substream);
1026 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream)
1028 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1029 unsigned long flags;
1031 spin_lock_irqsave(&chip->reg_lock, flags);
1032 if (chip->rear_opened > 0) {
1033 chip->rear_opened--;
1034 ymfpci_close_extension(chip);
1036 spin_unlock_irqrestore(&chip->reg_lock, flags);
1037 return snd_ymfpci_playback_close_1(substream);
1040 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream)
1042 ymfpci_t *chip = snd_pcm_substream_chip(substream);
1043 snd_pcm_runtime_t *runtime = substream->runtime;
1044 ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
1047 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1048 snd_ymfpci_hw_stop(chip);
1053 static snd_pcm_ops_t snd_ymfpci_playback_ops = {
1054 .open = snd_ymfpci_playback_open,
1055 .close = snd_ymfpci_playback_close,
1056 .ioctl = snd_pcm_lib_ioctl,
1057 .hw_params = snd_ymfpci_playback_hw_params,
1058 .hw_free = snd_ymfpci_playback_hw_free,
1059 .prepare = snd_ymfpci_playback_prepare,
1060 .trigger = snd_ymfpci_playback_trigger,
1061 .pointer = snd_ymfpci_playback_pointer,
1064 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = {
1065 .open = snd_ymfpci_capture_rec_open,
1066 .close = snd_ymfpci_capture_close,
1067 .ioctl = snd_pcm_lib_ioctl,
1068 .hw_params = snd_ymfpci_capture_hw_params,
1069 .hw_free = snd_ymfpci_capture_hw_free,
1070 .prepare = snd_ymfpci_capture_prepare,
1071 .trigger = snd_ymfpci_capture_trigger,
1072 .pointer = snd_ymfpci_capture_pointer,
1075 static void snd_ymfpci_pcm_free(snd_pcm_t *pcm)
1077 ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1079 snd_pcm_lib_preallocate_free_for_all(pcm);
1082 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1089 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1091 pcm->private_data = chip;
1092 pcm->private_free = snd_ymfpci_pcm_free;
1094 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1095 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1098 pcm->info_flags = 0;
1099 strcpy(pcm->name, "YMFPCI");
1102 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1103 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1110 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = {
1111 .open = snd_ymfpci_capture_ac97_open,
1112 .close = snd_ymfpci_capture_close,
1113 .ioctl = snd_pcm_lib_ioctl,
1114 .hw_params = snd_ymfpci_capture_hw_params,
1115 .hw_free = snd_ymfpci_capture_hw_free,
1116 .prepare = snd_ymfpci_capture_prepare,
1117 .trigger = snd_ymfpci_capture_trigger,
1118 .pointer = snd_ymfpci_capture_pointer,
1121 static void snd_ymfpci_pcm2_free(snd_pcm_t *pcm)
1123 ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1125 snd_pcm_lib_preallocate_free_for_all(pcm);
1128 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1135 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1137 pcm->private_data = chip;
1138 pcm->private_free = snd_ymfpci_pcm2_free;
1140 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1143 pcm->info_flags = 0;
1144 sprintf(pcm->name, "YMFPCI - %s",
1145 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1148 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1149 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1156 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = {
1157 .open = snd_ymfpci_playback_spdif_open,
1158 .close = snd_ymfpci_playback_spdif_close,
1159 .ioctl = snd_pcm_lib_ioctl,
1160 .hw_params = snd_ymfpci_playback_hw_params,
1161 .hw_free = snd_ymfpci_playback_hw_free,
1162 .prepare = snd_ymfpci_playback_prepare,
1163 .trigger = snd_ymfpci_playback_trigger,
1164 .pointer = snd_ymfpci_playback_pointer,
1167 static void snd_ymfpci_pcm_spdif_free(snd_pcm_t *pcm)
1169 ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1170 chip->pcm_spdif = NULL;
1171 snd_pcm_lib_preallocate_free_for_all(pcm);
1174 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1181 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1183 pcm->private_data = chip;
1184 pcm->private_free = snd_ymfpci_pcm_spdif_free;
1186 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1189 pcm->info_flags = 0;
1190 strcpy(pcm->name, "YMFPCI - IEC958");
1191 chip->pcm_spdif = pcm;
1193 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1194 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1201 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = {
1202 .open = snd_ymfpci_playback_4ch_open,
1203 .close = snd_ymfpci_playback_4ch_close,
1204 .ioctl = snd_pcm_lib_ioctl,
1205 .hw_params = snd_ymfpci_playback_hw_params,
1206 .hw_free = snd_ymfpci_playback_hw_free,
1207 .prepare = snd_ymfpci_playback_prepare,
1208 .trigger = snd_ymfpci_playback_trigger,
1209 .pointer = snd_ymfpci_playback_pointer,
1212 static void snd_ymfpci_pcm_4ch_free(snd_pcm_t *pcm)
1214 ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1215 chip->pcm_4ch = NULL;
1216 snd_pcm_lib_preallocate_free_for_all(pcm);
1219 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1226 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1228 pcm->private_data = chip;
1229 pcm->private_free = snd_ymfpci_pcm_4ch_free;
1231 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1234 pcm->info_flags = 0;
1235 strcpy(pcm->name, "YMFPCI - Rear PCM");
1236 chip->pcm_4ch = pcm;
1238 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1239 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1246 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1248 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1253 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol,
1254 snd_ctl_elem_value_t * ucontrol)
1256 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1257 unsigned long flags;
1259 spin_lock_irqsave(&chip->reg_lock, flags);
1260 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1261 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1262 spin_unlock_irqrestore(&chip->reg_lock, flags);
1266 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol,
1267 snd_ctl_elem_value_t * ucontrol)
1269 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1270 unsigned long flags;
1274 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1275 (ucontrol->value.iec958.status[1] << 8);
1276 spin_lock_irqsave(&chip->reg_lock, flags);
1277 change = chip->spdif_bits != val;
1278 chip->spdif_bits = val;
1279 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1280 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1281 spin_unlock_irqrestore(&chip->reg_lock, flags);
1285 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata =
1287 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1288 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1289 .info = snd_ymfpci_spdif_default_info,
1290 .get = snd_ymfpci_spdif_default_get,
1291 .put = snd_ymfpci_spdif_default_put
1294 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1296 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1301 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol,
1302 snd_ctl_elem_value_t * ucontrol)
1304 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1305 unsigned long flags;
1307 spin_lock_irqsave(&chip->reg_lock, flags);
1308 ucontrol->value.iec958.status[0] = 0x3e;
1309 ucontrol->value.iec958.status[1] = 0xff;
1310 spin_unlock_irqrestore(&chip->reg_lock, flags);
1314 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata =
1316 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1317 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1318 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1319 .info = snd_ymfpci_spdif_mask_info,
1320 .get = snd_ymfpci_spdif_mask_get,
1323 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1325 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1330 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol,
1331 snd_ctl_elem_value_t * ucontrol)
1333 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1334 unsigned long flags;
1336 spin_lock_irqsave(&chip->reg_lock, flags);
1337 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1338 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1339 spin_unlock_irqrestore(&chip->reg_lock, flags);
1343 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol,
1344 snd_ctl_elem_value_t * ucontrol)
1346 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1347 unsigned long flags;
1351 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1352 (ucontrol->value.iec958.status[1] << 8);
1353 spin_lock_irqsave(&chip->reg_lock, flags);
1354 change = chip->spdif_pcm_bits != val;
1355 chip->spdif_pcm_bits = val;
1356 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1357 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1358 spin_unlock_irqrestore(&chip->reg_lock, flags);
1362 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata =
1364 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1365 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1366 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1367 .info = snd_ymfpci_spdif_stream_info,
1368 .get = snd_ymfpci_spdif_stream_get,
1369 .put = snd_ymfpci_spdif_stream_put
1372 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
1374 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1376 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1378 info->value.enumerated.items = 3;
1379 if (info->value.enumerated.item > 2)
1380 info->value.enumerated.item = 2;
1381 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1385 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1387 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1388 unsigned long flags;
1391 spin_lock_irqsave(&chip->reg_lock, flags);
1392 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1393 spin_unlock_irqrestore(&chip->reg_lock, flags);
1395 value->value.enumerated.item[0] = 0;
1397 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1401 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1403 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1404 unsigned long flags;
1407 spin_lock_irqsave(&chip->reg_lock, flags);
1408 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1409 if (value->value.enumerated.item[0] == 0)
1410 reg = old_reg & ~0x100;
1412 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1413 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1414 spin_unlock_irqrestore(&chip->reg_lock, flags);
1415 return reg != old_reg;
1418 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = {
1419 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1420 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1421 .name = "Direct Recording Source",
1422 .info = snd_ymfpci_drec_source_info,
1423 .get = snd_ymfpci_drec_source_get,
1424 .put = snd_ymfpci_drec_source_put
1431 #define YMFPCI_SINGLE(xname, xindex, reg) \
1432 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1433 .info = snd_ymfpci_info_single, \
1434 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1435 .private_value = reg }
1437 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1439 unsigned int mask = 1;
1441 switch (kcontrol->private_value) {
1442 case YDSXGR_SPDIFOUTCTRL: break;
1443 case YDSXGR_SPDIFINCTRL: break;
1444 default: return -EINVAL;
1446 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1448 uinfo->value.integer.min = 0;
1449 uinfo->value.integer.max = mask;
1453 static int snd_ymfpci_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1455 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1456 int reg = kcontrol->private_value;
1457 unsigned int shift = 0, mask = 1, invert = 0;
1459 switch (kcontrol->private_value) {
1460 case YDSXGR_SPDIFOUTCTRL: break;
1461 case YDSXGR_SPDIFINCTRL: break;
1462 default: return -EINVAL;
1464 ucontrol->value.integer.value[0] = (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1466 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1470 static int snd_ymfpci_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1472 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1473 unsigned long flags;
1474 int reg = kcontrol->private_value;
1475 unsigned int shift = 0, mask = 1, invert = 0;
1477 unsigned int val, oval;
1479 switch (kcontrol->private_value) {
1480 case YDSXGR_SPDIFOUTCTRL: break;
1481 case YDSXGR_SPDIFINCTRL: break;
1482 default: return -EINVAL;
1484 val = (ucontrol->value.integer.value[0] & mask);
1488 spin_lock_irqsave(&chip->reg_lock, flags);
1489 oval = snd_ymfpci_readl(chip, reg);
1490 val = (oval & ~(mask << shift)) | val;
1491 change = val != oval;
1492 snd_ymfpci_writel(chip, reg, val);
1493 spin_unlock_irqrestore(&chip->reg_lock, flags);
1497 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1498 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1499 .info = snd_ymfpci_info_double, \
1500 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1501 .private_value = reg }
1503 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1505 unsigned int reg = kcontrol->private_value;
1506 unsigned int mask = 16383;
1508 if (reg < 0x80 || reg >= 0xc0)
1510 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1512 uinfo->value.integer.min = 0;
1513 uinfo->value.integer.max = mask;
1517 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1519 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1520 unsigned long flags;
1521 unsigned int reg = kcontrol->private_value;
1522 unsigned int shift_left = 0, shift_right = 16, mask = 16383, invert = 0;
1525 if (reg < 0x80 || reg >= 0xc0)
1527 spin_lock_irqsave(&chip->reg_lock, flags);
1528 val = snd_ymfpci_readl(chip, reg);
1529 spin_unlock_irqrestore(&chip->reg_lock, flags);
1530 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1531 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1533 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1534 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1539 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1541 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1542 unsigned long flags;
1543 unsigned int reg = kcontrol->private_value;
1544 unsigned int shift_left = 0, shift_right = 16, mask = 16383, invert = 0;
1546 unsigned int val1, val2, oval;
1548 if (reg < 0x80 || reg >= 0xc0)
1550 val1 = ucontrol->value.integer.value[0] & mask;
1551 val2 = ucontrol->value.integer.value[1] & mask;
1556 val1 <<= shift_left;
1557 val2 <<= shift_right;
1558 spin_lock_irqsave(&chip->reg_lock, flags);
1559 oval = snd_ymfpci_readl(chip, reg);
1560 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1561 change = val1 != oval;
1562 snd_ymfpci_writel(chip, reg, val1);
1563 spin_unlock_irqrestore(&chip->reg_lock, flags);
1570 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1572 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1574 uinfo->value.integer.min = 0;
1575 uinfo->value.integer.max = 1;
1579 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1581 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1582 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1586 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1588 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1590 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1592 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1597 #define YMFPCI_CONTROLS (sizeof(snd_ymfpci_controls)/sizeof(snd_kcontrol_new_t))
1599 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = {
1600 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1601 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1602 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1603 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1604 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1605 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1606 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1607 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1608 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1609 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1610 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1611 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1612 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1613 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL),
1614 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL),
1616 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1617 .name = "4ch Duplication",
1618 .info = snd_ymfpci_info_dup4ch,
1619 .get = snd_ymfpci_get_dup4ch,
1620 .put = snd_ymfpci_put_dup4ch,
1629 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin)
1632 unsigned long flags;
1634 spin_lock_irqsave(&chip->reg_lock, flags);
1635 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1636 reg &= ~(1 << (pin + 8));
1638 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1639 /* set the level mode for input line */
1640 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1641 mode &= ~(3 << (pin * 2));
1642 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1643 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1644 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1645 spin_unlock_irqrestore(&chip->reg_lock, flags);
1646 return (mode >> pin) & 1;
1649 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable)
1652 unsigned long flags;
1654 spin_lock_irqsave(&chip->reg_lock, flags);
1655 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1657 reg &= ~(1 << (pin + 8));
1658 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1659 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1660 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1661 spin_unlock_irqrestore(&chip->reg_lock, flags);
1666 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1668 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1670 uinfo->value.integer.min = 0;
1671 uinfo->value.integer.max = 1;
1675 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1677 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1678 int pin = (int)kcontrol->private_value;
1679 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1683 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1685 ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1686 int pin = (int)kcontrol->private_value;
1688 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1689 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1690 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1696 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = {
1697 .name = "Shared Rear/Line-In Switch",
1698 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1699 .info = snd_ymfpci_gpio_sw_info,
1700 .get = snd_ymfpci_gpio_sw_get,
1701 .put = snd_ymfpci_gpio_sw_put,
1710 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus)
1712 ymfpci_t *chip = snd_magic_cast(ymfpci_t, bus->private_data, return);
1713 chip->ac97_bus = NULL;
1716 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97)
1718 ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return);
1722 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch)
1726 snd_kcontrol_t *kctl;
1730 memset(&bus, 0, sizeof(bus));
1731 bus.write = snd_ymfpci_codec_write;
1732 bus.read = snd_ymfpci_codec_read;
1733 bus.private_data = chip;
1734 bus.private_free = snd_ymfpci_mixer_free_ac97_bus;
1735 if ((err = snd_ac97_bus(chip->card, &bus, &chip->ac97_bus)) < 0)
1738 memset(&ac97, 0, sizeof(ac97));
1739 ac97.private_data = chip;
1740 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1741 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1744 for (idx = 0; idx < YMFPCI_CONTROLS; idx++) {
1745 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1749 /* add S/PDIF control */
1750 snd_assert(chip->pcm_spdif != NULL, return -EIO);
1751 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1753 kctl->id.device = chip->pcm_spdif->device;
1754 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1756 kctl->id.device = chip->pcm_spdif->device;
1757 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1759 kctl->id.device = chip->pcm_spdif->device;
1760 chip->spdif_pcm_ctl = kctl;
1762 /* direct recording source */
1763 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1764 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1768 * shared rear/line-in
1771 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1783 static int snd_ymfpci_timer_start(snd_timer_t *timer)
1786 unsigned long flags;
1789 chip = snd_timer_chip(timer);
1790 count = timer->sticks - 1;
1791 if (count == 0) /* minimum time is 20.8 us */
1793 spin_lock_irqsave(&chip->reg_lock, flags);
1794 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1795 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1796 spin_unlock_irqrestore(&chip->reg_lock, flags);
1800 static int snd_ymfpci_timer_stop(snd_timer_t *timer)
1803 unsigned long flags;
1805 chip = snd_timer_chip(timer);
1806 spin_lock_irqsave(&chip->reg_lock, flags);
1807 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1808 spin_unlock_irqrestore(&chip->reg_lock, flags);
1812 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer,
1813 unsigned long *num, unsigned long *den)
1820 static struct _snd_timer_hardware snd_ymfpci_timer_hw = {
1821 .flags = SNDRV_TIMER_HW_AUTO,
1822 .resolution = 10417, /* 1/2fs = 10.41666...us */
1824 .start = snd_ymfpci_timer_start,
1825 .stop = snd_ymfpci_timer_stop,
1826 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1829 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device)
1831 snd_timer_t *timer = NULL;
1835 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1836 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1837 tid.card = chip->card->number;
1838 tid.device = device;
1840 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1841 strcpy(timer->name, "YMFPCI timer");
1842 timer->private_data = chip;
1843 timer->hw = snd_ymfpci_timer_hw;
1845 chip->timer = timer;
1854 static void snd_ymfpci_proc_read(snd_info_entry_t *entry,
1855 snd_info_buffer_t * buffer)
1857 ymfpci_t *chip = snd_magic_cast(ymfpci_t, entry->private_data, return);
1860 snd_iprintf(buffer, "YMFPCI\n\n");
1861 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1862 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1865 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip)
1867 snd_info_entry_t *entry;
1869 if (! snd_card_proc_new(card, "ymfpci", &entry))
1870 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
1875 * initialization routines
1878 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1882 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1883 #if 0 // force to reset
1886 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1887 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1888 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1889 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1890 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1896 static void snd_ymfpci_enable_dsp(ymfpci_t *chip)
1898 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1901 static void snd_ymfpci_disable_dsp(ymfpci_t *chip)
1906 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1908 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1909 while (timeout-- > 0) {
1910 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1911 if ((val & 0x00000002) == 0)
1916 #include "ymfpci_image.h"
1918 static void snd_ymfpci_download_image(ymfpci_t *chip)
1922 unsigned long *inst;
1924 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1925 snd_ymfpci_disable_dsp(chip);
1926 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1927 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1928 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1929 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1930 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1931 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1932 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1933 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1934 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1936 /* setup DSP instruction code */
1937 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1938 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1940 /* setup control instruction code */
1941 switch (chip->device_id) {
1942 case PCI_DEVICE_ID_YAMAHA_724F:
1943 case PCI_DEVICE_ID_YAMAHA_740C:
1944 case PCI_DEVICE_ID_YAMAHA_744:
1945 case PCI_DEVICE_ID_YAMAHA_754:
1952 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
1953 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
1955 snd_ymfpci_enable_dsp(chip);
1958 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip)
1960 long size, playback_ctrl_size;
1961 int voice, bank, reg;
1963 dma_addr_t ptr_addr;
1965 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
1966 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
1967 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
1968 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
1969 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
1971 size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
1972 ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
1973 ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
1974 ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
1976 /* work_ptr must be aligned to 256 bytes, but it's already
1977 covered with the kernel page allocation mechanism */
1978 if (snd_dma_alloc_pages(&chip->dma_dev, size, &chip->work_ptr) < 0)
1980 ptr = chip->work_ptr.area;
1981 ptr_addr = chip->work_ptr.addr;
1982 memset(ptr, 0, size); /* for sure */
1984 chip->bank_base_playback = ptr;
1985 chip->bank_base_playback_addr = ptr_addr;
1986 chip->ctrl_playback = (u32 *)ptr;
1987 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
1988 ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1989 ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1990 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
1991 chip->voices[voice].number = voice;
1992 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr;
1993 chip->voices[voice].bank_addr = ptr_addr;
1994 for (bank = 0; bank < 2; bank++) {
1995 chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr;
1996 ptr += chip->bank_size_playback;
1997 ptr_addr += chip->bank_size_playback;
2000 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2001 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2002 chip->bank_base_capture = ptr;
2003 chip->bank_base_capture_addr = ptr_addr;
2004 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2005 for (bank = 0; bank < 2; bank++) {
2006 chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr;
2007 ptr += chip->bank_size_capture;
2008 ptr_addr += chip->bank_size_capture;
2010 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2011 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2012 chip->bank_base_effect = ptr;
2013 chip->bank_base_effect_addr = ptr_addr;
2014 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2015 for (bank = 0; bank < 2; bank++) {
2016 chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr;
2017 ptr += chip->bank_size_effect;
2018 ptr_addr += chip->bank_size_effect;
2020 ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2021 ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2022 chip->work_base = ptr;
2023 chip->work_base_addr = ptr_addr;
2025 snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2027 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2028 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2029 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2030 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2031 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2033 /* S/PDIF output initialization */
2034 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2035 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2036 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2038 /* S/PDIF input initialization */
2039 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2041 /* digital mixer setup */
2042 for (reg = 0x80; reg < 0xc0; reg += 4)
2043 snd_ymfpci_writel(chip, reg, 0);
2044 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2045 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2046 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2047 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2048 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2049 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2050 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2055 static int snd_ymfpci_free(ymfpci_t *chip)
2059 snd_assert(chip != NULL, return -EINVAL);
2061 if (chip->res_reg_area) { /* don't touch busy hardware */
2062 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2063 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2064 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2065 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2066 snd_ymfpci_disable_dsp(chip);
2067 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2068 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2069 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2070 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2071 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2072 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2073 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2076 snd_ymfpci_ac3_done(chip);
2078 /* Set PCI device to D3 state */
2080 /* FIXME: temporarily disabled, otherwise we cannot fire up
2081 * the chip again unless reboot. ACPI bug?
2083 pci_set_power_state(chip->pci, 3);
2087 if (chip->saved_regs)
2088 vfree(chip->saved_regs);
2090 if (chip->mpu_res) {
2091 release_resource(chip->mpu_res);
2092 kfree_nocheck(chip->mpu_res);
2095 release_resource(chip->fm_res);
2096 kfree_nocheck(chip->fm_res);
2098 #ifdef SUPPORT_JOYSTICK
2099 if (chip->joystick_res) {
2100 if (chip->gameport.io)
2101 gameport_unregister_port(&chip->gameport);
2102 release_resource(chip->joystick_res);
2103 kfree_nocheck(chip->joystick_res);
2106 if (chip->reg_area_virt)
2107 iounmap((void *)chip->reg_area_virt);
2108 if (chip->work_ptr.area)
2109 snd_dma_free_pages(&chip->dma_dev, &chip->work_ptr);
2112 free_irq(chip->irq, (void *)chip);
2113 if (chip->res_reg_area) {
2114 release_resource(chip->res_reg_area);
2115 kfree_nocheck(chip->res_reg_area);
2118 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2120 snd_magic_kfree(chip);
2124 static int snd_ymfpci_dev_free(snd_device_t *device)
2126 ymfpci_t *chip = snd_magic_cast(ymfpci_t, device->device_data, return -ENXIO);
2127 return snd_ymfpci_free(chip);
2131 static int saved_regs_index[] = {
2133 YDSXGR_SPDIFOUTCTRL,
2134 YDSXGR_SPDIFOUTSTATUS,
2137 YDSXGR_PRIADCLOOPVOL,
2138 YDSXGR_NATIVEDACINVOL,
2139 YDSXGR_NATIVEDACOUTVOL,
2140 // YDSXGR_BUF441OUTVOL,
2141 YDSXGR_NATIVEADCINVOL,
2142 YDSXGR_SPDIFLOOPVOL,
2145 YDSXGR_LEGACYOUTVOL,
2147 YDSXGR_PLAYCTRLBASE,
2151 /* capture set up */
2158 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2160 void snd_ymfpci_suspend(ymfpci_t *chip)
2162 snd_card_t *card = chip->card;
2165 if (card->power_state == SNDRV_CTL_POWER_D3hot)
2167 snd_pcm_suspend_all(chip->pcm);
2168 snd_pcm_suspend_all(chip->pcm2);
2169 snd_pcm_suspend_all(chip->pcm_spdif);
2170 snd_pcm_suspend_all(chip->pcm_4ch);
2171 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2172 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2173 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2174 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2175 snd_ymfpci_disable_dsp(chip);
2176 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2179 void snd_ymfpci_resume(ymfpci_t *chip)
2181 snd_card_t *card = chip->card;
2184 if (card->power_state == SNDRV_CTL_POWER_D0)
2187 pci_enable_device(chip->pci);
2188 pci_set_master(chip->pci);
2189 snd_ymfpci_aclink_reset(chip->pci);
2190 snd_ymfpci_codec_ready(chip, 0);
2191 snd_ymfpci_download_image(chip);
2194 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2195 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2197 snd_ac97_resume(chip->ac97);
2199 /* start hw again */
2200 if (chip->start_count > 0) {
2201 unsigned long flags;
2202 spin_lock_irqsave(&chip->reg_lock, flags);
2203 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2204 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2205 spin_unlock_irqrestore(&chip->reg_lock, flags);
2207 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2210 static int snd_ymfpci_set_power_state(snd_card_t *card, unsigned int power_state)
2212 ymfpci_t *chip = snd_magic_cast(ymfpci_t, card->power_state_private_data, return -ENXIO);
2214 switch (power_state) {
2215 case SNDRV_CTL_POWER_D0:
2216 case SNDRV_CTL_POWER_D1:
2217 case SNDRV_CTL_POWER_D2:
2218 snd_ymfpci_resume(chip);
2220 case SNDRV_CTL_POWER_D3hot:
2221 case SNDRV_CTL_POWER_D3cold:
2222 snd_ymfpci_suspend(chip);
2229 #endif /* CONFIG_PM */
2231 int __devinit snd_ymfpci_create(snd_card_t * card,
2232 struct pci_dev * pci,
2233 unsigned short old_legacy_ctrl,
2238 static snd_device_ops_t ops = {
2239 .dev_free = snd_ymfpci_dev_free,
2244 /* enable PCI device */
2245 if ((err = pci_enable_device(pci)) < 0)
2248 chip = snd_magic_kcalloc(ymfpci_t, 0, GFP_KERNEL);
2251 chip->old_legacy_ctrl = old_legacy_ctrl;
2252 spin_lock_init(&chip->reg_lock);
2253 spin_lock_init(&chip->voice_lock);
2254 init_waitqueue_head(&chip->interrupt_sleep);
2255 atomic_set(&chip->interrupt_sleep_count, 0);
2259 chip->device_id = pci->device;
2260 pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2261 chip->reg_area_phys = pci_resource_start(pci, 0);
2262 chip->reg_area_virt = (unsigned long)ioremap_nocache(chip->reg_area_phys, 0x8000);
2263 pci_set_master(pci);
2265 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2266 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2267 snd_ymfpci_free(chip);
2270 if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
2271 snd_printk("unable to grab IRQ %d\n", pci->irq);
2272 snd_ymfpci_free(chip);
2275 chip->irq = pci->irq;
2277 memset(&chip->dma_dev, 0, sizeof(chip->dma_dev));
2278 chip->dma_dev.type = SNDRV_DMA_TYPE_DEV;
2279 chip->dma_dev.dev = snd_dma_pci_data(pci);
2281 snd_ymfpci_aclink_reset(pci);
2282 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2283 snd_ymfpci_free(chip);
2287 snd_ymfpci_download_image(chip);
2289 udelay(100); /* seems we need a delay after downloading image.. */
2291 if (snd_ymfpci_memalloc(chip) < 0) {
2292 snd_ymfpci_free(chip);
2296 if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2297 snd_ymfpci_free(chip);
2302 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2303 if (chip->saved_regs == NULL) {
2304 snd_ymfpci_free(chip);
2307 card->set_power_state = snd_ymfpci_set_power_state;
2308 card->power_state_private_data = chip;
2311 snd_ymfpci_proc_init(card, chip);
2313 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2314 snd_ymfpci_free(chip);
2318 snd_card_set_dev(card, &pci->dev);