sound/pci/ymfpci/ymfpci_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   3  *  Routines for control of YMF724/740/744/754 chips
   4  *
   5  *  BUGS:
   6  *    --
   7  *
   8  *  TODO:
   9  *    --
  10  *
  11  *   This program is free software; you can redistribute it and/or modify
  12  *   it under the terms of the GNU General Public License as published by
  13  *   the Free Software Foundation; either version 2 of the License, or
  14  *   (at your option) any later version.
  15  *
  16  *   This program is distributed in the hope that it will be useful,
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *   GNU General Public License for more details.
  20  *
  21  *   You should have received a copy of the GNU General Public License
  22  *   along with this program; if not, write to the Free Software
  23  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  */
  26
  27 #include <sound/driver.h>
  28 #include <linux/delay.h>
  29 #include <linux/init.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/pci.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/vmalloc.h>
  35
  36 #include <sound/core.h>
  37 #include <sound/control.h>
  38 #include <sound/info.h>
  39 #include <sound/ymfpci.h>
  40 #include <sound/asoundef.h>
  41 #include <sound/mpu401.h>
  42
  43 #include <asm/io.h>
  44
  45 /*
  46  *  constants
  47  */
  48
  49 /*
  50  *  common I/O routines
  51  */
  52
  53 static void snd_ymfpci_irq_wait(ymfpci_t *chip);
  54
  55 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset)
  56 {
  57         return readb(chip->reg_area_virt + offset);
  58 }
  59
  60 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val)
  61 {
  62         writeb(val, chip->reg_area_virt + offset);
  63 }
  64
  65 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset)
  66 {
  67         return readw(chip->reg_area_virt + offset);
  68 }
  69
  70 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val)
  71 {
  72         writew(val, chip->reg_area_virt + offset);
  73 }
  74
  75 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset)
  76 {
  77         return readl(chip->reg_area_virt + offset);
  78 }
  79
  80 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val)
  81 {
  82         writel(val, chip->reg_area_virt + offset);
  83 }
  84
  85 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary)
  86 {
  87         signed long end_time;
  88         u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  89
  90         end_time = (jiffies + ((3 * HZ) / 4)) + 1;
  91         do {
  92                 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  93                         return 0;
  94                 set_current_state(TASK_UNINTERRUPTIBLE);
  95                 schedule_timeout(1);
  96         } while (end_time - (signed long)jiffies >= 0);
  97         snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  98         return -EBUSY;
  99 }
 100
 101 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val)
 102 {
 103         ymfpci_t *chip = ac97->private_data;
 104         u32 cmd;
 105
 106         snd_ymfpci_codec_ready(chip, 0);
 107         cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
 108         snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
 109 }
 110
 111 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg)
 112 {
 113         ymfpci_t *chip = ac97->private_data;
 114
 115         if (snd_ymfpci_codec_ready(chip, 0))
 116                 return ~0;
 117         snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
 118         if (snd_ymfpci_codec_ready(chip, 0))
 119                 return ~0;
 120         if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
 121                 int i;
 122                 for (i = 0; i < 600; i++)
 123                         snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
 124         }
 125         return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
 126 }
 127
 128 /*
 129  *  Misc routines
 130  */
 131
 132 static u32 snd_ymfpci_calc_delta(u32 rate)
 133 {
 134         switch (rate) {
 135         case 8000:      return 0x02aaab00;
 136         case 11025:     return 0x03accd00;
 137         case 16000:     return 0x05555500;
 138         case 22050:     return 0x07599a00;
 139         case 32000:     return 0x0aaaab00;
 140         case 44100:     return 0x0eb33300;
 141         default:        return ((rate << 16) / 375) << 5;
 142         }
 143 }
 144
 145 static u32 def_rate[8] = {
 146         100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
 147 };
 148
 149 static u32 snd_ymfpci_calc_lpfK(u32 rate)
 150 {
 151         u32 i;
 152         static u32 val[8] = {
 153                 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
 154                 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
 155         };
 156
 157         if (rate == 44100)
 158                 return 0x40000000;      /* FIXME: What's the right value? */
 159         for (i = 0; i < 8; i++)
 160                 if (rate <= def_rate[i])
 161                         return val[i];
 162         return val[0];
 163 }
 164
 165 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
 166 {
 167         u32 i;
 168         static u32 val[8] = {
 169                 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
 170                 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
 171         };
 172
 173         if (rate == 44100)
 174                 return 0x370A0000;
 175         for (i = 0; i < 8; i++)
 176                 if (rate <= def_rate[i])
 177                         return val[i];
 178         return val[0];
 179 }
 180
 181 /*
 182  *  Hardware start management
 183  */
 184
 185 static void snd_ymfpci_hw_start(ymfpci_t *chip)
 186 {
 187         unsigned long flags;
 188
 189         spin_lock_irqsave(&chip->reg_lock, flags);
 190         if (chip->start_count++ > 0)
 191                 goto __end;
 192         snd_ymfpci_writel(chip, YDSXGR_MODE,
 193                           snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
 194         chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
 195       __end:
 196         spin_unlock_irqrestore(&chip->reg_lock, flags);
 197 }
 198
 199 static void snd_ymfpci_hw_stop(ymfpci_t *chip)
 200 {
 201         unsigned long flags;
 202         long timeout = 1000;
 203
 204         spin_lock_irqsave(&chip->reg_lock, flags);
 205         if (--chip->start_count > 0)
 206                 goto __end;
 207         snd_ymfpci_writel(chip, YDSXGR_MODE,
 208                           snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
 209         while (timeout-- > 0) {
 210                 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
 211                         break;
 212         }
 213         if (atomic_read(&chip->interrupt_sleep_count)) {
 214                 atomic_set(&chip->interrupt_sleep_count, 0);
 215                 wake_up(&chip->interrupt_sleep);
 216         }
 217       __end:
 218         spin_unlock_irqrestore(&chip->reg_lock, flags);
 219 }
 220
 221 /*
 222  *  Playback voice management
 223  */
 224
 225 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
 226 {
 227         ymfpci_voice_t *voice, *voice2;
 228         int idx;
 229
 230         *rvoice = NULL;
 231         for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
 232                 voice = &chip->voices[idx];
 233                 voice2 = pair ? &chip->voices[idx+1] : NULL;
 234                 if (voice->use || (voice2 && voice2->use))
 235                         continue;
 236                 voice->use = 1;
 237                 if (voice2)
 238                         voice2->use = 1;
 239                 switch (type) {
 240                 case YMFPCI_PCM:
 241                         voice->pcm = 1;
 242                         if (voice2)
 243                                 voice2->pcm = 1;
 244                         break;
 245                 case YMFPCI_SYNTH:
 246                         voice->synth = 1;
 247                         break;
 248                 case YMFPCI_MIDI:
 249                         voice->midi = 1;
 250                         break;
 251                 }
 252                 snd_ymfpci_hw_start(chip);
 253                 if (voice2)
 254                         snd_ymfpci_hw_start(chip);
 255                 *rvoice = voice;
 256                 return 0;
 257         }
 258         return -ENOMEM;
 259 }
 260
 261 int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
 262 {
 263         unsigned long flags;
 264         int result;
 265
 266         snd_assert(rvoice != NULL, return -EINVAL);
 267         snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
 268
 269         spin_lock_irqsave(&chip->voice_lock, flags);
 270         for (;;) {
 271                 result = voice_alloc(chip, type, pair, rvoice);
 272                 if (result == 0 || type != YMFPCI_PCM)
 273                         break;
 274                 /* TODO: synth/midi voice deallocation */
 275                 break;
 276         }
 277         spin_unlock_irqrestore(&chip->voice_lock, flags);
 278         return result;
 279 }
 280
 281 int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice)
 282 {
 283         unsigned long flags;
 284
 285         snd_assert(pvoice != NULL, return -EINVAL);
 286         snd_ymfpci_hw_stop(chip);
 287         spin_lock_irqsave(&chip->voice_lock, flags);
 288         pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
 289         pvoice->ypcm = NULL;
 290         pvoice->interrupt = NULL;
 291         spin_unlock_irqrestore(&chip->voice_lock, flags);
 292         return 0;
 293 }
 294
 295 /*
 296  *  PCM part
 297  */
 298
 299 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice)
 300 {
 301         ymfpci_pcm_t *ypcm;
 302         u32 pos, delta;
 303
 304         if ((ypcm = voice->ypcm) == NULL)
 305                 return;
 306         if (ypcm->substream == NULL)
 307                 return;
 308         spin_lock(&chip->reg_lock);
 309         if (ypcm->running) {
 310                 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
 311                 if (pos < ypcm->last_pos)
 312                         delta = pos + (ypcm->buffer_size - ypcm->last_pos);
 313                 else
 314                         delta = pos - ypcm->last_pos;
 315                 ypcm->period_pos += delta;
 316                 ypcm->last_pos = pos;
 317                 if (ypcm->period_pos >= ypcm->period_size) {
 318                         // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
 319                         ypcm->period_pos %= ypcm->period_size;
 320                         spin_unlock(&chip->reg_lock);
 321                         snd_pcm_period_elapsed(ypcm->substream);
 322                         spin_lock(&chip->reg_lock);
 323                 }
 324         }
 325         spin_unlock(&chip->reg_lock);
 326 }
 327
 328 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream)
 329 {
 330         snd_pcm_runtime_t *runtime = substream->runtime;
 331         ymfpci_pcm_t *ypcm = runtime->private_data;
 332         ymfpci_t *chip = ypcm->chip;
 333         u32 pos, delta;
 334
 335         spin_lock(&chip->reg_lock);
 336         if (ypcm->running) {
 337                 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
 338                 if (pos < ypcm->last_pos)
 339                         delta = pos + (ypcm->buffer_size - ypcm->last_pos);
 340                 else
 341                         delta = pos - ypcm->last_pos;
 342                 ypcm->period_pos += delta;
 343                 ypcm->last_pos = pos;
 344                 if (ypcm->period_pos >= ypcm->period_size) {
 345                         ypcm->period_pos %= ypcm->period_size;
 346                         // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
 347                         spin_unlock(&chip->reg_lock);
 348                         snd_pcm_period_elapsed(substream);
 349                         spin_lock(&chip->reg_lock);
 350                 }
 351         }
 352         spin_unlock(&chip->reg_lock);
 353 }
 354
 355 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream,
 356                                        int cmd)
 357 {
 358         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 359         ymfpci_pcm_t *ypcm = substream->runtime->private_data;
 360         int result = 0;
 361
 362         spin_lock(&chip->reg_lock);
 363         if (ypcm->voices[0] == NULL) {
 364                 result = -EINVAL;
 365                 goto __unlock;
 366         }
 367         switch (cmd) {
 368         case SNDRV_PCM_TRIGGER_START:
 369         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 370         case SNDRV_PCM_TRIGGER_RESUME:
 371                 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
 372                 if (ypcm->voices[1] != NULL)
 373                         chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
 374                 ypcm->running = 1;
 375                 break;
 376         case SNDRV_PCM_TRIGGER_STOP:
 377         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 378         case SNDRV_PCM_TRIGGER_SUSPEND:
 379                 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
 380                 if (ypcm->voices[1] != NULL)
 381                         chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
 382                 ypcm->running = 0;
 383                 break;
 384         default:
 385                 result = -EINVAL;
 386                 break;
 387         }
 388       __unlock:
 389         spin_unlock(&chip->reg_lock);
 390         return result;
 391 }
 392 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream,
 393                                       int cmd)
 394 {
 395         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 396         ymfpci_pcm_t *ypcm = substream->runtime->private_data;
 397         int result = 0;
 398         u32 tmp;
 399
 400         spin_lock(&chip->reg_lock);
 401         switch (cmd) {
 402         case SNDRV_PCM_TRIGGER_START:
 403         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 404         case SNDRV_PCM_TRIGGER_RESUME:
 405                 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
 406                 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
 407                 ypcm->running = 1;
 408                 break;
 409         case SNDRV_PCM_TRIGGER_STOP:
 410         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 411         case SNDRV_PCM_TRIGGER_SUSPEND:
 412                 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
 413                 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
 414                 ypcm->running = 0;
 415                 break;
 416         default:
 417                 result = -EINVAL;
 418                 break;
 419         }
 420         spin_unlock(&chip->reg_lock);
 421         return result;
 422 }
 423
 424 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices)
 425 {
 426         int err;
 427
 428         if (ypcm->voices[1] != NULL && voices < 2) {
 429                 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
 430                 ypcm->voices[1] = NULL;
 431         }
 432         if (voices == 1 && ypcm->voices[0] != NULL)
 433                 return 0;               /* already allocated */
 434         if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
 435                 return 0;               /* already allocated */
 436         if (voices > 1) {
 437                 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
 438                         snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
 439                         ypcm->voices[0] = NULL;
 440                 }
 441         }
 442         err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
 443         if (err < 0)
 444                 return err;
 445         ypcm->voices[0]->ypcm = ypcm;
 446         ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
 447         if (voices > 1) {
 448                 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
 449                 ypcm->voices[1]->ypcm = ypcm;
 450         }
 451         return 0;
 452 }
 453
 454 static void snd_ymfpci_pcm_init_voice(ymfpci_voice_t *voice, int stereo,
 455                                       int rate, int w_16, unsigned long addr,
 456                                       unsigned int end,
 457                                       int output_front, int output_rear)
 458 {
 459         u32 format;
 460         u32 delta = snd_ymfpci_calc_delta(rate);
 461         u32 lpfQ = snd_ymfpci_calc_lpfQ(rate);
 462         u32 lpfK = snd_ymfpci_calc_lpfK(rate);
 463         snd_ymfpci_playback_bank_t *bank;
 464         unsigned int nbank;
 465
 466         snd_assert(voice != NULL, return);
 467         format = (stereo ? 0x00010000 : 0) | (w_16 ? 0 : 0x80000000);
 468         for (nbank = 0; nbank < 2; nbank++) {
 469                 bank = &voice->bank[nbank];
 470                 bank->format = cpu_to_le32(format);
 471                 bank->loop_default = 0;
 472                 bank->base = cpu_to_le32(addr);
 473                 bank->loop_start = 0;
 474                 bank->loop_end = cpu_to_le32(end);
 475                 bank->loop_frac = 0;
 476                 bank->eg_gain_end = cpu_to_le32(0x40000000);
 477                 bank->lpfQ = cpu_to_le32(lpfQ);
 478                 bank->status = 0;
 479                 bank->num_of_frames = 0;
 480                 bank->loop_count = 0;
 481                 bank->start = 0;
 482                 bank->start_frac = 0;
 483                 bank->delta =
 484                 bank->delta_end = cpu_to_le32(delta);
 485                 bank->lpfK =
 486                 bank->lpfK_end = cpu_to_le32(lpfK);
 487                 bank->eg_gain = cpu_to_le32(0x40000000);
 488                 bank->lpfD1 =
 489                 bank->lpfD2 = 0;
 490
 491                 bank->left_gain =
 492                 bank->right_gain =
 493                 bank->left_gain_end =
 494                 bank->right_gain_end =
 495                 bank->eff1_gain =
 496                 bank->eff2_gain =
 497                 bank->eff3_gain =
 498                 bank->eff1_gain_end =
 499                 bank->eff2_gain_end =
 500                 bank->eff3_gain_end = 0;
 501
 502                 if (!stereo) {
 503                         if (output_front) {
 504                                 bank->left_gain =
 505                                 bank->right_gain =
 506                                 bank->left_gain_end =
 507                                 bank->right_gain_end = cpu_to_le32(0x40000000);
 508                         }
 509                         if (output_rear) {
 510                                 bank->eff2_gain =
 511                                 bank->eff2_gain_end =
 512                                 bank->eff3_gain =
 513                                 bank->eff3_gain_end = cpu_to_le32(0x40000000);
 514                         }
 515                 } else {
 516                         if (output_front) {
 517                                 if ((voice->number & 1) == 0) {
 518                                         bank->left_gain =
 519                                         bank->left_gain_end = cpu_to_le32(0x40000000);
 520                                 } else {
 521                                         bank->format |= cpu_to_le32(1);
 522                                         bank->right_gain =
 523                                         bank->right_gain_end = cpu_to_le32(0x40000000);
 524                                 }
 525                         }
 526                         if (output_rear) {
 527                                 if ((voice->number & 1) == 0) {
 528                                         bank->eff3_gain =
 529                                         bank->eff3_gain_end = cpu_to_le32(0x40000000);
 530                                 } else {
 531                                         bank->format |= cpu_to_le32(1);
 532                                         bank->eff2_gain =
 533                                         bank->eff2_gain_end = cpu_to_le32(0x40000000);
 534                                 }
 535                         }
 536                 }
 537         }
 538 }
 539
 540 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip)
 541 {
 542         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
 543                                 4096, &chip->ac3_tmp_base) < 0)
 544                 return -ENOMEM;
 545
 546         chip->bank_effect[3][0]->base =
 547         chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
 548         chip->bank_effect[3][0]->loop_end =
 549         chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
 550         chip->bank_effect[4][0]->base =
 551         chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
 552         chip->bank_effect[4][0]->loop_end =
 553         chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
 554
 555         spin_lock_irq(&chip->reg_lock);
 556         snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
 557                           snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
 558         spin_unlock_irq(&chip->reg_lock);
 559         return 0;
 560 }
 561
 562 static int snd_ymfpci_ac3_done(ymfpci_t *chip)
 563 {
 564         spin_lock_irq(&chip->reg_lock);
 565         snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
 566                           snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
 567         spin_unlock_irq(&chip->reg_lock);
 568         // snd_ymfpci_irq_wait(chip);
 569         if (chip->ac3_tmp_base.area) {
 570                 snd_dma_free_pages(&chip->ac3_tmp_base);
 571                 chip->ac3_tmp_base.area = NULL;
 572         }
 573         return 0;
 574 }
 575
 576 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream,
 577                                          snd_pcm_hw_params_t * hw_params)
 578 {
 579         snd_pcm_runtime_t *runtime = substream->runtime;
 580         ymfpci_pcm_t *ypcm = runtime->private_data;
 581         int err;
 582
 583         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
 584                 return err;
 585         if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
 586                 return err;
 587         return 0;
 588 }
 589
 590 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream)
 591 {
 592         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 593         snd_pcm_runtime_t *runtime = substream->runtime;
 594         ymfpci_pcm_t *ypcm;
 595
 596         if (runtime->private_data == NULL)
 597                 return 0;
 598         ypcm = runtime->private_data;
 599
 600         /* wait, until the PCI operations are not finished */
 601         snd_ymfpci_irq_wait(chip);
 602         snd_pcm_lib_free_pages(substream);
 603         if (ypcm->voices[1]) {
 604                 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
 605                 ypcm->voices[1] = NULL;
 606         }
 607         if (ypcm->voices[0]) {
 608                 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
 609                 ypcm->voices[0] = NULL;
 610         }
 611         return 0;
 612 }
 613
 614 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream)
 615 {
 616         // ymfpci_t *chip = snd_pcm_substream_chip(substream);
 617         snd_pcm_runtime_t *runtime = substream->runtime;
 618         ymfpci_pcm_t *ypcm = runtime->private_data;
 619         unsigned int nvoice;
 620
 621         ypcm->period_size = runtime->period_size;
 622         ypcm->buffer_size = runtime->buffer_size;
 623         ypcm->period_pos = 0;
 624         ypcm->last_pos = 0;
 625         for (nvoice = 0; nvoice < runtime->channels; nvoice++)
 626                 snd_ymfpci_pcm_init_voice(ypcm->voices[nvoice],
 627                                           runtime->channels == 2,
 628                                           runtime->rate,
 629                                           snd_pcm_format_width(runtime->format) == 16,
 630                                           runtime->dma_addr,
 631                                           ypcm->buffer_size,
 632                                           ypcm->output_front,
 633                                           ypcm->output_rear);
 634         return 0;
 635 }
 636
 637 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream,
 638                                         snd_pcm_hw_params_t * hw_params)
 639 {
 640         return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 641 }
 642
 643 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream)
 644 {
 645         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 646
 647         /* wait, until the PCI operations are not finished */
 648         snd_ymfpci_irq_wait(chip);
 649         return snd_pcm_lib_free_pages(substream);
 650 }
 651
 652 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream)
 653 {
 654         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 655         snd_pcm_runtime_t *runtime = substream->runtime;
 656         ymfpci_pcm_t *ypcm = runtime->private_data;
 657         snd_ymfpci_capture_bank_t * bank;
 658         int nbank;
 659         u32 rate, format;
 660
 661         ypcm->period_size = runtime->period_size;
 662         ypcm->buffer_size = runtime->buffer_size;
 663         ypcm->period_pos = 0;
 664         ypcm->last_pos = 0;
 665         ypcm->shift = 0;
 666         rate = ((48000 * 4096) / runtime->rate) - 1;
 667         format = 0;
 668         if (runtime->channels == 2) {
 669                 format |= 2;
 670                 ypcm->shift++;
 671         }
 672         if (snd_pcm_format_width(runtime->format) == 8)
 673                 format |= 1;
 674         else
 675                 ypcm->shift++;
 676         switch (ypcm->capture_bank_number) {
 677         case 0:
 678                 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
 679                 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
 680                 break;
 681         case 1:
 682                 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
 683                 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
 684                 break;
 685         }
 686         for (nbank = 0; nbank < 2; nbank++) {
 687                 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
 688                 bank->base = cpu_to_le32(runtime->dma_addr);
 689                 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
 690                 bank->start = 0;
 691                 bank->num_of_loops = 0;
 692         }
 693         return 0;
 694 }
 695
 696 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream)
 697 {
 698         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 699         snd_pcm_runtime_t *runtime = substream->runtime;
 700         ymfpci_pcm_t *ypcm = runtime->private_data;
 701         ymfpci_voice_t *voice = ypcm->voices[0];
 702
 703         if (!(ypcm->running && voice))
 704                 return 0;
 705         return le32_to_cpu(voice->bank[chip->active_bank].start);
 706 }
 707
 708 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream)
 709 {
 710         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 711         snd_pcm_runtime_t *runtime = substream->runtime;
 712         ymfpci_pcm_t *ypcm = runtime->private_data;
 713
 714         if (!ypcm->running)
 715                 return 0;
 716         return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
 717 }
 718
 719 static void snd_ymfpci_irq_wait(ymfpci_t *chip)
 720 {
 721         wait_queue_t wait;
 722         int loops = 4;
 723
 724         while (loops-- > 0) {
 725                 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
 726                         continue;
 727                 init_waitqueue_entry(&wait, current);
 728                 add_wait_queue(&chip->interrupt_sleep, &wait);
 729                 atomic_inc(&chip->interrupt_sleep_count);
 730                 set_current_state(TASK_UNINTERRUPTIBLE);
 731                 schedule_timeout(HZ/20);
 732                 remove_wait_queue(&chip->interrupt_sleep, &wait);
 733         }
 734 }
 735
 736 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 737 {
 738         ymfpci_t *chip = dev_id;
 739         u32 status, nvoice, mode;
 740         ymfpci_voice_t *voice;
 741
 742         status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
 743         if (status & 0x80000000) {
 744                 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
 745                 spin_lock(&chip->voice_lock);
 746                 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
 747                         voice = &chip->voices[nvoice];
 748                         if (voice->interrupt)
 749                                 voice->interrupt(chip, voice);
 750                 }
 751                 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
 752                         if (chip->capture_substream[nvoice])
 753                                 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
 754                 }
 755 #if 0
 756                 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
 757                         if (chip->effect_substream[nvoice])
 758                                 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
 759                 }
 760 #endif
 761                 spin_unlock(&chip->voice_lock);
 762                 spin_lock(&chip->reg_lock);
 763                 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
 764                 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
 765                 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
 766                 spin_unlock(&chip->reg_lock);
 767
 768                 if (atomic_read(&chip->interrupt_sleep_count)) {
 769                         atomic_set(&chip->interrupt_sleep_count, 0);
 770                         wake_up(&chip->interrupt_sleep);
 771                 }
 772         }
 773
 774         status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
 775         if (status & 1) {
 776                 if (chip->timer)
 777                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
 778         }
 779         snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
 780
 781         if (chip->rawmidi)
 782                 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
 783         return IRQ_HANDLED;
 784 }
 785
 786 static snd_pcm_hardware_t snd_ymfpci_playback =
 787 {
 788         .info =                 (SNDRV_PCM_INFO_MMAP |
 789                                  SNDRV_PCM_INFO_MMAP_VALID |
 790                                  SNDRV_PCM_INFO_INTERLEAVED |
 791                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 792                                  SNDRV_PCM_INFO_PAUSE |
 793                                  SNDRV_PCM_INFO_RESUME),
 794         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 795         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
 796         .rate_min =             8000,
 797         .rate_max =             48000,
 798         .channels_min =         1,
 799         .channels_max =         2,
 800         .buffer_bytes_max =     256 * 1024, /* FIXME: enough? */
 801         .period_bytes_min =     64,
 802         .period_bytes_max =     256 * 1024, /* FIXME: enough? */
 803         .periods_min =          3,
 804         .periods_max =          1024,
 805         .fifo_size =            0,
 806 };
 807
 808 static snd_pcm_hardware_t snd_ymfpci_capture =
 809 {
 810         .info =                 (SNDRV_PCM_INFO_MMAP |
 811                                  SNDRV_PCM_INFO_MMAP_VALID |
 812                                  SNDRV_PCM_INFO_INTERLEAVED |
 813                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 814                                  SNDRV_PCM_INFO_PAUSE |
 815                                  SNDRV_PCM_INFO_RESUME),
 816         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 817         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
 818         .rate_min =             8000,
 819         .rate_max =             48000,
 820         .channels_min =         1,
 821         .channels_max =         2,
 822         .buffer_bytes_max =     256 * 1024, /* FIXME: enough? */
 823         .period_bytes_min =     64,
 824         .period_bytes_max =     256 * 1024, /* FIXME: enough? */
 825         .periods_min =          3,
 826         .periods_max =          1024,
 827         .fifo_size =            0,
 828 };
 829
 830 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime)
 831 {
 832         ymfpci_pcm_t *ypcm = runtime->private_data;
 833
 834         if (ypcm)
 835                 kfree(ypcm);
 836 }
 837
 838 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream)
 839 {
 840         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 841         snd_pcm_runtime_t *runtime = substream->runtime;
 842         ymfpci_pcm_t *ypcm;
 843
 844         ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL);
 845         if (ypcm == NULL)
 846                 return -ENOMEM;
 847         ypcm->chip = chip;
 848         ypcm->type = PLAYBACK_VOICE;
 849         ypcm->substream = substream;
 850         runtime->hw = snd_ymfpci_playback;
 851         runtime->private_data = ypcm;
 852         runtime->private_free = snd_ymfpci_pcm_free_substream;
 853         /* FIXME? True value is 256/48 = 5.33333 ms */
 854         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
 855         return 0;
 856 }
 857
 858 /* call with spinlock held */
 859 static void ymfpci_open_extension(ymfpci_t *chip)
 860 {
 861         if (! chip->rear_opened) {
 862                 if (! chip->spdif_opened) /* set AC3 */
 863                         snd_ymfpci_writel(chip, YDSXGR_MODE,
 864                                           snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
 865                 /* enable second codec (4CHEN) */
 866                 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
 867                                   (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
 868         }
 869 }
 870
 871 /* call with spinlock held */
 872 static void ymfpci_close_extension(ymfpci_t *chip)
 873 {
 874         if (! chip->rear_opened) {
 875                 if (! chip->spdif_opened)
 876                         snd_ymfpci_writel(chip, YDSXGR_MODE,
 877                                           snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
 878                 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
 879                                   (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
 880         }
 881 }
 882
 883 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream)
 884 {
 885         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 886         snd_pcm_runtime_t *runtime = substream->runtime;
 887         ymfpci_pcm_t *ypcm;
 888         int err;
 889
 890         if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
 891                 return err;
 892         ypcm = runtime->private_data;
 893         ypcm->output_front = 1;
 894         ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
 895         spin_lock_irq(&chip->reg_lock);
 896         if (ypcm->output_rear) {
 897                 ymfpci_open_extension(chip);
 898                 chip->rear_opened++;
 899         }
 900         spin_unlock_irq(&chip->reg_lock);
 901         return 0;
 902 }
 903
 904 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream)
 905 {
 906         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 907         snd_pcm_runtime_t *runtime = substream->runtime;
 908         ymfpci_pcm_t *ypcm;
 909         int err;
 910
 911         if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
 912                 return err;
 913         ypcm = runtime->private_data;
 914         ypcm->output_front = 0;
 915         ypcm->output_rear = 1;
 916         spin_lock_irq(&chip->reg_lock);
 917         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
 918                           snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
 919         ymfpci_open_extension(chip);
 920         chip->spdif_pcm_bits = chip->spdif_bits;
 921         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
 922         chip->spdif_opened++;
 923         spin_unlock_irq(&chip->reg_lock);
 924
 925         chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 926         snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 927                        SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
 928         return 0;
 929 }
 930
 931 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream)
 932 {
 933         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 934         snd_pcm_runtime_t *runtime = substream->runtime;
 935         ymfpci_pcm_t *ypcm;
 936         int err;
 937
 938         if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
 939                 return err;
 940         ypcm = runtime->private_data;
 941         ypcm->output_front = 0;
 942         ypcm->output_rear = 1;
 943         spin_lock_irq(&chip->reg_lock);
 944         ymfpci_open_extension(chip);
 945         chip->rear_opened++;
 946         spin_unlock_irq(&chip->reg_lock);
 947         return 0;
 948 }
 949
 950 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream,
 951                                    u32 capture_bank_number)
 952 {
 953         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 954         snd_pcm_runtime_t *runtime = substream->runtime;
 955         ymfpci_pcm_t *ypcm;
 956
 957         ypcm = kcalloc(1, sizeof(*ypcm), GFP_KERNEL);
 958         if (ypcm == NULL)
 959                 return -ENOMEM;
 960         ypcm->chip = chip;
 961         ypcm->type = capture_bank_number + CAPTURE_REC;
 962         ypcm->substream = substream;
 963         ypcm->capture_bank_number = capture_bank_number;
 964         chip->capture_substream[capture_bank_number] = substream;
 965         runtime->hw = snd_ymfpci_capture;
 966         /* FIXME? True value is 256/48 = 5.33333 ms */
 967         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
 968         runtime->private_data = ypcm;
 969         runtime->private_free = snd_ymfpci_pcm_free_substream;
 970         snd_ymfpci_hw_start(chip);
 971         return 0;
 972 }
 973
 974 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream)
 975 {
 976         return snd_ymfpci_capture_open(substream, 0);
 977 }
 978
 979 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream)
 980 {
 981         return snd_ymfpci_capture_open(substream, 1);
 982 }
 983
 984 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream)
 985 {
 986         return 0;
 987 }
 988
 989 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream)
 990 {
 991         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 992         ymfpci_pcm_t *ypcm = substream->runtime->private_data;
 993
 994         spin_lock_irq(&chip->reg_lock);
 995         if (ypcm->output_rear && chip->rear_opened > 0) {
 996                 chip->rear_opened--;
 997                 ymfpci_close_extension(chip);
 998         }
 999         spin_unlock_irq(&chip->reg_lock);
1000         return snd_ymfpci_playback_close_1(substream);
1001 }
1002
1003 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream)
1004 {
1005         ymfpci_t *chip = snd_pcm_substream_chip(substream);
1006
1007         spin_lock_irq(&chip->reg_lock);
1008         chip->spdif_opened = 0;
1009         ymfpci_close_extension(chip);
1010         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1011                           snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1012         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1013         spin_unlock_irq(&chip->reg_lock);
1014         chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1015         snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1016                        SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1017         return snd_ymfpci_playback_close_1(substream);
1018 }
1019
1020 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream)
1021 {
1022         ymfpci_t *chip = snd_pcm_substream_chip(substream);
1023
1024         spin_lock_irq(&chip->reg_lock);
1025         if (chip->rear_opened > 0) {
1026                 chip->rear_opened--;
1027                 ymfpci_close_extension(chip);
1028         }
1029         spin_unlock_irq(&chip->reg_lock);
1030         return snd_ymfpci_playback_close_1(substream);
1031 }
1032
1033 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream)
1034 {
1035         ymfpci_t *chip = snd_pcm_substream_chip(substream);
1036         snd_pcm_runtime_t *runtime = substream->runtime;
1037         ymfpci_pcm_t *ypcm = runtime->private_data;
1038
1039         if (ypcm != NULL) {
1040                 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1041                 snd_ymfpci_hw_stop(chip);
1042         }
1043         return 0;
1044 }
1045
1046 static snd_pcm_ops_t snd_ymfpci_playback_ops = {
1047         .open =                 snd_ymfpci_playback_open,
1048         .close =                snd_ymfpci_playback_close,
1049         .ioctl =                snd_pcm_lib_ioctl,
1050         .hw_params =            snd_ymfpci_playback_hw_params,
1051         .hw_free =              snd_ymfpci_playback_hw_free,
1052         .prepare =              snd_ymfpci_playback_prepare,
1053         .trigger =              snd_ymfpci_playback_trigger,
1054         .pointer =              snd_ymfpci_playback_pointer,
1055 };
1056
1057 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = {
1058         .open =                 snd_ymfpci_capture_rec_open,
1059         .close =                snd_ymfpci_capture_close,
1060         .ioctl =                snd_pcm_lib_ioctl,
1061         .hw_params =            snd_ymfpci_capture_hw_params,
1062         .hw_free =              snd_ymfpci_capture_hw_free,
1063         .prepare =              snd_ymfpci_capture_prepare,
1064         .trigger =              snd_ymfpci_capture_trigger,
1065         .pointer =              snd_ymfpci_capture_pointer,
1066 };
1067
1068 static void snd_ymfpci_pcm_free(snd_pcm_t *pcm)
1069 {
1070         ymfpci_t *chip = pcm->private_data;
1071         chip->pcm = NULL;
1072         snd_pcm_lib_preallocate_free_for_all(pcm);
1073 }
1074
1075 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1076 {
1077         snd_pcm_t *pcm;
1078         int err;
1079
1080         if (rpcm)
1081                 *rpcm = NULL;
1082         if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1083                 return err;
1084         pcm->private_data = chip;
1085         pcm->private_free = snd_ymfpci_pcm_free;
1086
1087         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1088         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1089
1090         /* global setup */
1091         pcm->info_flags = 0;
1092         strcpy(pcm->name, "YMFPCI");
1093         chip->pcm = pcm;
1094
1095         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1096                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1097
1098         if (rpcm)
1099                 *rpcm = pcm;
1100         return 0;
1101 }
1102
1103 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = {
1104         .open =                 snd_ymfpci_capture_ac97_open,
1105         .close =                snd_ymfpci_capture_close,
1106         .ioctl =                snd_pcm_lib_ioctl,
1107         .hw_params =            snd_ymfpci_capture_hw_params,
1108         .hw_free =              snd_ymfpci_capture_hw_free,
1109         .prepare =              snd_ymfpci_capture_prepare,
1110         .trigger =              snd_ymfpci_capture_trigger,
1111         .pointer =              snd_ymfpci_capture_pointer,
1112 };
1113
1114 static void snd_ymfpci_pcm2_free(snd_pcm_t *pcm)
1115 {
1116         ymfpci_t *chip = pcm->private_data;
1117         chip->pcm2 = NULL;
1118         snd_pcm_lib_preallocate_free_for_all(pcm);
1119 }
1120
1121 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1122 {
1123         snd_pcm_t *pcm;
1124         int err;
1125
1126         if (rpcm)
1127                 *rpcm = NULL;
1128         if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1129                 return err;
1130         pcm->private_data = chip;
1131         pcm->private_free = snd_ymfpci_pcm2_free;
1132
1133         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1134
1135         /* global setup */
1136         pcm->info_flags = 0;
1137         sprintf(pcm->name, "YMFPCI - %s",
1138                 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1139         chip->pcm2 = pcm;
1140
1141         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1142                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1143
1144         if (rpcm)
1145                 *rpcm = pcm;
1146         return 0;
1147 }
1148
1149 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = {
1150         .open =                 snd_ymfpci_playback_spdif_open,
1151         .close =                snd_ymfpci_playback_spdif_close,
1152         .ioctl =                snd_pcm_lib_ioctl,
1153         .hw_params =            snd_ymfpci_playback_hw_params,
1154         .hw_free =              snd_ymfpci_playback_hw_free,
1155         .prepare =              snd_ymfpci_playback_prepare,
1156         .trigger =              snd_ymfpci_playback_trigger,
1157         .pointer =              snd_ymfpci_playback_pointer,
1158 };
1159
1160 static void snd_ymfpci_pcm_spdif_free(snd_pcm_t *pcm)
1161 {
1162         ymfpci_t *chip = pcm->private_data;
1163         chip->pcm_spdif = NULL;
1164         snd_pcm_lib_preallocate_free_for_all(pcm);
1165 }
1166
1167 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1168 {
1169         snd_pcm_t *pcm;
1170         int err;
1171
1172         if (rpcm)
1173                 *rpcm = NULL;
1174         if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1175                 return err;
1176         pcm->private_data = chip;
1177         pcm->private_free = snd_ymfpci_pcm_spdif_free;
1178
1179         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1180
1181         /* global setup */
1182         pcm->info_flags = 0;
1183         strcpy(pcm->name, "YMFPCI - IEC958");
1184         chip->pcm_spdif = pcm;
1185
1186         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1187                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1188
1189         if (rpcm)
1190                 *rpcm = pcm;
1191         return 0;
1192 }
1193
1194 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = {
1195         .open =                 snd_ymfpci_playback_4ch_open,
1196         .close =                snd_ymfpci_playback_4ch_close,
1197         .ioctl =                snd_pcm_lib_ioctl,
1198         .hw_params =            snd_ymfpci_playback_hw_params,
1199         .hw_free =              snd_ymfpci_playback_hw_free,
1200         .prepare =              snd_ymfpci_playback_prepare,
1201         .trigger =              snd_ymfpci_playback_trigger,
1202         .pointer =              snd_ymfpci_playback_pointer,
1203 };
1204
1205 static void snd_ymfpci_pcm_4ch_free(snd_pcm_t *pcm)
1206 {
1207         ymfpci_t *chip = pcm->private_data;
1208         chip->pcm_4ch = NULL;
1209         snd_pcm_lib_preallocate_free_for_all(pcm);
1210 }
1211
1212 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1213 {
1214         snd_pcm_t *pcm;
1215         int err;
1216
1217         if (rpcm)
1218                 *rpcm = NULL;
1219         if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1220                 return err;
1221         pcm->private_data = chip;
1222         pcm->private_free = snd_ymfpci_pcm_4ch_free;
1223
1224         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1225
1226         /* global setup */
1227         pcm->info_flags = 0;
1228         strcpy(pcm->name, "YMFPCI - Rear PCM");
1229         chip->pcm_4ch = pcm;
1230
1231         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1232                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1233
1234         if (rpcm)
1235                 *rpcm = pcm;
1236         return 0;
1237 }
1238
1239 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1240 {
1241         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1242         uinfo->count = 1;
1243         return 0;
1244 }
1245
1246 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol,
1247                                         snd_ctl_elem_value_t * ucontrol)
1248 {
1249         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1250
1251         spin_lock_irq(&chip->reg_lock);
1252         ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1253         ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1254         spin_unlock_irq(&chip->reg_lock);
1255         return 0;
1256 }
1257
1258 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol,
1259                                          snd_ctl_elem_value_t * ucontrol)
1260 {
1261         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1262         unsigned int val;
1263         int change;
1264
1265         val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1266               (ucontrol->value.iec958.status[1] << 8);
1267         spin_lock_irq(&chip->reg_lock);
1268         change = chip->spdif_bits != val;
1269         chip->spdif_bits = val;
1270         if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1271                 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1272         spin_unlock_irq(&chip->reg_lock);
1273         return change;
1274 }
1275
1276 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata =
1277 {
1278         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1279         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1280         .info =         snd_ymfpci_spdif_default_info,
1281         .get =          snd_ymfpci_spdif_default_get,
1282         .put =          snd_ymfpci_spdif_default_put
1283 };
1284
1285 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1286 {
1287         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1288         uinfo->count = 1;
1289         return 0;
1290 }
1291
1292 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol,
1293                                       snd_ctl_elem_value_t * ucontrol)
1294 {
1295         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1296
1297         spin_lock_irq(&chip->reg_lock);
1298         ucontrol->value.iec958.status[0] = 0x3e;
1299         ucontrol->value.iec958.status[1] = 0xff;
1300         spin_unlock_irq(&chip->reg_lock);
1301         return 0;
1302 }
1303
1304 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata =
1305 {
1306         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1307         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1308         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1309         .info =         snd_ymfpci_spdif_mask_info,
1310         .get =          snd_ymfpci_spdif_mask_get,
1311 };
1312
1313 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1314 {
1315         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1316         uinfo->count = 1;
1317         return 0;
1318 }
1319
1320 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol,
1321                                         snd_ctl_elem_value_t * ucontrol)
1322 {
1323         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1324
1325         spin_lock_irq(&chip->reg_lock);
1326         ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1327         ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1328         spin_unlock_irq(&chip->reg_lock);
1329         return 0;
1330 }
1331
1332 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol,
1333                                         snd_ctl_elem_value_t * ucontrol)
1334 {
1335         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1336         unsigned int val;
1337         int change;
1338
1339         val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1340               (ucontrol->value.iec958.status[1] << 8);
1341         spin_lock_irq(&chip->reg_lock);
1342         change = chip->spdif_pcm_bits != val;
1343         chip->spdif_pcm_bits = val;
1344         if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1345                 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1346         spin_unlock_irq(&chip->reg_lock);
1347         return change;
1348 }
1349
1350 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata =
1351 {
1352         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1353         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1354         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1355         .info =         snd_ymfpci_spdif_stream_info,
1356         .get =          snd_ymfpci_spdif_stream_get,
1357         .put =          snd_ymfpci_spdif_stream_put
1358 };
1359
1360 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
1361 {
1362         static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1363
1364         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1365         info->count = 1;
1366         info->value.enumerated.items = 3;
1367         if (info->value.enumerated.item > 2)
1368                 info->value.enumerated.item = 2;
1369         strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1370         return 0;
1371 }
1372
1373 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1374 {
1375         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1376         u16 reg;
1377
1378         spin_lock_irq(&chip->reg_lock);
1379         reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1380         spin_unlock_irq(&chip->reg_lock);
1381         if (!(reg & 0x100))
1382                 value->value.enumerated.item[0] = 0;
1383         else
1384                 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1385         return 0;
1386 }
1387
1388 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1389 {
1390         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1391         u16 reg, old_reg;
1392
1393         spin_lock_irq(&chip->reg_lock);
1394         old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1395         if (value->value.enumerated.item[0] == 0)
1396                 reg = old_reg & ~0x100;
1397         else
1398                 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1399         snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1400         spin_unlock_irq(&chip->reg_lock);
1401         return reg != old_reg;
1402 }
1403
1404 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = {
1405         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE,
1406         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1407         .name =         "Direct Recording Source",
1408         .info =         snd_ymfpci_drec_source_info,
1409         .get =          snd_ymfpci_drec_source_get,
1410         .put =          snd_ymfpci_drec_source_put
1411 };
1412
1413 /*
1414  *  Mixer controls
1415  */
1416
1417 #define YMFPCI_SINGLE(xname, xindex, reg) \
1418 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1419   .info = snd_ymfpci_info_single, \
1420   .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1421   .private_value = reg }
1422
1423 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1424 {
1425         unsigned int mask = 1;
1426
1427         switch (kcontrol->private_value) {
1428         case YDSXGR_SPDIFOUTCTRL: break;
1429         case YDSXGR_SPDIFINCTRL: break;
1430         default: return -EINVAL;
1431         }
1432         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1433         uinfo->count = 1;
1434         uinfo->value.integer.min = 0;
1435         uinfo->value.integer.max = mask;
1436         return 0;
1437 }
1438
1439 static int snd_ymfpci_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1440 {
1441         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1442         int reg = kcontrol->private_value;
1443         unsigned int shift = 0, mask = 1, invert = 0;
1444
1445         switch (kcontrol->private_value) {
1446         case YDSXGR_SPDIFOUTCTRL: break;
1447         case YDSXGR_SPDIFINCTRL: break;
1448         default: return -EINVAL;
1449         }
1450         ucontrol->value.integer.value[0] = (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1451         if (invert)
1452                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1453         return 0;
1454 }
1455
1456 static int snd_ymfpci_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1457 {
1458         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1459         int reg = kcontrol->private_value;
1460         unsigned int shift = 0, mask = 1, invert = 0;
1461         int change;
1462         unsigned int val, oval;
1463
1464         switch (kcontrol->private_value) {
1465         case YDSXGR_SPDIFOUTCTRL: break;
1466         case YDSXGR_SPDIFINCTRL: break;
1467         default: return -EINVAL;
1468         }
1469         val = (ucontrol->value.integer.value[0] & mask);
1470         if (invert)
1471                 val = mask - val;
1472         val <<= shift;
1473         spin_lock_irq(&chip->reg_lock);
1474         oval = snd_ymfpci_readl(chip, reg);
1475         val = (oval & ~(mask << shift)) | val;
1476         change = val != oval;
1477         snd_ymfpci_writel(chip, reg, val);
1478         spin_unlock_irq(&chip->reg_lock);
1479         return change;
1480 }
1481
1482 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1483 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1484   .info = snd_ymfpci_info_double, \
1485   .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1486   .private_value = reg }
1487
1488 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1489 {
1490         unsigned int reg = kcontrol->private_value;
1491         unsigned int mask = 16383;
1492
1493         if (reg < 0x80 || reg >= 0xc0)
1494                 return -EINVAL;
1495         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1496         uinfo->count = 2;
1497         uinfo->value.integer.min = 0;
1498         uinfo->value.integer.max = mask;
1499         return 0;
1500 }
1501
1502 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1503 {
1504         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1505         unsigned int reg = kcontrol->private_value;
1506         unsigned int shift_left = 0, shift_right = 16, mask = 16383, invert = 0;
1507         unsigned int val;
1508
1509         if (reg < 0x80 || reg >= 0xc0)
1510                 return -EINVAL;
1511         spin_lock_irq(&chip->reg_lock);
1512         val = snd_ymfpci_readl(chip, reg);
1513         spin_unlock_irq(&chip->reg_lock);
1514         ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1515         ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1516         if (invert) {
1517                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1518                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1519         }
1520         return 0;
1521 }
1522
1523 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1524 {
1525         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1526         unsigned int reg = kcontrol->private_value;
1527         unsigned int shift_left = 0, shift_right = 16, mask = 16383, invert = 0;
1528         int change;
1529         unsigned int val1, val2, oval;
1530
1531         if (reg < 0x80 || reg >= 0xc0)
1532                 return -EINVAL;
1533         val1 = ucontrol->value.integer.value[0] & mask;
1534         val2 = ucontrol->value.integer.value[1] & mask;
1535         if (invert) {
1536                 val1 = mask - val1;
1537                 val2 = mask - val2;
1538         }
1539         val1 <<= shift_left;
1540         val2 <<= shift_right;
1541         spin_lock_irq(&chip->reg_lock);
1542         oval = snd_ymfpci_readl(chip, reg);
1543         val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1544         change = val1 != oval;
1545         snd_ymfpci_writel(chip, reg, val1);
1546         spin_unlock_irq(&chip->reg_lock);
1547         return change;
1548 }
1549
1550 /*
1551  * 4ch duplication
1552  */
1553 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1554 {
1555         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1556         uinfo->count = 1;
1557         uinfo->value.integer.min = 0;
1558         uinfo->value.integer.max = 1;
1559         return 0;
1560 }
1561
1562 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1563 {
1564         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1565         ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1566         return 0;
1567 }
1568
1569 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1570 {
1571         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1572         int change;
1573         change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1574         if (change)
1575                 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1576         return change;
1577 }
1578
1579
1580 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = {
1581 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1582 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1583 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1584 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1585 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1586 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1587 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1588 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1589 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1590 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1591 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1592 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1593 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1594 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL),
1595 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL),
1596 {
1597         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1598         .name = "4ch Duplication",
1599         .info = snd_ymfpci_info_dup4ch,
1600         .get = snd_ymfpci_get_dup4ch,
1601         .put = snd_ymfpci_put_dup4ch,
1602 },
1603 };
1604
1605
1606 /*
1607  * GPIO
1608  */
1609
1610 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin)
1611 {
1612         u16 reg, mode;
1613         unsigned long flags;
1614
1615         spin_lock_irqsave(&chip->reg_lock, flags);
1616         reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1617         reg &= ~(1 << (pin + 8));
1618         reg |= (1 << pin);
1619         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1620         /* set the level mode for input line */
1621         mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1622         mode &= ~(3 << (pin * 2));
1623         snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1624         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1625         mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1626         spin_unlock_irqrestore(&chip->reg_lock, flags);
1627         return (mode >> pin) & 1;
1628 }
1629
1630 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable)
1631 {
1632         u16 reg;
1633         unsigned long flags;
1634
1635         spin_lock_irqsave(&chip->reg_lock, flags);
1636         reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1637         reg &= ~(1 << pin);
1638         reg &= ~(1 << (pin + 8));
1639         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1640         snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1641         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1642         spin_unlock_irqrestore(&chip->reg_lock, flags);
1643
1644         return 0;
1645 }
1646
1647 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1648 {
1649         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1650         uinfo->count = 1;
1651         uinfo->value.integer.min = 0;
1652         uinfo->value.integer.max = 1;
1653         return 0;
1654 }
1655
1656 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1657 {
1658         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1659         int pin = (int)kcontrol->private_value;
1660         ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1661         return 0;
1662 }
1663
1664 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1665 {
1666         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1667         int pin = (int)kcontrol->private_value;
1668
1669         if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1670                 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1671                 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1672                 return 1;
1673         }
1674         return 0;
1675 }
1676
1677 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = {
1678         .name = "Shared Rear/Line-In Switch",
1679         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1680         .info = snd_ymfpci_gpio_sw_info,
1681         .get = snd_ymfpci_gpio_sw_get,
1682         .put = snd_ymfpci_gpio_sw_put,
1683         .private_value = 2,
1684 };
1685
1686
1687 /*
1688  *  Mixer routines
1689  */
1690
1691 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus)
1692 {
1693         ymfpci_t *chip = bus->private_data;
1694         chip->ac97_bus = NULL;
1695 }
1696
1697 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97)
1698 {
1699         ymfpci_t *chip = ac97->private_data;
1700         chip->ac97 = NULL;
1701 }
1702
1703 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch)
1704 {
1705         ac97_template_t ac97;
1706         snd_kcontrol_t *kctl;
1707         unsigned int idx;
1708         int err;
1709         static ac97_bus_ops_t ops = {
1710                 .write = snd_ymfpci_codec_write,
1711                 .read = snd_ymfpci_codec_read,
1712         };
1713
1714         if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1715                 return err;
1716         chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1717
1718         memset(&ac97, 0, sizeof(ac97));
1719         ac97.private_data = chip;
1720         ac97.private_free = snd_ymfpci_mixer_free_ac97;
1721         if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1722                 return err;
1723
1724         for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1725                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1726                         return err;
1727         }
1728
1729         /* add S/PDIF control */
1730         snd_assert(chip->pcm_spdif != NULL, return -EIO);
1731         if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1732                 return err;
1733         kctl->id.device = chip->pcm_spdif->device;
1734         if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1735                 return err;
1736         kctl->id.device = chip->pcm_spdif->device;
1737         if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1738                 return err;
1739         kctl->id.device = chip->pcm_spdif->device;
1740         chip->spdif_pcm_ctl = kctl;
1741
1742         /* direct recording source */
1743         if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1744             (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1745                 return err;
1746
1747         /*
1748          * shared rear/line-in
1749          */
1750         if (rear_switch) {
1751                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1752                         return err;
1753         }
1754
1755         return 0;
1756 }
1757
1758
1759 /*
1760  * timer
1761  */
1762
1763 static int snd_ymfpci_timer_start(snd_timer_t *timer)
1764 {
1765         ymfpci_t *chip;
1766         unsigned long flags;
1767         unsigned int count;
1768
1769         chip = snd_timer_chip(timer);
1770         count = timer->sticks - 1;
1771         if (count == 0) /* minimum time is 20.8 us */
1772                 count = 1;
1773         spin_lock_irqsave(&chip->reg_lock, flags);
1774         snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1775         snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1776         spin_unlock_irqrestore(&chip->reg_lock, flags);
1777         return 0;
1778 }
1779
1780 static int snd_ymfpci_timer_stop(snd_timer_t *timer)
1781 {
1782         ymfpci_t *chip;
1783         unsigned long flags;
1784
1785         chip = snd_timer_chip(timer);
1786         spin_lock_irqsave(&chip->reg_lock, flags);
1787         snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1788         spin_unlock_irqrestore(&chip->reg_lock, flags);
1789         return 0;
1790 }
1791
1792 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer,
1793                                                unsigned long *num, unsigned long *den)
1794 {
1795         *num = 1;
1796         *den = 96000;
1797         return 0;
1798 }
1799
1800 static struct _snd_timer_hardware snd_ymfpci_timer_hw = {
1801         .flags = SNDRV_TIMER_HW_AUTO,
1802         .resolution = 10417, /* 1/2fs = 10.41666...us */
1803         .ticks = 65536,
1804         .start = snd_ymfpci_timer_start,
1805         .stop = snd_ymfpci_timer_stop,
1806         .precise_resolution = snd_ymfpci_timer_precise_resolution,
1807 };
1808
1809 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device)
1810 {
1811         snd_timer_t *timer = NULL;
1812         snd_timer_id_t tid;
1813         int err;
1814
1815         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1816         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1817         tid.card = chip->card->number;
1818         tid.device = device;
1819         tid.subdevice = 0;
1820         if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1821                 strcpy(timer->name, "YMFPCI timer");
1822                 timer->private_data = chip;
1823                 timer->hw = snd_ymfpci_timer_hw;
1824         }
1825         chip->timer = timer;
1826         return err;
1827 }
1828
1829
1830 /*
1831  *  proc interface
1832  */
1833
1834 static void snd_ymfpci_proc_read(snd_info_entry_t *entry,
1835                                  snd_info_buffer_t * buffer)
1836 {
1837         ymfpci_t *chip = entry->private_data;
1838         int i;
1839
1840         snd_iprintf(buffer, "YMFPCI\n\n");
1841         for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1842                 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1843 }
1844
1845 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip)
1846 {
1847         snd_info_entry_t *entry;
1848
1849         if (! snd_card_proc_new(card, "ymfpci", &entry))
1850                 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
1851         return 0;
1852 }
1853
1854 /*
1855  *  initialization routines
1856  */
1857
1858 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1859 {
1860         u8 cmd;
1861
1862         pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1863 #if 0 // force to reset
1864         if (cmd & 0x03) {
1865 #endif
1866                 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1867                 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1868                 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1869                 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1870                 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1871 #if 0
1872         }
1873 #endif
1874 }
1875
1876 static void snd_ymfpci_enable_dsp(ymfpci_t *chip)
1877 {
1878         snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1879 }
1880
1881 static void snd_ymfpci_disable_dsp(ymfpci_t *chip)
1882 {
1883         u32 val;
1884         int timeout = 1000;
1885
1886         val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1887         if (val)
1888                 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1889         while (timeout-- > 0) {
1890                 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1891                 if ((val & 0x00000002) == 0)
1892                         break;
1893         }
1894 }
1895
1896 #include "ymfpci_image.h"
1897
1898 static void snd_ymfpci_download_image(ymfpci_t *chip)
1899 {
1900         int i;
1901         u16 ctrl;
1902         unsigned long *inst;
1903
1904         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1905         snd_ymfpci_disable_dsp(chip);
1906         snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1907         snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1908         snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1909         snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1910         snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1911         snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1912         snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1913         ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1914         snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1915
1916         /* setup DSP instruction code */
1917         for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1918                 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1919
1920         /* setup control instruction code */
1921         switch (chip->device_id) {
1922         case PCI_DEVICE_ID_YAMAHA_724F:
1923         case PCI_DEVICE_ID_YAMAHA_740C:
1924         case PCI_DEVICE_ID_YAMAHA_744:
1925         case PCI_DEVICE_ID_YAMAHA_754:
1926                 inst = CntrlInst1E;
1927                 break;
1928         default:
1929                 inst = CntrlInst;
1930                 break;
1931         }
1932         for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
1933                 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
1934
1935         snd_ymfpci_enable_dsp(chip);
1936 }
1937
1938 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip)
1939 {
1940         long size, playback_ctrl_size;
1941         int voice, bank, reg;
1942         u8 *ptr;
1943         dma_addr_t ptr_addr;
1944
1945         playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
1946         chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
1947         chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
1948         chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
1949         chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
1950
1951         size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
1952                ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
1953                ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
1954                ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
1955                chip->work_size;
1956         /* work_ptr must be aligned to 256 bytes, but it's already
1957            covered with the kernel page allocation mechanism */
1958         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
1959                                 size, &chip->work_ptr) < 0)
1960                 return -ENOMEM;
1961         ptr = chip->work_ptr.area;
1962         ptr_addr = chip->work_ptr.addr;
1963         memset(ptr, 0, size);   /* for sure */
1964
1965         chip->bank_base_playback = ptr;
1966         chip->bank_base_playback_addr = ptr_addr;
1967         chip->ctrl_playback = (u32 *)ptr;
1968         chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
1969         ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1970         ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1971         for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
1972                 chip->voices[voice].number = voice;
1973                 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr;
1974                 chip->voices[voice].bank_addr = ptr_addr;
1975                 for (bank = 0; bank < 2; bank++) {
1976                         chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr;
1977                         ptr += chip->bank_size_playback;
1978                         ptr_addr += chip->bank_size_playback;
1979                 }
1980         }
1981         ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
1982         ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
1983         chip->bank_base_capture = ptr;
1984         chip->bank_base_capture_addr = ptr_addr;
1985         for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
1986                 for (bank = 0; bank < 2; bank++) {
1987                         chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr;
1988                         ptr += chip->bank_size_capture;
1989                         ptr_addr += chip->bank_size_capture;
1990                 }
1991         ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
1992         ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
1993         chip->bank_base_effect = ptr;
1994         chip->bank_base_effect_addr = ptr_addr;
1995         for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
1996                 for (bank = 0; bank < 2; bank++) {
1997                         chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr;
1998                         ptr += chip->bank_size_effect;
1999                         ptr_addr += chip->bank_size_effect;
2000                 }
2001         ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2002         ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2003         chip->work_base = ptr;
2004         chip->work_base_addr = ptr_addr;
2005
2006         snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2007
2008         snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2009         snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2010         snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2011         snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2012         snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2013
2014         /* S/PDIF output initialization */
2015         chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2016         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2017         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2018
2019         /* S/PDIF input initialization */
2020         snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2021
2022         /* digital mixer setup */
2023         for (reg = 0x80; reg < 0xc0; reg += 4)
2024                 snd_ymfpci_writel(chip, reg, 0);
2025         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2026         snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2027         snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2028         snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2029         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2030         snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2031         snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2032
2033         return 0;
2034 }
2035
2036 static int snd_ymfpci_free(ymfpci_t *chip)
2037 {
2038         u16 ctrl;
2039
2040         snd_assert(chip != NULL, return -EINVAL);
2041
2042         if (chip->res_reg_area) {       /* don't touch busy hardware */
2043                 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2044                 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2045                 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2046                 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2047                 snd_ymfpci_disable_dsp(chip);
2048                 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2049                 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2050                 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2051                 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2052                 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2053                 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2054                 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2055         }
2056
2057         snd_ymfpci_ac3_done(chip);
2058
2059         /* Set PCI device to D3 state */
2060 #if 0
2061         /* FIXME: temporarily disabled, otherwise we cannot fire up
2062          * the chip again unless reboot.  ACPI bug?
2063          */
2064         pci_set_power_state(chip->pci, 3);
2065 #endif
2066
2067 #ifdef CONFIG_PM
2068         if (chip->saved_regs)
2069                 vfree(chip->saved_regs);
2070 #endif
2071         if (chip->mpu_res) {
2072                 release_resource(chip->mpu_res);
2073                 kfree_nocheck(chip->mpu_res);
2074         }
2075         if (chip->fm_res) {
2076                 release_resource(chip->fm_res);
2077                 kfree_nocheck(chip->fm_res);
2078         }
2079 #ifdef SUPPORT_JOYSTICK
2080         if (chip->joystick_res) {
2081                 if (chip->gameport.io)
2082                         gameport_unregister_port(&chip->gameport);
2083                 release_resource(chip->joystick_res);
2084                 kfree_nocheck(chip->joystick_res);
2085         }
2086 #endif
2087         if (chip->reg_area_virt)
2088                 iounmap((void *)chip->reg_area_virt);
2089         if (chip->work_ptr.area)
2090                 snd_dma_free_pages(&chip->work_ptr);
2091
2092         if (chip->irq >= 0)
2093                 free_irq(chip->irq, (void *)chip);
2094         if (chip->res_reg_area) {
2095                 release_resource(chip->res_reg_area);
2096                 kfree_nocheck(chip->res_reg_area);
2097         }
2098
2099         pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2100
2101         kfree(chip);
2102         return 0;
2103 }
2104
2105 static int snd_ymfpci_dev_free(snd_device_t *device)
2106 {
2107         ymfpci_t *chip = device->device_data;
2108         return snd_ymfpci_free(chip);
2109 }
2110
2111 #ifdef CONFIG_PM
2112 static int saved_regs_index[] = {
2113         /* spdif */
2114         YDSXGR_SPDIFOUTCTRL,
2115         YDSXGR_SPDIFOUTSTATUS,
2116         YDSXGR_SPDIFINCTRL,
2117         /* volumes */
2118         YDSXGR_PRIADCLOOPVOL,
2119         YDSXGR_NATIVEDACINVOL,
2120         YDSXGR_NATIVEDACOUTVOL,
2121         // YDSXGR_BUF441OUTVOL,
2122         YDSXGR_NATIVEADCINVOL,
2123         YDSXGR_SPDIFLOOPVOL,
2124         YDSXGR_SPDIFOUTVOL,
2125         YDSXGR_ZVOUTVOL,
2126         YDSXGR_LEGACYOUTVOL,
2127         /* address bases */
2128         YDSXGR_PLAYCTRLBASE,
2129         YDSXGR_RECCTRLBASE,
2130         YDSXGR_EFFCTRLBASE,
2131         YDSXGR_WORKBASE,
2132         /* capture set up */
2133         YDSXGR_MAPOFREC,
2134         YDSXGR_RECFORMAT,
2135         YDSXGR_RECSLOTSR,
2136         YDSXGR_ADCFORMAT,
2137         YDSXGR_ADCSLOTSR,
2138 };
2139 #define YDSXGR_NUM_SAVED_REGS   ARRAY_SIZE(saved_regs_index)
2140
2141 static int snd_ymfpci_suspend(snd_card_t *card, unsigned int state)
2142 {
2143         ymfpci_t *chip = card->pm_private_data;
2144         unsigned int i;
2145
2146         snd_pcm_suspend_all(chip->pcm);
2147         snd_pcm_suspend_all(chip->pcm2);
2148         snd_pcm_suspend_all(chip->pcm_spdif);
2149         snd_pcm_suspend_all(chip->pcm_4ch);
2150         snd_ac97_suspend(chip->ac97);
2151         for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2152                 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2153         chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2154         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2155         snd_ymfpci_disable_dsp(chip);
2156         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2157         return 0;
2158 }
2159
2160 static int snd_ymfpci_resume(snd_card_t *card, unsigned int state)
2161 {
2162         ymfpci_t *chip = card->pm_private_data;
2163         unsigned int i;
2164
2165         pci_enable_device(chip->pci);
2166         pci_set_master(chip->pci);
2167         snd_ymfpci_aclink_reset(chip->pci);
2168         snd_ymfpci_codec_ready(chip, 0);
2169         snd_ymfpci_download_image(chip);
2170         udelay(100);
2171
2172         for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2173                 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2174
2175         snd_ac97_resume(chip->ac97);
2176
2177         /* start hw again */
2178         if (chip->start_count > 0) {
2179                 spin_lock_irq(&chip->reg_lock);
2180                 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2181                 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2182                 spin_unlock_irq(&chip->reg_lock);
2183         }
2184         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2185         return 0;
2186 }
2187 #endif /* CONFIG_PM */
2188
2189 int __devinit snd_ymfpci_create(snd_card_t * card,
2190                                 struct pci_dev * pci,
2191                                 unsigned short old_legacy_ctrl,
2192                                 ymfpci_t ** rchip)
2193 {
2194         ymfpci_t *chip;
2195         int err;
2196         static snd_device_ops_t ops = {
2197                 .dev_free =     snd_ymfpci_dev_free,
2198         };
2199
2200         *rchip = NULL;
2201
2202         /* enable PCI device */
2203         if ((err = pci_enable_device(pci)) < 0)
2204                 return err;
2205
2206         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
2207         if (chip == NULL)
2208                 return -ENOMEM;
2209         chip->old_legacy_ctrl = old_legacy_ctrl;
2210         spin_lock_init(&chip->reg_lock);
2211         spin_lock_init(&chip->voice_lock);
2212         init_waitqueue_head(&chip->interrupt_sleep);
2213         atomic_set(&chip->interrupt_sleep_count, 0);
2214         chip->card = card;
2215         chip->pci = pci;
2216         chip->irq = -1;
2217         chip->device_id = pci->device;
2218         pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2219         chip->reg_area_phys = pci_resource_start(pci, 0);
2220         chip->reg_area_virt = (unsigned long)ioremap_nocache(chip->reg_area_phys, 0x8000);
2221         pci_set_master(pci);
2222
2223         if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2224                 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2225                 snd_ymfpci_free(chip);
2226                 return -EBUSY;
2227         }
2228         if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
2229                 snd_printk("unable to grab IRQ %d\n", pci->irq);
2230                 snd_ymfpci_free(chip);
2231                 return -EBUSY;
2232         }
2233         chip->irq = pci->irq;
2234
2235         snd_ymfpci_aclink_reset(pci);
2236         if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2237                 snd_ymfpci_free(chip);
2238                 return -EIO;
2239         }
2240
2241         snd_ymfpci_download_image(chip);
2242
2243         udelay(100); /* seems we need a delay after downloading image.. */
2244
2245         if (snd_ymfpci_memalloc(chip) < 0) {
2246                 snd_ymfpci_free(chip);
2247                 return -EIO;
2248         }
2249
2250         if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2251                 snd_ymfpci_free(chip);
2252                 return err;
2253         }
2254
2255 #ifdef CONFIG_PM
2256         chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2257         if (chip->saved_regs == NULL) {
2258                 snd_ymfpci_free(chip);
2259                 return -ENOMEM;
2260         }
2261         snd_card_set_pm_callback(card, snd_ymfpci_suspend, snd_ymfpci_resume, chip);
2262 #endif
2263
2264         snd_ymfpci_proc_init(card, chip);
2265
2266         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2267                 snd_ymfpci_free(chip);
2268                 return err;
2269         }
2270
2271         snd_card_set_dev(card, &pci->dev);
2272
2273         *rchip = chip;
2274         return 0;
2275 }