sound/pci/ymfpci/ymfpci_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   3  *  Routines for control of YMF724/740/744/754 chips
   4  *
   5  *  BUGS:
   6  *    --
   7  *
   8  *  TODO:
   9  *    --
  10  *
  11  *   This program is free software; you can redistribute it and/or modify
  12  *   it under the terms of the GNU General Public License as published by
  13  *   the Free Software Foundation; either version 2 of the License, or
  14  *   (at your option) any later version.
  15  *
  16  *   This program is distributed in the hope that it will be useful,
  17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *   GNU General Public License for more details.
  20  *
  21  *   You should have received a copy of the GNU General Public License
  22  *   along with this program; if not, write to the Free Software
  23  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  */
  26
  27 #include <sound/driver.h>
  28 #include <linux/delay.h>
  29 #include <linux/init.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/pci.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/vmalloc.h>
  35
  36 #include <sound/core.h>
  37 #include <sound/control.h>
  38 #include <sound/info.h>
  39 #include <sound/ymfpci.h>
  40 #include <sound/asoundef.h>
  41 #include <sound/mpu401.h>
  42
  43 #include <asm/io.h>
  44
  45 #define chip_t ymfpci_t
  46
  47 /*
  48  *  constants
  49  */
  50
  51 /*
  52  *  common I/O routines
  53  */
  54
  55 static void snd_ymfpci_irq_wait(ymfpci_t *chip);
  56
  57 static inline u8 snd_ymfpci_readb(ymfpci_t *chip, u32 offset)
  58 {
  59         return readb(chip->reg_area_virt + offset);
  60 }
  61
  62 static inline void snd_ymfpci_writeb(ymfpci_t *chip, u32 offset, u8 val)
  63 {
  64         writeb(val, chip->reg_area_virt + offset);
  65 }
  66
  67 static inline u16 snd_ymfpci_readw(ymfpci_t *chip, u32 offset)
  68 {
  69         return readw(chip->reg_area_virt + offset);
  70 }
  71
  72 static inline void snd_ymfpci_writew(ymfpci_t *chip, u32 offset, u16 val)
  73 {
  74         writew(val, chip->reg_area_virt + offset);
  75 }
  76
  77 static inline u32 snd_ymfpci_readl(ymfpci_t *chip, u32 offset)
  78 {
  79         return readl(chip->reg_area_virt + offset);
  80 }
  81
  82 static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val)
  83 {
  84         writel(val, chip->reg_area_virt + offset);
  85 }
  86
  87 static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary)
  88 {
  89         signed long end_time;
  90         u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  91
  92         end_time = (jiffies + ((3 * HZ) / 4)) + 1;
  93         do {
  94                 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  95                         return 0;
  96                 set_current_state(TASK_UNINTERRUPTIBLE);
  97                 schedule_timeout(1);
  98         } while (end_time - (signed long)jiffies >= 0);
  99         snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
 100         return -EBUSY;
 101 }
 102
 103 static void snd_ymfpci_codec_write(ac97_t *ac97, u16 reg, u16 val)
 104 {
 105         ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return);
 106         u32 cmd;
 107
 108         snd_ymfpci_codec_ready(chip, 0);
 109         cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
 110         snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
 111 }
 112
 113 static u16 snd_ymfpci_codec_read(ac97_t *ac97, u16 reg)
 114 {
 115         ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return -ENXIO);
 116
 117         if (snd_ymfpci_codec_ready(chip, 0))
 118                 return ~0;
 119         snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
 120         if (snd_ymfpci_codec_ready(chip, 0))
 121                 return ~0;
 122         if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
 123                 int i;
 124                 for (i = 0; i < 600; i++)
 125                         snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
 126         }
 127         return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
 128 }
 129
 130 /*
 131  *  Misc routines
 132  */
 133
 134 static u32 snd_ymfpci_calc_delta(u32 rate)
 135 {
 136         switch (rate) {
 137         case 8000:      return 0x02aaab00;
 138         case 11025:     return 0x03accd00;
 139         case 16000:     return 0x05555500;
 140         case 22050:     return 0x07599a00;
 141         case 32000:     return 0x0aaaab00;
 142         case 44100:     return 0x0eb33300;
 143         default:        return ((rate << 16) / 375) << 5;
 144         }
 145 }
 146
 147 static u32 def_rate[8] = {
 148         100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
 149 };
 150
 151 static u32 snd_ymfpci_calc_lpfK(u32 rate)
 152 {
 153         u32 i;
 154         static u32 val[8] = {
 155                 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
 156                 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
 157         };
 158
 159         if (rate == 44100)
 160                 return 0x40000000;      /* FIXME: What's the right value? */
 161         for (i = 0; i < 8; i++)
 162                 if (rate <= def_rate[i])
 163                         return val[i];
 164         return val[0];
 165 }
 166
 167 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
 168 {
 169         u32 i;
 170         static u32 val[8] = {
 171                 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
 172                 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
 173         };
 174
 175         if (rate == 44100)
 176                 return 0x370A0000;
 177         for (i = 0; i < 8; i++)
 178                 if (rate <= def_rate[i])
 179                         return val[i];
 180         return val[0];
 181 }
 182
 183 /*
 184  *  Hardware start management
 185  */
 186
 187 static void snd_ymfpci_hw_start(ymfpci_t *chip)
 188 {
 189         unsigned long flags;
 190
 191         spin_lock_irqsave(&chip->reg_lock, flags);
 192         if (chip->start_count++ > 0)
 193                 goto __end;
 194         snd_ymfpci_writel(chip, YDSXGR_MODE,
 195                           snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
 196         chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
 197       __end:
 198         spin_unlock_irqrestore(&chip->reg_lock, flags);
 199 }
 200
 201 static void snd_ymfpci_hw_stop(ymfpci_t *chip)
 202 {
 203         unsigned long flags;
 204         long timeout = 1000;
 205
 206         spin_lock_irqsave(&chip->reg_lock, flags);
 207         if (--chip->start_count > 0)
 208                 goto __end;
 209         snd_ymfpci_writel(chip, YDSXGR_MODE,
 210                           snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
 211         while (timeout-- > 0) {
 212                 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
 213                         break;
 214         }
 215         if (atomic_read(&chip->interrupt_sleep_count)) {
 216                 atomic_set(&chip->interrupt_sleep_count, 0);
 217                 wake_up(&chip->interrupt_sleep);
 218         }
 219       __end:
 220         spin_unlock_irqrestore(&chip->reg_lock, flags);
 221 }
 222
 223 /*
 224  *  Playback voice management
 225  */
 226
 227 static int voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
 228 {
 229         ymfpci_voice_t *voice, *voice2;
 230         int idx;
 231
 232         *rvoice = NULL;
 233         for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
 234                 voice = &chip->voices[idx];
 235                 voice2 = pair ? &chip->voices[idx+1] : NULL;
 236                 if (voice->use || (voice2 && voice2->use))
 237                         continue;
 238                 voice->use = 1;
 239                 if (voice2)
 240                         voice2->use = 1;
 241                 switch (type) {
 242                 case YMFPCI_PCM:
 243                         voice->pcm = 1;
 244                         if (voice2)
 245                                 voice2->pcm = 1;
 246                         break;
 247                 case YMFPCI_SYNTH:
 248                         voice->synth = 1;
 249                         break;
 250                 case YMFPCI_MIDI:
 251                         voice->midi = 1;
 252                         break;
 253                 }
 254                 snd_ymfpci_hw_start(chip);
 255                 if (voice2)
 256                         snd_ymfpci_hw_start(chip);
 257                 *rvoice = voice;
 258                 return 0;
 259         }
 260         return -ENOMEM;
 261 }
 262
 263 int snd_ymfpci_voice_alloc(ymfpci_t *chip, ymfpci_voice_type_t type, int pair, ymfpci_voice_t **rvoice)
 264 {
 265         unsigned long flags;
 266         int result;
 267
 268         snd_assert(rvoice != NULL, return -EINVAL);
 269         snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
 270
 271         spin_lock_irqsave(&chip->voice_lock, flags);
 272         for (;;) {
 273                 result = voice_alloc(chip, type, pair, rvoice);
 274                 if (result == 0 || type != YMFPCI_PCM)
 275                         break;
 276                 /* TODO: synth/midi voice deallocation */
 277                 break;
 278         }
 279         spin_unlock_irqrestore(&chip->voice_lock, flags);
 280         return result;
 281 }
 282
 283 int snd_ymfpci_voice_free(ymfpci_t *chip, ymfpci_voice_t *pvoice)
 284 {
 285         unsigned long flags;
 286
 287         snd_assert(pvoice != NULL, return -EINVAL);
 288         snd_ymfpci_hw_stop(chip);
 289         spin_lock_irqsave(&chip->voice_lock, flags);
 290         pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
 291         pvoice->ypcm = NULL;
 292         pvoice->interrupt = NULL;
 293         spin_unlock_irqrestore(&chip->voice_lock, flags);
 294         return 0;
 295 }
 296
 297 /*
 298  *  PCM part
 299  */
 300
 301 static void snd_ymfpci_pcm_interrupt(ymfpci_t *chip, ymfpci_voice_t *voice)
 302 {
 303         ymfpci_pcm_t *ypcm;
 304         u32 pos, delta;
 305
 306         if ((ypcm = voice->ypcm) == NULL)
 307                 return;
 308         if (ypcm->substream == NULL)
 309                 return;
 310         spin_lock(&chip->reg_lock);
 311         if (ypcm->running) {
 312                 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
 313                 if (pos < ypcm->last_pos)
 314                         delta = pos + (ypcm->buffer_size - ypcm->last_pos);
 315                 else
 316                         delta = pos - ypcm->last_pos;
 317                 ypcm->period_pos += delta;
 318                 ypcm->last_pos = pos;
 319                 if (ypcm->period_pos >= ypcm->period_size) {
 320                         // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
 321                         ypcm->period_pos %= ypcm->period_size;
 322                         spin_unlock(&chip->reg_lock);
 323                         snd_pcm_period_elapsed(ypcm->substream);
 324                         spin_lock(&chip->reg_lock);
 325                 }
 326         }
 327         spin_unlock(&chip->reg_lock);
 328 }
 329
 330 static void snd_ymfpci_pcm_capture_interrupt(snd_pcm_substream_t *substream)
 331 {
 332         snd_pcm_runtime_t *runtime = substream->runtime;
 333         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return);
 334         ymfpci_t *chip = ypcm->chip;
 335         u32 pos, delta;
 336
 337         spin_lock(&chip->reg_lock);
 338         if (ypcm->running) {
 339                 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
 340                 if (pos < ypcm->last_pos)
 341                         delta = pos + (ypcm->buffer_size - ypcm->last_pos);
 342                 else
 343                         delta = pos - ypcm->last_pos;
 344                 ypcm->period_pos += delta;
 345                 ypcm->last_pos = pos;
 346                 if (ypcm->period_pos >= ypcm->period_size) {
 347                         ypcm->period_pos %= ypcm->period_size;
 348                         // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
 349                         spin_unlock(&chip->reg_lock);
 350                         snd_pcm_period_elapsed(substream);
 351                         spin_lock(&chip->reg_lock);
 352                 }
 353         }
 354         spin_unlock(&chip->reg_lock);
 355 }
 356
 357 static int snd_ymfpci_playback_trigger(snd_pcm_substream_t * substream,
 358                                        int cmd)
 359 {
 360         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 361         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, substream->runtime->private_data, return -ENXIO);
 362         int result = 0;
 363
 364         spin_lock(&chip->reg_lock);
 365         if (ypcm->voices[0] == NULL) {
 366                 result = -EINVAL;
 367                 goto __unlock;
 368         }
 369         switch (cmd) {
 370         case SNDRV_PCM_TRIGGER_START:
 371         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 372         case SNDRV_PCM_TRIGGER_RESUME:
 373                 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
 374                 if (ypcm->voices[1] != NULL)
 375                         chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
 376                 ypcm->running = 1;
 377                 break;
 378         case SNDRV_PCM_TRIGGER_STOP:
 379         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 380         case SNDRV_PCM_TRIGGER_SUSPEND:
 381                 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
 382                 if (ypcm->voices[1] != NULL)
 383                         chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
 384                 ypcm->running = 0;
 385                 break;
 386         default:
 387                 result = -EINVAL;
 388                 break;
 389         }
 390       __unlock:
 391         spin_unlock(&chip->reg_lock);
 392         return result;
 393 }
 394 static int snd_ymfpci_capture_trigger(snd_pcm_substream_t * substream,
 395                                       int cmd)
 396 {
 397         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 398         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, substream->runtime->private_data, return -ENXIO);
 399         int result = 0;
 400         u32 tmp;
 401
 402         spin_lock(&chip->reg_lock);
 403         switch (cmd) {
 404         case SNDRV_PCM_TRIGGER_START:
 405         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 406         case SNDRV_PCM_TRIGGER_RESUME:
 407                 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
 408                 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
 409                 ypcm->running = 1;
 410                 break;
 411         case SNDRV_PCM_TRIGGER_STOP:
 412         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 413         case SNDRV_PCM_TRIGGER_SUSPEND:
 414                 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
 415                 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
 416                 ypcm->running = 0;
 417                 break;
 418         default:
 419                 result = -EINVAL;
 420                 break;
 421         }
 422         spin_unlock(&chip->reg_lock);
 423         return result;
 424 }
 425
 426 static int snd_ymfpci_pcm_voice_alloc(ymfpci_pcm_t *ypcm, int voices)
 427 {
 428         int err;
 429
 430         if (ypcm->voices[1] != NULL && voices < 2) {
 431                 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
 432                 ypcm->voices[1] = NULL;
 433         }
 434         if (voices == 1 && ypcm->voices[0] != NULL)
 435                 return 0;               /* already allocated */
 436         if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
 437                 return 0;               /* already allocated */
 438         if (voices > 1) {
 439                 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
 440                         snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
 441                         ypcm->voices[0] = NULL;
 442                 }
 443         }
 444         err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
 445         if (err < 0)
 446                 return err;
 447         ypcm->voices[0]->ypcm = ypcm;
 448         ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
 449         if (voices > 1) {
 450                 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
 451                 ypcm->voices[1]->ypcm = ypcm;
 452         }
 453         return 0;
 454 }
 455
 456 static void snd_ymfpci_pcm_init_voice(ymfpci_voice_t *voice, int stereo,
 457                                       int rate, int w_16, unsigned long addr,
 458                                       unsigned int end,
 459                                       int output_front, int output_rear)
 460 {
 461         u32 format;
 462         u32 delta = snd_ymfpci_calc_delta(rate);
 463         u32 lpfQ = snd_ymfpci_calc_lpfQ(rate);
 464         u32 lpfK = snd_ymfpci_calc_lpfK(rate);
 465         snd_ymfpci_playback_bank_t *bank;
 466         unsigned int nbank;
 467
 468         snd_assert(voice != NULL, return);
 469         format = (stereo ? 0x00010000 : 0) | (w_16 ? 0 : 0x80000000);
 470         for (nbank = 0; nbank < 2; nbank++) {
 471                 bank = &voice->bank[nbank];
 472                 bank->format = cpu_to_le32(format);
 473                 bank->loop_default = 0;
 474                 bank->base = cpu_to_le32(addr);
 475                 bank->loop_start = 0;
 476                 bank->loop_end = cpu_to_le32(end);
 477                 bank->loop_frac = 0;
 478                 bank->eg_gain_end = cpu_to_le32(0x40000000);
 479                 bank->lpfQ = cpu_to_le32(lpfQ);
 480                 bank->status = 0;
 481                 bank->num_of_frames = 0;
 482                 bank->loop_count = 0;
 483                 bank->start = 0;
 484                 bank->start_frac = 0;
 485                 bank->delta =
 486                 bank->delta_end = cpu_to_le32(delta);
 487                 bank->lpfK =
 488                 bank->lpfK_end = cpu_to_le32(lpfK);
 489                 bank->eg_gain = cpu_to_le32(0x40000000);
 490                 bank->lpfD1 =
 491                 bank->lpfD2 = 0;
 492
 493                 bank->left_gain =
 494                 bank->right_gain =
 495                 bank->left_gain_end =
 496                 bank->right_gain_end =
 497                 bank->eff1_gain =
 498                 bank->eff2_gain =
 499                 bank->eff3_gain =
 500                 bank->eff1_gain_end =
 501                 bank->eff2_gain_end =
 502                 bank->eff3_gain_end = 0;
 503
 504                 if (!stereo) {
 505                         if (output_front) {
 506                                 bank->left_gain =
 507                                 bank->right_gain =
 508                                 bank->left_gain_end =
 509                                 bank->right_gain_end = cpu_to_le32(0x40000000);
 510                         }
 511                         if (output_rear) {
 512                                 bank->eff2_gain =
 513                                 bank->eff2_gain_end =
 514                                 bank->eff3_gain =
 515                                 bank->eff3_gain_end = cpu_to_le32(0x40000000);
 516                         }
 517                 } else {
 518                         if (output_front) {
 519                                 if ((voice->number & 1) == 0) {
 520                                         bank->left_gain =
 521                                         bank->left_gain_end = cpu_to_le32(0x40000000);
 522                                 } else {
 523                                         bank->format |= cpu_to_le32(1);
 524                                         bank->right_gain =
 525                                         bank->right_gain_end = cpu_to_le32(0x40000000);
 526                                 }
 527                         }
 528                         if (output_rear) {
 529                                 if ((voice->number & 1) == 0) {
 530                                         bank->eff3_gain =
 531                                         bank->eff3_gain_end = cpu_to_le32(0x40000000);
 532                                 } else {
 533                                         bank->format |= cpu_to_le32(1);
 534                                         bank->eff2_gain =
 535                                         bank->eff2_gain_end = cpu_to_le32(0x40000000);
 536                                 }
 537                         }
 538                 }
 539         }
 540 }
 541
 542 static int __devinit snd_ymfpci_ac3_init(ymfpci_t *chip)
 543 {
 544         if (snd_dma_alloc_pages(&chip->dma_dev, 4096, &chip->ac3_tmp_base) < 0)
 545                 return -ENOMEM;
 546
 547         chip->bank_effect[3][0]->base =
 548         chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
 549         chip->bank_effect[3][0]->loop_end =
 550         chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
 551         chip->bank_effect[4][0]->base =
 552         chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
 553         chip->bank_effect[4][0]->loop_end =
 554         chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
 555
 556         spin_lock_irq(&chip->reg_lock);
 557         snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
 558                           snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
 559         spin_unlock_irq(&chip->reg_lock);
 560         return 0;
 561 }
 562
 563 static int snd_ymfpci_ac3_done(ymfpci_t *chip)
 564 {
 565         spin_lock_irq(&chip->reg_lock);
 566         snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
 567                           snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
 568         spin_unlock_irq(&chip->reg_lock);
 569         // snd_ymfpci_irq_wait(chip);
 570         if (chip->ac3_tmp_base.area) {
 571                 snd_dma_free_pages(&chip->dma_dev, &chip->ac3_tmp_base);
 572                 chip->ac3_tmp_base.area = NULL;
 573         }
 574         return 0;
 575 }
 576
 577 static int snd_ymfpci_playback_hw_params(snd_pcm_substream_t * substream,
 578                                          snd_pcm_hw_params_t * hw_params)
 579 {
 580         snd_pcm_runtime_t *runtime = substream->runtime;
 581         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
 582         int err;
 583
 584         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
 585                 return err;
 586         if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
 587                 return err;
 588         return 0;
 589 }
 590
 591 static int snd_ymfpci_playback_hw_free(snd_pcm_substream_t * substream)
 592 {
 593         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 594         snd_pcm_runtime_t *runtime = substream->runtime;
 595         ymfpci_pcm_t *ypcm;
 596
 597         if (runtime->private_data == NULL)
 598                 return 0;
 599         ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
 600
 601         /* wait, until the PCI operations are not finished */
 602         snd_ymfpci_irq_wait(chip);
 603         snd_pcm_lib_free_pages(substream);
 604         if (ypcm->voices[1]) {
 605                 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
 606                 ypcm->voices[1] = NULL;
 607         }
 608         if (ypcm->voices[0]) {
 609                 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
 610                 ypcm->voices[0] = NULL;
 611         }
 612         return 0;
 613 }
 614
 615 static int snd_ymfpci_playback_prepare(snd_pcm_substream_t * substream)
 616 {
 617         // ymfpci_t *chip = snd_pcm_substream_chip(substream);
 618         snd_pcm_runtime_t *runtime = substream->runtime;
 619         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
 620         unsigned int nvoice;
 621
 622         ypcm->period_size = runtime->period_size;
 623         ypcm->buffer_size = runtime->buffer_size;
 624         ypcm->period_pos = 0;
 625         ypcm->last_pos = 0;
 626         for (nvoice = 0; nvoice < runtime->channels; nvoice++)
 627                 snd_ymfpci_pcm_init_voice(ypcm->voices[nvoice],
 628                                           runtime->channels == 2,
 629                                           runtime->rate,
 630                                           snd_pcm_format_width(runtime->format) == 16,
 631                                           runtime->dma_addr,
 632                                           ypcm->buffer_size,
 633                                           ypcm->output_front,
 634                                           ypcm->output_rear);
 635         return 0;
 636 }
 637
 638 static int snd_ymfpci_capture_hw_params(snd_pcm_substream_t * substream,
 639                                         snd_pcm_hw_params_t * hw_params)
 640 {
 641         return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 642 }
 643
 644 static int snd_ymfpci_capture_hw_free(snd_pcm_substream_t * substream)
 645 {
 646         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 647
 648         /* wait, until the PCI operations are not finished */
 649         snd_ymfpci_irq_wait(chip);
 650         return snd_pcm_lib_free_pages(substream);
 651 }
 652
 653 static int snd_ymfpci_capture_prepare(snd_pcm_substream_t * substream)
 654 {
 655         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 656         snd_pcm_runtime_t *runtime = substream->runtime;
 657         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
 658         snd_ymfpci_capture_bank_t * bank;
 659         int nbank;
 660         u32 rate, format;
 661
 662         ypcm->period_size = runtime->period_size;
 663         ypcm->buffer_size = runtime->buffer_size;
 664         ypcm->period_pos = 0;
 665         ypcm->last_pos = 0;
 666         ypcm->shift = 0;
 667         rate = ((48000 * 4096) / runtime->rate) - 1;
 668         format = 0;
 669         if (runtime->channels == 2) {
 670                 format |= 2;
 671                 ypcm->shift++;
 672         }
 673         if (snd_pcm_format_width(runtime->format) == 8)
 674                 format |= 1;
 675         else
 676                 ypcm->shift++;
 677         switch (ypcm->capture_bank_number) {
 678         case 0:
 679                 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
 680                 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
 681                 break;
 682         case 1:
 683                 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
 684                 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
 685                 break;
 686         }
 687         for (nbank = 0; nbank < 2; nbank++) {
 688                 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
 689                 bank->base = cpu_to_le32(runtime->dma_addr);
 690                 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
 691                 bank->start = 0;
 692                 bank->num_of_loops = 0;
 693         }
 694         return 0;
 695 }
 696
 697 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(snd_pcm_substream_t * substream)
 698 {
 699         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 700         snd_pcm_runtime_t *runtime = substream->runtime;
 701         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
 702         ymfpci_voice_t *voice = ypcm->voices[0];
 703
 704         if (!(ypcm->running && voice))
 705                 return 0;
 706         return le32_to_cpu(voice->bank[chip->active_bank].start);
 707 }
 708
 709 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(snd_pcm_substream_t * substream)
 710 {
 711         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 712         snd_pcm_runtime_t *runtime = substream->runtime;
 713         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
 714
 715         if (!ypcm->running)
 716                 return 0;
 717         return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
 718 }
 719
 720 static void snd_ymfpci_irq_wait(ymfpci_t *chip)
 721 {
 722         wait_queue_t wait;
 723         int loops = 4;
 724
 725         while (loops-- > 0) {
 726                 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
 727                         continue;
 728                 init_waitqueue_entry(&wait, current);
 729                 add_wait_queue(&chip->interrupt_sleep, &wait);
 730                 atomic_inc(&chip->interrupt_sleep_count);
 731                 set_current_state(TASK_UNINTERRUPTIBLE);
 732                 schedule_timeout(HZ/20);
 733                 remove_wait_queue(&chip->interrupt_sleep, &wait);
 734         }
 735 }
 736
 737 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 738 {
 739         ymfpci_t *chip = snd_magic_cast(ymfpci_t, dev_id, return IRQ_NONE);
 740         u32 status, nvoice, mode;
 741         ymfpci_voice_t *voice;
 742
 743         status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
 744         if (status & 0x80000000) {
 745                 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
 746                 spin_lock(&chip->voice_lock);
 747                 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
 748                         voice = &chip->voices[nvoice];
 749                         if (voice->interrupt)
 750                                 voice->interrupt(chip, voice);
 751                 }
 752                 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
 753                         if (chip->capture_substream[nvoice])
 754                                 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
 755                 }
 756 #if 0
 757                 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
 758                         if (chip->effect_substream[nvoice])
 759                                 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
 760                 }
 761 #endif
 762                 spin_unlock(&chip->voice_lock);
 763                 spin_lock(&chip->reg_lock);
 764                 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
 765                 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
 766                 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
 767                 spin_unlock(&chip->reg_lock);
 768
 769                 if (atomic_read(&chip->interrupt_sleep_count)) {
 770                         atomic_set(&chip->interrupt_sleep_count, 0);
 771                         wake_up(&chip->interrupt_sleep);
 772                 }
 773         }
 774
 775         status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
 776         if (status & 1) {
 777                 if (chip->timer)
 778                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
 779         }
 780         snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
 781
 782         if (chip->rawmidi)
 783                 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
 784         return IRQ_HANDLED;
 785 }
 786
 787 static snd_pcm_hardware_t snd_ymfpci_playback =
 788 {
 789         .info =                 (SNDRV_PCM_INFO_MMAP |
 790                                  SNDRV_PCM_INFO_MMAP_VALID |
 791                                  SNDRV_PCM_INFO_INTERLEAVED |
 792                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 793                                  SNDRV_PCM_INFO_PAUSE |
 794                                  SNDRV_PCM_INFO_RESUME),
 795         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 796         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
 797         .rate_min =             8000,
 798         .rate_max =             48000,
 799         .channels_min =         1,
 800         .channels_max =         2,
 801         .buffer_bytes_max =     256 * 1024, /* FIXME: enough? */
 802         .period_bytes_min =     64,
 803         .period_bytes_max =     256 * 1024, /* FIXME: enough? */
 804         .periods_min =          3,
 805         .periods_max =          1024,
 806         .fifo_size =            0,
 807 };
 808
 809 static snd_pcm_hardware_t snd_ymfpci_capture =
 810 {
 811         .info =                 (SNDRV_PCM_INFO_MMAP |
 812                                  SNDRV_PCM_INFO_MMAP_VALID |
 813                                  SNDRV_PCM_INFO_INTERLEAVED |
 814                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 815                                  SNDRV_PCM_INFO_PAUSE |
 816                                  SNDRV_PCM_INFO_RESUME),
 817         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 818         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
 819         .rate_min =             8000,
 820         .rate_max =             48000,
 821         .channels_min =         1,
 822         .channels_max =         2,
 823         .buffer_bytes_max =     256 * 1024, /* FIXME: enough? */
 824         .period_bytes_min =     64,
 825         .period_bytes_max =     256 * 1024, /* FIXME: enough? */
 826         .periods_min =          3,
 827         .periods_max =          1024,
 828         .fifo_size =            0,
 829 };
 830
 831 static void snd_ymfpci_pcm_free_substream(snd_pcm_runtime_t *runtime)
 832 {
 833         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return);
 834
 835         if (ypcm)
 836                 snd_magic_kfree(ypcm);
 837 }
 838
 839 static int snd_ymfpci_playback_open_1(snd_pcm_substream_t * substream)
 840 {
 841         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 842         snd_pcm_runtime_t *runtime = substream->runtime;
 843         ymfpci_pcm_t *ypcm;
 844
 845         ypcm = snd_magic_kcalloc(ymfpci_pcm_t, 0, GFP_KERNEL);
 846         if (ypcm == NULL)
 847                 return -ENOMEM;
 848         ypcm->chip = chip;
 849         ypcm->type = PLAYBACK_VOICE;
 850         ypcm->substream = substream;
 851         runtime->hw = snd_ymfpci_playback;
 852         runtime->private_data = ypcm;
 853         runtime->private_free = snd_ymfpci_pcm_free_substream;
 854         /* FIXME? True value is 256/48 = 5.33333 ms */
 855         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
 856         return 0;
 857 }
 858
 859 /* call with spinlock held */
 860 static void ymfpci_open_extension(ymfpci_t *chip)
 861 {
 862         if (! chip->rear_opened) {
 863                 if (! chip->spdif_opened) /* set AC3 */
 864                         snd_ymfpci_writel(chip, YDSXGR_MODE,
 865                                           snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
 866                 /* enable second codec (4CHEN) */
 867                 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
 868                                   (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
 869         }
 870 }
 871
 872 /* call with spinlock held */
 873 static void ymfpci_close_extension(ymfpci_t *chip)
 874 {
 875         if (! chip->rear_opened) {
 876                 if (! chip->spdif_opened)
 877                         snd_ymfpci_writel(chip, YDSXGR_MODE,
 878                                           snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
 879                 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
 880                                   (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
 881         }
 882 }
 883
 884 static int snd_ymfpci_playback_open(snd_pcm_substream_t * substream)
 885 {
 886         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 887         snd_pcm_runtime_t *runtime = substream->runtime;
 888         ymfpci_pcm_t *ypcm;
 889         unsigned long flags;
 890         int err;
 891
 892         if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
 893                 return err;
 894         ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return 0);
 895         ypcm->output_front = 1;
 896         ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
 897         spin_lock_irqsave(&chip->reg_lock, flags);
 898         if (ypcm->output_rear) {
 899                 ymfpci_open_extension(chip);
 900                 chip->rear_opened++;
 901         }
 902         spin_unlock_irqrestore(&chip->reg_lock, flags);
 903         return 0;
 904 }
 905
 906 static int snd_ymfpci_playback_spdif_open(snd_pcm_substream_t * substream)
 907 {
 908         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 909         snd_pcm_runtime_t *runtime = substream->runtime;
 910         ymfpci_pcm_t *ypcm;
 911         unsigned long flags;
 912         int err;
 913
 914         if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
 915                 return err;
 916         ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return 0);
 917         ypcm->output_front = 0;
 918         ypcm->output_rear = 1;
 919         spin_lock_irqsave(&chip->reg_lock, flags);
 920         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
 921                           snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
 922         ymfpci_open_extension(chip);
 923         chip->spdif_pcm_bits = chip->spdif_bits;
 924         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
 925         chip->spdif_opened++;
 926         spin_unlock_irqrestore(&chip->reg_lock, flags);
 927
 928         chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 929         snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 930                        SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
 931         return 0;
 932 }
 933
 934 static int snd_ymfpci_playback_4ch_open(snd_pcm_substream_t * substream)
 935 {
 936         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 937         snd_pcm_runtime_t *runtime = substream->runtime;
 938         ymfpci_pcm_t *ypcm;
 939         unsigned long flags;
 940         int err;
 941
 942         if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
 943                 return err;
 944         ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return 0);
 945         ypcm->output_front = 0;
 946         ypcm->output_rear = 1;
 947         spin_lock_irqsave(&chip->reg_lock, flags);
 948         ymfpci_open_extension(chip);
 949         chip->rear_opened++;
 950         spin_unlock_irqrestore(&chip->reg_lock, flags);
 951         return 0;
 952 }
 953
 954 static int snd_ymfpci_capture_open(snd_pcm_substream_t * substream,
 955                                    u32 capture_bank_number)
 956 {
 957         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 958         snd_pcm_runtime_t *runtime = substream->runtime;
 959         ymfpci_pcm_t *ypcm;
 960
 961         ypcm = snd_magic_kcalloc(ymfpci_pcm_t, 0, GFP_KERNEL);
 962         if (ypcm == NULL)
 963                 return -ENOMEM;
 964         ypcm->chip = chip;
 965         ypcm->type = capture_bank_number + CAPTURE_REC;
 966         ypcm->substream = substream;
 967         ypcm->capture_bank_number = capture_bank_number;
 968         chip->capture_substream[capture_bank_number] = substream;
 969         runtime->hw = snd_ymfpci_capture;
 970         /* FIXME? True value is 256/48 = 5.33333 ms */
 971         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
 972         runtime->private_data = ypcm;
 973         runtime->private_free = snd_ymfpci_pcm_free_substream;
 974         snd_ymfpci_hw_start(chip);
 975         return 0;
 976 }
 977
 978 static int snd_ymfpci_capture_rec_open(snd_pcm_substream_t * substream)
 979 {
 980         return snd_ymfpci_capture_open(substream, 0);
 981 }
 982
 983 static int snd_ymfpci_capture_ac97_open(snd_pcm_substream_t * substream)
 984 {
 985         return snd_ymfpci_capture_open(substream, 1);
 986 }
 987
 988 static int snd_ymfpci_playback_close_1(snd_pcm_substream_t * substream)
 989 {
 990         return 0;
 991 }
 992
 993 static int snd_ymfpci_playback_close(snd_pcm_substream_t * substream)
 994 {
 995         ymfpci_t *chip = snd_pcm_substream_chip(substream);
 996         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, substream->runtime->private_data, return -ENXIO);
 997         unsigned long flags;
 998
 999         spin_lock_irqsave(&chip->reg_lock, flags);
1000         if (ypcm->output_rear && chip->rear_opened > 0) {
1001                 chip->rear_opened--;
1002                 ymfpci_close_extension(chip);
1003         }
1004         spin_unlock_irqrestore(&chip->reg_lock, flags);
1005         return snd_ymfpci_playback_close_1(substream);
1006 }
1007
1008 static int snd_ymfpci_playback_spdif_close(snd_pcm_substream_t * substream)
1009 {
1010         ymfpci_t *chip = snd_pcm_substream_chip(substream);
1011         unsigned long flags;
1012
1013         spin_lock_irqsave(&chip->reg_lock, flags);
1014         chip->spdif_opened = 0;
1015         ymfpci_close_extension(chip);
1016         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1017                           snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1018         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1019         spin_unlock_irqrestore(&chip->reg_lock, flags);
1020         chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1021         snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1022                        SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1023         return snd_ymfpci_playback_close_1(substream);
1024 }
1025
1026 static int snd_ymfpci_playback_4ch_close(snd_pcm_substream_t * substream)
1027 {
1028         ymfpci_t *chip = snd_pcm_substream_chip(substream);
1029         unsigned long flags;
1030
1031         spin_lock_irqsave(&chip->reg_lock, flags);
1032         if (chip->rear_opened > 0) {
1033                 chip->rear_opened--;
1034                 ymfpci_close_extension(chip);
1035         }
1036         spin_unlock_irqrestore(&chip->reg_lock, flags);
1037         return snd_ymfpci_playback_close_1(substream);
1038 }
1039
1040 static int snd_ymfpci_capture_close(snd_pcm_substream_t * substream)
1041 {
1042         ymfpci_t *chip = snd_pcm_substream_chip(substream);
1043         snd_pcm_runtime_t *runtime = substream->runtime;
1044         ymfpci_pcm_t *ypcm = snd_magic_cast(ymfpci_pcm_t, runtime->private_data, return -ENXIO);
1045
1046         if (ypcm != NULL) {
1047                 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1048                 snd_ymfpci_hw_stop(chip);
1049         }
1050         return 0;
1051 }
1052
1053 static snd_pcm_ops_t snd_ymfpci_playback_ops = {
1054         .open =                 snd_ymfpci_playback_open,
1055         .close =                snd_ymfpci_playback_close,
1056         .ioctl =                snd_pcm_lib_ioctl,
1057         .hw_params =            snd_ymfpci_playback_hw_params,
1058         .hw_free =              snd_ymfpci_playback_hw_free,
1059         .prepare =              snd_ymfpci_playback_prepare,
1060         .trigger =              snd_ymfpci_playback_trigger,
1061         .pointer =              snd_ymfpci_playback_pointer,
1062 };
1063
1064 static snd_pcm_ops_t snd_ymfpci_capture_rec_ops = {
1065         .open =                 snd_ymfpci_capture_rec_open,
1066         .close =                snd_ymfpci_capture_close,
1067         .ioctl =                snd_pcm_lib_ioctl,
1068         .hw_params =            snd_ymfpci_capture_hw_params,
1069         .hw_free =              snd_ymfpci_capture_hw_free,
1070         .prepare =              snd_ymfpci_capture_prepare,
1071         .trigger =              snd_ymfpci_capture_trigger,
1072         .pointer =              snd_ymfpci_capture_pointer,
1073 };
1074
1075 static void snd_ymfpci_pcm_free(snd_pcm_t *pcm)
1076 {
1077         ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1078         chip->pcm = NULL;
1079         snd_pcm_lib_preallocate_free_for_all(pcm);
1080 }
1081
1082 int __devinit snd_ymfpci_pcm(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1083 {
1084         snd_pcm_t *pcm;
1085         int err;
1086
1087         if (rpcm)
1088                 *rpcm = NULL;
1089         if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1090                 return err;
1091         pcm->private_data = chip;
1092         pcm->private_free = snd_ymfpci_pcm_free;
1093
1094         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1095         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1096
1097         /* global setup */
1098         pcm->info_flags = 0;
1099         strcpy(pcm->name, "YMFPCI");
1100         chip->pcm = pcm;
1101
1102         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1103                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1104
1105         if (rpcm)
1106                 *rpcm = pcm;
1107         return 0;
1108 }
1109
1110 static snd_pcm_ops_t snd_ymfpci_capture_ac97_ops = {
1111         .open =                 snd_ymfpci_capture_ac97_open,
1112         .close =                snd_ymfpci_capture_close,
1113         .ioctl =                snd_pcm_lib_ioctl,
1114         .hw_params =            snd_ymfpci_capture_hw_params,
1115         .hw_free =              snd_ymfpci_capture_hw_free,
1116         .prepare =              snd_ymfpci_capture_prepare,
1117         .trigger =              snd_ymfpci_capture_trigger,
1118         .pointer =              snd_ymfpci_capture_pointer,
1119 };
1120
1121 static void snd_ymfpci_pcm2_free(snd_pcm_t *pcm)
1122 {
1123         ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1124         chip->pcm2 = NULL;
1125         snd_pcm_lib_preallocate_free_for_all(pcm);
1126 }
1127
1128 int __devinit snd_ymfpci_pcm2(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1129 {
1130         snd_pcm_t *pcm;
1131         int err;
1132
1133         if (rpcm)
1134                 *rpcm = NULL;
1135         if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1136                 return err;
1137         pcm->private_data = chip;
1138         pcm->private_free = snd_ymfpci_pcm2_free;
1139
1140         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1141
1142         /* global setup */
1143         pcm->info_flags = 0;
1144         sprintf(pcm->name, "YMFPCI - %s",
1145                 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1146         chip->pcm2 = pcm;
1147
1148         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1149                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1150
1151         if (rpcm)
1152                 *rpcm = pcm;
1153         return 0;
1154 }
1155
1156 static snd_pcm_ops_t snd_ymfpci_playback_spdif_ops = {
1157         .open =                 snd_ymfpci_playback_spdif_open,
1158         .close =                snd_ymfpci_playback_spdif_close,
1159         .ioctl =                snd_pcm_lib_ioctl,
1160         .hw_params =            snd_ymfpci_playback_hw_params,
1161         .hw_free =              snd_ymfpci_playback_hw_free,
1162         .prepare =              snd_ymfpci_playback_prepare,
1163         .trigger =              snd_ymfpci_playback_trigger,
1164         .pointer =              snd_ymfpci_playback_pointer,
1165 };
1166
1167 static void snd_ymfpci_pcm_spdif_free(snd_pcm_t *pcm)
1168 {
1169         ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1170         chip->pcm_spdif = NULL;
1171         snd_pcm_lib_preallocate_free_for_all(pcm);
1172 }
1173
1174 int __devinit snd_ymfpci_pcm_spdif(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1175 {
1176         snd_pcm_t *pcm;
1177         int err;
1178
1179         if (rpcm)
1180                 *rpcm = NULL;
1181         if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1182                 return err;
1183         pcm->private_data = chip;
1184         pcm->private_free = snd_ymfpci_pcm_spdif_free;
1185
1186         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1187
1188         /* global setup */
1189         pcm->info_flags = 0;
1190         strcpy(pcm->name, "YMFPCI - IEC958");
1191         chip->pcm_spdif = pcm;
1192
1193         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1194                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1195
1196         if (rpcm)
1197                 *rpcm = pcm;
1198         return 0;
1199 }
1200
1201 static snd_pcm_ops_t snd_ymfpci_playback_4ch_ops = {
1202         .open =                 snd_ymfpci_playback_4ch_open,
1203         .close =                snd_ymfpci_playback_4ch_close,
1204         .ioctl =                snd_pcm_lib_ioctl,
1205         .hw_params =            snd_ymfpci_playback_hw_params,
1206         .hw_free =              snd_ymfpci_playback_hw_free,
1207         .prepare =              snd_ymfpci_playback_prepare,
1208         .trigger =              snd_ymfpci_playback_trigger,
1209         .pointer =              snd_ymfpci_playback_pointer,
1210 };
1211
1212 static void snd_ymfpci_pcm_4ch_free(snd_pcm_t *pcm)
1213 {
1214         ymfpci_t *chip = snd_magic_cast(ymfpci_t, pcm->private_data, return);
1215         chip->pcm_4ch = NULL;
1216         snd_pcm_lib_preallocate_free_for_all(pcm);
1217 }
1218
1219 int __devinit snd_ymfpci_pcm_4ch(ymfpci_t *chip, int device, snd_pcm_t ** rpcm)
1220 {
1221         snd_pcm_t *pcm;
1222         int err;
1223
1224         if (rpcm)
1225                 *rpcm = NULL;
1226         if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1227                 return err;
1228         pcm->private_data = chip;
1229         pcm->private_free = snd_ymfpci_pcm_4ch_free;
1230
1231         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1232
1233         /* global setup */
1234         pcm->info_flags = 0;
1235         strcpy(pcm->name, "YMFPCI - Rear PCM");
1236         chip->pcm_4ch = pcm;
1237
1238         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1239                                               snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1240
1241         if (rpcm)
1242                 *rpcm = pcm;
1243         return 0;
1244 }
1245
1246 static int snd_ymfpci_spdif_default_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1247 {
1248         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1249         uinfo->count = 1;
1250         return 0;
1251 }
1252
1253 static int snd_ymfpci_spdif_default_get(snd_kcontrol_t * kcontrol,
1254                                         snd_ctl_elem_value_t * ucontrol)
1255 {
1256         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1257         unsigned long flags;
1258
1259         spin_lock_irqsave(&chip->reg_lock, flags);
1260         ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1261         ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1262         spin_unlock_irqrestore(&chip->reg_lock, flags);
1263         return 0;
1264 }
1265
1266 static int snd_ymfpci_spdif_default_put(snd_kcontrol_t * kcontrol,
1267                                          snd_ctl_elem_value_t * ucontrol)
1268 {
1269         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1270         unsigned long flags;
1271         unsigned int val;
1272         int change;
1273
1274         val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1275               (ucontrol->value.iec958.status[1] << 8);
1276         spin_lock_irqsave(&chip->reg_lock, flags);
1277         change = chip->spdif_bits != val;
1278         chip->spdif_bits = val;
1279         if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1280                 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1281         spin_unlock_irqrestore(&chip->reg_lock, flags);
1282         return change;
1283 }
1284
1285 static snd_kcontrol_new_t snd_ymfpci_spdif_default __devinitdata =
1286 {
1287         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1288         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1289         .info =         snd_ymfpci_spdif_default_info,
1290         .get =          snd_ymfpci_spdif_default_get,
1291         .put =          snd_ymfpci_spdif_default_put
1292 };
1293
1294 static int snd_ymfpci_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1295 {
1296         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1297         uinfo->count = 1;
1298         return 0;
1299 }
1300
1301 static int snd_ymfpci_spdif_mask_get(snd_kcontrol_t * kcontrol,
1302                                       snd_ctl_elem_value_t * ucontrol)
1303 {
1304         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1305         unsigned long flags;
1306
1307         spin_lock_irqsave(&chip->reg_lock, flags);
1308         ucontrol->value.iec958.status[0] = 0x3e;
1309         ucontrol->value.iec958.status[1] = 0xff;
1310         spin_unlock_irqrestore(&chip->reg_lock, flags);
1311         return 0;
1312 }
1313
1314 static snd_kcontrol_new_t snd_ymfpci_spdif_mask __devinitdata =
1315 {
1316         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1317         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1318         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1319         .info =         snd_ymfpci_spdif_mask_info,
1320         .get =          snd_ymfpci_spdif_mask_get,
1321 };
1322
1323 static int snd_ymfpci_spdif_stream_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1324 {
1325         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1326         uinfo->count = 1;
1327         return 0;
1328 }
1329
1330 static int snd_ymfpci_spdif_stream_get(snd_kcontrol_t * kcontrol,
1331                                         snd_ctl_elem_value_t * ucontrol)
1332 {
1333         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1334         unsigned long flags;
1335
1336         spin_lock_irqsave(&chip->reg_lock, flags);
1337         ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1338         ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1339         spin_unlock_irqrestore(&chip->reg_lock, flags);
1340         return 0;
1341 }
1342
1343 static int snd_ymfpci_spdif_stream_put(snd_kcontrol_t * kcontrol,
1344                                         snd_ctl_elem_value_t * ucontrol)
1345 {
1346         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1347         unsigned long flags;
1348         unsigned int val;
1349         int change;
1350
1351         val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1352               (ucontrol->value.iec958.status[1] << 8);
1353         spin_lock_irqsave(&chip->reg_lock, flags);
1354         change = chip->spdif_pcm_bits != val;
1355         chip->spdif_pcm_bits = val;
1356         if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1357                 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1358         spin_unlock_irqrestore(&chip->reg_lock, flags);
1359         return change;
1360 }
1361
1362 static snd_kcontrol_new_t snd_ymfpci_spdif_stream __devinitdata =
1363 {
1364         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1365         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1366         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1367         .info =         snd_ymfpci_spdif_stream_info,
1368         .get =          snd_ymfpci_spdif_stream_get,
1369         .put =          snd_ymfpci_spdif_stream_put
1370 };
1371
1372 static int snd_ymfpci_drec_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
1373 {
1374         static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
1375
1376         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1377         info->count = 1;
1378         info->value.enumerated.items = 3;
1379         if (info->value.enumerated.item > 2)
1380                 info->value.enumerated.item = 2;
1381         strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
1382         return 0;
1383 }
1384
1385 static int snd_ymfpci_drec_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1386 {
1387         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1388         unsigned long flags;
1389         u16 reg;
1390
1391         spin_lock_irqsave(&chip->reg_lock, flags);
1392         reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1393         spin_unlock_irqrestore(&chip->reg_lock, flags);
1394         if (!(reg & 0x100))
1395                 value->value.enumerated.item[0] = 0;
1396         else
1397                 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1398         return 0;
1399 }
1400
1401 static int snd_ymfpci_drec_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
1402 {
1403         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1404         unsigned long flags;
1405         u16 reg, old_reg;
1406
1407         spin_lock_irqsave(&chip->reg_lock, flags);
1408         old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1409         if (value->value.enumerated.item[0] == 0)
1410                 reg = old_reg & ~0x100;
1411         else
1412                 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1413         snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1414         spin_unlock_irqrestore(&chip->reg_lock, flags);
1415         return reg != old_reg;
1416 }
1417
1418 static snd_kcontrol_new_t snd_ymfpci_drec_source __devinitdata = {
1419         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE,
1420         .iface =        SNDRV_CTL_ELEM_IFACE_MIXER,
1421         .name =         "Direct Recording Source",
1422         .info =         snd_ymfpci_drec_source_info,
1423         .get =          snd_ymfpci_drec_source_get,
1424         .put =          snd_ymfpci_drec_source_put
1425 };
1426
1427 /*
1428  *  Mixer controls
1429  */
1430
1431 #define YMFPCI_SINGLE(xname, xindex, reg) \
1432 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1433   .info = snd_ymfpci_info_single, \
1434   .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1435   .private_value = reg }
1436
1437 static int snd_ymfpci_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1438 {
1439         unsigned int mask = 1;
1440
1441         switch (kcontrol->private_value) {
1442         case YDSXGR_SPDIFOUTCTRL: break;
1443         case YDSXGR_SPDIFINCTRL: break;
1444         default: return -EINVAL;
1445         }
1446         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1447         uinfo->count = 1;
1448         uinfo->value.integer.min = 0;
1449         uinfo->value.integer.max = mask;
1450         return 0;
1451 }
1452
1453 static int snd_ymfpci_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1454 {
1455         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1456         int reg = kcontrol->private_value;
1457         unsigned int shift = 0, mask = 1, invert = 0;
1458
1459         switch (kcontrol->private_value) {
1460         case YDSXGR_SPDIFOUTCTRL: break;
1461         case YDSXGR_SPDIFINCTRL: break;
1462         default: return -EINVAL;
1463         }
1464         ucontrol->value.integer.value[0] = (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1465         if (invert)
1466                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1467         return 0;
1468 }
1469
1470 static int snd_ymfpci_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1471 {
1472         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1473         unsigned long flags;
1474         int reg = kcontrol->private_value;
1475         unsigned int shift = 0, mask = 1, invert = 0;
1476         int change;
1477         unsigned int val, oval;
1478
1479         switch (kcontrol->private_value) {
1480         case YDSXGR_SPDIFOUTCTRL: break;
1481         case YDSXGR_SPDIFINCTRL: break;
1482         default: return -EINVAL;
1483         }
1484         val = (ucontrol->value.integer.value[0] & mask);
1485         if (invert)
1486                 val = mask - val;
1487         val <<= shift;
1488         spin_lock_irqsave(&chip->reg_lock, flags);
1489         oval = snd_ymfpci_readl(chip, reg);
1490         val = (oval & ~(mask << shift)) | val;
1491         change = val != oval;
1492         snd_ymfpci_writel(chip, reg, val);
1493         spin_unlock_irqrestore(&chip->reg_lock, flags);
1494         return change;
1495 }
1496
1497 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1498 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1499   .info = snd_ymfpci_info_double, \
1500   .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1501   .private_value = reg }
1502
1503 static int snd_ymfpci_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1504 {
1505         unsigned int reg = kcontrol->private_value;
1506         unsigned int mask = 16383;
1507
1508         if (reg < 0x80 || reg >= 0xc0)
1509                 return -EINVAL;
1510         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1511         uinfo->count = 2;
1512         uinfo->value.integer.min = 0;
1513         uinfo->value.integer.max = mask;
1514         return 0;
1515 }
1516
1517 static int snd_ymfpci_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1518 {
1519         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1520         unsigned long flags;
1521         unsigned int reg = kcontrol->private_value;
1522         unsigned int shift_left = 0, shift_right = 16, mask = 16383, invert = 0;
1523         unsigned int val;
1524
1525         if (reg < 0x80 || reg >= 0xc0)
1526                 return -EINVAL;
1527         spin_lock_irqsave(&chip->reg_lock, flags);
1528         val = snd_ymfpci_readl(chip, reg);
1529         spin_unlock_irqrestore(&chip->reg_lock, flags);
1530         ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1531         ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1532         if (invert) {
1533                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1534                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1535         }
1536         return 0;
1537 }
1538
1539 static int snd_ymfpci_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1540 {
1541         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1542         unsigned long flags;
1543         unsigned int reg = kcontrol->private_value;
1544         unsigned int shift_left = 0, shift_right = 16, mask = 16383, invert = 0;
1545         int change;
1546         unsigned int val1, val2, oval;
1547
1548         if (reg < 0x80 || reg >= 0xc0)
1549                 return -EINVAL;
1550         val1 = ucontrol->value.integer.value[0] & mask;
1551         val2 = ucontrol->value.integer.value[1] & mask;
1552         if (invert) {
1553                 val1 = mask - val1;
1554                 val2 = mask - val2;
1555         }
1556         val1 <<= shift_left;
1557         val2 <<= shift_right;
1558         spin_lock_irqsave(&chip->reg_lock, flags);
1559         oval = snd_ymfpci_readl(chip, reg);
1560         val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1561         change = val1 != oval;
1562         snd_ymfpci_writel(chip, reg, val1);
1563         spin_unlock_irqrestore(&chip->reg_lock, flags);
1564         return change;
1565 }
1566
1567 /*
1568  * 4ch duplication
1569  */
1570 static int snd_ymfpci_info_dup4ch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1571 {
1572         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1573         uinfo->count = 1;
1574         uinfo->value.integer.min = 0;
1575         uinfo->value.integer.max = 1;
1576         return 0;
1577 }
1578
1579 static int snd_ymfpci_get_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1580 {
1581         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1582         ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1583         return 0;
1584 }
1585
1586 static int snd_ymfpci_put_dup4ch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1587 {
1588         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1589         int change;
1590         change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1591         if (change)
1592                 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1593         return change;
1594 }
1595
1596
1597 #define YMFPCI_CONTROLS (sizeof(snd_ymfpci_controls)/sizeof(snd_kcontrol_new_t))
1598
1599 static snd_kcontrol_new_t snd_ymfpci_controls[] __devinitdata = {
1600 YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
1601 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1602 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1603 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1604 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1605 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1606 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1607 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1608 YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
1609 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1610 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1611 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1612 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1613 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL),
1614 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL),
1615 {
1616         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1617         .name = "4ch Duplication",
1618         .info = snd_ymfpci_info_dup4ch,
1619         .get = snd_ymfpci_get_dup4ch,
1620         .put = snd_ymfpci_put_dup4ch,
1621 },
1622 };
1623
1624
1625 /*
1626  * GPIO
1627  */
1628
1629 static int snd_ymfpci_get_gpio_out(ymfpci_t *chip, int pin)
1630 {
1631         u16 reg, mode;
1632         unsigned long flags;
1633
1634         spin_lock_irqsave(&chip->reg_lock, flags);
1635         reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1636         reg &= ~(1 << (pin + 8));
1637         reg |= (1 << pin);
1638         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1639         /* set the level mode for input line */
1640         mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1641         mode &= ~(3 << (pin * 2));
1642         snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1643         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1644         mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1645         spin_unlock_irqrestore(&chip->reg_lock, flags);
1646         return (mode >> pin) & 1;
1647 }
1648
1649 static int snd_ymfpci_set_gpio_out(ymfpci_t *chip, int pin, int enable)
1650 {
1651         u16 reg;
1652         unsigned long flags;
1653
1654         spin_lock_irqsave(&chip->reg_lock, flags);
1655         reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1656         reg &= ~(1 << pin);
1657         reg &= ~(1 << (pin + 8));
1658         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1659         snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1660         snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1661         spin_unlock_irqrestore(&chip->reg_lock, flags);
1662
1663         return 0;
1664 }
1665
1666 static int snd_ymfpci_gpio_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1667 {
1668         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1669         uinfo->count = 1;
1670         uinfo->value.integer.min = 0;
1671         uinfo->value.integer.max = 1;
1672         return 0;
1673 }
1674
1675 static int snd_ymfpci_gpio_sw_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1676 {
1677         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1678         int pin = (int)kcontrol->private_value;
1679         ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1680         return 0;
1681 }
1682
1683 static int snd_ymfpci_gpio_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1684 {
1685         ymfpci_t *chip = snd_kcontrol_chip(kcontrol);
1686         int pin = (int)kcontrol->private_value;
1687
1688         if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1689                 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1690                 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1691                 return 1;
1692         }
1693         return 0;
1694 }
1695
1696 static snd_kcontrol_new_t snd_ymfpci_rear_shared __devinitdata = {
1697         .name = "Shared Rear/Line-In Switch",
1698         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1699         .info = snd_ymfpci_gpio_sw_info,
1700         .get = snd_ymfpci_gpio_sw_get,
1701         .put = snd_ymfpci_gpio_sw_put,
1702         .private_value = 2,
1703 };
1704
1705
1706 /*
1707  *  Mixer routines
1708  */
1709
1710 static void snd_ymfpci_mixer_free_ac97_bus(ac97_bus_t *bus)
1711 {
1712         ymfpci_t *chip = snd_magic_cast(ymfpci_t, bus->private_data, return);
1713         chip->ac97_bus = NULL;
1714 }
1715
1716 static void snd_ymfpci_mixer_free_ac97(ac97_t *ac97)
1717 {
1718         ymfpci_t *chip = snd_magic_cast(ymfpci_t, ac97->private_data, return);
1719         chip->ac97 = NULL;
1720 }
1721
1722 int __devinit snd_ymfpci_mixer(ymfpci_t *chip, int rear_switch)
1723 {
1724         ac97_bus_t bus;
1725         ac97_t ac97;
1726         snd_kcontrol_t *kctl;
1727         unsigned int idx;
1728         int err;
1729
1730         memset(&bus, 0, sizeof(bus));
1731         bus.write = snd_ymfpci_codec_write;
1732         bus.read = snd_ymfpci_codec_read;
1733         bus.private_data = chip;
1734         bus.private_free = snd_ymfpci_mixer_free_ac97_bus;
1735         if ((err = snd_ac97_bus(chip->card, &bus, &chip->ac97_bus)) < 0)
1736                 return err;
1737
1738         memset(&ac97, 0, sizeof(ac97));
1739         ac97.private_data = chip;
1740         ac97.private_free = snd_ymfpci_mixer_free_ac97;
1741         if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1742                 return err;
1743
1744         for (idx = 0; idx < YMFPCI_CONTROLS; idx++) {
1745                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1746                         return err;
1747         }
1748
1749         /* add S/PDIF control */
1750         snd_assert(chip->pcm_spdif != NULL, return -EIO);
1751         if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1752                 return err;
1753         kctl->id.device = chip->pcm_spdif->device;
1754         if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1755                 return err;
1756         kctl->id.device = chip->pcm_spdif->device;
1757         if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1758                 return err;
1759         kctl->id.device = chip->pcm_spdif->device;
1760         chip->spdif_pcm_ctl = kctl;
1761
1762         /* direct recording source */
1763         if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1764             (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1765                 return err;
1766
1767         /*
1768          * shared rear/line-in
1769          */
1770         if (rear_switch) {
1771                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1772                         return err;
1773         }
1774
1775         return 0;
1776 }
1777
1778
1779 /*
1780  * timer
1781  */
1782
1783 static int snd_ymfpci_timer_start(snd_timer_t *timer)
1784 {
1785         ymfpci_t *chip;
1786         unsigned long flags;
1787         unsigned int count;
1788
1789         chip = snd_timer_chip(timer);
1790         count = timer->sticks - 1;
1791         if (count == 0) /* minimum time is 20.8 us */
1792                 count = 1;
1793         spin_lock_irqsave(&chip->reg_lock, flags);
1794         snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1795         snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1796         spin_unlock_irqrestore(&chip->reg_lock, flags);
1797         return 0;
1798 }
1799
1800 static int snd_ymfpci_timer_stop(snd_timer_t *timer)
1801 {
1802         ymfpci_t *chip;
1803         unsigned long flags;
1804
1805         chip = snd_timer_chip(timer);
1806         spin_lock_irqsave(&chip->reg_lock, flags);
1807         snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1808         spin_unlock_irqrestore(&chip->reg_lock, flags);
1809         return 0;
1810 }
1811
1812 static int snd_ymfpci_timer_precise_resolution(snd_timer_t *timer,
1813                                                unsigned long *num, unsigned long *den)
1814 {
1815         *num = 1;
1816         *den = 96000;
1817         return 0;
1818 }
1819
1820 static struct _snd_timer_hardware snd_ymfpci_timer_hw = {
1821         .flags = SNDRV_TIMER_HW_AUTO,
1822         .resolution = 10417, /* 1/2fs = 10.41666...us */
1823         .ticks = 65536,
1824         .start = snd_ymfpci_timer_start,
1825         .stop = snd_ymfpci_timer_stop,
1826         .precise_resolution = snd_ymfpci_timer_precise_resolution,
1827 };
1828
1829 int __devinit snd_ymfpci_timer(ymfpci_t *chip, int device)
1830 {
1831         snd_timer_t *timer = NULL;
1832         snd_timer_id_t tid;
1833         int err;
1834
1835         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1836         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1837         tid.card = chip->card->number;
1838         tid.device = device;
1839         tid.subdevice = 0;
1840         if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1841                 strcpy(timer->name, "YMFPCI timer");
1842                 timer->private_data = chip;
1843                 timer->hw = snd_ymfpci_timer_hw;
1844         }
1845         chip->timer = timer;
1846         return err;
1847 }
1848
1849
1850 /*
1851  *  proc interface
1852  */
1853
1854 static void snd_ymfpci_proc_read(snd_info_entry_t *entry,
1855                                  snd_info_buffer_t * buffer)
1856 {
1857         ymfpci_t *chip = snd_magic_cast(ymfpci_t, entry->private_data, return);
1858         int i;
1859
1860         snd_iprintf(buffer, "YMFPCI\n\n");
1861         for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1862                 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1863 }
1864
1865 static int __devinit snd_ymfpci_proc_init(snd_card_t * card, ymfpci_t *chip)
1866 {
1867         snd_info_entry_t *entry;
1868
1869         if (! snd_card_proc_new(card, "ymfpci", &entry))
1870                 snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
1871         return 0;
1872 }
1873
1874 /*
1875  *  initialization routines
1876  */
1877
1878 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1879 {
1880         u8 cmd;
1881
1882         pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1883 #if 0 // force to reset
1884         if (cmd & 0x03) {
1885 #endif
1886                 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1887                 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1888                 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1889                 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1890                 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1891 #if 0
1892         }
1893 #endif
1894 }
1895
1896 static void snd_ymfpci_enable_dsp(ymfpci_t *chip)
1897 {
1898         snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
1899 }
1900
1901 static void snd_ymfpci_disable_dsp(ymfpci_t *chip)
1902 {
1903         u32 val;
1904         int timeout = 1000;
1905
1906         val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
1907         if (val)
1908                 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
1909         while (timeout-- > 0) {
1910                 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
1911                 if ((val & 0x00000002) == 0)
1912                         break;
1913         }
1914 }
1915
1916 #include "ymfpci_image.h"
1917
1918 static void snd_ymfpci_download_image(ymfpci_t *chip)
1919 {
1920         int i;
1921         u16 ctrl;
1922         unsigned long *inst;
1923
1924         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
1925         snd_ymfpci_disable_dsp(chip);
1926         snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
1927         snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
1928         snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
1929         snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
1930         snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
1931         snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
1932         snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
1933         ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1934         snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
1935
1936         /* setup DSP instruction code */
1937         for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
1938                 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
1939
1940         /* setup control instruction code */
1941         switch (chip->device_id) {
1942         case PCI_DEVICE_ID_YAMAHA_724F:
1943         case PCI_DEVICE_ID_YAMAHA_740C:
1944         case PCI_DEVICE_ID_YAMAHA_744:
1945         case PCI_DEVICE_ID_YAMAHA_754:
1946                 inst = CntrlInst1E;
1947                 break;
1948         default:
1949                 inst = CntrlInst;
1950                 break;
1951         }
1952         for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
1953                 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
1954
1955         snd_ymfpci_enable_dsp(chip);
1956 }
1957
1958 static int __devinit snd_ymfpci_memalloc(ymfpci_t *chip)
1959 {
1960         long size, playback_ctrl_size;
1961         int voice, bank, reg;
1962         u8 *ptr;
1963         dma_addr_t ptr_addr;
1964
1965         playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
1966         chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
1967         chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
1968         chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
1969         chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
1970
1971         size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
1972                ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
1973                ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
1974                ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
1975                chip->work_size;
1976         /* work_ptr must be aligned to 256 bytes, but it's already
1977            covered with the kernel page allocation mechanism */
1978         if (snd_dma_alloc_pages(&chip->dma_dev, size, &chip->work_ptr) < 0)
1979                 return -ENOMEM;
1980         ptr = chip->work_ptr.area;
1981         ptr_addr = chip->work_ptr.addr;
1982         memset(ptr, 0, size);   /* for sure */
1983
1984         chip->bank_base_playback = ptr;
1985         chip->bank_base_playback_addr = ptr_addr;
1986         chip->ctrl_playback = (u32 *)ptr;
1987         chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
1988         ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1989         ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
1990         for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
1991                 chip->voices[voice].number = voice;
1992                 chip->voices[voice].bank = (snd_ymfpci_playback_bank_t *)ptr;
1993                 chip->voices[voice].bank_addr = ptr_addr;
1994                 for (bank = 0; bank < 2; bank++) {
1995                         chip->bank_playback[voice][bank] = (snd_ymfpci_playback_bank_t *)ptr;
1996                         ptr += chip->bank_size_playback;
1997                         ptr_addr += chip->bank_size_playback;
1998                 }
1999         }
2000         ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2001         ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2002         chip->bank_base_capture = ptr;
2003         chip->bank_base_capture_addr = ptr_addr;
2004         for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2005                 for (bank = 0; bank < 2; bank++) {
2006                         chip->bank_capture[voice][bank] = (snd_ymfpci_capture_bank_t *)ptr;
2007                         ptr += chip->bank_size_capture;
2008                         ptr_addr += chip->bank_size_capture;
2009                 }
2010         ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2011         ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2012         chip->bank_base_effect = ptr;
2013         chip->bank_base_effect_addr = ptr_addr;
2014         for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2015                 for (bank = 0; bank < 2; bank++) {
2016                         chip->bank_effect[voice][bank] = (snd_ymfpci_effect_bank_t *)ptr;
2017                         ptr += chip->bank_size_effect;
2018                         ptr_addr += chip->bank_size_effect;
2019                 }
2020         ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
2021         ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
2022         chip->work_base = ptr;
2023         chip->work_base_addr = ptr_addr;
2024
2025         snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
2026
2027         snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2028         snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2029         snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2030         snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2031         snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2032
2033         /* S/PDIF output initialization */
2034         chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2035         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2036         snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2037
2038         /* S/PDIF input initialization */
2039         snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2040
2041         /* digital mixer setup */
2042         for (reg = 0x80; reg < 0xc0; reg += 4)
2043                 snd_ymfpci_writel(chip, reg, 0);
2044         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2045         snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2046         snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2047         snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2048         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2049         snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2050         snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2051
2052         return 0;
2053 }
2054
2055 static int snd_ymfpci_free(ymfpci_t *chip)
2056 {
2057         u16 ctrl;
2058
2059         snd_assert(chip != NULL, return -EINVAL);
2060
2061         if (chip->res_reg_area) {       /* don't touch busy hardware */
2062                 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2063                 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2064                 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2065                 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2066                 snd_ymfpci_disable_dsp(chip);
2067                 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2068                 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2069                 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2070                 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2071                 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2072                 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2073                 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2074         }
2075
2076         snd_ymfpci_ac3_done(chip);
2077
2078         /* Set PCI device to D3 state */
2079 #if 0
2080         /* FIXME: temporarily disabled, otherwise we cannot fire up
2081          * the chip again unless reboot.  ACPI bug?
2082          */
2083         pci_set_power_state(chip->pci, 3);
2084 #endif
2085
2086 #ifdef CONFIG_PM
2087         if (chip->saved_regs)
2088                 vfree(chip->saved_regs);
2089 #endif
2090         if (chip->mpu_res) {
2091                 release_resource(chip->mpu_res);
2092                 kfree_nocheck(chip->mpu_res);
2093         }
2094         if (chip->fm_res) {
2095                 release_resource(chip->fm_res);
2096                 kfree_nocheck(chip->fm_res);
2097         }
2098 #ifdef SUPPORT_JOYSTICK
2099         if (chip->joystick_res) {
2100                 if (chip->gameport.io)
2101                         gameport_unregister_port(&chip->gameport);
2102                 release_resource(chip->joystick_res);
2103                 kfree_nocheck(chip->joystick_res);
2104         }
2105 #endif
2106         if (chip->reg_area_virt)
2107                 iounmap((void *)chip->reg_area_virt);
2108         if (chip->work_ptr.area)
2109                 snd_dma_free_pages(&chip->dma_dev, &chip->work_ptr);
2110
2111         if (chip->irq >= 0)
2112                 free_irq(chip->irq, (void *)chip);
2113         if (chip->res_reg_area) {
2114                 release_resource(chip->res_reg_area);
2115                 kfree_nocheck(chip->res_reg_area);
2116         }
2117
2118         pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2119
2120         snd_magic_kfree(chip);
2121         return 0;
2122 }
2123
2124 static int snd_ymfpci_dev_free(snd_device_t *device)
2125 {
2126         ymfpci_t *chip = snd_magic_cast(ymfpci_t, device->device_data, return -ENXIO);
2127         return snd_ymfpci_free(chip);
2128 }
2129
2130 #ifdef CONFIG_PM
2131 static int saved_regs_index[] = {
2132         /* spdif */
2133         YDSXGR_SPDIFOUTCTRL,
2134         YDSXGR_SPDIFOUTSTATUS,
2135         YDSXGR_SPDIFINCTRL,
2136         /* volumes */
2137         YDSXGR_PRIADCLOOPVOL,
2138         YDSXGR_NATIVEDACINVOL,
2139         YDSXGR_NATIVEDACOUTVOL,
2140         // YDSXGR_BUF441OUTVOL,
2141         YDSXGR_NATIVEADCINVOL,
2142         YDSXGR_SPDIFLOOPVOL,
2143         YDSXGR_SPDIFOUTVOL,
2144         YDSXGR_ZVOUTVOL,
2145         YDSXGR_LEGACYOUTVOL,
2146         /* address bases */
2147         YDSXGR_PLAYCTRLBASE,
2148         YDSXGR_RECCTRLBASE,
2149         YDSXGR_EFFCTRLBASE,
2150         YDSXGR_WORKBASE,
2151         /* capture set up */
2152         YDSXGR_MAPOFREC,
2153         YDSXGR_RECFORMAT,
2154         YDSXGR_RECSLOTSR,
2155         YDSXGR_ADCFORMAT,
2156         YDSXGR_ADCSLOTSR,
2157 };
2158 #define YDSXGR_NUM_SAVED_REGS   ARRAY_SIZE(saved_regs_index)
2159
2160 static int snd_ymfpci_suspend(snd_card_t *card, unsigned int state)
2161 {
2162         ymfpci_t *chip = snd_magic_cast(ymfpci_t, card->pm_private_data, return -EINVAL);
2163         unsigned int i;
2164
2165         snd_pcm_suspend_all(chip->pcm);
2166         snd_pcm_suspend_all(chip->pcm2);
2167         snd_pcm_suspend_all(chip->pcm_spdif);
2168         snd_pcm_suspend_all(chip->pcm_4ch);
2169         snd_ac97_suspend(chip->ac97);
2170         for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2171                 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2172         chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2173         snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2174         snd_ymfpci_disable_dsp(chip);
2175         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2176         return 0;
2177 }
2178
2179 static int snd_ymfpci_resume(snd_card_t *card, unsigned int state)
2180 {
2181         ymfpci_t *chip = snd_magic_cast(ymfpci_t, card->pm_private_data, return -EINVAL);
2182         unsigned int i;
2183
2184         pci_enable_device(chip->pci);
2185         pci_set_master(chip->pci);
2186         snd_ymfpci_aclink_reset(chip->pci);
2187         snd_ymfpci_codec_ready(chip, 0);
2188         snd_ymfpci_download_image(chip);
2189         udelay(100);
2190
2191         for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2192                 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2193
2194         snd_ac97_resume(chip->ac97);
2195
2196         /* start hw again */
2197         if (chip->start_count > 0) {
2198                 unsigned long flags;
2199                 spin_lock_irqsave(&chip->reg_lock, flags);
2200                 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2201                 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2202                 spin_unlock_irqrestore(&chip->reg_lock, flags);
2203         }
2204         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2205         return 0;
2206 }
2207 #endif /* CONFIG_PM */
2208
2209 int __devinit snd_ymfpci_create(snd_card_t * card,
2210                                 struct pci_dev * pci,
2211                                 unsigned short old_legacy_ctrl,
2212                                 ymfpci_t ** rchip)
2213 {
2214         ymfpci_t *chip;
2215         int err;
2216         static snd_device_ops_t ops = {
2217                 .dev_free =     snd_ymfpci_dev_free,
2218         };
2219
2220         *rchip = NULL;
2221
2222         /* enable PCI device */
2223         if ((err = pci_enable_device(pci)) < 0)
2224                 return err;
2225
2226         chip = snd_magic_kcalloc(ymfpci_t, 0, GFP_KERNEL);
2227         if (chip == NULL)
2228                 return -ENOMEM;
2229         chip->old_legacy_ctrl = old_legacy_ctrl;
2230         spin_lock_init(&chip->reg_lock);
2231         spin_lock_init(&chip->voice_lock);
2232         init_waitqueue_head(&chip->interrupt_sleep);
2233         atomic_set(&chip->interrupt_sleep_count, 0);
2234         chip->card = card;
2235         chip->pci = pci;
2236         chip->irq = -1;
2237         chip->device_id = pci->device;
2238         pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
2239         chip->reg_area_phys = pci_resource_start(pci, 0);
2240         chip->reg_area_virt = (unsigned long)ioremap_nocache(chip->reg_area_phys, 0x8000);
2241         pci_set_master(pci);
2242
2243         if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2244                 snd_printk("unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2245                 snd_ymfpci_free(chip);
2246                 return -EBUSY;
2247         }
2248         if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
2249                 snd_printk("unable to grab IRQ %d\n", pci->irq);
2250                 snd_ymfpci_free(chip);
2251                 return -EBUSY;
2252         }
2253         chip->irq = pci->irq;
2254
2255         memset(&chip->dma_dev, 0, sizeof(chip->dma_dev));
2256         chip->dma_dev.type = SNDRV_DMA_TYPE_DEV;
2257         chip->dma_dev.dev = snd_dma_pci_data(pci);
2258
2259         snd_ymfpci_aclink_reset(pci);
2260         if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2261                 snd_ymfpci_free(chip);
2262                 return -EIO;
2263         }
2264
2265         snd_ymfpci_download_image(chip);
2266
2267         udelay(100); /* seems we need a delay after downloading image.. */
2268
2269         if (snd_ymfpci_memalloc(chip) < 0) {
2270                 snd_ymfpci_free(chip);
2271                 return -EIO;
2272         }
2273
2274         if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
2275                 snd_ymfpci_free(chip);
2276                 return err;
2277         }
2278
2279 #ifdef CONFIG_PM
2280         chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
2281         if (chip->saved_regs == NULL) {
2282                 snd_ymfpci_free(chip);
2283                 return -ENOMEM;
2284         }
2285         snd_card_set_pm_callback(card, snd_ymfpci_suspend, snd_ymfpci_resume, chip);
2286 #endif
2287
2288         snd_ymfpci_proc_init(card, chip);
2289
2290         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2291                 snd_ymfpci_free(chip);
2292                 return err;
2293         }
2294
2295         snd_card_set_dev(card, &pci->dev);
2296
2297         *rchip = chip;
2298         return 0;
2299 }