sound/sparc/cs4231.c

   1 /*
   2  * Driver for CS4231 sound chips found on Sparcs.
   3  * Copyright (C) 2002 David S. Miller <davem@redhat.com>
   4  *
   5  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
   6  * Copyright (C) 1996, 1997, 1998, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
   7  * and also sound/isa/cs423x/cs4231_lib.c which is:
   8  * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/moduleparam.h>
  19
  20 #include <sound/driver.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/info.h>
  24 #include <sound/control.h>
  25 #include <sound/timer.h>
  26 #include <sound/initval.h>
  27 #include <sound/pcm_params.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31
  32 #ifdef CONFIG_SBUS
  33 #define SBUS_SUPPORT
  34 #endif
  35
  36 #ifdef SBUS_SUPPORT
  37 #include <asm/sbus.h>
  38 #endif
  39
  40 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  41 #define EBUS_SUPPORT
  42 #endif
  43
  44 #ifdef EBUS_SUPPORT
  45 #include <linux/pci.h>
  46 #include <asm/ebus.h>
  47 #endif
  48
  49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  52 static int boot_devs;
  53
  54 module_param_array(index, int, boot_devs, 0444);
  55 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  56 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
  57 module_param_array(id, charp, boot_devs, 0444);
  58 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  59 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
  60 module_param_array(enable, bool, boot_devs, 0444);
  61 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  62 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
  63 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  64 MODULE_DESCRIPTION("Sun CS4231");
  65 MODULE_LICENSE("GPL");
  66 MODULE_CLASSES("{sound}");
  67 MODULE_DEVICES("{{Sun,CS4231}}");
  68
  69 typedef struct snd_cs4231 {
  70         spinlock_t              lock;
  71         unsigned long           port;
  72 #ifdef EBUS_SUPPORT
  73         struct ebus_dma_info    eb2c;
  74         struct ebus_dma_info    eb2p;
  75 #endif
  76
  77         u32                     flags;
  78 #define CS4231_FLAG_EBUS        0x00000001
  79 #define CS4231_FLAG_PLAYBACK    0x00000002
  80 #define CS4231_FLAG_CAPTURE     0x00000004
  81
  82         snd_card_t              *card;
  83         snd_pcm_t               *pcm;
  84         snd_pcm_substream_t     *playback_substream;
  85         unsigned int            p_periods_sent;
  86         snd_pcm_substream_t     *capture_substream;
  87         unsigned int            c_periods_sent;
  88         snd_timer_t             *timer;
  89
  90         unsigned short mode;
  91 #define CS4231_MODE_NONE        0x0000
  92 #define CS4231_MODE_PLAY        0x0001
  93 #define CS4231_MODE_RECORD      0x0002
  94 #define CS4231_MODE_TIMER       0x0004
  95 #define CS4231_MODE_OPEN        (CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
  96
  97         unsigned char           image[32];      /* registers image */
  98         int                     mce_bit;
  99         int                     calibrate_mute;
 100         struct semaphore        mce_mutex;
 101         struct semaphore        open_mutex;
 102
 103         union {
 104 #ifdef SBUS_SUPPORT
 105                 struct sbus_dev         *sdev;
 106 #endif
 107 #ifdef EBUS_SUPPORT
 108                 struct pci_dev          *pdev;
 109 #endif
 110         } dev_u;
 111         unsigned int            irq[2];
 112         unsigned int            regs_size;
 113         struct snd_cs4231       *next;
 114 } cs4231_t;
 115 #define chip_t cs4231_t
 116
 117 static cs4231_t *cs4231_list;
 118
 119 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
 120  * now....  -DaveM
 121  */
 122
 123 /* IO ports */
 124
 125 #define CS4231P(chip, x)        ((chip)->port + c_d_c_CS4231##x)
 126
 127 /* XXX offsets are different than PC ISA chips... */
 128 #define c_d_c_CS4231REGSEL      0x0
 129 #define c_d_c_CS4231REG         0x4
 130 #define c_d_c_CS4231STATUS      0x8
 131 #define c_d_c_CS4231PIO         0xc
 132
 133 /* codec registers */
 134
 135 #define CS4231_LEFT_INPUT       0x00    /* left input control */
 136 #define CS4231_RIGHT_INPUT      0x01    /* right input control */
 137 #define CS4231_AUX1_LEFT_INPUT  0x02    /* left AUX1 input control */
 138 #define CS4231_AUX1_RIGHT_INPUT 0x03    /* right AUX1 input control */
 139 #define CS4231_AUX2_LEFT_INPUT  0x04    /* left AUX2 input control */
 140 #define CS4231_AUX2_RIGHT_INPUT 0x05    /* right AUX2 input control */
 141 #define CS4231_LEFT_OUTPUT      0x06    /* left output control register */
 142 #define CS4231_RIGHT_OUTPUT     0x07    /* right output control register */
 143 #define CS4231_PLAYBK_FORMAT    0x08    /* clock and data format - playback - bits 7-0 MCE */
 144 #define CS4231_IFACE_CTRL       0x09    /* interface control - bits 7-2 MCE */
 145 #define CS4231_PIN_CTRL         0x0a    /* pin control */
 146 #define CS4231_TEST_INIT        0x0b    /* test and initialization */
 147 #define CS4231_MISC_INFO        0x0c    /* miscellaneaous information */
 148 #define CS4231_LOOPBACK         0x0d    /* loopback control */
 149 #define CS4231_PLY_UPR_CNT      0x0e    /* playback upper base count */
 150 #define CS4231_PLY_LWR_CNT      0x0f    /* playback lower base count */
 151 #define CS4231_ALT_FEATURE_1    0x10    /* alternate #1 feature enable */
 152 #define CS4231_ALT_FEATURE_2    0x11    /* alternate #2 feature enable */
 153 #define CS4231_LEFT_LINE_IN     0x12    /* left line input control */
 154 #define CS4231_RIGHT_LINE_IN    0x13    /* right line input control */
 155 #define CS4231_TIMER_LOW        0x14    /* timer low byte */
 156 #define CS4231_TIMER_HIGH       0x15    /* timer high byte */
 157 #define CS4231_LEFT_MIC_INPUT   0x16    /* left MIC input control register (InterWave only) */
 158 #define CS4231_RIGHT_MIC_INPUT  0x17    /* right MIC input control register (InterWave only) */
 159 #define CS4236_EXT_REG          0x17    /* extended register access */
 160 #define CS4231_IRQ_STATUS       0x18    /* irq status register */
 161 #define CS4231_LINE_LEFT_OUTPUT 0x19    /* left line output control register (InterWave only) */
 162 #define CS4231_VERSION          0x19    /* CS4231(A) - version values */
 163 #define CS4231_MONO_CTRL        0x1a    /* mono input/output control */
 164 #define CS4231_LINE_RIGHT_OUTPUT 0x1b   /* right line output control register (InterWave only) */
 165 #define CS4235_LEFT_MASTER      0x1b    /* left master output control */
 166 #define CS4231_REC_FORMAT       0x1c    /* clock and data format - record - bits 7-0 MCE */
 167 #define CS4231_PLY_VAR_FREQ     0x1d    /* playback variable frequency */
 168 #define CS4235_RIGHT_MASTER     0x1d    /* right master output control */
 169 #define CS4231_REC_UPR_CNT      0x1e    /* record upper count */
 170 #define CS4231_REC_LWR_CNT      0x1f    /* record lower count */
 171
 172 /* definitions for codec register select port - CODECP( REGSEL ) */
 173
 174 #define CS4231_INIT             0x80    /* CODEC is initializing */
 175 #define CS4231_MCE              0x40    /* mode change enable */
 176 #define CS4231_TRD              0x20    /* transfer request disable */
 177
 178 /* definitions for codec status register - CODECP( STATUS ) */
 179
 180 #define CS4231_GLOBALIRQ        0x01    /* IRQ is active */
 181
 182 /* definitions for codec irq status */
 183
 184 #define CS4231_PLAYBACK_IRQ     0x10
 185 #define CS4231_RECORD_IRQ       0x20
 186 #define CS4231_TIMER_IRQ        0x40
 187 #define CS4231_ALL_IRQS         0x70
 188 #define CS4231_REC_UNDERRUN     0x08
 189 #define CS4231_REC_OVERRUN      0x04
 190 #define CS4231_PLY_OVERRUN      0x02
 191 #define CS4231_PLY_UNDERRUN     0x01
 192
 193 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
 194
 195 #define CS4231_ENABLE_MIC_GAIN  0x20
 196
 197 #define CS4231_MIXS_LINE        0x00
 198 #define CS4231_MIXS_AUX1        0x40
 199 #define CS4231_MIXS_MIC         0x80
 200 #define CS4231_MIXS_ALL         0xc0
 201
 202 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
 203
 204 #define CS4231_LINEAR_8         0x00    /* 8-bit unsigned data */
 205 #define CS4231_ALAW_8           0x60    /* 8-bit A-law companded */
 206 #define CS4231_ULAW_8           0x20    /* 8-bit U-law companded */
 207 #define CS4231_LINEAR_16        0x40    /* 16-bit twos complement data - little endian */
 208 #define CS4231_LINEAR_16_BIG    0xc0    /* 16-bit twos complement data - big endian */
 209 #define CS4231_ADPCM_16         0xa0    /* 16-bit ADPCM */
 210 #define CS4231_STEREO           0x10    /* stereo mode */
 211 /* bits 3-1 define frequency divisor */
 212 #define CS4231_XTAL1            0x00    /* 24.576 crystal */
 213 #define CS4231_XTAL2            0x01    /* 16.9344 crystal */
 214
 215 /* definitions for interface control register - CS4231_IFACE_CTRL */
 216
 217 #define CS4231_RECORD_PIO       0x80    /* record PIO enable */
 218 #define CS4231_PLAYBACK_PIO     0x40    /* playback PIO enable */
 219 #define CS4231_CALIB_MODE       0x18    /* calibration mode bits */
 220 #define CS4231_AUTOCALIB        0x08    /* auto calibrate */
 221 #define CS4231_SINGLE_DMA       0x04    /* use single DMA channel */
 222 #define CS4231_RECORD_ENABLE    0x02    /* record enable */
 223 #define CS4231_PLAYBACK_ENABLE  0x01    /* playback enable */
 224
 225 /* definitions for pin control register - CS4231_PIN_CTRL */
 226
 227 #define CS4231_IRQ_ENABLE       0x02    /* enable IRQ */
 228 #define CS4231_XCTL1            0x40    /* external control #1 */
 229 #define CS4231_XCTL0            0x80    /* external control #0 */
 230
 231 /* definitions for test and init register - CS4231_TEST_INIT */
 232
 233 #define CS4231_CALIB_IN_PROGRESS 0x20   /* auto calibrate in progress */
 234 #define CS4231_DMA_REQUEST      0x10    /* DMA request in progress */
 235
 236 /* definitions for misc control register - CS4231_MISC_INFO */
 237
 238 #define CS4231_MODE2            0x40    /* MODE 2 */
 239 #define CS4231_IW_MODE3         0x6c    /* MODE 3 - InterWave enhanced mode */
 240 #define CS4231_4236_MODE3       0xe0    /* MODE 3 - CS4236+ enhanced mode */
 241
 242 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
 243
 244 #define CS4231_DACZ             0x01    /* zero DAC when underrun */
 245 #define CS4231_TIMER_ENABLE     0x40    /* codec timer enable */
 246 #define CS4231_OLB              0x80    /* output level bit */
 247
 248 /* SBUS DMA register defines.  */
 249
 250 #define APCCSR  0x10UL  /* APC DMA CSR */
 251 #define APCCVA  0x20UL  /* APC Capture DMA Address */
 252 #define APCCC   0x24UL  /* APC Capture Count */
 253 #define APCCNVA 0x28UL  /* APC Capture DMA Next Address */
 254 #define APCCNC  0x2cUL  /* APC Capture Next Count */
 255 #define APCPVA  0x30UL  /* APC Play DMA Address */
 256 #define APCPC   0x34UL  /* APC Play Count */
 257 #define APCPNVA 0x38UL  /* APC Play DMA Next Address */
 258 #define APCPNC  0x3cUL  /* APC Play Next Count */
 259
 260 /* APCCSR bits */
 261
 262 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
 263 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
 264 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
 265 #define APC_GENL_INT    0x100000 /* General interrupt */
 266 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
 267 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
 268 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
 269 #define APC_XINT_GENL   0x10000  /* Error ext intr */
 270 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
 271 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
 272 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
 273 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
 274 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
 275 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
 276 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
 277 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
 278 #define APC_PPAUSE      0x80     /* Pause the play DMA */
 279 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
 280 #define APC_CDC_RESET   0x20     /* CODEC RESET */
 281 #define APC_PDMA_READY  0x08     /* Play DMA Go */
 282 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
 283 #define APC_CHIP_RESET  0x01     /* Reset the chip */
 284
 285 /* EBUS DMA register offsets  */
 286
 287 #define EBDMA_CSR       0x00UL  /* Control/Status */
 288 #define EBDMA_ADDR      0x04UL  /* DMA Address */
 289 #define EBDMA_COUNT     0x08UL  /* DMA Count */
 290
 291 /*
 292  *  Some variables
 293  */
 294
 295 static unsigned char freq_bits[14] = {
 296         /* 5510 */      0x00 | CS4231_XTAL2,
 297         /* 6620 */      0x0E | CS4231_XTAL2,
 298         /* 8000 */      0x00 | CS4231_XTAL1,
 299         /* 9600 */      0x0E | CS4231_XTAL1,
 300         /* 11025 */     0x02 | CS4231_XTAL2,
 301         /* 16000 */     0x02 | CS4231_XTAL1,
 302         /* 18900 */     0x04 | CS4231_XTAL2,
 303         /* 22050 */     0x06 | CS4231_XTAL2,
 304         /* 27042 */     0x04 | CS4231_XTAL1,
 305         /* 32000 */     0x06 | CS4231_XTAL1,
 306         /* 33075 */     0x0C | CS4231_XTAL2,
 307         /* 37800 */     0x08 | CS4231_XTAL2,
 308         /* 44100 */     0x0A | CS4231_XTAL2,
 309         /* 48000 */     0x0C | CS4231_XTAL1
 310 };
 311
 312 static unsigned int rates[14] = {
 313         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
 314         27042, 32000, 33075, 37800, 44100, 48000
 315 };
 316
 317 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
 318         .count  = 14,
 319         .list   = rates,
 320 };
 321
 322 static int snd_cs4231_xrate(snd_pcm_runtime_t *runtime)
 323 {
 324         return snd_pcm_hw_constraint_list(runtime, 0,
 325                                           SNDRV_PCM_HW_PARAM_RATE,
 326                                           &hw_constraints_rates);
 327 }
 328
 329 static unsigned char snd_cs4231_original_image[32] =
 330 {
 331         0x00,                   /* 00/00 - lic */
 332         0x00,                   /* 01/01 - ric */
 333         0x9f,                   /* 02/02 - la1ic */
 334         0x9f,                   /* 03/03 - ra1ic */
 335         0x9f,                   /* 04/04 - la2ic */
 336         0x9f,                   /* 05/05 - ra2ic */
 337         0xbf,                   /* 06/06 - loc */
 338         0xbf,                   /* 07/07 - roc */
 339         0x20,                   /* 08/08 - pdfr */
 340         CS4231_AUTOCALIB,       /* 09/09 - ic */
 341         0x00,                   /* 0a/10 - pc */
 342         0x00,                   /* 0b/11 - ti */
 343         CS4231_MODE2,           /* 0c/12 - mi */
 344         0x00,                   /* 0d/13 - lbc */
 345         0x00,                   /* 0e/14 - pbru */
 346         0x00,                   /* 0f/15 - pbrl */
 347         0x80,                   /* 10/16 - afei */
 348         0x01,                   /* 11/17 - afeii */
 349         0x9f,                   /* 12/18 - llic */
 350         0x9f,                   /* 13/19 - rlic */
 351         0x00,                   /* 14/20 - tlb */
 352         0x00,                   /* 15/21 - thb */
 353         0x00,                   /* 16/22 - la3mic/reserved */
 354         0x00,                   /* 17/23 - ra3mic/reserved */
 355         0x00,                   /* 18/24 - afs */
 356         0x00,                   /* 19/25 - lamoc/version */
 357         0x00,                   /* 1a/26 - mioc */
 358         0x00,                   /* 1b/27 - ramoc/reserved */
 359         0x20,                   /* 1c/28 - cdfr */
 360         0x00,                   /* 1d/29 - res4 */
 361         0x00,                   /* 1e/30 - cbru */
 362         0x00,                   /* 1f/31 - cbrl */
 363 };
 364
 365 static u8 __cs4231_readb(cs4231_t *cp, unsigned long reg_addr)
 366 {
 367 #ifdef EBUS_SUPPORT
 368         if (cp->flags & CS4231_FLAG_EBUS) {
 369                 return readb(reg_addr);
 370         } else {
 371 #endif
 372 #ifdef SBUS_SUPPORT
 373                 return sbus_readb(reg_addr);
 374 #endif
 375 #ifdef EBUS_SUPPORT
 376         }
 377 #endif
 378 }
 379
 380 static void __cs4231_writeb(cs4231_t *cp, u8 val, unsigned long reg_addr)
 381 {
 382 #ifdef EBUS_SUPPORT
 383         if (cp->flags & CS4231_FLAG_EBUS) {
 384                 return writeb(val, reg_addr);
 385         } else {
 386 #endif
 387 #ifdef SBUS_SUPPORT
 388                 return sbus_writeb(val, reg_addr);
 389 #endif
 390 #ifdef EBUS_SUPPORT
 391         }
 392 #endif
 393 }
 394
 395 /*
 396  *  Basic I/O functions
 397  */
 398
 399 void snd_cs4231_outm(cs4231_t *chip, unsigned char reg,
 400                      unsigned char mask, unsigned char value)
 401 {
 402         int timeout;
 403         unsigned char tmp;
 404
 405         for (timeout = 250;
 406              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 407              timeout--)
 408                 udelay(100);
 409 #ifdef CONFIG_SND_DEBUG
 410         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 411                 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 412 #endif
 413         if (chip->calibrate_mute) {
 414                 chip->image[reg] &= mask;
 415                 chip->image[reg] |= value;
 416         } else {
 417                 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 418                 mb();
 419                 tmp = (chip->image[reg] & mask) | value;
 420                 __cs4231_writeb(chip, tmp, CS4231P(chip, REG));
 421                 chip->image[reg] = tmp;
 422                 mb();
 423         }
 424 }
 425
 426 static void snd_cs4231_dout(cs4231_t *chip, unsigned char reg, unsigned char value)
 427 {
 428         int timeout;
 429
 430         for (timeout = 250;
 431              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 432              timeout--)
 433                 udelay(100);
 434         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 435         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 436         mb();
 437 }
 438
 439 static void snd_cs4231_out(cs4231_t *chip, unsigned char reg, unsigned char value)
 440 {
 441         int timeout;
 442
 443         for (timeout = 250;
 444              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 445              timeout--)
 446                 udelay(100);
 447 #ifdef CONFIG_SND_DEBUG
 448         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 449                 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 450 #endif
 451         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 452         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 453         chip->image[reg] = value;
 454         mb();
 455 #if 0
 456         printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
 457 #endif
 458 }
 459
 460 static unsigned char snd_cs4231_in(cs4231_t *chip, unsigned char reg)
 461 {
 462         int timeout;
 463         unsigned char ret;
 464
 465         for (timeout = 250;
 466              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 467              timeout--)
 468                 udelay(100);
 469 #ifdef CONFIG_SND_DEBUG
 470         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 471                 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
 472 #endif
 473         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 474         mb();
 475         ret = __cs4231_readb(chip, CS4231P(chip, REG));
 476 #if 0
 477         printk("codec in - reg 0x%x = 0x%x\n", chip->mce_bit | reg, ret);
 478 #endif
 479         return ret;
 480 }
 481
 482 #ifdef CONFIG_SND_DEBUG
 483
 484 void snd_cs4231_debug(cs4231_t *chip)
 485 {
 486         printk("CS4231 REGS:      INDEX = 0x%02x  ",
 487                __cs4231_readb(chip, CS4231P(chip, REGSEL)));
 488         printk("                 STATUS = 0x%02x\n",
 489                __cs4231_readb(chip, CS4231P(chip, STATUS)));
 490         printk("  0x00: left input      = 0x%02x  ", snd_cs4231_in(chip, 0x00));
 491         printk("  0x10: alt 1 (CFIG 2)  = 0x%02x\n", snd_cs4231_in(chip, 0x10));
 492         printk("  0x01: right input     = 0x%02x  ", snd_cs4231_in(chip, 0x01));
 493         printk("  0x11: alt 2 (CFIG 3)  = 0x%02x\n", snd_cs4231_in(chip, 0x11));
 494         printk("  0x02: GF1 left input  = 0x%02x  ", snd_cs4231_in(chip, 0x02));
 495         printk("  0x12: left line in    = 0x%02x\n", snd_cs4231_in(chip, 0x12));
 496         printk("  0x03: GF1 right input = 0x%02x  ", snd_cs4231_in(chip, 0x03));
 497         printk("  0x13: right line in   = 0x%02x\n", snd_cs4231_in(chip, 0x13));
 498         printk("  0x04: CD left input   = 0x%02x  ", snd_cs4231_in(chip, 0x04));
 499         printk("  0x14: timer low       = 0x%02x\n", snd_cs4231_in(chip, 0x14));
 500         printk("  0x05: CD right input  = 0x%02x  ", snd_cs4231_in(chip, 0x05));
 501         printk("  0x15: timer high      = 0x%02x\n", snd_cs4231_in(chip, 0x15));
 502         printk("  0x06: left output     = 0x%02x  ", snd_cs4231_in(chip, 0x06));
 503         printk("  0x16: left MIC (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x16));
 504         printk("  0x07: right output    = 0x%02x  ", snd_cs4231_in(chip, 0x07));
 505         printk("  0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
 506         printk("  0x08: playback format = 0x%02x  ", snd_cs4231_in(chip, 0x08));
 507         printk("  0x18: IRQ status      = 0x%02x\n", snd_cs4231_in(chip, 0x18));
 508         printk("  0x09: iface (CFIG 1)  = 0x%02x  ", snd_cs4231_in(chip, 0x09));
 509         printk("  0x19: left line out   = 0x%02x\n", snd_cs4231_in(chip, 0x19));
 510         printk("  0x0a: pin control     = 0x%02x  ", snd_cs4231_in(chip, 0x0a));
 511         printk("  0x1a: mono control    = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
 512         printk("  0x0b: init & status   = 0x%02x  ", snd_cs4231_in(chip, 0x0b));
 513         printk("  0x1b: right line out  = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
 514         printk("  0x0c: revision & mode = 0x%02x  ", snd_cs4231_in(chip, 0x0c));
 515         printk("  0x1c: record format   = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
 516         printk("  0x0d: loopback        = 0x%02x  ", snd_cs4231_in(chip, 0x0d));
 517         printk("  0x1d: var freq (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
 518         printk("  0x0e: ply upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0e));
 519         printk("  0x1e: rec upr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
 520         printk("  0x0f: ply lwr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0f));
 521         printk("  0x1f: rec lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
 522 }
 523
 524 #endif
 525
 526 /*
 527  *  CS4231 detection / MCE routines
 528  */
 529
 530 static void snd_cs4231_busy_wait(cs4231_t *chip)
 531 {
 532         int timeout;
 533
 534         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
 535         for (timeout = 5; timeout > 0; timeout--)
 536                 __cs4231_readb(chip, CS4231P(chip, REGSEL));
 537         /* end of cleanup sequence */
 538         for (timeout = 250;
 539              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 540              timeout--)
 541                 udelay(100);
 542 }
 543
 544 static void snd_cs4231_mce_up(cs4231_t *chip)
 545 {
 546         unsigned long flags;
 547         int timeout;
 548
 549         spin_lock_irqsave(&chip->lock, flags);
 550         for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--)
 551                 udelay(100);
 552 #ifdef CONFIG_SND_DEBUG
 553         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 554                 snd_printk("mce_up - auto calibration time out (0)\n");
 555 #endif
 556         chip->mce_bit |= CS4231_MCE;
 557         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 558         if (timeout == 0x80)
 559                 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
 560         if (!(timeout & CS4231_MCE))
 561                 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 562         spin_unlock_irqrestore(&chip->lock, flags);
 563 }
 564
 565 static void snd_cs4231_mce_down(cs4231_t *chip)
 566 {
 567         unsigned long flags;
 568         int timeout;
 569         signed long time;
 570
 571         spin_lock_irqsave(&chip->lock, flags);
 572         snd_cs4231_busy_wait(chip);
 573 #if 0
 574         printk("(1) timeout = %i\n", timeout);
 575 #endif
 576 #ifdef CONFIG_SND_DEBUG
 577         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 578                 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", CS4231P(chip, REGSEL));
 579 #endif
 580         chip->mce_bit &= ~CS4231_MCE;
 581         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 582         __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 583         if (timeout == 0x80)
 584                 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
 585         if ((timeout & CS4231_MCE) == 0) {
 586                 spin_unlock_irqrestore(&chip->lock, flags);
 587                 return;
 588         }
 589         snd_cs4231_busy_wait(chip);
 590
 591         /* calibration process */
 592
 593         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
 594                 udelay(100);
 595         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
 596                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
 597                 spin_unlock_irqrestore(&chip->lock, flags);
 598                 return;
 599         }
 600 #if 0
 601         printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
 602 #endif
 603         time = HZ / 4;
 604         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
 605                 spin_unlock_irqrestore(&chip->lock, flags);
 606                 if (time <= 0) {
 607                         snd_printk("mce_down - auto calibration time out (2)\n");
 608                         return;
 609                 }
 610                 set_current_state(TASK_INTERRUPTIBLE);
 611                 time = schedule_timeout(time);
 612                 spin_lock_irqsave(&chip->lock, flags);
 613         }
 614 #if 0
 615         printk("(3) jiffies = %li\n", jiffies);
 616 #endif
 617         time = HZ / 10;
 618         while (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) {
 619                 spin_unlock_irqrestore(&chip->lock, flags);
 620                 if (time <= 0) {
 621                         snd_printk("mce_down - auto calibration time out (3)\n");
 622                         return;
 623                 }
 624                 set_current_state(TASK_INTERRUPTIBLE);
 625                 time = schedule_timeout(time);
 626                 spin_lock_irqsave(&chip->lock, flags);
 627         }
 628         spin_unlock_irqrestore(&chip->lock, flags);
 629 #if 0
 630         printk("(4) jiffies = %li\n", jiffies);
 631         snd_printk("mce_down - exit = 0x%x\n", __cs4231_readb(chip, CS4231P(chip, REGSEL)));
 632 #endif
 633 }
 634
 635 #if 0 /* Unused for now... */
 636 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
 637 {
 638         switch (format & 0xe0) {
 639         case CS4231_LINEAR_16:
 640         case CS4231_LINEAR_16_BIG:
 641                 size >>= 1;
 642                 break;
 643         case CS4231_ADPCM_16:
 644                 return size >> 2;
 645         }
 646         if (format & CS4231_STEREO)
 647                 size >>= 1;
 648         return size;
 649 }
 650 #endif
 651
 652 #ifdef EBUS_SUPPORT
 653 static void snd_cs4231_ebus_advance_dma(struct ebus_dma_info *p, snd_pcm_substream_t *substream, unsigned int *periods_sent)
 654 {
 655         snd_pcm_runtime_t *runtime = substream->runtime;
 656
 657         while (1) {
 658                 unsigned int dma_size = snd_pcm_lib_period_bytes(substream);
 659                 unsigned int offset = dma_size * (*periods_sent);
 660
 661                 if (dma_size >= (1 << 24))
 662                         BUG();
 663
 664                 if (ebus_dma_request(p, runtime->dma_addr + offset, dma_size))
 665                         return;
 666 #if 0
 667                 printk("ebus_advance: Sent period %u (size[%x] offset[%x])\n",
 668                        (*periods_sent), dma_size, offset);
 669 #endif
 670                 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
 671         }
 672 }
 673 #endif
 674
 675 static void cs4231_dma_trigger(cs4231_t *chip, unsigned int what, int on)
 676 {
 677 #ifdef EBUS_SUPPORT
 678         if (chip->flags & CS4231_FLAG_EBUS) {
 679                 if (what & CS4231_PLAYBACK_ENABLE) {
 680                         if (on) {
 681                                 ebus_dma_prepare(&chip->eb2p, 0);
 682                                 ebus_dma_enable(&chip->eb2p, 1);
 683                                 snd_cs4231_ebus_advance_dma(&chip->eb2p,
 684                                         chip->playback_substream,
 685                                         &chip->p_periods_sent);
 686                         } else {
 687                                 ebus_dma_enable(&chip->eb2p, 0);
 688                         }
 689                 }
 690                 if (what & CS4231_RECORD_ENABLE) {
 691                         if (on) {
 692                                 ebus_dma_prepare(&chip->eb2c, 1);
 693                                 ebus_dma_enable(&chip->eb2c, 1);
 694                                 snd_cs4231_ebus_advance_dma(&chip->eb2c,
 695                                         chip->capture_substream,
 696                                         &chip->c_periods_sent);
 697                         } else {
 698                                 ebus_dma_enable(&chip->eb2c, 0);
 699                         }
 700                 }
 701         } else {
 702 #endif
 703 #ifdef SBUS_SUPPORT
 704 #endif
 705 #ifdef EBUS_SUPPORT
 706         }
 707 #endif
 708 }
 709
 710 static int snd_cs4231_trigger(snd_pcm_substream_t *substream, int cmd)
 711 {
 712         cs4231_t *chip = snd_pcm_substream_chip(substream);
 713         int result = 0;
 714
 715         switch (cmd) {
 716         case SNDRV_PCM_TRIGGER_START:
 717         case SNDRV_PCM_TRIGGER_STOP:
 718         {
 719                 unsigned int what = 0;
 720                 snd_pcm_substream_t *s;
 721                 struct list_head *pos;
 722                 unsigned long flags;
 723
 724                 snd_pcm_group_for_each(pos, substream) {
 725                         s = snd_pcm_group_substream_entry(pos);
 726                         if (s == chip->playback_substream) {
 727                                 what |= CS4231_PLAYBACK_ENABLE;
 728                                 snd_pcm_trigger_done(s, substream);
 729                         } else if (s == chip->capture_substream) {
 730                                 what |= CS4231_RECORD_ENABLE;
 731                                 snd_pcm_trigger_done(s, substream);
 732                         }
 733                 }
 734
 735 #if 0
 736                 printk("TRIGGER: what[%x] on(%d)\n",
 737                        what, (cmd == SNDRV_PCM_TRIGGER_START));
 738 #endif
 739
 740                 spin_lock_irqsave(&chip->lock, flags);
 741                 if (cmd == SNDRV_PCM_TRIGGER_START) {
 742                         cs4231_dma_trigger(chip, what, 1);
 743                         chip->image[CS4231_IFACE_CTRL] |= what;
 744                         if (what & CS4231_PLAYBACK_ENABLE) {
 745                                 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, 0xff);
 746                                 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, 0xff);
 747                         }
 748                         if (what & CS4231_RECORD_ENABLE) {
 749                                 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, 0xff);
 750                                 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, 0xff);
 751                         }
 752                 } else {
 753                         cs4231_dma_trigger(chip, what, 0);
 754                         chip->image[CS4231_IFACE_CTRL] &= ~what;
 755                 }
 756                 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
 757                                chip->image[CS4231_IFACE_CTRL]);
 758                 spin_unlock_irqrestore(&chip->lock, flags);
 759                 break;
 760         }
 761         default:
 762                 result = -EINVAL;
 763                 break;
 764         }
 765 #if 0
 766         snd_cs4231_debug(chip);
 767 #endif
 768         return result;
 769 }
 770
 771 /*
 772  *  CODEC I/O
 773  */
 774
 775 static unsigned char snd_cs4231_get_rate(unsigned int rate)
 776 {
 777         int i;
 778
 779         for (i = 0; i < 14; i++)
 780                 if (rate == rates[i])
 781                         return freq_bits[i];
 782         // snd_BUG();
 783         return freq_bits[13];
 784 }
 785
 786 static unsigned char snd_cs4231_get_format(cs4231_t *chip, int format, int channels)
 787 {
 788         unsigned char rformat;
 789
 790         rformat = CS4231_LINEAR_8;
 791         switch (format) {
 792         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
 793         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
 794         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
 795         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
 796         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
 797         }
 798         if (channels > 1)
 799                 rformat |= CS4231_STEREO;
 800 #if 0
 801         snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
 802 #endif
 803         return rformat;
 804 }
 805
 806 static void snd_cs4231_calibrate_mute(cs4231_t *chip, int mute)
 807 {
 808         unsigned long flags;
 809
 810         mute = mute ? 1 : 0;
 811         spin_lock_irqsave(&chip->lock, flags);
 812         if (chip->calibrate_mute == mute) {
 813                 spin_unlock_irqrestore(&chip->lock, flags);
 814                 return;
 815         }
 816         if (!mute) {
 817                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
 818                                 chip->image[CS4231_LEFT_INPUT]);
 819                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
 820                                 chip->image[CS4231_RIGHT_INPUT]);
 821                 snd_cs4231_dout(chip, CS4231_LOOPBACK,
 822                                 chip->image[CS4231_LOOPBACK]);
 823         }
 824         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
 825                         mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
 826         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
 827                         mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
 828         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
 829                         mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
 830         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
 831                         mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
 832         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
 833                         mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
 834         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
 835                         mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
 836         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
 837                         mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
 838         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
 839                         mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
 840         snd_cs4231_dout(chip, CS4231_MONO_CTRL,
 841                         mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
 842         chip->calibrate_mute = mute;
 843         spin_unlock_irqrestore(&chip->lock, flags);
 844 }
 845
 846 static void snd_cs4231_playback_format(cs4231_t *chip, snd_pcm_hw_params_t *params,
 847                                        unsigned char pdfr)
 848 {
 849         unsigned long flags;
 850
 851         down(&chip->mce_mutex);
 852         snd_cs4231_calibrate_mute(chip, 1);
 853
 854         snd_cs4231_mce_up(chip);
 855
 856         spin_lock_irqsave(&chip->lock, flags);
 857         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 858                        (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
 859                        (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
 860                        pdfr);
 861         spin_unlock_irqrestore(&chip->lock, flags);
 862
 863         snd_cs4231_mce_down(chip);
 864
 865         snd_cs4231_calibrate_mute(chip, 0);
 866         up(&chip->mce_mutex);
 867 }
 868
 869 static void snd_cs4231_capture_format(cs4231_t *chip, snd_pcm_hw_params_t *params,
 870                                       unsigned char cdfr)
 871 {
 872         unsigned long flags;
 873
 874         down(&chip->mce_mutex);
 875         snd_cs4231_calibrate_mute(chip, 1);
 876
 877         snd_cs4231_mce_up(chip);
 878
 879         spin_lock_irqsave(&chip->lock, flags);
 880         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
 881                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 882                                ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
 883                                (cdfr & 0x0f));
 884                 spin_unlock_irqrestore(&chip->lock, flags);
 885                 snd_cs4231_mce_down(chip);
 886                 snd_cs4231_mce_up(chip);
 887                 spin_lock_irqsave(&chip->lock, flags);
 888         }
 889         snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
 890         spin_unlock_irqrestore(&chip->lock, flags);
 891
 892         snd_cs4231_mce_down(chip);
 893
 894         snd_cs4231_calibrate_mute(chip, 0);
 895         up(&chip->mce_mutex);
 896 }
 897
 898 /*
 899  *  Timer interface
 900  */
 901
 902 static unsigned long snd_cs4231_timer_resolution(snd_timer_t *timer)
 903 {
 904         cs4231_t *chip = snd_timer_chip(timer);
 905
 906         return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
 907 }
 908
 909 static int snd_cs4231_timer_start(snd_timer_t *timer)
 910 {
 911         unsigned long flags;
 912         unsigned int ticks;
 913         cs4231_t *chip = snd_timer_chip(timer);
 914
 915         spin_lock_irqsave(&chip->lock, flags);
 916         ticks = timer->sticks;
 917         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
 918             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
 919             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
 920                 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
 921                                chip->image[CS4231_TIMER_HIGH] =
 922                                (unsigned char) (ticks >> 8));
 923                 snd_cs4231_out(chip, CS4231_TIMER_LOW,
 924                                chip->image[CS4231_TIMER_LOW] =
 925                                (unsigned char) ticks);
 926                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 927                                chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
 928         }
 929         spin_unlock_irqrestore(&chip->lock, flags);
 930
 931         return 0;
 932 }
 933
 934 static int snd_cs4231_timer_stop(snd_timer_t *timer)
 935 {
 936         unsigned long flags;
 937         cs4231_t *chip = snd_timer_chip(timer);
 938
 939         spin_lock_irqsave(&chip->lock, flags);
 940         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 941                        chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
 942         spin_unlock_irqrestore(&chip->lock, flags);
 943
 944         return 0;
 945 }
 946
 947 static void snd_cs4231_init(cs4231_t *chip)
 948 {
 949         unsigned long flags;
 950
 951         snd_cs4231_mce_down(chip);
 952
 953 #ifdef SNDRV_DEBUG_MCE
 954         snd_printk("init: (1)\n");
 955 #endif
 956         snd_cs4231_mce_up(chip);
 957         spin_lock_irqsave(&chip->lock, flags);
 958         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 959                                             CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
 960                                             CS4231_CALIB_MODE);
 961         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
 962         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 963         spin_unlock_irqrestore(&chip->lock, flags);
 964         snd_cs4231_mce_down(chip);
 965
 966 #ifdef SNDRV_DEBUG_MCE
 967         snd_printk("init: (2)\n");
 968 #endif
 969
 970         snd_cs4231_mce_up(chip);
 971         spin_lock_irqsave(&chip->lock, flags);
 972         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
 973         spin_unlock_irqrestore(&chip->lock, flags);
 974         snd_cs4231_mce_down(chip);
 975
 976 #ifdef SNDRV_DEBUG_MCE
 977         snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
 978 #endif
 979
 980         spin_lock_irqsave(&chip->lock, flags);
 981         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
 982         spin_unlock_irqrestore(&chip->lock, flags);
 983
 984         snd_cs4231_mce_up(chip);
 985         spin_lock_irqsave(&chip->lock, flags);
 986         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
 987         spin_unlock_irqrestore(&chip->lock, flags);
 988         snd_cs4231_mce_down(chip);
 989
 990 #ifdef SNDRV_DEBUG_MCE
 991         snd_printk("init: (4)\n");
 992 #endif
 993
 994         snd_cs4231_mce_up(chip);
 995         spin_lock_irqsave(&chip->lock, flags);
 996         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
 997         spin_unlock_irqrestore(&chip->lock, flags);
 998         snd_cs4231_mce_down(chip);
 999
1000 #ifdef SNDRV_DEBUG_MCE
1001         snd_printk("init: (5)\n");
1002 #endif
1003 }
1004
1005 static int snd_cs4231_open(cs4231_t *chip, unsigned int mode)
1006 {
1007         unsigned long flags;
1008
1009         down(&chip->open_mutex);
1010         if ((chip->mode & mode)) {
1011                 up(&chip->open_mutex);
1012                 return -EAGAIN;
1013         }
1014         if (chip->mode & CS4231_MODE_OPEN) {
1015                 chip->mode |= mode;
1016                 up(&chip->open_mutex);
1017                 return 0;
1018         }
1019         /* ok. now enable and ack CODEC IRQ */
1020         spin_lock_irqsave(&chip->lock, flags);
1021         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
1022                        CS4231_RECORD_IRQ |
1023                        CS4231_TIMER_IRQ);
1024         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1025         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1026         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1027
1028         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
1029                        CS4231_RECORD_IRQ |
1030                        CS4231_TIMER_IRQ);
1031         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1032         spin_unlock_irqrestore(&chip->lock, flags);
1033
1034         chip->mode = mode;
1035         up(&chip->open_mutex);
1036         return 0;
1037 }
1038
1039 static void snd_cs4231_close(cs4231_t *chip, unsigned int mode)
1040 {
1041         unsigned long flags;
1042
1043         down(&chip->open_mutex);
1044         chip->mode &= ~mode;
1045         if (chip->mode & CS4231_MODE_OPEN) {
1046                 up(&chip->open_mutex);
1047                 return;
1048         }
1049         snd_cs4231_calibrate_mute(chip, 1);
1050
1051         /* disable IRQ */
1052         spin_lock_irqsave(&chip->lock, flags);
1053         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1054         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1055         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1056
1057         /* now disable record & playback */
1058
1059         if (chip->image[CS4231_IFACE_CTRL] &
1060             (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
1061              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
1062                 spin_unlock_irqrestore(&chip->lock, flags);
1063                 snd_cs4231_mce_up(chip);
1064                 spin_lock_irqsave(&chip->lock, flags);
1065                 chip->image[CS4231_IFACE_CTRL] &=
1066                         ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
1067                           CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
1068                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
1069                 spin_unlock_irqrestore(&chip->lock, flags);
1070                 snd_cs4231_mce_down(chip);
1071                 spin_lock_irqsave(&chip->lock, flags);
1072         }
1073
1074         /* clear IRQ again */
1075         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1076         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1077         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1078         spin_unlock_irqrestore(&chip->lock, flags);
1079
1080         snd_cs4231_calibrate_mute(chip, 0);
1081
1082         chip->mode = 0;
1083         up(&chip->open_mutex);
1084 }
1085
1086 /*
1087  *  timer open/close
1088  */
1089
1090 static int snd_cs4231_timer_open(snd_timer_t *timer)
1091 {
1092         cs4231_t *chip = snd_timer_chip(timer);
1093         snd_cs4231_open(chip, CS4231_MODE_TIMER);
1094         return 0;
1095 }
1096
1097 static int snd_cs4231_timer_close(snd_timer_t * timer)
1098 {
1099         cs4231_t *chip = snd_timer_chip(timer);
1100         snd_cs4231_close(chip, CS4231_MODE_TIMER);
1101         return 0;
1102 }
1103
1104 static struct _snd_timer_hardware snd_cs4231_timer_table =
1105 {
1106         .flags          =       SNDRV_TIMER_HW_AUTO,
1107         .resolution     =       9945,
1108         .ticks          =       65535,
1109         .open           =       snd_cs4231_timer_open,
1110         .close          =       snd_cs4231_timer_close,
1111         .c_resolution   =       snd_cs4231_timer_resolution,
1112         .start          =       snd_cs4231_timer_start,
1113         .stop           =       snd_cs4231_timer_stop,
1114 };
1115
1116 /*
1117  *  ok.. exported functions..
1118  */
1119
1120 static int snd_cs4231_playback_hw_params(snd_pcm_substream_t *substream,
1121                                          snd_pcm_hw_params_t *hw_params)
1122 {
1123         cs4231_t *chip = snd_pcm_substream_chip(substream);
1124         unsigned char new_pdfr;
1125         int err;
1126
1127         if ((err = snd_pcm_lib_malloc_pages(substream,
1128                                             params_buffer_bytes(hw_params))) < 0)
1129                 return err;
1130         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1131                                          params_channels(hw_params)) |
1132                 snd_cs4231_get_rate(params_rate(hw_params));
1133         snd_cs4231_playback_format(chip, hw_params, new_pdfr);
1134
1135         return 0;
1136 }
1137
1138 static int snd_cs4231_playback_hw_free(snd_pcm_substream_t *substream)
1139 {
1140         return snd_pcm_lib_free_pages(substream);
1141 }
1142
1143 static int snd_cs4231_playback_prepare(snd_pcm_substream_t *substream)
1144 {
1145         cs4231_t *chip = snd_pcm_substream_chip(substream);
1146         unsigned long flags;
1147
1148         spin_lock_irqsave(&chip->lock, flags);
1149         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
1150                                             CS4231_PLAYBACK_PIO);
1151         spin_unlock_irqrestore(&chip->lock, flags);
1152
1153         return 0;
1154 }
1155
1156 static int snd_cs4231_capture_hw_params(snd_pcm_substream_t *substream,
1157                                         snd_pcm_hw_params_t *hw_params)
1158 {
1159         cs4231_t *chip = snd_pcm_substream_chip(substream);
1160         unsigned char new_cdfr;
1161         int err;
1162
1163         if ((err = snd_pcm_lib_malloc_pages(substream,
1164                                             params_buffer_bytes(hw_params))) < 0)
1165                 return err;
1166         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1167                                          params_channels(hw_params)) |
1168                 snd_cs4231_get_rate(params_rate(hw_params));
1169         snd_cs4231_capture_format(chip, hw_params, new_cdfr);
1170
1171         return 0;
1172 }
1173
1174 static int snd_cs4231_capture_hw_free(snd_pcm_substream_t *substream)
1175 {
1176         return snd_pcm_lib_free_pages(substream);
1177 }
1178
1179 static int snd_cs4231_capture_prepare(snd_pcm_substream_t *substream)
1180 {
1181         cs4231_t *chip = snd_pcm_substream_chip(substream);
1182         unsigned long flags;
1183
1184         spin_lock_irqsave(&chip->lock, flags);
1185         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
1186                                             CS4231_RECORD_PIO);
1187
1188         spin_unlock_irqrestore(&chip->lock, flags);
1189
1190         return 0;
1191 }
1192
1193 static void snd_cs4231_overrange(cs4231_t *chip)
1194 {
1195         unsigned long flags;
1196         unsigned char res;
1197
1198         spin_lock_irqsave(&chip->lock, flags);
1199         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
1200         spin_unlock_irqrestore(&chip->lock, flags);
1201
1202         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1203                 chip->capture_substream->runtime->overrange++;
1204 }
1205
1206 static void snd_cs4231_generic_interrupt(cs4231_t *chip)
1207 {
1208         unsigned long flags;
1209         unsigned char status;
1210
1211         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1212         if (!status)
1213                 return;
1214
1215         if (status & CS4231_TIMER_IRQ) {
1216                 if (chip->timer)
1217                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1218         }
1219         if (status & CS4231_PLAYBACK_IRQ)
1220                 snd_pcm_period_elapsed(chip->playback_substream);
1221         if (status & CS4231_RECORD_IRQ) {
1222                 snd_cs4231_overrange(chip);
1223                 snd_pcm_period_elapsed(chip->capture_substream);
1224         }
1225
1226         /* ACK the CS4231 interrupt. */
1227         spin_lock_irqsave(&chip->lock, flags);
1228         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1229         spin_unlock_irqrestore(&chip->lock, flags);
1230 }
1231
1232 #ifdef SBUS_SUPPORT
1233 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1234 {
1235         cs4231_t *chip = snd_magic_cast(cs4231_t, dev_id, return);
1236         u32 csr;
1237
1238         csr = sbus_readl(chip->port + APCCSR);
1239         if (!(csr & (APC_INT_PENDING |
1240                      APC_PLAY_INT |
1241                      APC_CAPT_INT |
1242                      APC_GENL_INT |
1243                      APC_XINT_PEMP |
1244                      APC_XINT_CEMP)))
1245                 return IRQ_NONE;
1246
1247         /* ACK the APC interrupt. */
1248         sbus_writel(csr, chip->port + APCCSR);
1249
1250         snd_cs4231_generic_interrupt(chip);
1251
1252         return IRQ_HANDLED;
1253 }
1254 #endif
1255
1256 #ifdef EBUS_SUPPORT
1257 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, void *cookie)
1258 {
1259         cs4231_t *chip = snd_magic_cast(cs4231_t, cookie, return);
1260
1261         if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
1262                 snd_pcm_period_elapsed(chip->playback_substream);
1263                 snd_cs4231_ebus_advance_dma(p, chip->playback_substream,
1264                                             &chip->p_periods_sent);
1265         }
1266 }
1267
1268 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, int event, void *cookie)
1269 {
1270         cs4231_t *chip = snd_magic_cast(cs4231_t, cookie, return);
1271
1272         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1273                 snd_pcm_period_elapsed(chip->capture_substream);
1274                 snd_cs4231_ebus_advance_dma(p, chip->capture_substream,
1275                                             &chip->c_periods_sent);
1276         }
1277 }
1278 #endif
1279
1280 static snd_pcm_uframes_t snd_cs4231_playback_pointer(snd_pcm_substream_t *substream)
1281 {
1282         cs4231_t *chip = snd_pcm_substream_chip(substream);
1283         size_t ptr, residue, period_bytes;
1284
1285         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1286                 return 0;
1287         period_bytes = snd_pcm_lib_period_bytes(substream);
1288         ptr = period_bytes * chip->p_periods_sent;
1289 #ifdef EBUS_SUPPORT
1290         if (chip->flags & CS4231_FLAG_EBUS) {
1291                 residue = ebus_dma_residue(&chip->eb2p);
1292         } else {
1293 #endif
1294 #ifdef SBUS_SUPPORT
1295                 residue = sbus_readl(chip->port + APCPC);
1296 #endif
1297 #ifdef EBUS_SUPPORT
1298         }
1299 #endif
1300         ptr += (period_bytes - residue);
1301         return bytes_to_frames(substream->runtime, ptr);
1302 }
1303
1304 static snd_pcm_uframes_t snd_cs4231_capture_pointer(snd_pcm_substream_t * substream)
1305 {
1306         cs4231_t *chip = snd_pcm_substream_chip(substream);
1307         size_t ptr, residue, period_bytes;
1308
1309         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1310                 return 0;
1311         period_bytes = snd_pcm_lib_period_bytes(substream);
1312         ptr = period_bytes * chip->c_periods_sent;
1313 #ifdef EBUS_SUPPORT
1314         if (chip->flags & CS4231_FLAG_EBUS) {
1315                 residue = ebus_dma_residue(&chip->eb2c);
1316         } else {
1317 #endif
1318 #ifdef SBUS_SUPPORT
1319                 residue = sbus_readl(chip->port + APCCC);
1320 #endif
1321 #ifdef EBUS_SUPPORT
1322         }
1323 #endif
1324         ptr += (period_bytes - residue);
1325         return bytes_to_frames(substream->runtime, ptr);
1326 }
1327
1328 /*
1329
1330  */
1331
1332 static int snd_cs4231_probe(cs4231_t *chip)
1333 {
1334         unsigned long flags;
1335         int i, id, vers;
1336         unsigned char *ptr;
1337
1338 #if 0
1339         snd_cs4231_debug(chip);
1340 #endif
1341         id = vers = 0;
1342         for (i = 0; i < 50; i++) {
1343                 mb();
1344                 if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
1345                         udelay(2000);
1346                 else {
1347                         spin_lock_irqsave(&chip->lock, flags);
1348                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1349                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1350                         vers = snd_cs4231_in(chip, CS4231_VERSION);
1351                         spin_unlock_irqrestore(&chip->lock, flags);
1352                         if (id == 0x0a)
1353                                 break;  /* this is valid value */
1354                 }
1355         }
1356         snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1357         if (id != 0x0a)
1358                 return -ENODEV; /* no valid device found */
1359
1360         spin_lock_irqsave(&chip->lock, flags);
1361
1362
1363         /* Reset DMA engine.  */
1364 #ifdef EBUS_SUPPORT
1365         if (chip->flags & CS4231_FLAG_EBUS) {
1366                 /* Done by ebus_dma_register */
1367         } else {
1368 #endif
1369 #ifdef SBUS_SUPPORT
1370                 sbus_writel(APC_CHIP_RESET, chip->port + APCCSR);
1371                 sbus_writel(0x00, chip->port + APCCSR);
1372                 sbus_writel(sbus_readl(chip->port + APCCSR) | APC_CDC_RESET,
1373                             chip->port + APCCSR);
1374
1375                 udelay(20);
1376
1377                 sbus_writel(sbus_readl(chip->port + APCCSR) & ~APC_CDC_RESET,
1378                             chip->port + APCCSR);
1379                 sbus_writel(sbus_readl(chip->port + APCCSR) | (APC_XINT_ENA |
1380                                                                APC_XINT_PENA |
1381                                                                APC_XINT_CENA),
1382                             chip->port + APCCSR);
1383 #endif
1384 #ifdef EBUS_SUPPORT
1385         }
1386 #endif
1387
1388         __cs4231_readb(chip, CS4231P(chip, STATUS));    /* clear any pendings IRQ */
1389         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));
1390         mb();
1391
1392         spin_unlock_irqrestore(&chip->lock, flags);
1393
1394         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1395         chip->image[CS4231_IFACE_CTRL] =
1396                 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1397         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1398         chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1399         if (vers & 0x20)
1400                 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1401
1402         ptr = (unsigned char *) &chip->image;
1403
1404         snd_cs4231_mce_down(chip);
1405
1406         spin_lock_irqsave(&chip->lock, flags);
1407
1408         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1409                 snd_cs4231_out(chip, i, *ptr++);
1410
1411         spin_unlock_irqrestore(&chip->lock, flags);
1412
1413         snd_cs4231_mce_up(chip);
1414
1415         snd_cs4231_mce_down(chip);
1416
1417         mdelay(2);
1418
1419         return 0;               /* all things are ok.. */
1420 }
1421
1422 static snd_pcm_hardware_t snd_cs4231_playback =
1423 {
1424         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1425                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1426         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1427                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1428                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1429                                  SNDRV_PCM_FMTBIT_S16_BE),
1430         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1431         .rate_min               = 5510,
1432         .rate_max               = 48000,
1433         .channels_min           = 1,
1434         .channels_max           = 2,
1435         .buffer_bytes_max       = (32*1024),
1436         .period_bytes_min       = 4096,
1437         .period_bytes_max       = (32*1024),
1438         .periods_min            = 1,
1439         .periods_max            = 1024,
1440 };
1441
1442 static snd_pcm_hardware_t snd_cs4231_capture =
1443 {
1444         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1445                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1446         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1447                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1448                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1449                                  SNDRV_PCM_FMTBIT_S16_BE),
1450         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1451         .rate_min               = 5510,
1452         .rate_max               = 48000,
1453         .channels_min           = 1,
1454         .channels_max           = 2,
1455         .buffer_bytes_max       = (32*1024),
1456         .period_bytes_min       = 4096,
1457         .period_bytes_max       = (32*1024),
1458         .periods_min            = 1,
1459         .periods_max            = 1024,
1460 };
1461
1462 static int snd_cs4231_playback_open(snd_pcm_substream_t *substream)
1463 {
1464         cs4231_t *chip = snd_pcm_substream_chip(substream);
1465         snd_pcm_runtime_t *runtime = substream->runtime;
1466         int err;
1467
1468         runtime->hw = snd_cs4231_playback;
1469
1470         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1471                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1472                 return err;
1473         }
1474         chip->playback_substream = substream;
1475         chip->p_periods_sent = 0;
1476         snd_pcm_set_sync(substream);
1477         snd_cs4231_xrate(runtime);
1478
1479         return 0;
1480 }
1481
1482 static int snd_cs4231_capture_open(snd_pcm_substream_t *substream)
1483 {
1484         cs4231_t *chip = snd_pcm_substream_chip(substream);
1485         snd_pcm_runtime_t *runtime = substream->runtime;
1486         int err;
1487
1488         runtime->hw = snd_cs4231_capture;
1489
1490         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1491                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1492                 return err;
1493         }
1494         chip->capture_substream = substream;
1495         chip->c_periods_sent = 0;
1496         snd_pcm_set_sync(substream);
1497         snd_cs4231_xrate(runtime);
1498
1499         return 0;
1500 }
1501
1502 static int snd_cs4231_playback_close(snd_pcm_substream_t *substream)
1503 {
1504         cs4231_t *chip = snd_pcm_substream_chip(substream);
1505
1506         chip->playback_substream = NULL;
1507         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1508
1509         return 0;
1510 }
1511
1512 static int snd_cs4231_capture_close(snd_pcm_substream_t *substream)
1513 {
1514         cs4231_t *chip = snd_pcm_substream_chip(substream);
1515
1516         chip->capture_substream = NULL;
1517         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1518
1519         return 0;
1520 }
1521
1522 /* XXX We can do some power-management, in particular on EBUS using
1523  * XXX the audio AUXIO register...
1524  */
1525
1526 static snd_pcm_ops_t snd_cs4231_playback_ops = {
1527         .open           =       snd_cs4231_playback_open,
1528         .close          =       snd_cs4231_playback_close,
1529         .ioctl          =       snd_pcm_lib_ioctl,
1530         .hw_params      =       snd_cs4231_playback_hw_params,
1531         .hw_free        =       snd_cs4231_playback_hw_free,
1532         .prepare        =       snd_cs4231_playback_prepare,
1533         .trigger        =       snd_cs4231_trigger,
1534         .pointer        =       snd_cs4231_playback_pointer,
1535 };
1536
1537 static snd_pcm_ops_t snd_cs4231_capture_ops = {
1538         .open           =       snd_cs4231_capture_open,
1539         .close          =       snd_cs4231_capture_close,
1540         .ioctl          =       snd_pcm_lib_ioctl,
1541         .hw_params      =       snd_cs4231_capture_hw_params,
1542         .hw_free        =       snd_cs4231_capture_hw_free,
1543         .prepare        =       snd_cs4231_capture_prepare,
1544         .trigger        =       snd_cs4231_trigger,
1545         .pointer        =       snd_cs4231_capture_pointer,
1546 };
1547
1548 static void snd_cs4231_pcm_free(snd_pcm_t *pcm)
1549 {
1550         cs4231_t *chip = snd_magic_cast(cs4231_t, pcm->private_data, return);
1551         chip->pcm = NULL;
1552         snd_pcm_lib_preallocate_free_for_all(pcm);
1553 }
1554
1555 int snd_cs4231_pcm(cs4231_t *chip)
1556 {
1557         snd_pcm_t *pcm;
1558         int err;
1559
1560         if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0)
1561                 return err;
1562
1563         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1564         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1565
1566         /* global setup */
1567         pcm->private_data = chip;
1568         pcm->private_free = snd_cs4231_pcm_free;
1569         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1570         strcpy(pcm->name, "CS4231");
1571
1572 #ifdef EBUS_SUPPORT
1573         if (chip->flags & CS4231_FLAG_EBUS) {
1574                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1575                                                       snd_dma_pci_data(chip->dev_u.pdev),
1576                                                       64*1024, 128*1024);
1577         } else {
1578 #endif
1579 #ifdef SBUS_SUPPORT
1580                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1581                                                       snd_dma_sbus_data(chip->dev_u.sdev),
1582                                                       64*1024, 128*1024);
1583 #endif
1584 #ifdef EBUS_SUPPORT
1585         }
1586 #endif
1587
1588         chip->pcm = pcm;
1589
1590         return 0;
1591 }
1592
1593 static void snd_cs4231_timer_free(snd_timer_t *timer)
1594 {
1595         cs4231_t *chip = snd_magic_cast(cs4231_t, timer->private_data, return);
1596         chip->timer = NULL;
1597 }
1598
1599 int snd_cs4231_timer(cs4231_t *chip)
1600 {
1601         snd_timer_t *timer;
1602         snd_timer_id_t tid;
1603         int err;
1604
1605         /* Timer initialization */
1606         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1607         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1608         tid.card = chip->card->number;
1609         tid.device = 0;
1610         tid.subdevice = 0;
1611         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1612                 return err;
1613         strcpy(timer->name, "CS4231");
1614         timer->private_data = chip;
1615         timer->private_free = snd_cs4231_timer_free;
1616         timer->hw = snd_cs4231_timer_table;
1617         chip->timer = timer;
1618
1619         return 0;
1620 }
1621
1622 /*
1623  *  MIXER part
1624  */
1625
1626 static int snd_cs4231_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1627 {
1628         static char *texts[4] = {
1629                 "Line", "CD", "Mic", "Mix"
1630         };
1631         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1632
1633         snd_assert(chip->card != NULL, return -EINVAL);
1634         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1635         uinfo->count = 2;
1636         uinfo->value.enumerated.items = 4;
1637         if (uinfo->value.enumerated.item > 3)
1638                 uinfo->value.enumerated.item = 3;
1639         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1640
1641         return 0;
1642 }
1643
1644 static int snd_cs4231_get_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1645 {
1646         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1647         unsigned long flags;
1648
1649         spin_lock_irqsave(&chip->lock, flags);
1650         ucontrol->value.enumerated.item[0] =
1651                 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1652         ucontrol->value.enumerated.item[1] =
1653                 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1654         spin_unlock_irqrestore(&chip->lock, flags);
1655
1656         return 0;
1657 }
1658
1659 static int snd_cs4231_put_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1660 {
1661         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1662         unsigned long flags;
1663         unsigned short left, right;
1664         int change;
1665
1666         if (ucontrol->value.enumerated.item[0] > 3 ||
1667             ucontrol->value.enumerated.item[1] > 3)
1668                 return -EINVAL;
1669         left = ucontrol->value.enumerated.item[0] << 6;
1670         right = ucontrol->value.enumerated.item[1] << 6;
1671
1672         spin_lock_irqsave(&chip->lock, flags);
1673
1674         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1675         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1676         change = left != chip->image[CS4231_LEFT_INPUT] ||
1677                  right != chip->image[CS4231_RIGHT_INPUT];
1678         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1679         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1680
1681         spin_unlock_irqrestore(&chip->lock, flags);
1682
1683         return change;
1684 }
1685
1686 int snd_cs4231_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1687 {
1688         int mask = (kcontrol->private_value >> 16) & 0xff;
1689
1690         uinfo->type = (mask == 1) ?
1691                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1692         uinfo->count = 1;
1693         uinfo->value.integer.min = 0;
1694         uinfo->value.integer.max = mask;
1695
1696         return 0;
1697 }
1698
1699 int snd_cs4231_get_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1700 {
1701         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1702         unsigned long flags;
1703         int reg = kcontrol->private_value & 0xff;
1704         int shift = (kcontrol->private_value >> 8) & 0xff;
1705         int mask = (kcontrol->private_value >> 16) & 0xff;
1706         int invert = (kcontrol->private_value >> 24) & 0xff;
1707
1708         spin_lock_irqsave(&chip->lock, flags);
1709
1710         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1711
1712         spin_unlock_irqrestore(&chip->lock, flags);
1713
1714         if (invert)
1715                 ucontrol->value.integer.value[0] =
1716                         (mask - ucontrol->value.integer.value[0]);
1717
1718         return 0;
1719 }
1720
1721 int snd_cs4231_put_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1722 {
1723         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1724         unsigned long flags;
1725         int reg = kcontrol->private_value & 0xff;
1726         int shift = (kcontrol->private_value >> 8) & 0xff;
1727         int mask = (kcontrol->private_value >> 16) & 0xff;
1728         int invert = (kcontrol->private_value >> 24) & 0xff;
1729         int change;
1730         unsigned short val;
1731
1732         val = (ucontrol->value.integer.value[0] & mask);
1733         if (invert)
1734                 val = mask - val;
1735         val <<= shift;
1736
1737         spin_lock_irqsave(&chip->lock, flags);
1738
1739         val = (chip->image[reg] & ~(mask << shift)) | val;
1740         change = val != chip->image[reg];
1741         snd_cs4231_out(chip, reg, val);
1742
1743         spin_unlock_irqrestore(&chip->lock, flags);
1744
1745         return change;
1746 }
1747
1748 int snd_cs4231_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1749 {
1750         int mask = (kcontrol->private_value >> 24) & 0xff;
1751
1752         uinfo->type = mask == 1 ?
1753                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1754         uinfo->count = 2;
1755         uinfo->value.integer.min = 0;
1756         uinfo->value.integer.max = mask;
1757
1758         return 0;
1759 }
1760
1761 int snd_cs4231_get_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1762 {
1763         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1764         unsigned long flags;
1765         int left_reg = kcontrol->private_value & 0xff;
1766         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1767         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1768         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1769         int mask = (kcontrol->private_value >> 24) & 0xff;
1770         int invert = (kcontrol->private_value >> 22) & 1;
1771
1772         spin_lock_irqsave(&chip->lock, flags);
1773
1774         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1775         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1776
1777         spin_unlock_irqrestore(&chip->lock, flags);
1778
1779         if (invert) {
1780                 ucontrol->value.integer.value[0] =
1781                         (mask - ucontrol->value.integer.value[0]);
1782                 ucontrol->value.integer.value[1] =
1783                         (mask - ucontrol->value.integer.value[1]);
1784         }
1785
1786         return 0;
1787 }
1788
1789 int snd_cs4231_put_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1790 {
1791         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1792         unsigned long flags;
1793         int left_reg = kcontrol->private_value & 0xff;
1794         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1795         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1796         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1797         int mask = (kcontrol->private_value >> 24) & 0xff;
1798         int invert = (kcontrol->private_value >> 22) & 1;
1799         int change;
1800         unsigned short val1, val2;
1801
1802         val1 = ucontrol->value.integer.value[0] & mask;
1803         val2 = ucontrol->value.integer.value[1] & mask;
1804         if (invert) {
1805                 val1 = mask - val1;
1806                 val2 = mask - val2;
1807         }
1808         val1 <<= shift_left;
1809         val2 <<= shift_right;
1810
1811         spin_lock_irqsave(&chip->lock, flags);
1812
1813         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1814         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1815         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1816         snd_cs4231_out(chip, left_reg, val1);
1817         snd_cs4231_out(chip, right_reg, val2);
1818
1819         spin_unlock_irqrestore(&chip->lock, flags);
1820
1821         return change;
1822 }
1823
1824 #define CS4231_CONTROLS (sizeof(snd_cs4231_controls)/sizeof(snd_kcontrol_new_t))
1825
1826 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1827 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1828   .info = snd_cs4231_info_single, \
1829   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1830   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1831
1832 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1833 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1834   .info = snd_cs4231_info_double, \
1835   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1836   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1837
1838 static snd_kcontrol_new_t snd_cs4231_controls[] = {
1839 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1840 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1841 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1842 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1843 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1844 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1845 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1846 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1847 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1848 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1849 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1850 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1851 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1852 {
1853         .iface  = SNDRV_CTL_ELEM_IFACE_MIXER,
1854         .name   = "Capture Source",
1855         .info   = snd_cs4231_info_mux,
1856         .get    = snd_cs4231_get_mux,
1857         .put    = snd_cs4231_put_mux,
1858 },
1859 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1860 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1861 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1862 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1863 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1864 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1865 };
1866
1867 int snd_cs4231_mixer(cs4231_t *chip)
1868 {
1869         snd_card_t *card;
1870         int err, idx;
1871
1872         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1873
1874         card = chip->card;
1875
1876         strcpy(card->mixername, chip->pcm->name);
1877
1878         for (idx = 0; idx < CS4231_CONTROLS; idx++) {
1879                 if ((err = snd_ctl_add(card,
1880                                        snd_ctl_new1(&snd_cs4231_controls[idx],
1881                                                     chip))) < 0)
1882                         return err;
1883         }
1884         return 0;
1885 }
1886
1887 static int dev;
1888
1889 static int cs4231_attach_begin(snd_card_t **rcard)
1890 {
1891         snd_card_t *card;
1892
1893         *rcard = NULL;
1894
1895         if (dev >= SNDRV_CARDS)
1896                 return -ENODEV;
1897
1898         if (!enable[dev]) {
1899                 dev++;
1900                 return -ENOENT;
1901         }
1902
1903         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1904         if (card == NULL)
1905                 return -ENOMEM;
1906
1907         strcpy(card->driver, "CS4231");
1908         strcpy(card->shortname, "Sun CS4231");
1909
1910         *rcard = card;
1911         return 0;
1912 }
1913
1914 static int cs4231_attach_finish(snd_card_t *card, cs4231_t *chip)
1915 {
1916         int err;
1917
1918         if ((err = snd_cs4231_pcm(chip)) < 0)
1919                 goto out_err;
1920
1921         if ((err = snd_cs4231_mixer(chip)) < 0)
1922                 goto out_err;
1923
1924         if ((err = snd_cs4231_timer(chip)) < 0)
1925                 goto out_err;
1926
1927         if ((err = snd_card_register(card)) < 0)
1928                 goto out_err;
1929
1930         chip->next = cs4231_list;
1931         cs4231_list = chip;
1932
1933         dev++;
1934         return 0;
1935
1936 out_err:
1937         snd_card_free(card);
1938         return err;
1939 }
1940
1941 #ifdef SBUS_SUPPORT
1942 static int snd_cs4231_sbus_free(cs4231_t *chip)
1943 {
1944         if (chip->irq[0])
1945                 free_irq(chip->irq[0], chip);
1946
1947         if (chip->port)
1948                 sbus_iounmap(chip->port, chip->regs_size);
1949
1950         if (chip->timer)
1951                 snd_device_free(chip->card, chip->timer);
1952
1953         snd_magic_kfree(chip);
1954
1955         return 0;
1956 }
1957
1958 static int snd_cs4231_sbus_dev_free(snd_device_t *device)
1959 {
1960         cs4231_t *cp = snd_magic_cast(cs4231_t, device->device_data, return -ENXIO);
1961
1962         return snd_cs4231_sbus_free(cp);
1963 }
1964
1965 static snd_device_ops_t snd_cs4231_sbus_dev_ops = {
1966         .dev_free       =       snd_cs4231_sbus_dev_free,
1967 };
1968
1969 static int __init snd_cs4231_sbus_create(snd_card_t *card,
1970                                          struct sbus_dev *sdev,
1971                                          int dev,
1972                                          cs4231_t **rchip)
1973 {
1974         cs4231_t *chip;
1975         int err;
1976
1977         *rchip = NULL;
1978         chip = snd_magic_kcalloc(cs4231_t, 0, GFP_KERNEL);
1979         if (chip == NULL)
1980                 return -ENOMEM;
1981
1982         spin_lock_init(&chip->lock);
1983         init_MUTEX(&chip->mce_mutex);
1984         init_MUTEX(&chip->open_mutex);
1985         chip->card = card;
1986         chip->dev_u.sdev = sdev;
1987         chip->regs_size = sdev->reg_addrs[0].reg_size;
1988         memcpy(&chip->image, &snd_cs4231_original_image,
1989                sizeof(snd_cs4231_original_image));
1990
1991         chip->port = sbus_ioremap(&sdev->resource[0], 0,
1992                                   chip->regs_size, "cs4231");
1993         if (!chip->port) {
1994                 snd_printk("cs4231-%d: Unable to map chip registers.\n", dev);
1995                 return -EIO;
1996         }
1997
1998         if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
1999                         SA_SHIRQ, "cs4231", chip)) {
2000                 snd_printk("cs4231-%d: Unable to grab SBUS IRQ %s\n",
2001                            dev,
2002                            __irq_itoa(sdev->irqs[0]));
2003                 snd_cs4231_sbus_free(chip);
2004                 return -EBUSY;
2005         }
2006         chip->irq[0] = sdev->irqs[0];
2007
2008         if (snd_cs4231_probe(chip) < 0) {
2009                 snd_cs4231_sbus_free(chip);
2010                 return -ENODEV;
2011         }
2012         snd_cs4231_init(chip);
2013
2014         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2015                                   chip, &snd_cs4231_sbus_dev_ops)) < 0) {
2016                 snd_cs4231_sbus_free(chip);
2017                 return err;
2018         }
2019
2020         *rchip = chip;
2021         return 0;
2022 }
2023
2024 static int cs4231_sbus_attach(struct sbus_dev *sdev)
2025 {
2026         struct resource *rp = &sdev->resource[0];
2027         cs4231_t *cp;
2028         snd_card_t *card;
2029         int err;
2030
2031         err = cs4231_attach_begin(&card);
2032         if (err)
2033                 return err;
2034
2035         sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %s",
2036                 card->shortname,
2037                 rp->flags & 0xffL,
2038                 rp->start,
2039                 __irq_itoa(sdev->irqs[0]));
2040
2041         if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) {
2042                 snd_card_free(card);
2043                 return err;
2044         }
2045
2046         return cs4231_attach_finish(card, cp);
2047 }
2048 #endif
2049
2050 #ifdef EBUS_SUPPORT
2051 static int snd_cs4231_ebus_free(cs4231_t *chip)
2052 {
2053         if (chip->eb2c.regs) {
2054                 ebus_dma_unregister(&chip->eb2c);
2055                 iounmap(chip->eb2c.regs);
2056         }
2057         if (chip->eb2p.regs) {
2058                 ebus_dma_unregister(&chip->eb2p);
2059                 iounmap(chip->eb2p.regs);
2060         }
2061
2062         if (chip->port)
2063                 iounmap(chip->port);
2064         if (chip->timer)
2065                 snd_device_free(chip->card, chip->timer);
2066
2067         snd_magic_kfree(chip);
2068
2069         return 0;
2070 }
2071
2072 static int snd_cs4231_ebus_dev_free(snd_device_t *device)
2073 {
2074         cs4231_t *cp = snd_magic_cast(cs4231_t, device->device_data, return -ENXIO);
2075
2076         return snd_cs4231_ebus_free(cp);
2077 }
2078
2079 static snd_device_ops_t snd_cs4231_ebus_dev_ops = {
2080         .dev_free       =       snd_cs4231_ebus_dev_free,
2081 };
2082
2083 static int __init snd_cs4231_ebus_create(snd_card_t *card,
2084                                          struct linux_ebus_device *edev,
2085                                          int dev,
2086                                          cs4231_t **rchip)
2087 {
2088         cs4231_t *chip;
2089         int err;
2090
2091         *rchip = NULL;
2092         chip = snd_magic_kcalloc(cs4231_t, 0, GFP_KERNEL);
2093         if (chip == NULL)
2094                 return -ENOMEM;
2095
2096         spin_lock_init(&chip->lock);
2097         spin_lock_init(&chip->eb2c.lock);
2098         spin_lock_init(&chip->eb2p.lock);
2099         init_MUTEX(&chip->mce_mutex);
2100         init_MUTEX(&chip->open_mutex);
2101         chip->flags |= CS4231_FLAG_EBUS;
2102         chip->card = card;
2103         chip->dev_u.pdev = edev->bus->self;
2104         memcpy(&chip->image, &snd_cs4231_original_image,
2105                sizeof(snd_cs4231_original_image));
2106         strcpy(chip->eb2c.name, "cs4231(capture)");
2107         chip->eb2c.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2108         chip->eb2c.callback = snd_cs4231_ebus_capture_callback;
2109         chip->eb2c.client_cookie = chip;
2110         chip->eb2c.irq = edev->irqs[0];
2111         strcpy(chip->eb2p.name, "cs4231(play)");
2112         chip->eb2p.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2113         chip->eb2p.callback = snd_cs4231_ebus_play_callback;
2114         chip->eb2p.client_cookie = chip;
2115         chip->eb2p.irq = edev->irqs[1];
2116
2117         chip->port = (unsigned long) ioremap(edev->resource[0].start, 0x10);
2118         chip->eb2p.regs = (unsigned long) ioremap(edev->resource[1].start, 0x10);
2119         chip->eb2c.regs = (unsigned long) ioremap(edev->resource[2].start, 0x10);
2120         if (!chip->port || !chip->eb2p.regs || !chip->eb2c.regs) {
2121                 snd_cs4231_ebus_free(chip);
2122                 snd_printk("cs4231-%d: Unable to map chip registers.\n", dev);
2123                 return -EIO;
2124         }
2125
2126         if (ebus_dma_register(&chip->eb2c)) {
2127                 snd_cs4231_ebus_free(chip);
2128                 snd_printk("cs4231-%d: Unable to register EBUS capture DMA\n", dev);
2129                 return -EBUSY;
2130         }
2131         if (ebus_dma_irq_enable(&chip->eb2c, 1)) {
2132                 snd_cs4231_ebus_free(chip);
2133                 snd_printk("cs4231-%d: Unable to enable EBUS capture IRQ\n", dev);
2134                 return -EBUSY;
2135         }
2136
2137         if (ebus_dma_register(&chip->eb2p)) {
2138                 snd_cs4231_ebus_free(chip);
2139                 snd_printk("cs4231-%d: Unable to register EBUS play DMA\n", dev);
2140                 return -EBUSY;
2141         }
2142         if (ebus_dma_irq_enable(&chip->eb2p, 1)) {
2143                 snd_cs4231_ebus_free(chip);
2144                 snd_printk("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2145                 return -EBUSY;
2146         }
2147
2148         if (snd_cs4231_probe(chip) < 0) {
2149                 snd_cs4231_ebus_free(chip);
2150                 return -ENODEV;
2151         }
2152         snd_cs4231_init(chip);
2153
2154         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2155                                   chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2156                 snd_cs4231_ebus_free(chip);
2157                 return err;
2158         }
2159
2160         *rchip = chip;
2161         return 0;
2162 }
2163
2164 static int cs4231_ebus_attach(struct linux_ebus_device *edev)
2165 {
2166         snd_card_t *card;
2167         cs4231_t *chip;
2168         int err;
2169
2170         err = cs4231_attach_begin(&card);
2171         if (err)
2172                 return err;
2173
2174         sprintf(card->longname, "%s at 0x%lx, irq %s",
2175                 card->shortname,
2176                 edev->resource[0].start,
2177                 __irq_itoa(edev->irqs[0]));
2178
2179         if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) {
2180                 snd_card_free(card);
2181                 return err;
2182         }
2183
2184         return cs4231_attach_finish(card, chip);
2185 }
2186 #endif
2187
2188 static int __init cs4231_init(void)
2189 {
2190 #ifdef SBUS_SUPPORT
2191         struct sbus_bus *sbus;
2192         struct sbus_dev *sdev;
2193 #endif
2194 #ifdef EBUS_SUPPORT
2195         struct linux_ebus *ebus;
2196         struct linux_ebus_device *edev;
2197 #endif
2198         int found;
2199
2200         found = 0;
2201
2202 #ifdef SBUS_SUPPORT
2203         for_all_sbusdev(sdev, sbus) {
2204                 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2205                         if (cs4231_sbus_attach(sdev) == 0)
2206                                 found++;
2207                 }
2208         }
2209 #endif
2210 #ifdef EBUS_SUPPORT
2211         for_each_ebus(ebus) {
2212                 for_each_ebusdev(edev, ebus) {
2213                         int match = 0;
2214
2215                         if (!strcmp(edev->prom_name, "SUNW,CS4231")) {
2216                                 match = 1;
2217                         } else if (!strcmp(edev->prom_name, "audio")) {
2218                                 char compat[16];
2219
2220                                 prom_getstring(edev->prom_node, "compatible",
2221                                                compat, sizeof(compat));
2222                                 compat[15] = '\0';
2223                                 if (!strcmp(compat, "SUNW,CS4231"))
2224                                         match = 1;
2225                         }
2226
2227                         if (match &&
2228                             cs4231_ebus_attach(edev) == 0)
2229                                 found++;
2230                 }
2231         }
2232 #endif
2233
2234
2235         return (found > 0) ? 0 : -EIO;
2236 }
2237
2238 static void __exit cs4231_exit(void)
2239 {
2240         cs4231_t *p = cs4231_list;
2241
2242         while (p != NULL) {
2243                 cs4231_t *next = p->next;
2244
2245                 snd_card_free(p->card);
2246
2247                 p = next;
2248         }
2249
2250         cs4231_list = NULL;
2251 }
2252
2253 module_init(cs4231_init);
2254 module_exit(cs4231_exit);