sound/sparc/cs4231.c

   1 /*
   2  * Driver for CS4231 sound chips found on Sparcs.
   3  * Copyright (C) 2002 David S. Miller <davem@redhat.com>
   4  *
   5  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
   6  * Copyright (C) 1996, 1997, 1998, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
   7  * and also sound/isa/cs423x/cs4231_lib.c which is:
   8  * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/moduleparam.h>
  19
  20 #include <sound/driver.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/info.h>
  24 #include <sound/control.h>
  25 #include <sound/timer.h>
  26 #include <sound/initval.h>
  27 #include <sound/pcm_params.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31
  32 #ifdef CONFIG_SBUS
  33 #define SBUS_SUPPORT
  34 #endif
  35
  36 #ifdef SBUS_SUPPORT
  37 #include <asm/sbus.h>
  38 #endif
  39
  40 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  41 #define EBUS_SUPPORT
  42 #endif
  43
  44 #ifdef EBUS_SUPPORT
  45 #include <linux/pci.h>
  46 #include <asm/ebus.h>
  47 #endif
  48
  49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  52 static int boot_devs;
  53
  54 module_param_array(index, int, boot_devs, 0444);
  55 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  56 module_param_array(id, charp, boot_devs, 0444);
  57 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  58 module_param_array(enable, bool, boot_devs, 0444);
  59 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  60 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  61 MODULE_DESCRIPTION("Sun CS4231");
  62 MODULE_LICENSE("GPL");
  63 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  64
  65 typedef struct snd_cs4231 {
  66         spinlock_t              lock;
  67         void __iomem            *port;
  68 #ifdef EBUS_SUPPORT
  69         struct ebus_dma_info    eb2c;
  70         struct ebus_dma_info    eb2p;
  71 #endif
  72
  73         u32                     flags;
  74 #define CS4231_FLAG_EBUS        0x00000001
  75 #define CS4231_FLAG_PLAYBACK    0x00000002
  76 #define CS4231_FLAG_CAPTURE     0x00000004
  77
  78         snd_card_t              *card;
  79         snd_pcm_t               *pcm;
  80         snd_pcm_substream_t     *playback_substream;
  81         unsigned int            p_periods_sent;
  82         snd_pcm_substream_t     *capture_substream;
  83         unsigned int            c_periods_sent;
  84         snd_timer_t             *timer;
  85
  86         unsigned short mode;
  87 #define CS4231_MODE_NONE        0x0000
  88 #define CS4231_MODE_PLAY        0x0001
  89 #define CS4231_MODE_RECORD      0x0002
  90 #define CS4231_MODE_TIMER       0x0004
  91 #define CS4231_MODE_OPEN        (CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
  92
  93         unsigned char           image[32];      /* registers image */
  94         int                     mce_bit;
  95         int                     calibrate_mute;
  96         struct semaphore        mce_mutex;
  97         struct semaphore        open_mutex;
  98
  99         union {
 100 #ifdef SBUS_SUPPORT
 101                 struct sbus_dev         *sdev;
 102 #endif
 103 #ifdef EBUS_SUPPORT
 104                 struct pci_dev          *pdev;
 105 #endif
 106         } dev_u;
 107         unsigned int            irq[2];
 108         unsigned int            regs_size;
 109         struct snd_cs4231       *next;
 110 } cs4231_t;
 111
 112 static cs4231_t *cs4231_list;
 113
 114 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
 115  * now....  -DaveM
 116  */
 117
 118 /* IO ports */
 119
 120 #define CS4231P(chip, x)        ((chip)->port + c_d_c_CS4231##x)
 121
 122 /* XXX offsets are different than PC ISA chips... */
 123 #define c_d_c_CS4231REGSEL      0x0
 124 #define c_d_c_CS4231REG         0x4
 125 #define c_d_c_CS4231STATUS      0x8
 126 #define c_d_c_CS4231PIO         0xc
 127
 128 /* codec registers */
 129
 130 #define CS4231_LEFT_INPUT       0x00    /* left input control */
 131 #define CS4231_RIGHT_INPUT      0x01    /* right input control */
 132 #define CS4231_AUX1_LEFT_INPUT  0x02    /* left AUX1 input control */
 133 #define CS4231_AUX1_RIGHT_INPUT 0x03    /* right AUX1 input control */
 134 #define CS4231_AUX2_LEFT_INPUT  0x04    /* left AUX2 input control */
 135 #define CS4231_AUX2_RIGHT_INPUT 0x05    /* right AUX2 input control */
 136 #define CS4231_LEFT_OUTPUT      0x06    /* left output control register */
 137 #define CS4231_RIGHT_OUTPUT     0x07    /* right output control register */
 138 #define CS4231_PLAYBK_FORMAT    0x08    /* clock and data format - playback - bits 7-0 MCE */
 139 #define CS4231_IFACE_CTRL       0x09    /* interface control - bits 7-2 MCE */
 140 #define CS4231_PIN_CTRL         0x0a    /* pin control */
 141 #define CS4231_TEST_INIT        0x0b    /* test and initialization */
 142 #define CS4231_MISC_INFO        0x0c    /* miscellaneaous information */
 143 #define CS4231_LOOPBACK         0x0d    /* loopback control */
 144 #define CS4231_PLY_UPR_CNT      0x0e    /* playback upper base count */
 145 #define CS4231_PLY_LWR_CNT      0x0f    /* playback lower base count */
 146 #define CS4231_ALT_FEATURE_1    0x10    /* alternate #1 feature enable */
 147 #define CS4231_ALT_FEATURE_2    0x11    /* alternate #2 feature enable */
 148 #define CS4231_LEFT_LINE_IN     0x12    /* left line input control */
 149 #define CS4231_RIGHT_LINE_IN    0x13    /* right line input control */
 150 #define CS4231_TIMER_LOW        0x14    /* timer low byte */
 151 #define CS4231_TIMER_HIGH       0x15    /* timer high byte */
 152 #define CS4231_LEFT_MIC_INPUT   0x16    /* left MIC input control register (InterWave only) */
 153 #define CS4231_RIGHT_MIC_INPUT  0x17    /* right MIC input control register (InterWave only) */
 154 #define CS4236_EXT_REG          0x17    /* extended register access */
 155 #define CS4231_IRQ_STATUS       0x18    /* irq status register */
 156 #define CS4231_LINE_LEFT_OUTPUT 0x19    /* left line output control register (InterWave only) */
 157 #define CS4231_VERSION          0x19    /* CS4231(A) - version values */
 158 #define CS4231_MONO_CTRL        0x1a    /* mono input/output control */
 159 #define CS4231_LINE_RIGHT_OUTPUT 0x1b   /* right line output control register (InterWave only) */
 160 #define CS4235_LEFT_MASTER      0x1b    /* left master output control */
 161 #define CS4231_REC_FORMAT       0x1c    /* clock and data format - record - bits 7-0 MCE */
 162 #define CS4231_PLY_VAR_FREQ     0x1d    /* playback variable frequency */
 163 #define CS4235_RIGHT_MASTER     0x1d    /* right master output control */
 164 #define CS4231_REC_UPR_CNT      0x1e    /* record upper count */
 165 #define CS4231_REC_LWR_CNT      0x1f    /* record lower count */
 166
 167 /* definitions for codec register select port - CODECP( REGSEL ) */
 168
 169 #define CS4231_INIT             0x80    /* CODEC is initializing */
 170 #define CS4231_MCE              0x40    /* mode change enable */
 171 #define CS4231_TRD              0x20    /* transfer request disable */
 172
 173 /* definitions for codec status register - CODECP( STATUS ) */
 174
 175 #define CS4231_GLOBALIRQ        0x01    /* IRQ is active */
 176
 177 /* definitions for codec irq status */
 178
 179 #define CS4231_PLAYBACK_IRQ     0x10
 180 #define CS4231_RECORD_IRQ       0x20
 181 #define CS4231_TIMER_IRQ        0x40
 182 #define CS4231_ALL_IRQS         0x70
 183 #define CS4231_REC_UNDERRUN     0x08
 184 #define CS4231_REC_OVERRUN      0x04
 185 #define CS4231_PLY_OVERRUN      0x02
 186 #define CS4231_PLY_UNDERRUN     0x01
 187
 188 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
 189
 190 #define CS4231_ENABLE_MIC_GAIN  0x20
 191
 192 #define CS4231_MIXS_LINE        0x00
 193 #define CS4231_MIXS_AUX1        0x40
 194 #define CS4231_MIXS_MIC         0x80
 195 #define CS4231_MIXS_ALL         0xc0
 196
 197 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
 198
 199 #define CS4231_LINEAR_8         0x00    /* 8-bit unsigned data */
 200 #define CS4231_ALAW_8           0x60    /* 8-bit A-law companded */
 201 #define CS4231_ULAW_8           0x20    /* 8-bit U-law companded */
 202 #define CS4231_LINEAR_16        0x40    /* 16-bit twos complement data - little endian */
 203 #define CS4231_LINEAR_16_BIG    0xc0    /* 16-bit twos complement data - big endian */
 204 #define CS4231_ADPCM_16         0xa0    /* 16-bit ADPCM */
 205 #define CS4231_STEREO           0x10    /* stereo mode */
 206 /* bits 3-1 define frequency divisor */
 207 #define CS4231_XTAL1            0x00    /* 24.576 crystal */
 208 #define CS4231_XTAL2            0x01    /* 16.9344 crystal */
 209
 210 /* definitions for interface control register - CS4231_IFACE_CTRL */
 211
 212 #define CS4231_RECORD_PIO       0x80    /* record PIO enable */
 213 #define CS4231_PLAYBACK_PIO     0x40    /* playback PIO enable */
 214 #define CS4231_CALIB_MODE       0x18    /* calibration mode bits */
 215 #define CS4231_AUTOCALIB        0x08    /* auto calibrate */
 216 #define CS4231_SINGLE_DMA       0x04    /* use single DMA channel */
 217 #define CS4231_RECORD_ENABLE    0x02    /* record enable */
 218 #define CS4231_PLAYBACK_ENABLE  0x01    /* playback enable */
 219
 220 /* definitions for pin control register - CS4231_PIN_CTRL */
 221
 222 #define CS4231_IRQ_ENABLE       0x02    /* enable IRQ */
 223 #define CS4231_XCTL1            0x40    /* external control #1 */
 224 #define CS4231_XCTL0            0x80    /* external control #0 */
 225
 226 /* definitions for test and init register - CS4231_TEST_INIT */
 227
 228 #define CS4231_CALIB_IN_PROGRESS 0x20   /* auto calibrate in progress */
 229 #define CS4231_DMA_REQUEST      0x10    /* DMA request in progress */
 230
 231 /* definitions for misc control register - CS4231_MISC_INFO */
 232
 233 #define CS4231_MODE2            0x40    /* MODE 2 */
 234 #define CS4231_IW_MODE3         0x6c    /* MODE 3 - InterWave enhanced mode */
 235 #define CS4231_4236_MODE3       0xe0    /* MODE 3 - CS4236+ enhanced mode */
 236
 237 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
 238
 239 #define CS4231_DACZ             0x01    /* zero DAC when underrun */
 240 #define CS4231_TIMER_ENABLE     0x40    /* codec timer enable */
 241 #define CS4231_OLB              0x80    /* output level bit */
 242
 243 /* SBUS DMA register defines.  */
 244
 245 #define APCCSR  0x10UL  /* APC DMA CSR */
 246 #define APCCVA  0x20UL  /* APC Capture DMA Address */
 247 #define APCCC   0x24UL  /* APC Capture Count */
 248 #define APCCNVA 0x28UL  /* APC Capture DMA Next Address */
 249 #define APCCNC  0x2cUL  /* APC Capture Next Count */
 250 #define APCPVA  0x30UL  /* APC Play DMA Address */
 251 #define APCPC   0x34UL  /* APC Play Count */
 252 #define APCPNVA 0x38UL  /* APC Play DMA Next Address */
 253 #define APCPNC  0x3cUL  /* APC Play Next Count */
 254
 255 /* APCCSR bits */
 256
 257 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
 258 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
 259 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
 260 #define APC_GENL_INT    0x100000 /* General interrupt */
 261 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
 262 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
 263 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
 264 #define APC_XINT_GENL   0x10000  /* Error ext intr */
 265 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
 266 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
 267 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
 268 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
 269 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
 270 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
 271 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
 272 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
 273 #define APC_PPAUSE      0x80     /* Pause the play DMA */
 274 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
 275 #define APC_CDC_RESET   0x20     /* CODEC RESET */
 276 #define APC_PDMA_READY  0x08     /* Play DMA Go */
 277 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
 278 #define APC_CHIP_RESET  0x01     /* Reset the chip */
 279
 280 /* EBUS DMA register offsets  */
 281
 282 #define EBDMA_CSR       0x00UL  /* Control/Status */
 283 #define EBDMA_ADDR      0x04UL  /* DMA Address */
 284 #define EBDMA_COUNT     0x08UL  /* DMA Count */
 285
 286 /*
 287  *  Some variables
 288  */
 289
 290 static unsigned char freq_bits[14] = {
 291         /* 5510 */      0x00 | CS4231_XTAL2,
 292         /* 6620 */      0x0E | CS4231_XTAL2,
 293         /* 8000 */      0x00 | CS4231_XTAL1,
 294         /* 9600 */      0x0E | CS4231_XTAL1,
 295         /* 11025 */     0x02 | CS4231_XTAL2,
 296         /* 16000 */     0x02 | CS4231_XTAL1,
 297         /* 18900 */     0x04 | CS4231_XTAL2,
 298         /* 22050 */     0x06 | CS4231_XTAL2,
 299         /* 27042 */     0x04 | CS4231_XTAL1,
 300         /* 32000 */     0x06 | CS4231_XTAL1,
 301         /* 33075 */     0x0C | CS4231_XTAL2,
 302         /* 37800 */     0x08 | CS4231_XTAL2,
 303         /* 44100 */     0x0A | CS4231_XTAL2,
 304         /* 48000 */     0x0C | CS4231_XTAL1
 305 };
 306
 307 static unsigned int rates[14] = {
 308         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
 309         27042, 32000, 33075, 37800, 44100, 48000
 310 };
 311
 312 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
 313         .count  = 14,
 314         .list   = rates,
 315 };
 316
 317 static int snd_cs4231_xrate(snd_pcm_runtime_t *runtime)
 318 {
 319         return snd_pcm_hw_constraint_list(runtime, 0,
 320                                           SNDRV_PCM_HW_PARAM_RATE,
 321                                           &hw_constraints_rates);
 322 }
 323
 324 static unsigned char snd_cs4231_original_image[32] =
 325 {
 326         0x00,                   /* 00/00 - lic */
 327         0x00,                   /* 01/01 - ric */
 328         0x9f,                   /* 02/02 - la1ic */
 329         0x9f,                   /* 03/03 - ra1ic */
 330         0x9f,                   /* 04/04 - la2ic */
 331         0x9f,                   /* 05/05 - ra2ic */
 332         0xbf,                   /* 06/06 - loc */
 333         0xbf,                   /* 07/07 - roc */
 334         0x20,                   /* 08/08 - pdfr */
 335         CS4231_AUTOCALIB,       /* 09/09 - ic */
 336         0x00,                   /* 0a/10 - pc */
 337         0x00,                   /* 0b/11 - ti */
 338         CS4231_MODE2,           /* 0c/12 - mi */
 339         0x00,                   /* 0d/13 - lbc */
 340         0x00,                   /* 0e/14 - pbru */
 341         0x00,                   /* 0f/15 - pbrl */
 342         0x80,                   /* 10/16 - afei */
 343         0x01,                   /* 11/17 - afeii */
 344         0x9f,                   /* 12/18 - llic */
 345         0x9f,                   /* 13/19 - rlic */
 346         0x00,                   /* 14/20 - tlb */
 347         0x00,                   /* 15/21 - thb */
 348         0x00,                   /* 16/22 - la3mic/reserved */
 349         0x00,                   /* 17/23 - ra3mic/reserved */
 350         0x00,                   /* 18/24 - afs */
 351         0x00,                   /* 19/25 - lamoc/version */
 352         0x00,                   /* 1a/26 - mioc */
 353         0x00,                   /* 1b/27 - ramoc/reserved */
 354         0x20,                   /* 1c/28 - cdfr */
 355         0x00,                   /* 1d/29 - res4 */
 356         0x00,                   /* 1e/30 - cbru */
 357         0x00,                   /* 1f/31 - cbrl */
 358 };
 359
 360 static u8 __cs4231_readb(cs4231_t *cp, void __iomem *reg_addr)
 361 {
 362 #ifdef EBUS_SUPPORT
 363         if (cp->flags & CS4231_FLAG_EBUS) {
 364                 return readb(reg_addr);
 365         } else {
 366 #endif
 367 #ifdef SBUS_SUPPORT
 368                 return sbus_readb(reg_addr);
 369 #endif
 370 #ifdef EBUS_SUPPORT
 371         }
 372 #endif
 373 }
 374
 375 static void __cs4231_writeb(cs4231_t *cp, u8 val, void __iomem *reg_addr)
 376 {
 377 #ifdef EBUS_SUPPORT
 378         if (cp->flags & CS4231_FLAG_EBUS) {
 379                 return writeb(val, reg_addr);
 380         } else {
 381 #endif
 382 #ifdef SBUS_SUPPORT
 383                 return sbus_writeb(val, reg_addr);
 384 #endif
 385 #ifdef EBUS_SUPPORT
 386         }
 387 #endif
 388 }
 389
 390 /*
 391  *  Basic I/O functions
 392  */
 393
 394 void snd_cs4231_outm(cs4231_t *chip, unsigned char reg,
 395                      unsigned char mask, unsigned char value)
 396 {
 397         int timeout;
 398         unsigned char tmp;
 399
 400         for (timeout = 250;
 401              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 402              timeout--)
 403                 udelay(100);
 404 #ifdef CONFIG_SND_DEBUG
 405         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 406                 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 407 #endif
 408         if (chip->calibrate_mute) {
 409                 chip->image[reg] &= mask;
 410                 chip->image[reg] |= value;
 411         } else {
 412                 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 413                 mb();
 414                 tmp = (chip->image[reg] & mask) | value;
 415                 __cs4231_writeb(chip, tmp, CS4231P(chip, REG));
 416                 chip->image[reg] = tmp;
 417                 mb();
 418         }
 419 }
 420
 421 static void snd_cs4231_dout(cs4231_t *chip, unsigned char reg, unsigned char value)
 422 {
 423         int timeout;
 424
 425         for (timeout = 250;
 426              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 427              timeout--)
 428                 udelay(100);
 429         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 430         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 431         mb();
 432 }
 433
 434 static void snd_cs4231_out(cs4231_t *chip, unsigned char reg, unsigned char value)
 435 {
 436         int timeout;
 437
 438         for (timeout = 250;
 439              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 440              timeout--)
 441                 udelay(100);
 442 #ifdef CONFIG_SND_DEBUG
 443         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 444                 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 445 #endif
 446         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 447         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 448         chip->image[reg] = value;
 449         mb();
 450 #if 0
 451         printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
 452 #endif
 453 }
 454
 455 static unsigned char snd_cs4231_in(cs4231_t *chip, unsigned char reg)
 456 {
 457         int timeout;
 458         unsigned char ret;
 459
 460         for (timeout = 250;
 461              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 462              timeout--)
 463                 udelay(100);
 464 #ifdef CONFIG_SND_DEBUG
 465         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 466                 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
 467 #endif
 468         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 469         mb();
 470         ret = __cs4231_readb(chip, CS4231P(chip, REG));
 471 #if 0
 472         printk("codec in - reg 0x%x = 0x%x\n", chip->mce_bit | reg, ret);
 473 #endif
 474         return ret;
 475 }
 476
 477 #ifdef CONFIG_SND_DEBUG
 478
 479 void snd_cs4231_debug(cs4231_t *chip)
 480 {
 481         printk("CS4231 REGS:      INDEX = 0x%02x  ",
 482                __cs4231_readb(chip, CS4231P(chip, REGSEL)));
 483         printk("                 STATUS = 0x%02x\n",
 484                __cs4231_readb(chip, CS4231P(chip, STATUS)));
 485         printk("  0x00: left input      = 0x%02x  ", snd_cs4231_in(chip, 0x00));
 486         printk("  0x10: alt 1 (CFIG 2)  = 0x%02x\n", snd_cs4231_in(chip, 0x10));
 487         printk("  0x01: right input     = 0x%02x  ", snd_cs4231_in(chip, 0x01));
 488         printk("  0x11: alt 2 (CFIG 3)  = 0x%02x\n", snd_cs4231_in(chip, 0x11));
 489         printk("  0x02: GF1 left input  = 0x%02x  ", snd_cs4231_in(chip, 0x02));
 490         printk("  0x12: left line in    = 0x%02x\n", snd_cs4231_in(chip, 0x12));
 491         printk("  0x03: GF1 right input = 0x%02x  ", snd_cs4231_in(chip, 0x03));
 492         printk("  0x13: right line in   = 0x%02x\n", snd_cs4231_in(chip, 0x13));
 493         printk("  0x04: CD left input   = 0x%02x  ", snd_cs4231_in(chip, 0x04));
 494         printk("  0x14: timer low       = 0x%02x\n", snd_cs4231_in(chip, 0x14));
 495         printk("  0x05: CD right input  = 0x%02x  ", snd_cs4231_in(chip, 0x05));
 496         printk("  0x15: timer high      = 0x%02x\n", snd_cs4231_in(chip, 0x15));
 497         printk("  0x06: left output     = 0x%02x  ", snd_cs4231_in(chip, 0x06));
 498         printk("  0x16: left MIC (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x16));
 499         printk("  0x07: right output    = 0x%02x  ", snd_cs4231_in(chip, 0x07));
 500         printk("  0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
 501         printk("  0x08: playback format = 0x%02x  ", snd_cs4231_in(chip, 0x08));
 502         printk("  0x18: IRQ status      = 0x%02x\n", snd_cs4231_in(chip, 0x18));
 503         printk("  0x09: iface (CFIG 1)  = 0x%02x  ", snd_cs4231_in(chip, 0x09));
 504         printk("  0x19: left line out   = 0x%02x\n", snd_cs4231_in(chip, 0x19));
 505         printk("  0x0a: pin control     = 0x%02x  ", snd_cs4231_in(chip, 0x0a));
 506         printk("  0x1a: mono control    = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
 507         printk("  0x0b: init & status   = 0x%02x  ", snd_cs4231_in(chip, 0x0b));
 508         printk("  0x1b: right line out  = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
 509         printk("  0x0c: revision & mode = 0x%02x  ", snd_cs4231_in(chip, 0x0c));
 510         printk("  0x1c: record format   = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
 511         printk("  0x0d: loopback        = 0x%02x  ", snd_cs4231_in(chip, 0x0d));
 512         printk("  0x1d: var freq (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
 513         printk("  0x0e: ply upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0e));
 514         printk("  0x1e: rec upr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
 515         printk("  0x0f: ply lwr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0f));
 516         printk("  0x1f: rec lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
 517 }
 518
 519 #endif
 520
 521 /*
 522  *  CS4231 detection / MCE routines
 523  */
 524
 525 static void snd_cs4231_busy_wait(cs4231_t *chip)
 526 {
 527         int timeout;
 528
 529         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
 530         for (timeout = 5; timeout > 0; timeout--)
 531                 __cs4231_readb(chip, CS4231P(chip, REGSEL));
 532         /* end of cleanup sequence */
 533         for (timeout = 250;
 534              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 535              timeout--)
 536                 udelay(100);
 537 }
 538
 539 static void snd_cs4231_mce_up(cs4231_t *chip)
 540 {
 541         unsigned long flags;
 542         int timeout;
 543
 544         spin_lock_irqsave(&chip->lock, flags);
 545         for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--)
 546                 udelay(100);
 547 #ifdef CONFIG_SND_DEBUG
 548         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 549                 snd_printk("mce_up - auto calibration time out (0)\n");
 550 #endif
 551         chip->mce_bit |= CS4231_MCE;
 552         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 553         if (timeout == 0x80)
 554                 snd_printk("mce_up [%p]: serious init problem - codec still busy\n", chip->port);
 555         if (!(timeout & CS4231_MCE))
 556                 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 557         spin_unlock_irqrestore(&chip->lock, flags);
 558 }
 559
 560 static void snd_cs4231_mce_down(cs4231_t *chip)
 561 {
 562         unsigned long flags;
 563         int timeout;
 564         signed long time;
 565
 566         spin_lock_irqsave(&chip->lock, flags);
 567         snd_cs4231_busy_wait(chip);
 568 #if 0
 569         printk("(1) timeout = %i\n", timeout);
 570 #endif
 571 #ifdef CONFIG_SND_DEBUG
 572         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 573                 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", CS4231P(chip, REGSEL));
 574 #endif
 575         chip->mce_bit &= ~CS4231_MCE;
 576         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 577         __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 578         if (timeout == 0x80)
 579                 snd_printk("mce_down [%p]: serious init problem - codec still busy\n", chip->port);
 580         if ((timeout & CS4231_MCE) == 0) {
 581                 spin_unlock_irqrestore(&chip->lock, flags);
 582                 return;
 583         }
 584         snd_cs4231_busy_wait(chip);
 585
 586         /* calibration process */
 587
 588         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
 589                 udelay(100);
 590         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
 591                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
 592                 spin_unlock_irqrestore(&chip->lock, flags);
 593                 return;
 594         }
 595 #if 0
 596         printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
 597 #endif
 598         time = HZ / 4;
 599         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
 600                 spin_unlock_irqrestore(&chip->lock, flags);
 601                 if (time <= 0) {
 602                         snd_printk("mce_down - auto calibration time out (2)\n");
 603                         return;
 604                 }
 605                 set_current_state(TASK_INTERRUPTIBLE);
 606                 time = schedule_timeout(time);
 607                 spin_lock_irqsave(&chip->lock, flags);
 608         }
 609 #if 0
 610         printk("(3) jiffies = %li\n", jiffies);
 611 #endif
 612         time = HZ / 10;
 613         while (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) {
 614                 spin_unlock_irqrestore(&chip->lock, flags);
 615                 if (time <= 0) {
 616                         snd_printk("mce_down - auto calibration time out (3)\n");
 617                         return;
 618                 }
 619                 set_current_state(TASK_INTERRUPTIBLE);
 620                 time = schedule_timeout(time);
 621                 spin_lock_irqsave(&chip->lock, flags);
 622         }
 623         spin_unlock_irqrestore(&chip->lock, flags);
 624 #if 0
 625         printk("(4) jiffies = %li\n", jiffies);
 626         snd_printk("mce_down - exit = 0x%x\n", __cs4231_readb(chip, CS4231P(chip, REGSEL)));
 627 #endif
 628 }
 629
 630 #if 0 /* Unused for now... */
 631 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
 632 {
 633         switch (format & 0xe0) {
 634         case CS4231_LINEAR_16:
 635         case CS4231_LINEAR_16_BIG:
 636                 size >>= 1;
 637                 break;
 638         case CS4231_ADPCM_16:
 639                 return size >> 2;
 640         }
 641         if (format & CS4231_STEREO)
 642                 size >>= 1;
 643         return size;
 644 }
 645 #endif
 646
 647 #ifdef EBUS_SUPPORT
 648 static void snd_cs4231_ebus_advance_dma(struct ebus_dma_info *p, snd_pcm_substream_t *substream, unsigned int *periods_sent)
 649 {
 650         snd_pcm_runtime_t *runtime = substream->runtime;
 651
 652         while (1) {
 653                 unsigned int dma_size = snd_pcm_lib_period_bytes(substream);
 654                 unsigned int offset = dma_size * (*periods_sent);
 655
 656                 if (dma_size >= (1 << 24))
 657                         BUG();
 658
 659                 if (ebus_dma_request(p, runtime->dma_addr + offset, dma_size))
 660                         return;
 661 #if 0
 662                 printk("ebus_advance: Sent period %u (size[%x] offset[%x])\n",
 663                        (*periods_sent), dma_size, offset);
 664 #endif
 665                 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
 666         }
 667 }
 668 #endif
 669
 670 static void cs4231_dma_trigger(cs4231_t *chip, unsigned int what, int on)
 671 {
 672 #ifdef EBUS_SUPPORT
 673         if (chip->flags & CS4231_FLAG_EBUS) {
 674                 if (what & CS4231_PLAYBACK_ENABLE) {
 675                         if (on) {
 676                                 ebus_dma_prepare(&chip->eb2p, 0);
 677                                 ebus_dma_enable(&chip->eb2p, 1);
 678                                 snd_cs4231_ebus_advance_dma(&chip->eb2p,
 679                                         chip->playback_substream,
 680                                         &chip->p_periods_sent);
 681                         } else {
 682                                 ebus_dma_enable(&chip->eb2p, 0);
 683                         }
 684                 }
 685                 if (what & CS4231_RECORD_ENABLE) {
 686                         if (on) {
 687                                 ebus_dma_prepare(&chip->eb2c, 1);
 688                                 ebus_dma_enable(&chip->eb2c, 1);
 689                                 snd_cs4231_ebus_advance_dma(&chip->eb2c,
 690                                         chip->capture_substream,
 691                                         &chip->c_periods_sent);
 692                         } else {
 693                                 ebus_dma_enable(&chip->eb2c, 0);
 694                         }
 695                 }
 696         } else {
 697 #endif
 698 #ifdef SBUS_SUPPORT
 699 #endif
 700 #ifdef EBUS_SUPPORT
 701         }
 702 #endif
 703 }
 704
 705 static int snd_cs4231_trigger(snd_pcm_substream_t *substream, int cmd)
 706 {
 707         cs4231_t *chip = snd_pcm_substream_chip(substream);
 708         int result = 0;
 709
 710         switch (cmd) {
 711         case SNDRV_PCM_TRIGGER_START:
 712         case SNDRV_PCM_TRIGGER_STOP:
 713         {
 714                 unsigned int what = 0;
 715                 snd_pcm_substream_t *s;
 716                 struct list_head *pos;
 717                 unsigned long flags;
 718
 719                 snd_pcm_group_for_each(pos, substream) {
 720                         s = snd_pcm_group_substream_entry(pos);
 721                         if (s == chip->playback_substream) {
 722                                 what |= CS4231_PLAYBACK_ENABLE;
 723                                 snd_pcm_trigger_done(s, substream);
 724                         } else if (s == chip->capture_substream) {
 725                                 what |= CS4231_RECORD_ENABLE;
 726                                 snd_pcm_trigger_done(s, substream);
 727                         }
 728                 }
 729
 730 #if 0
 731                 printk("TRIGGER: what[%x] on(%d)\n",
 732                        what, (cmd == SNDRV_PCM_TRIGGER_START));
 733 #endif
 734
 735                 spin_lock_irqsave(&chip->lock, flags);
 736                 if (cmd == SNDRV_PCM_TRIGGER_START) {
 737                         cs4231_dma_trigger(chip, what, 1);
 738                         chip->image[CS4231_IFACE_CTRL] |= what;
 739                         if (what & CS4231_PLAYBACK_ENABLE) {
 740                                 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, 0xff);
 741                                 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, 0xff);
 742                         }
 743                         if (what & CS4231_RECORD_ENABLE) {
 744                                 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, 0xff);
 745                                 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, 0xff);
 746                         }
 747                 } else {
 748                         cs4231_dma_trigger(chip, what, 0);
 749                         chip->image[CS4231_IFACE_CTRL] &= ~what;
 750                 }
 751                 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
 752                                chip->image[CS4231_IFACE_CTRL]);
 753                 spin_unlock_irqrestore(&chip->lock, flags);
 754                 break;
 755         }
 756         default:
 757                 result = -EINVAL;
 758                 break;
 759         }
 760 #if 0
 761         snd_cs4231_debug(chip);
 762 #endif
 763         return result;
 764 }
 765
 766 /*
 767  *  CODEC I/O
 768  */
 769
 770 static unsigned char snd_cs4231_get_rate(unsigned int rate)
 771 {
 772         int i;
 773
 774         for (i = 0; i < 14; i++)
 775                 if (rate == rates[i])
 776                         return freq_bits[i];
 777         // snd_BUG();
 778         return freq_bits[13];
 779 }
 780
 781 static unsigned char snd_cs4231_get_format(cs4231_t *chip, int format, int channels)
 782 {
 783         unsigned char rformat;
 784
 785         rformat = CS4231_LINEAR_8;
 786         switch (format) {
 787         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
 788         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
 789         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
 790         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
 791         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
 792         }
 793         if (channels > 1)
 794                 rformat |= CS4231_STEREO;
 795 #if 0
 796         snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
 797 #endif
 798         return rformat;
 799 }
 800
 801 static void snd_cs4231_calibrate_mute(cs4231_t *chip, int mute)
 802 {
 803         unsigned long flags;
 804
 805         mute = mute ? 1 : 0;
 806         spin_lock_irqsave(&chip->lock, flags);
 807         if (chip->calibrate_mute == mute) {
 808                 spin_unlock_irqrestore(&chip->lock, flags);
 809                 return;
 810         }
 811         if (!mute) {
 812                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
 813                                 chip->image[CS4231_LEFT_INPUT]);
 814                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
 815                                 chip->image[CS4231_RIGHT_INPUT]);
 816                 snd_cs4231_dout(chip, CS4231_LOOPBACK,
 817                                 chip->image[CS4231_LOOPBACK]);
 818         }
 819         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
 820                         mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
 821         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
 822                         mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
 823         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
 824                         mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
 825         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
 826                         mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
 827         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
 828                         mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
 829         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
 830                         mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
 831         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
 832                         mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
 833         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
 834                         mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
 835         snd_cs4231_dout(chip, CS4231_MONO_CTRL,
 836                         mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
 837         chip->calibrate_mute = mute;
 838         spin_unlock_irqrestore(&chip->lock, flags);
 839 }
 840
 841 static void snd_cs4231_playback_format(cs4231_t *chip, snd_pcm_hw_params_t *params,
 842                                        unsigned char pdfr)
 843 {
 844         unsigned long flags;
 845
 846         down(&chip->mce_mutex);
 847         snd_cs4231_calibrate_mute(chip, 1);
 848
 849         snd_cs4231_mce_up(chip);
 850
 851         spin_lock_irqsave(&chip->lock, flags);
 852         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 853                        (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
 854                        (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
 855                        pdfr);
 856         spin_unlock_irqrestore(&chip->lock, flags);
 857
 858         snd_cs4231_mce_down(chip);
 859
 860         snd_cs4231_calibrate_mute(chip, 0);
 861         up(&chip->mce_mutex);
 862 }
 863
 864 static void snd_cs4231_capture_format(cs4231_t *chip, snd_pcm_hw_params_t *params,
 865                                       unsigned char cdfr)
 866 {
 867         unsigned long flags;
 868
 869         down(&chip->mce_mutex);
 870         snd_cs4231_calibrate_mute(chip, 1);
 871
 872         snd_cs4231_mce_up(chip);
 873
 874         spin_lock_irqsave(&chip->lock, flags);
 875         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
 876                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 877                                ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
 878                                (cdfr & 0x0f));
 879                 spin_unlock_irqrestore(&chip->lock, flags);
 880                 snd_cs4231_mce_down(chip);
 881                 snd_cs4231_mce_up(chip);
 882                 spin_lock_irqsave(&chip->lock, flags);
 883         }
 884         snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
 885         spin_unlock_irqrestore(&chip->lock, flags);
 886
 887         snd_cs4231_mce_down(chip);
 888
 889         snd_cs4231_calibrate_mute(chip, 0);
 890         up(&chip->mce_mutex);
 891 }
 892
 893 /*
 894  *  Timer interface
 895  */
 896
 897 static unsigned long snd_cs4231_timer_resolution(snd_timer_t *timer)
 898 {
 899         cs4231_t *chip = snd_timer_chip(timer);
 900
 901         return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
 902 }
 903
 904 static int snd_cs4231_timer_start(snd_timer_t *timer)
 905 {
 906         unsigned long flags;
 907         unsigned int ticks;
 908         cs4231_t *chip = snd_timer_chip(timer);
 909
 910         spin_lock_irqsave(&chip->lock, flags);
 911         ticks = timer->sticks;
 912         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
 913             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
 914             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
 915                 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
 916                                chip->image[CS4231_TIMER_HIGH] =
 917                                (unsigned char) (ticks >> 8));
 918                 snd_cs4231_out(chip, CS4231_TIMER_LOW,
 919                                chip->image[CS4231_TIMER_LOW] =
 920                                (unsigned char) ticks);
 921                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 922                                chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
 923         }
 924         spin_unlock_irqrestore(&chip->lock, flags);
 925
 926         return 0;
 927 }
 928
 929 static int snd_cs4231_timer_stop(snd_timer_t *timer)
 930 {
 931         unsigned long flags;
 932         cs4231_t *chip = snd_timer_chip(timer);
 933
 934         spin_lock_irqsave(&chip->lock, flags);
 935         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 936                        chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
 937         spin_unlock_irqrestore(&chip->lock, flags);
 938
 939         return 0;
 940 }
 941
 942 static void snd_cs4231_init(cs4231_t *chip)
 943 {
 944         unsigned long flags;
 945
 946         snd_cs4231_mce_down(chip);
 947
 948 #ifdef SNDRV_DEBUG_MCE
 949         snd_printk("init: (1)\n");
 950 #endif
 951         snd_cs4231_mce_up(chip);
 952         spin_lock_irqsave(&chip->lock, flags);
 953         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 954                                             CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
 955                                             CS4231_CALIB_MODE);
 956         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
 957         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 958         spin_unlock_irqrestore(&chip->lock, flags);
 959         snd_cs4231_mce_down(chip);
 960
 961 #ifdef SNDRV_DEBUG_MCE
 962         snd_printk("init: (2)\n");
 963 #endif
 964
 965         snd_cs4231_mce_up(chip);
 966         spin_lock_irqsave(&chip->lock, flags);
 967         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
 968         spin_unlock_irqrestore(&chip->lock, flags);
 969         snd_cs4231_mce_down(chip);
 970
 971 #ifdef SNDRV_DEBUG_MCE
 972         snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
 973 #endif
 974
 975         spin_lock_irqsave(&chip->lock, flags);
 976         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
 977         spin_unlock_irqrestore(&chip->lock, flags);
 978
 979         snd_cs4231_mce_up(chip);
 980         spin_lock_irqsave(&chip->lock, flags);
 981         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
 982         spin_unlock_irqrestore(&chip->lock, flags);
 983         snd_cs4231_mce_down(chip);
 984
 985 #ifdef SNDRV_DEBUG_MCE
 986         snd_printk("init: (4)\n");
 987 #endif
 988
 989         snd_cs4231_mce_up(chip);
 990         spin_lock_irqsave(&chip->lock, flags);
 991         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
 992         spin_unlock_irqrestore(&chip->lock, flags);
 993         snd_cs4231_mce_down(chip);
 994
 995 #ifdef SNDRV_DEBUG_MCE
 996         snd_printk("init: (5)\n");
 997 #endif
 998 }
 999
1000 static int snd_cs4231_open(cs4231_t *chip, unsigned int mode)
1001 {
1002         unsigned long flags;
1003
1004         down(&chip->open_mutex);
1005         if ((chip->mode & mode)) {
1006                 up(&chip->open_mutex);
1007                 return -EAGAIN;
1008         }
1009         if (chip->mode & CS4231_MODE_OPEN) {
1010                 chip->mode |= mode;
1011                 up(&chip->open_mutex);
1012                 return 0;
1013         }
1014         /* ok. now enable and ack CODEC IRQ */
1015         spin_lock_irqsave(&chip->lock, flags);
1016         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
1017                        CS4231_RECORD_IRQ |
1018                        CS4231_TIMER_IRQ);
1019         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1020         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1021         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1022
1023         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
1024                        CS4231_RECORD_IRQ |
1025                        CS4231_TIMER_IRQ);
1026         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1027         spin_unlock_irqrestore(&chip->lock, flags);
1028
1029         chip->mode = mode;
1030         up(&chip->open_mutex);
1031         return 0;
1032 }
1033
1034 static void snd_cs4231_close(cs4231_t *chip, unsigned int mode)
1035 {
1036         unsigned long flags;
1037
1038         down(&chip->open_mutex);
1039         chip->mode &= ~mode;
1040         if (chip->mode & CS4231_MODE_OPEN) {
1041                 up(&chip->open_mutex);
1042                 return;
1043         }
1044         snd_cs4231_calibrate_mute(chip, 1);
1045
1046         /* disable IRQ */
1047         spin_lock_irqsave(&chip->lock, flags);
1048         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1049         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1050         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1051
1052         /* now disable record & playback */
1053
1054         if (chip->image[CS4231_IFACE_CTRL] &
1055             (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
1056              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
1057                 spin_unlock_irqrestore(&chip->lock, flags);
1058                 snd_cs4231_mce_up(chip);
1059                 spin_lock_irqsave(&chip->lock, flags);
1060                 chip->image[CS4231_IFACE_CTRL] &=
1061                         ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
1062                           CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
1063                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
1064                 spin_unlock_irqrestore(&chip->lock, flags);
1065                 snd_cs4231_mce_down(chip);
1066                 spin_lock_irqsave(&chip->lock, flags);
1067         }
1068
1069         /* clear IRQ again */
1070         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1071         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1072         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1073         spin_unlock_irqrestore(&chip->lock, flags);
1074
1075         snd_cs4231_calibrate_mute(chip, 0);
1076
1077         chip->mode = 0;
1078         up(&chip->open_mutex);
1079 }
1080
1081 /*
1082  *  timer open/close
1083  */
1084
1085 static int snd_cs4231_timer_open(snd_timer_t *timer)
1086 {
1087         cs4231_t *chip = snd_timer_chip(timer);
1088         snd_cs4231_open(chip, CS4231_MODE_TIMER);
1089         return 0;
1090 }
1091
1092 static int snd_cs4231_timer_close(snd_timer_t * timer)
1093 {
1094         cs4231_t *chip = snd_timer_chip(timer);
1095         snd_cs4231_close(chip, CS4231_MODE_TIMER);
1096         return 0;
1097 }
1098
1099 static struct _snd_timer_hardware snd_cs4231_timer_table =
1100 {
1101         .flags          =       SNDRV_TIMER_HW_AUTO,
1102         .resolution     =       9945,
1103         .ticks          =       65535,
1104         .open           =       snd_cs4231_timer_open,
1105         .close          =       snd_cs4231_timer_close,
1106         .c_resolution   =       snd_cs4231_timer_resolution,
1107         .start          =       snd_cs4231_timer_start,
1108         .stop           =       snd_cs4231_timer_stop,
1109 };
1110
1111 /*
1112  *  ok.. exported functions..
1113  */
1114
1115 static int snd_cs4231_playback_hw_params(snd_pcm_substream_t *substream,
1116                                          snd_pcm_hw_params_t *hw_params)
1117 {
1118         cs4231_t *chip = snd_pcm_substream_chip(substream);
1119         unsigned char new_pdfr;
1120         int err;
1121
1122         if ((err = snd_pcm_lib_malloc_pages(substream,
1123                                             params_buffer_bytes(hw_params))) < 0)
1124                 return err;
1125         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1126                                          params_channels(hw_params)) |
1127                 snd_cs4231_get_rate(params_rate(hw_params));
1128         snd_cs4231_playback_format(chip, hw_params, new_pdfr);
1129
1130         return 0;
1131 }
1132
1133 static int snd_cs4231_playback_hw_free(snd_pcm_substream_t *substream)
1134 {
1135         return snd_pcm_lib_free_pages(substream);
1136 }
1137
1138 static int snd_cs4231_playback_prepare(snd_pcm_substream_t *substream)
1139 {
1140         cs4231_t *chip = snd_pcm_substream_chip(substream);
1141         unsigned long flags;
1142
1143         spin_lock_irqsave(&chip->lock, flags);
1144         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
1145                                             CS4231_PLAYBACK_PIO);
1146         spin_unlock_irqrestore(&chip->lock, flags);
1147
1148         return 0;
1149 }
1150
1151 static int snd_cs4231_capture_hw_params(snd_pcm_substream_t *substream,
1152                                         snd_pcm_hw_params_t *hw_params)
1153 {
1154         cs4231_t *chip = snd_pcm_substream_chip(substream);
1155         unsigned char new_cdfr;
1156         int err;
1157
1158         if ((err = snd_pcm_lib_malloc_pages(substream,
1159                                             params_buffer_bytes(hw_params))) < 0)
1160                 return err;
1161         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1162                                          params_channels(hw_params)) |
1163                 snd_cs4231_get_rate(params_rate(hw_params));
1164         snd_cs4231_capture_format(chip, hw_params, new_cdfr);
1165
1166         return 0;
1167 }
1168
1169 static int snd_cs4231_capture_hw_free(snd_pcm_substream_t *substream)
1170 {
1171         return snd_pcm_lib_free_pages(substream);
1172 }
1173
1174 static int snd_cs4231_capture_prepare(snd_pcm_substream_t *substream)
1175 {
1176         cs4231_t *chip = snd_pcm_substream_chip(substream);
1177         unsigned long flags;
1178
1179         spin_lock_irqsave(&chip->lock, flags);
1180         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
1181                                             CS4231_RECORD_PIO);
1182
1183         spin_unlock_irqrestore(&chip->lock, flags);
1184
1185         return 0;
1186 }
1187
1188 static void snd_cs4231_overrange(cs4231_t *chip)
1189 {
1190         unsigned long flags;
1191         unsigned char res;
1192
1193         spin_lock_irqsave(&chip->lock, flags);
1194         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
1195         spin_unlock_irqrestore(&chip->lock, flags);
1196
1197         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1198                 chip->capture_substream->runtime->overrange++;
1199 }
1200
1201 static void snd_cs4231_generic_interrupt(cs4231_t *chip)
1202 {
1203         unsigned long flags;
1204         unsigned char status;
1205
1206         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1207         if (!status)
1208                 return;
1209
1210         if (status & CS4231_TIMER_IRQ) {
1211                 if (chip->timer)
1212                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1213         }
1214         if (status & CS4231_PLAYBACK_IRQ)
1215                 snd_pcm_period_elapsed(chip->playback_substream);
1216         if (status & CS4231_RECORD_IRQ) {
1217                 snd_cs4231_overrange(chip);
1218                 snd_pcm_period_elapsed(chip->capture_substream);
1219         }
1220
1221         /* ACK the CS4231 interrupt. */
1222         spin_lock_irqsave(&chip->lock, flags);
1223         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1224         spin_unlock_irqrestore(&chip->lock, flags);
1225 }
1226
1227 #ifdef SBUS_SUPPORT
1228 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1229 {
1230         cs4231_t *chip = dev_id;
1231         u32 csr;
1232
1233         csr = sbus_readl(chip->port + APCCSR);
1234         if (!(csr & (APC_INT_PENDING |
1235                      APC_PLAY_INT |
1236                      APC_CAPT_INT |
1237                      APC_GENL_INT |
1238                      APC_XINT_PEMP |
1239                      APC_XINT_CEMP)))
1240                 return IRQ_NONE;
1241
1242         /* ACK the APC interrupt. */
1243         sbus_writel(csr, chip->port + APCCSR);
1244
1245         snd_cs4231_generic_interrupt(chip);
1246
1247         return IRQ_HANDLED;
1248 }
1249 #endif
1250
1251 #ifdef EBUS_SUPPORT
1252 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, void *cookie)
1253 {
1254         cs4231_t *chip = cookie;
1255
1256         if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
1257                 snd_pcm_period_elapsed(chip->playback_substream);
1258                 snd_cs4231_ebus_advance_dma(p, chip->playback_substream,
1259                                             &chip->p_periods_sent);
1260         }
1261 }
1262
1263 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, int event, void *cookie)
1264 {
1265         cs4231_t *chip = cookie;
1266
1267         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1268                 snd_pcm_period_elapsed(chip->capture_substream);
1269                 snd_cs4231_ebus_advance_dma(p, chip->capture_substream,
1270                                             &chip->c_periods_sent);
1271         }
1272 }
1273 #endif
1274
1275 static snd_pcm_uframes_t snd_cs4231_playback_pointer(snd_pcm_substream_t *substream)
1276 {
1277         cs4231_t *chip = snd_pcm_substream_chip(substream);
1278         size_t ptr, residue, period_bytes;
1279
1280         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1281                 return 0;
1282         period_bytes = snd_pcm_lib_period_bytes(substream);
1283         ptr = period_bytes * chip->p_periods_sent;
1284 #ifdef EBUS_SUPPORT
1285         if (chip->flags & CS4231_FLAG_EBUS) {
1286                 residue = ebus_dma_residue(&chip->eb2p);
1287         } else {
1288 #endif
1289 #ifdef SBUS_SUPPORT
1290                 residue = sbus_readl(chip->port + APCPC);
1291 #endif
1292 #ifdef EBUS_SUPPORT
1293         }
1294 #endif
1295         ptr += (period_bytes - residue);
1296         return bytes_to_frames(substream->runtime, ptr);
1297 }
1298
1299 static snd_pcm_uframes_t snd_cs4231_capture_pointer(snd_pcm_substream_t * substream)
1300 {
1301         cs4231_t *chip = snd_pcm_substream_chip(substream);
1302         size_t ptr, residue, period_bytes;
1303
1304         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1305                 return 0;
1306         period_bytes = snd_pcm_lib_period_bytes(substream);
1307         ptr = period_bytes * chip->c_periods_sent;
1308 #ifdef EBUS_SUPPORT
1309         if (chip->flags & CS4231_FLAG_EBUS) {
1310                 residue = ebus_dma_residue(&chip->eb2c);
1311         } else {
1312 #endif
1313 #ifdef SBUS_SUPPORT
1314                 residue = sbus_readl(chip->port + APCCC);
1315 #endif
1316 #ifdef EBUS_SUPPORT
1317         }
1318 #endif
1319         ptr += (period_bytes - residue);
1320         return bytes_to_frames(substream->runtime, ptr);
1321 }
1322
1323 /*
1324
1325  */
1326
1327 static int snd_cs4231_probe(cs4231_t *chip)
1328 {
1329         unsigned long flags;
1330         int i, id, vers;
1331         unsigned char *ptr;
1332
1333 #if 0
1334         snd_cs4231_debug(chip);
1335 #endif
1336         id = vers = 0;
1337         for (i = 0; i < 50; i++) {
1338                 mb();
1339                 if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
1340                         udelay(2000);
1341                 else {
1342                         spin_lock_irqsave(&chip->lock, flags);
1343                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1344                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1345                         vers = snd_cs4231_in(chip, CS4231_VERSION);
1346                         spin_unlock_irqrestore(&chip->lock, flags);
1347                         if (id == 0x0a)
1348                                 break;  /* this is valid value */
1349                 }
1350         }
1351         snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1352         if (id != 0x0a)
1353                 return -ENODEV; /* no valid device found */
1354
1355         spin_lock_irqsave(&chip->lock, flags);
1356
1357
1358         /* Reset DMA engine.  */
1359 #ifdef EBUS_SUPPORT
1360         if (chip->flags & CS4231_FLAG_EBUS) {
1361                 /* Done by ebus_dma_register */
1362         } else {
1363 #endif
1364 #ifdef SBUS_SUPPORT
1365                 sbus_writel(APC_CHIP_RESET, chip->port + APCCSR);
1366                 sbus_writel(0x00, chip->port + APCCSR);
1367                 sbus_writel(sbus_readl(chip->port + APCCSR) | APC_CDC_RESET,
1368                             chip->port + APCCSR);
1369
1370                 udelay(20);
1371
1372                 sbus_writel(sbus_readl(chip->port + APCCSR) & ~APC_CDC_RESET,
1373                             chip->port + APCCSR);
1374                 sbus_writel(sbus_readl(chip->port + APCCSR) | (APC_XINT_ENA |
1375                                                                APC_XINT_PENA |
1376                                                                APC_XINT_CENA),
1377                             chip->port + APCCSR);
1378 #endif
1379 #ifdef EBUS_SUPPORT
1380         }
1381 #endif
1382
1383         __cs4231_readb(chip, CS4231P(chip, STATUS));    /* clear any pendings IRQ */
1384         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));
1385         mb();
1386
1387         spin_unlock_irqrestore(&chip->lock, flags);
1388
1389         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1390         chip->image[CS4231_IFACE_CTRL] =
1391                 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1392         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1393         chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1394         if (vers & 0x20)
1395                 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1396
1397         ptr = (unsigned char *) &chip->image;
1398
1399         snd_cs4231_mce_down(chip);
1400
1401         spin_lock_irqsave(&chip->lock, flags);
1402
1403         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1404                 snd_cs4231_out(chip, i, *ptr++);
1405
1406         spin_unlock_irqrestore(&chip->lock, flags);
1407
1408         snd_cs4231_mce_up(chip);
1409
1410         snd_cs4231_mce_down(chip);
1411
1412         mdelay(2);
1413
1414         return 0;               /* all things are ok.. */
1415 }
1416
1417 static snd_pcm_hardware_t snd_cs4231_playback =
1418 {
1419         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1420                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1421         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1422                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1423                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1424                                  SNDRV_PCM_FMTBIT_S16_BE),
1425         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1426         .rate_min               = 5510,
1427         .rate_max               = 48000,
1428         .channels_min           = 1,
1429         .channels_max           = 2,
1430         .buffer_bytes_max       = (32*1024),
1431         .period_bytes_min       = 4096,
1432         .period_bytes_max       = (32*1024),
1433         .periods_min            = 1,
1434         .periods_max            = 1024,
1435 };
1436
1437 static snd_pcm_hardware_t snd_cs4231_capture =
1438 {
1439         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1440                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1441         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1442                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1443                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1444                                  SNDRV_PCM_FMTBIT_S16_BE),
1445         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1446         .rate_min               = 5510,
1447         .rate_max               = 48000,
1448         .channels_min           = 1,
1449         .channels_max           = 2,
1450         .buffer_bytes_max       = (32*1024),
1451         .period_bytes_min       = 4096,
1452         .period_bytes_max       = (32*1024),
1453         .periods_min            = 1,
1454         .periods_max            = 1024,
1455 };
1456
1457 static int snd_cs4231_playback_open(snd_pcm_substream_t *substream)
1458 {
1459         cs4231_t *chip = snd_pcm_substream_chip(substream);
1460         snd_pcm_runtime_t *runtime = substream->runtime;
1461         int err;
1462
1463         runtime->hw = snd_cs4231_playback;
1464
1465         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1466                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1467                 return err;
1468         }
1469         chip->playback_substream = substream;
1470         chip->p_periods_sent = 0;
1471         snd_pcm_set_sync(substream);
1472         snd_cs4231_xrate(runtime);
1473
1474         return 0;
1475 }
1476
1477 static int snd_cs4231_capture_open(snd_pcm_substream_t *substream)
1478 {
1479         cs4231_t *chip = snd_pcm_substream_chip(substream);
1480         snd_pcm_runtime_t *runtime = substream->runtime;
1481         int err;
1482
1483         runtime->hw = snd_cs4231_capture;
1484
1485         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1486                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1487                 return err;
1488         }
1489         chip->capture_substream = substream;
1490         chip->c_periods_sent = 0;
1491         snd_pcm_set_sync(substream);
1492         snd_cs4231_xrate(runtime);
1493
1494         return 0;
1495 }
1496
1497 static int snd_cs4231_playback_close(snd_pcm_substream_t *substream)
1498 {
1499         cs4231_t *chip = snd_pcm_substream_chip(substream);
1500
1501         chip->playback_substream = NULL;
1502         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1503
1504         return 0;
1505 }
1506
1507 static int snd_cs4231_capture_close(snd_pcm_substream_t *substream)
1508 {
1509         cs4231_t *chip = snd_pcm_substream_chip(substream);
1510
1511         chip->capture_substream = NULL;
1512         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1513
1514         return 0;
1515 }
1516
1517 /* XXX We can do some power-management, in particular on EBUS using
1518  * XXX the audio AUXIO register...
1519  */
1520
1521 static snd_pcm_ops_t snd_cs4231_playback_ops = {
1522         .open           =       snd_cs4231_playback_open,
1523         .close          =       snd_cs4231_playback_close,
1524         .ioctl          =       snd_pcm_lib_ioctl,
1525         .hw_params      =       snd_cs4231_playback_hw_params,
1526         .hw_free        =       snd_cs4231_playback_hw_free,
1527         .prepare        =       snd_cs4231_playback_prepare,
1528         .trigger        =       snd_cs4231_trigger,
1529         .pointer        =       snd_cs4231_playback_pointer,
1530 };
1531
1532 static snd_pcm_ops_t snd_cs4231_capture_ops = {
1533         .open           =       snd_cs4231_capture_open,
1534         .close          =       snd_cs4231_capture_close,
1535         .ioctl          =       snd_pcm_lib_ioctl,
1536         .hw_params      =       snd_cs4231_capture_hw_params,
1537         .hw_free        =       snd_cs4231_capture_hw_free,
1538         .prepare        =       snd_cs4231_capture_prepare,
1539         .trigger        =       snd_cs4231_trigger,
1540         .pointer        =       snd_cs4231_capture_pointer,
1541 };
1542
1543 static void snd_cs4231_pcm_free(snd_pcm_t *pcm)
1544 {
1545         cs4231_t *chip = pcm->private_data;
1546         chip->pcm = NULL;
1547         snd_pcm_lib_preallocate_free_for_all(pcm);
1548 }
1549
1550 int snd_cs4231_pcm(cs4231_t *chip)
1551 {
1552         snd_pcm_t *pcm;
1553         int err;
1554
1555         if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0)
1556                 return err;
1557
1558         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1559         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1560
1561         /* global setup */
1562         pcm->private_data = chip;
1563         pcm->private_free = snd_cs4231_pcm_free;
1564         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1565         strcpy(pcm->name, "CS4231");
1566
1567 #ifdef EBUS_SUPPORT
1568         if (chip->flags & CS4231_FLAG_EBUS) {
1569                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1570                                                       snd_dma_pci_data(chip->dev_u.pdev),
1571                                                       64*1024, 128*1024);
1572         } else {
1573 #endif
1574 #ifdef SBUS_SUPPORT
1575                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1576                                                       snd_dma_sbus_data(chip->dev_u.sdev),
1577                                                       64*1024, 128*1024);
1578 #endif
1579 #ifdef EBUS_SUPPORT
1580         }
1581 #endif
1582
1583         chip->pcm = pcm;
1584
1585         return 0;
1586 }
1587
1588 static void snd_cs4231_timer_free(snd_timer_t *timer)
1589 {
1590         cs4231_t *chip = timer->private_data;
1591         chip->timer = NULL;
1592 }
1593
1594 int snd_cs4231_timer(cs4231_t *chip)
1595 {
1596         snd_timer_t *timer;
1597         snd_timer_id_t tid;
1598         int err;
1599
1600         /* Timer initialization */
1601         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1602         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1603         tid.card = chip->card->number;
1604         tid.device = 0;
1605         tid.subdevice = 0;
1606         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1607                 return err;
1608         strcpy(timer->name, "CS4231");
1609         timer->private_data = chip;
1610         timer->private_free = snd_cs4231_timer_free;
1611         timer->hw = snd_cs4231_timer_table;
1612         chip->timer = timer;
1613
1614         return 0;
1615 }
1616
1617 /*
1618  *  MIXER part
1619  */
1620
1621 static int snd_cs4231_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1622 {
1623         static char *texts[4] = {
1624                 "Line", "CD", "Mic", "Mix"
1625         };
1626         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1627
1628         snd_assert(chip->card != NULL, return -EINVAL);
1629         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1630         uinfo->count = 2;
1631         uinfo->value.enumerated.items = 4;
1632         if (uinfo->value.enumerated.item > 3)
1633                 uinfo->value.enumerated.item = 3;
1634         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1635
1636         return 0;
1637 }
1638
1639 static int snd_cs4231_get_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1640 {
1641         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1642         unsigned long flags;
1643
1644         spin_lock_irqsave(&chip->lock, flags);
1645         ucontrol->value.enumerated.item[0] =
1646                 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1647         ucontrol->value.enumerated.item[1] =
1648                 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1649         spin_unlock_irqrestore(&chip->lock, flags);
1650
1651         return 0;
1652 }
1653
1654 static int snd_cs4231_put_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1655 {
1656         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1657         unsigned long flags;
1658         unsigned short left, right;
1659         int change;
1660
1661         if (ucontrol->value.enumerated.item[0] > 3 ||
1662             ucontrol->value.enumerated.item[1] > 3)
1663                 return -EINVAL;
1664         left = ucontrol->value.enumerated.item[0] << 6;
1665         right = ucontrol->value.enumerated.item[1] << 6;
1666
1667         spin_lock_irqsave(&chip->lock, flags);
1668
1669         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1670         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1671         change = left != chip->image[CS4231_LEFT_INPUT] ||
1672                  right != chip->image[CS4231_RIGHT_INPUT];
1673         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1674         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1675
1676         spin_unlock_irqrestore(&chip->lock, flags);
1677
1678         return change;
1679 }
1680
1681 int snd_cs4231_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1682 {
1683         int mask = (kcontrol->private_value >> 16) & 0xff;
1684
1685         uinfo->type = (mask == 1) ?
1686                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1687         uinfo->count = 1;
1688         uinfo->value.integer.min = 0;
1689         uinfo->value.integer.max = mask;
1690
1691         return 0;
1692 }
1693
1694 int snd_cs4231_get_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1695 {
1696         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1697         unsigned long flags;
1698         int reg = kcontrol->private_value & 0xff;
1699         int shift = (kcontrol->private_value >> 8) & 0xff;
1700         int mask = (kcontrol->private_value >> 16) & 0xff;
1701         int invert = (kcontrol->private_value >> 24) & 0xff;
1702
1703         spin_lock_irqsave(&chip->lock, flags);
1704
1705         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1706
1707         spin_unlock_irqrestore(&chip->lock, flags);
1708
1709         if (invert)
1710                 ucontrol->value.integer.value[0] =
1711                         (mask - ucontrol->value.integer.value[0]);
1712
1713         return 0;
1714 }
1715
1716 int snd_cs4231_put_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1717 {
1718         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1719         unsigned long flags;
1720         int reg = kcontrol->private_value & 0xff;
1721         int shift = (kcontrol->private_value >> 8) & 0xff;
1722         int mask = (kcontrol->private_value >> 16) & 0xff;
1723         int invert = (kcontrol->private_value >> 24) & 0xff;
1724         int change;
1725         unsigned short val;
1726
1727         val = (ucontrol->value.integer.value[0] & mask);
1728         if (invert)
1729                 val = mask - val;
1730         val <<= shift;
1731
1732         spin_lock_irqsave(&chip->lock, flags);
1733
1734         val = (chip->image[reg] & ~(mask << shift)) | val;
1735         change = val != chip->image[reg];
1736         snd_cs4231_out(chip, reg, val);
1737
1738         spin_unlock_irqrestore(&chip->lock, flags);
1739
1740         return change;
1741 }
1742
1743 int snd_cs4231_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1744 {
1745         int mask = (kcontrol->private_value >> 24) & 0xff;
1746
1747         uinfo->type = mask == 1 ?
1748                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1749         uinfo->count = 2;
1750         uinfo->value.integer.min = 0;
1751         uinfo->value.integer.max = mask;
1752
1753         return 0;
1754 }
1755
1756 int snd_cs4231_get_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1757 {
1758         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1759         unsigned long flags;
1760         int left_reg = kcontrol->private_value & 0xff;
1761         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1762         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1763         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1764         int mask = (kcontrol->private_value >> 24) & 0xff;
1765         int invert = (kcontrol->private_value >> 22) & 1;
1766
1767         spin_lock_irqsave(&chip->lock, flags);
1768
1769         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1770         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1771
1772         spin_unlock_irqrestore(&chip->lock, flags);
1773
1774         if (invert) {
1775                 ucontrol->value.integer.value[0] =
1776                         (mask - ucontrol->value.integer.value[0]);
1777                 ucontrol->value.integer.value[1] =
1778                         (mask - ucontrol->value.integer.value[1]);
1779         }
1780
1781         return 0;
1782 }
1783
1784 int snd_cs4231_put_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1785 {
1786         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1787         unsigned long flags;
1788         int left_reg = kcontrol->private_value & 0xff;
1789         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1790         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1791         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1792         int mask = (kcontrol->private_value >> 24) & 0xff;
1793         int invert = (kcontrol->private_value >> 22) & 1;
1794         int change;
1795         unsigned short val1, val2;
1796
1797         val1 = ucontrol->value.integer.value[0] & mask;
1798         val2 = ucontrol->value.integer.value[1] & mask;
1799         if (invert) {
1800                 val1 = mask - val1;
1801                 val2 = mask - val2;
1802         }
1803         val1 <<= shift_left;
1804         val2 <<= shift_right;
1805
1806         spin_lock_irqsave(&chip->lock, flags);
1807
1808         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1809         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1810         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1811         snd_cs4231_out(chip, left_reg, val1);
1812         snd_cs4231_out(chip, right_reg, val2);
1813
1814         spin_unlock_irqrestore(&chip->lock, flags);
1815
1816         return change;
1817 }
1818
1819 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1820 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1821   .info = snd_cs4231_info_single, \
1822   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1823   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1824
1825 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1826 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1827   .info = snd_cs4231_info_double, \
1828   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1829   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1830
1831 static snd_kcontrol_new_t snd_cs4231_controls[] = {
1832 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1833 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1834 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1835 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1836 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1837 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1838 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1839 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1840 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1841 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1842 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1843 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1844 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1845 {
1846         .iface  = SNDRV_CTL_ELEM_IFACE_MIXER,
1847         .name   = "Capture Source",
1848         .info   = snd_cs4231_info_mux,
1849         .get    = snd_cs4231_get_mux,
1850         .put    = snd_cs4231_put_mux,
1851 },
1852 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1853 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1854 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1855 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1856 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1857 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1858 };
1859
1860 int snd_cs4231_mixer(cs4231_t *chip)
1861 {
1862         snd_card_t *card;
1863         int err, idx;
1864
1865         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1866
1867         card = chip->card;
1868
1869         strcpy(card->mixername, chip->pcm->name);
1870
1871         for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1872                 if ((err = snd_ctl_add(card,
1873                                        snd_ctl_new1(&snd_cs4231_controls[idx],
1874                                                     chip))) < 0)
1875                         return err;
1876         }
1877         return 0;
1878 }
1879
1880 static int dev;
1881
1882 static int cs4231_attach_begin(snd_card_t **rcard)
1883 {
1884         snd_card_t *card;
1885
1886         *rcard = NULL;
1887
1888         if (dev >= SNDRV_CARDS)
1889                 return -ENODEV;
1890
1891         if (!enable[dev]) {
1892                 dev++;
1893                 return -ENOENT;
1894         }
1895
1896         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1897         if (card == NULL)
1898                 return -ENOMEM;
1899
1900         strcpy(card->driver, "CS4231");
1901         strcpy(card->shortname, "Sun CS4231");
1902
1903         *rcard = card;
1904         return 0;
1905 }
1906
1907 static int cs4231_attach_finish(snd_card_t *card, cs4231_t *chip)
1908 {
1909         int err;
1910
1911         if ((err = snd_cs4231_pcm(chip)) < 0)
1912                 goto out_err;
1913
1914         if ((err = snd_cs4231_mixer(chip)) < 0)
1915                 goto out_err;
1916
1917         if ((err = snd_cs4231_timer(chip)) < 0)
1918                 goto out_err;
1919
1920         if ((err = snd_card_register(card)) < 0)
1921                 goto out_err;
1922
1923         chip->next = cs4231_list;
1924         cs4231_list = chip;
1925
1926         dev++;
1927         return 0;
1928
1929 out_err:
1930         snd_card_free(card);
1931         return err;
1932 }
1933
1934 #ifdef SBUS_SUPPORT
1935 static int snd_cs4231_sbus_free(cs4231_t *chip)
1936 {
1937         if (chip->irq[0])
1938                 free_irq(chip->irq[0], chip);
1939
1940         if (chip->port)
1941                 sbus_iounmap(chip->port, chip->regs_size);
1942
1943         if (chip->timer)
1944                 snd_device_free(chip->card, chip->timer);
1945
1946         kfree(chip);
1947
1948         return 0;
1949 }
1950
1951 static int snd_cs4231_sbus_dev_free(snd_device_t *device)
1952 {
1953         cs4231_t *cp = device->device_data;
1954
1955         return snd_cs4231_sbus_free(cp);
1956 }
1957
1958 static snd_device_ops_t snd_cs4231_sbus_dev_ops = {
1959         .dev_free       =       snd_cs4231_sbus_dev_free,
1960 };
1961
1962 static int __init snd_cs4231_sbus_create(snd_card_t *card,
1963                                          struct sbus_dev *sdev,
1964                                          int dev,
1965                                          cs4231_t **rchip)
1966 {
1967         cs4231_t *chip;
1968         int err;
1969
1970         *rchip = NULL;
1971         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1972         if (chip == NULL)
1973                 return -ENOMEM;
1974
1975         spin_lock_init(&chip->lock);
1976         init_MUTEX(&chip->mce_mutex);
1977         init_MUTEX(&chip->open_mutex);
1978         chip->card = card;
1979         chip->dev_u.sdev = sdev;
1980         chip->regs_size = sdev->reg_addrs[0].reg_size;
1981         memcpy(&chip->image, &snd_cs4231_original_image,
1982                sizeof(snd_cs4231_original_image));
1983
1984         chip->port = sbus_ioremap(&sdev->resource[0], 0,
1985                                   chip->regs_size, "cs4231");
1986         if (!chip->port) {
1987                 snd_printk("cs4231-%d: Unable to map chip registers.\n", dev);
1988                 return -EIO;
1989         }
1990
1991         if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
1992                         SA_SHIRQ, "cs4231", chip)) {
1993                 snd_printk("cs4231-%d: Unable to grab SBUS IRQ %s\n",
1994                            dev,
1995                            __irq_itoa(sdev->irqs[0]));
1996                 snd_cs4231_sbus_free(chip);
1997                 return -EBUSY;
1998         }
1999         chip->irq[0] = sdev->irqs[0];
2000
2001         if (snd_cs4231_probe(chip) < 0) {
2002                 snd_cs4231_sbus_free(chip);
2003                 return -ENODEV;
2004         }
2005         snd_cs4231_init(chip);
2006
2007         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2008                                   chip, &snd_cs4231_sbus_dev_ops)) < 0) {
2009                 snd_cs4231_sbus_free(chip);
2010                 return err;
2011         }
2012
2013         *rchip = chip;
2014         return 0;
2015 }
2016
2017 static int cs4231_sbus_attach(struct sbus_dev *sdev)
2018 {
2019         struct resource *rp = &sdev->resource[0];
2020         cs4231_t *cp;
2021         snd_card_t *card;
2022         int err;
2023
2024         err = cs4231_attach_begin(&card);
2025         if (err)
2026                 return err;
2027
2028         sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %s",
2029                 card->shortname,
2030                 rp->flags & 0xffL,
2031                 rp->start,
2032                 __irq_itoa(sdev->irqs[0]));
2033
2034         if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) {
2035                 snd_card_free(card);
2036                 return err;
2037         }
2038
2039         return cs4231_attach_finish(card, cp);
2040 }
2041 #endif
2042
2043 #ifdef EBUS_SUPPORT
2044 static int snd_cs4231_ebus_free(cs4231_t *chip)
2045 {
2046         if (chip->eb2c.regs) {
2047                 ebus_dma_unregister(&chip->eb2c);
2048                 iounmap(chip->eb2c.regs);
2049         }
2050         if (chip->eb2p.regs) {
2051                 ebus_dma_unregister(&chip->eb2p);
2052                 iounmap(chip->eb2p.regs);
2053         }
2054
2055         if (chip->port)
2056                 iounmap(chip->port);
2057         if (chip->timer)
2058                 snd_device_free(chip->card, chip->timer);
2059
2060         kfree(chip);
2061
2062         return 0;
2063 }
2064
2065 static int snd_cs4231_ebus_dev_free(snd_device_t *device)
2066 {
2067         cs4231_t *cp = device->device_data;
2068
2069         return snd_cs4231_ebus_free(cp);
2070 }
2071
2072 static snd_device_ops_t snd_cs4231_ebus_dev_ops = {
2073         .dev_free       =       snd_cs4231_ebus_dev_free,
2074 };
2075
2076 static int __init snd_cs4231_ebus_create(snd_card_t *card,
2077                                          struct linux_ebus_device *edev,
2078                                          int dev,
2079                                          cs4231_t **rchip)
2080 {
2081         cs4231_t *chip;
2082         int err;
2083
2084         *rchip = NULL;
2085         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
2086         if (chip == NULL)
2087                 return -ENOMEM;
2088
2089         spin_lock_init(&chip->lock);
2090         spin_lock_init(&chip->eb2c.lock);
2091         spin_lock_init(&chip->eb2p.lock);
2092         init_MUTEX(&chip->mce_mutex);
2093         init_MUTEX(&chip->open_mutex);
2094         chip->flags |= CS4231_FLAG_EBUS;
2095         chip->card = card;
2096         chip->dev_u.pdev = edev->bus->self;
2097         memcpy(&chip->image, &snd_cs4231_original_image,
2098                sizeof(snd_cs4231_original_image));
2099         strcpy(chip->eb2c.name, "cs4231(capture)");
2100         chip->eb2c.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2101         chip->eb2c.callback = snd_cs4231_ebus_capture_callback;
2102         chip->eb2c.client_cookie = chip;
2103         chip->eb2c.irq = edev->irqs[0];
2104         strcpy(chip->eb2p.name, "cs4231(play)");
2105         chip->eb2p.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2106         chip->eb2p.callback = snd_cs4231_ebus_play_callback;
2107         chip->eb2p.client_cookie = chip;
2108         chip->eb2p.irq = edev->irqs[1];
2109
2110         chip->port = ioremap(edev->resource[0].start, 0x10);
2111         chip->eb2p.regs = ioremap(edev->resource[1].start, 0x10);
2112         chip->eb2c.regs = ioremap(edev->resource[2].start, 0x10);
2113         if (!chip->port || !chip->eb2p.regs || !chip->eb2c.regs) {
2114                 snd_cs4231_ebus_free(chip);
2115                 snd_printk("cs4231-%d: Unable to map chip registers.\n", dev);
2116                 return -EIO;
2117         }
2118
2119         if (ebus_dma_register(&chip->eb2c)) {
2120                 snd_cs4231_ebus_free(chip);
2121                 snd_printk("cs4231-%d: Unable to register EBUS capture DMA\n", dev);
2122                 return -EBUSY;
2123         }
2124         if (ebus_dma_irq_enable(&chip->eb2c, 1)) {
2125                 snd_cs4231_ebus_free(chip);
2126                 snd_printk("cs4231-%d: Unable to enable EBUS capture IRQ\n", dev);
2127                 return -EBUSY;
2128         }
2129
2130         if (ebus_dma_register(&chip->eb2p)) {
2131                 snd_cs4231_ebus_free(chip);
2132                 snd_printk("cs4231-%d: Unable to register EBUS play DMA\n", dev);
2133                 return -EBUSY;
2134         }
2135         if (ebus_dma_irq_enable(&chip->eb2p, 1)) {
2136                 snd_cs4231_ebus_free(chip);
2137                 snd_printk("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2138                 return -EBUSY;
2139         }
2140
2141         if (snd_cs4231_probe(chip) < 0) {
2142                 snd_cs4231_ebus_free(chip);
2143                 return -ENODEV;
2144         }
2145         snd_cs4231_init(chip);
2146
2147         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2148                                   chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2149                 snd_cs4231_ebus_free(chip);
2150                 return err;
2151         }
2152
2153         *rchip = chip;
2154         return 0;
2155 }
2156
2157 static int cs4231_ebus_attach(struct linux_ebus_device *edev)
2158 {
2159         snd_card_t *card;
2160         cs4231_t *chip;
2161         int err;
2162
2163         err = cs4231_attach_begin(&card);
2164         if (err)
2165                 return err;
2166
2167         sprintf(card->longname, "%s at 0x%lx, irq %s",
2168                 card->shortname,
2169                 edev->resource[0].start,
2170                 __irq_itoa(edev->irqs[0]));
2171
2172         if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) {
2173                 snd_card_free(card);
2174                 return err;
2175         }
2176
2177         return cs4231_attach_finish(card, chip);
2178 }
2179 #endif
2180
2181 static int __init cs4231_init(void)
2182 {
2183 #ifdef SBUS_SUPPORT
2184         struct sbus_bus *sbus;
2185         struct sbus_dev *sdev;
2186 #endif
2187 #ifdef EBUS_SUPPORT
2188         struct linux_ebus *ebus;
2189         struct linux_ebus_device *edev;
2190 #endif
2191         int found;
2192
2193         found = 0;
2194
2195 #ifdef SBUS_SUPPORT
2196         for_all_sbusdev(sdev, sbus) {
2197                 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2198                         if (cs4231_sbus_attach(sdev) == 0)
2199                                 found++;
2200                 }
2201         }
2202 #endif
2203 #ifdef EBUS_SUPPORT
2204         for_each_ebus(ebus) {
2205                 for_each_ebusdev(edev, ebus) {
2206                         int match = 0;
2207
2208                         if (!strcmp(edev->prom_name, "SUNW,CS4231")) {
2209                                 match = 1;
2210                         } else if (!strcmp(edev->prom_name, "audio")) {
2211                                 char compat[16];
2212
2213                                 prom_getstring(edev->prom_node, "compatible",
2214                                                compat, sizeof(compat));
2215                                 compat[15] = '\0';
2216                                 if (!strcmp(compat, "SUNW,CS4231"))
2217                                         match = 1;
2218                         }
2219
2220                         if (match &&
2221                             cs4231_ebus_attach(edev) == 0)
2222                                 found++;
2223                 }
2224         }
2225 #endif
2226
2227
2228         return (found > 0) ? 0 : -EIO;
2229 }
2230
2231 static void __exit cs4231_exit(void)
2232 {
2233         cs4231_t *p = cs4231_list;
2234
2235         while (p != NULL) {
2236                 cs4231_t *next = p->next;
2237
2238                 snd_card_free(p->card);
2239
2240                 p = next;
2241         }
2242
2243         cs4231_list = NULL;
2244 }
2245
2246 module_init(cs4231_init);
2247 module_exit(cs4231_exit);